Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.54 99.31 96.31 100.00 95.51 98.71 99.34 93.62


Total tests in report: 914
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
48.18 48.18 45.88 45.88 31.13 31.13 77.33 77.33 95.51 95.51 51.76 51.76 33.61 33.61 2.02 2.02 /workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.3965306546
67.00 18.82 72.43 26.55 66.20 35.07 82.80 5.47 95.51 0.00 75.81 24.05 57.58 23.97 18.65 16.63 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1925472474
84.66 17.66 92.60 20.18 85.24 19.05 93.05 10.25 95.51 0.00 92.13 16.32 87.92 30.34 46.13 27.48 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3551795497
87.42 2.76 94.34 1.74 86.91 1.67 93.05 0.00 95.51 0.00 93.60 1.46 92.13 4.21 56.38 10.25 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3229101878
89.55 2.13 96.65 2.31 89.01 2.10 94.87 1.82 95.51 0.00 95.13 1.53 95.88 3.75 59.81 3.44 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1109481144
91.01 1.46 96.79 0.14 92.63 3.62 97.49 2.62 95.51 0.00 95.41 0.28 96.72 0.84 62.54 2.73 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3583247896
92.01 1.00 96.89 0.10 92.78 0.14 97.49 0.00 95.51 0.00 95.58 0.17 97.00 0.28 68.81 6.27 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.3199043792
92.79 0.78 96.98 0.09 92.82 0.05 97.49 0.00 95.51 0.00 95.68 0.10 97.19 0.19 73.83 5.02 /workspace/coverage/default/11.sysrst_ctrl_stress_all.290402669
93.35 0.56 97.00 0.02 92.99 0.17 98.41 0.91 95.51 0.00 95.68 0.00 97.57 0.37 76.28 2.45 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1491092335
93.81 0.46 97.07 0.07 93.25 0.26 98.41 0.00 95.51 0.00 95.79 0.10 97.66 0.09 78.95 2.67 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.156456811
94.23 0.42 97.38 0.31 93.25 0.00 99.32 0.91 95.51 0.00 96.17 0.38 97.66 0.00 80.32 1.36 /workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.3798668835
94.65 0.42 97.52 0.14 93.40 0.14 99.32 0.00 95.51 0.00 96.38 0.21 97.75 0.09 82.66 2.34 /workspace/coverage/default/26.sysrst_ctrl_stress_all.4080974607
95.02 0.37 97.52 0.00 93.40 0.00 99.32 0.00 95.51 0.00 96.38 0.00 97.75 0.00 85.28 2.62 /workspace/coverage/default/42.sysrst_ctrl_stress_all.523415590
95.33 0.31 98.49 0.97 93.56 0.17 99.32 0.00 95.51 0.00 97.42 1.04 97.75 0.00 85.28 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.137825590
95.56 0.23 98.56 0.07 93.68 0.12 99.32 0.00 95.51 0.00 97.49 0.07 97.85 0.09 86.53 1.25 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.4217308495
95.77 0.21 98.56 0.00 94.54 0.86 99.32 0.00 95.51 0.00 97.53 0.03 97.85 0.00 87.08 0.55 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.3683477976
95.95 0.18 98.59 0.03 94.56 0.02 99.32 0.00 95.51 0.00 97.56 0.03 97.94 0.09 88.17 1.09 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2965350250
96.11 0.15 98.73 0.14 95.14 0.57 99.32 0.00 95.51 0.00 97.84 0.28 98.03 0.09 88.17 0.00 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.33959723
96.23 0.12 98.77 0.03 95.18 0.05 99.32 0.00 95.51 0.00 97.88 0.03 98.13 0.09 88.82 0.65 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1283832228
96.33 0.10 98.77 0.00 95.21 0.02 99.77 0.46 95.51 0.00 97.88 0.00 98.22 0.09 88.93 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.4149229714
96.42 0.10 98.80 0.03 95.23 0.02 99.77 0.00 95.51 0.00 97.91 0.03 98.31 0.09 89.42 0.49 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.3331725874
96.50 0.08 98.80 0.00 95.23 0.00 99.77 0.00 95.51 0.00 97.91 0.00 98.31 0.00 89.97 0.55 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3223758382
96.58 0.08 98.80 0.00 95.23 0.00 99.77 0.00 95.51 0.00 97.91 0.00 98.31 0.00 90.51 0.55 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3624068667
96.65 0.07 98.87 0.07 95.33 0.10 99.77 0.00 95.51 0.00 98.05 0.14 98.50 0.19 90.51 0.00 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.4032109463
96.71 0.06 98.91 0.03 95.40 0.07 99.77 0.00 95.51 0.00 98.09 0.03 98.69 0.19 90.62 0.11 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2281744739
96.77 0.05 98.91 0.00 95.78 0.38 99.77 0.00 95.51 0.00 98.09 0.00 98.69 0.00 90.62 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3728287159
96.82 0.05 98.92 0.02 95.78 0.00 99.77 0.00 95.51 0.00 98.12 0.03 98.69 0.00 90.95 0.33 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3087846305
96.87 0.04 98.92 0.00 95.88 0.10 99.77 0.00 95.51 0.00 98.12 0.00 98.69 0.00 91.17 0.22 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3864778174
96.91 0.04 98.92 0.00 95.92 0.05 100.00 0.23 95.51 0.00 98.12 0.00 98.69 0.00 91.17 0.00 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1343721096
96.94 0.04 98.92 0.00 95.92 0.00 100.00 0.00 95.51 0.00 98.12 0.00 98.69 0.00 91.44 0.27 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2934406707
96.98 0.04 98.92 0.00 95.92 0.00 100.00 0.00 95.51 0.00 98.12 0.00 98.69 0.00 91.71 0.27 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.197296178
97.02 0.03 98.96 0.03 95.95 0.02 100.00 0.00 95.51 0.00 98.16 0.03 98.78 0.09 91.77 0.05 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2821785674
97.05 0.03 99.01 0.05 95.97 0.02 100.00 0.00 95.51 0.00 98.22 0.07 98.88 0.09 91.77 0.00 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.995654942
97.09 0.03 99.06 0.05 96.00 0.02 100.00 0.00 95.51 0.00 98.29 0.07 98.97 0.09 91.77 0.00 /workspace/coverage/default/9.sysrst_ctrl_stress_all.2058564023
97.12 0.03 99.06 0.00 96.00 0.00 100.00 0.00 95.51 0.00 98.29 0.00 98.97 0.00 91.98 0.22 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.248095505
97.15 0.03 99.10 0.03 96.00 0.00 100.00 0.00 95.51 0.00 98.36 0.07 98.97 0.00 92.09 0.11 /workspace/coverage/default/32.sysrst_ctrl_stress_all.2772391156
97.17 0.03 99.10 0.00 96.19 0.19 100.00 0.00 95.51 0.00 98.36 0.00 98.97 0.00 92.09 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1231111979
97.20 0.03 99.13 0.03 96.21 0.02 100.00 0.00 95.51 0.00 98.40 0.03 99.06 0.09 92.09 0.00 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3424847265
97.23 0.03 99.17 0.03 96.23 0.02 100.00 0.00 95.51 0.00 98.43 0.03 99.16 0.09 92.09 0.00 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.4002478960
97.25 0.03 99.20 0.03 96.26 0.02 100.00 0.00 95.51 0.00 98.47 0.03 99.25 0.09 92.09 0.00 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2342668634
97.28 0.02 99.20 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.47 0.00 99.25 0.00 92.26 0.16 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1112606275
97.30 0.02 99.22 0.02 96.26 0.00 100.00 0.00 95.51 0.00 98.50 0.03 99.25 0.00 92.37 0.11 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3917838573
97.32 0.02 99.22 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.50 0.00 99.25 0.00 92.48 0.11 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3479884781
97.33 0.02 99.22 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.50 0.00 99.25 0.00 92.58 0.11 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3652607919
97.35 0.02 99.22 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.50 0.00 99.25 0.00 92.69 0.11 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.743846241
97.36 0.02 99.22 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.50 0.00 99.25 0.00 92.80 0.11 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.39361956
97.38 0.02 99.22 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.50 0.00 99.25 0.00 92.91 0.11 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3848896060
97.39 0.01 99.25 0.03 96.26 0.00 100.00 0.00 95.51 0.00 98.57 0.07 99.25 0.00 92.91 0.00 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.3313492492
97.41 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.57 0.00 99.34 0.09 92.91 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.4240837332
97.42 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.03 99.34 0.00 92.97 0.05 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.973603825
97.43 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.02 0.05 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2837772624
97.44 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.08 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.773473860
97.44 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.13 0.05 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3518043045
97.45 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.18 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.2486486411
97.46 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.24 0.05 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2848030563
97.47 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.29 0.05 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3840306147
97.47 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.35 0.05 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.367983208
97.48 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.40 0.05 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.2758395657
97.49 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.46 0.05 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3068272619
97.50 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.51 0.05 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3450725585
97.51 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.57 0.05 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1844258152
97.51 0.01 99.25 0.00 96.26 0.00 100.00 0.00 95.51 0.00 98.61 0.00 99.34 0.00 93.62 0.05 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1394467628
97.52 0.01 99.27 0.02 96.26 0.00 100.00 0.00 95.51 0.00 98.64 0.03 99.34 0.00 93.62 0.00 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3511085850
97.53 0.01 99.29 0.02 96.26 0.00 100.00 0.00 95.51 0.00 98.68 0.03 99.34 0.00 93.62 0.00 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.839484190
97.54 0.01 99.31 0.02 96.26 0.00 100.00 0.00 95.51 0.00 98.71 0.03 99.34 0.00 93.62 0.00 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.3245271402
97.54 0.01 99.31 0.00 96.28 0.02 100.00 0.00 95.51 0.00 98.71 0.00 99.34 0.00 93.62 0.00 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1995076197

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.4008427663
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.345486807
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.448256557
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3624659018
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.1025804057
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2235129710
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2571626384
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2515121949
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2175484165
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2099178317
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3457114804
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2025893084
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1723327079
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1090265227
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1872168017
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2474792999
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1874954058
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3915478477
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1848140795
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1377926849
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2643775182
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1357335228
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4274149214
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1700144505
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3931289554
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3239569655
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.566182417
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1027117453
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.26005028
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2042019192
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.440191272
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.4061112970
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2895425306
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1201366660
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3897896969
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3786279858
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2754313563
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.4082755666
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.4057894383
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.307960291
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.499644741
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.4205701670
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2433676
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3602272150
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2198696418
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1226619188
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4099045855
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3049797530
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.203515502
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.647296371
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1450583731
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.357533102
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2078306730
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3732191797
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3412694859
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2441010970
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.924285188
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1551336809
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.65702682
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1867704347
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.807199174
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3518789790
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3707898321
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1369847361
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.1319684196
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.4282289857
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.304793489
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.416162356
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1360869552
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2448016613
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.78180824
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.3842160554
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3959363467
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1986400895
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.3758692242
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2175167116
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.4038816518
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.3838879187
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.436232671
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.3931793156
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2606835628
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.2985136997
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.2418418797
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.1278383683
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.519123996
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.3938537421
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.3896528029
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/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4278353537
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3157961411
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.323097126
/workspace/coverage/default/42.sysrst_ctrl_smoke.955128497
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1647554876
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.392979190
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3797154325
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.714881640
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1916011837
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2256789428
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.4147476724
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2696382427
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4120427635
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2854450708
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.585724207
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4024687035
/workspace/coverage/default/43.sysrst_ctrl_smoke.1772611660
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1768355750
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2345475833
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1233043908
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2376721715
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2944160337
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3692404862
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2850891895
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1314261851
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.154982314
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1365739352
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.632997401
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4010825508
/workspace/coverage/default/44.sysrst_ctrl_smoke.3366672821
/workspace/coverage/default/44.sysrst_ctrl_stress_all.734261990
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2254072770
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1418303685
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3788429883
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.737819610
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.93744321
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4029122377
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.421921543
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1004616017
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1202993094
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3114758070
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.157665877
/workspace/coverage/default/45.sysrst_ctrl_smoke.1984014400
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2435448123
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2132426225
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1612975452
/workspace/coverage/default/46.sysrst_ctrl_alert_test.4052629671
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4104498962
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1696903846
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.214808166
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3662042555
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3290668649
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4014205213
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2272796874
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1078557810
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2287165656
/workspace/coverage/default/46.sysrst_ctrl_smoke.482946422
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3213312025
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1558660083
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.69132453
/workspace/coverage/default/47.sysrst_ctrl_alert_test.265243832
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.922682985
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.396501894
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.479118225
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.4032271720
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3767505156
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.952782941
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.158635636
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.529452935
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1896624990
/workspace/coverage/default/47.sysrst_ctrl_smoke.1510702354
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2083824536
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1768563387
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3318634857
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2052913898
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.696210186
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.308027483
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2292703579
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3038330843
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1441583206
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3052381960
/workspace/coverage/default/48.sysrst_ctrl_smoke.3341141538
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3321538694
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.418605002
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1399213226
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1804727848
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3138128561
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.4082687748
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1222277823
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3693270344
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3081414254
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3389662121
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.106677122
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3688273075
/workspace/coverage/default/49.sysrst_ctrl_smoke.1586421951
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2579944725
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1970682407
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1888431532
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2901666301
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2532349970
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.4208872818
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.46944380
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2521216279
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2974021557
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.296448389
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3303710800
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3358693112
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2326872670
/workspace/coverage/default/5.sysrst_ctrl_smoke.1662364130
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3610640370
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3556257405
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3285726235
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.98390180
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1386001683
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.972009609
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3736054591
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.835076356
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.4062003684
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3535947203
/workspace/coverage/default/6.sysrst_ctrl_alert_test.564618873
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1234022830
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2671050694
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.849796043
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1646808580
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.4169649371
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1708251245
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2230147347
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.268953570
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4279109860
/workspace/coverage/default/6.sysrst_ctrl_smoke.999978324
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2101736920
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.224515238
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.703683362
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3901531584
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2963171208
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1018317705
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.626777278
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3247773796
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3775513027
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3382129623
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3354731716
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3022979658
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3257435012
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1914063400
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4240015409
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1539830160
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1976683224
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.839804074
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3040513544
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1657936441
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1085624217
/workspace/coverage/default/7.sysrst_ctrl_smoke.1702838284
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2617745293
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1120417343
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3541561977
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3841163323
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2598744777
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1358165857
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.793536539
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3123389611
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3103011270
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3357318787
/workspace/coverage/default/8.sysrst_ctrl_alert_test.677577579
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3886465339
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.872294948
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2548823805
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.722505885
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3889731439
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3634074888
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.846576756
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.255842023
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.4134705168
/workspace/coverage/default/8.sysrst_ctrl_smoke.1199394969
/workspace/coverage/default/8.sysrst_ctrl_stress_all.555344257
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1399249837
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4227767784
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3224059186
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3754568308
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3805139748
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.547997441
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2926222416
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.706261317
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3565309069
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1345192175
/workspace/coverage/default/9.sysrst_ctrl_alert_test.268867455
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.50923736
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1522418922
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3812540240
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.39933794
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1323085102
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2256726573
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3502387885
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.932284871
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1429384323
/workspace/coverage/default/9.sysrst_ctrl_smoke.4083939111
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4288701286
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2530345706
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.411022290
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3029986985
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1332927355
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2270667783
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.865656046
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.739741021
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3530333489



Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T7 /workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.3965306546 Jan 03 01:02:50 PM PST 24 Jan 03 01:04:02 PM PST 24 2014565279 ps
T8 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.3473399909 Jan 03 01:02:10 PM PST 24 Jan 03 01:03:19 PM PST 24 2086273739 ps
T1 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.4282289857 Jan 03 01:02:19 PM PST 24 Jan 03 01:03:29 PM PST 24 2095266538 ps
T23 /workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.3066687131 Jan 03 01:02:45 PM PST 24 Jan 03 01:03:53 PM PST 24 2024314084 ps
T2 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3707898321 Jan 03 01:02:20 PM PST 24 Jan 03 01:03:32 PM PST 24 5411029363 ps
T24 /workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.3798668835 Jan 03 01:02:47 PM PST 24 Jan 03 01:03:55 PM PST 24 2023762371 ps
T25 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.2870610117 Jan 03 01:02:12 PM PST 24 Jan 03 01:03:23 PM PST 24 2012762443 ps
T3 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.807199174 Jan 03 01:02:27 PM PST 24 Jan 03 01:03:37 PM PST 24 2045322554 ps
T26 /workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.3589212486 Jan 03 01:02:49 PM PST 24 Jan 03 01:04:01 PM PST 24 2010068809 ps
T27 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.3604321833 Jan 03 01:02:03 PM PST 24 Jan 03 01:04:30 PM PST 24 75002772140 ps
T28 /workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.54456967 Jan 03 01:02:49 PM PST 24 Jan 03 01:03:56 PM PST 24 2036462103 ps
T29 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.3873911903 Jan 03 01:02:20 PM PST 24 Jan 03 01:03:30 PM PST 24 4057784566 ps
T4 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1925472474 Jan 03 01:02:11 PM PST 24 Jan 03 01:03:45 PM PST 24 22339747912 ps
T39 /workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.2146076343 Jan 03 01:02:31 PM PST 24 Jan 03 01:03:41 PM PST 24 2038566793 ps
T5 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3624659018 Jan 03 01:02:02 PM PST 24 Jan 03 01:03:13 PM PST 24 2112750318 ps
T6 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3583247896 Jan 03 01:02:17 PM PST 24 Jan 03 01:03:32 PM PST 24 2874810459 ps
T9 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.33959723 Jan 03 01:02:16 PM PST 24 Jan 03 01:03:46 PM PST 24 9927402183 ps
T10 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.357533102 Jan 03 01:02:11 PM PST 24 Jan 03 01:03:39 PM PST 24 7915259197 ps
T49 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.203515502 Jan 03 01:02:17 PM PST 24 Jan 03 01:03:31 PM PST 24 2111532395 ps
T281 /workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.3938537421 Jan 03 01:02:27 PM PST 24 Jan 03 01:03:40 PM PST 24 2019049722 ps
T250 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2571626384 Jan 03 01:02:13 PM PST 24 Jan 03 01:03:23 PM PST 24 2642628190 ps
T11 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.924285188 Jan 03 01:02:12 PM PST 24 Jan 03 01:03:25 PM PST 24 10663990897 ps
T12 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.4082755666 Jan 03 01:02:06 PM PST 24 Jan 03 01:03:20 PM PST 24 2054372177 ps
T285 /workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.66890935 Jan 03 01:02:44 PM PST 24 Jan 03 01:03:51 PM PST 24 2043075573 ps
T282 /workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.2985136997 Jan 03 01:02:34 PM PST 24 Jan 03 01:03:45 PM PST 24 2016482459 ps
T40 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1491092335 Jan 03 01:02:18 PM PST 24 Jan 03 01:04:10 PM PST 24 42667584641 ps
T254 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.26005028 Jan 03 01:02:02 PM PST 24 Jan 03 01:03:18 PM PST 24 2022176539 ps
T36 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.667720993 Jan 03 01:02:02 PM PST 24 Jan 03 01:03:32 PM PST 24 5330409236 ps
T37 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.1590363493 Jan 03 01:02:15 PM PST 24 Jan 03 01:03:26 PM PST 24 24216363936 ps
T286 /workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.1278383683 Jan 03 01:02:26 PM PST 24 Jan 03 01:03:37 PM PST 24 2025119461 ps
T343 /workspace/coverage/cover_reg_top/43.sysrst_ctrl_intr_test.482061693 Jan 03 01:02:42 PM PST 24 Jan 03 01:03:52 PM PST 24 2011088294 ps
T38 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.2302568093 Jan 03 01:02:03 PM PST 24 Jan 03 01:03:14 PM PST 24 2080163519 ps
T255 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3915478477 Jan 03 01:02:16 PM PST 24 Jan 03 01:03:24 PM PST 24 2076778447 ps
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