Group : sysrst_ctrl_env_pkg::sysrst_ctrl_auto_blk_key_output_vseq::sysrst_ctrl_auto_blk_out_ctl_cg
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Group : sysrst_ctrl_env_pkg::sysrst_ctrl_auto_blk_key_output_vseq::sysrst_ctrl_auto_blk_out_ctl_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 82.64 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sysrst_ctrl_env_0.1/seq_lib/sysrst_ctrl_auto_blk_key_output_vseq.sv

6 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
sysrst_ctrl_auto_blk_out_ctl_cg_(5) 62.50 1 100 1 64 64
sysrst_ctrl_auto_blk_out_ctl_cg_(2) 70.83 1 100 1 64 64
sysrst_ctrl_auto_blk_out_ctl_cg_(4) 70.83 1 100 1 64 64
sysrst_ctrl_auto_blk_out_ctl_cg_(3) 91.67 1 100 1 64 64
sysrst_ctrl_auto_blk_out_ctl_cg 100.00 1 100 1 64 64
sysrst_ctrl_auto_blk_out_ctl_cg_(1) 100.00 1 100 1 64 64




Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(5)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
62.50 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(5)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 12 3 9 75.00
Crosses 12 6 6 50.00


Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(5)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_key0_out_sel 2 0 2 100.00 100 1 1 2
cp_key0_out_value 2 1 1 50.00 100 1 1 2
cp_key1_out_sel 2 0 2 100.00 100 1 1 2
cp_key1_out_value 2 1 1 50.00 100 1 1 2
cp_key2_out_sel 2 0 2 100.00 100 1 1 2
cp_key2_out_value 2 1 1 50.00 100 1 1 2


Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(5)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cross_key0_out_sel_value 4 2 2 50.00 100 1 1 0
cross_key1_out_sel_value 4 2 2 50.00 100 1 1 0
cross_key2_out_sel_value 4 2 2 50.00 100 1 1 0



Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(2)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
70.83 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(2)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 12 2 10 83.33
Crosses 12 5 7 58.33


Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(2)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_key0_out_sel 2 0 2 100.00 100 1 1 2
cp_key0_out_value 2 1 1 50.00 100 1 1 2
cp_key1_out_sel 2 1 1 50.00 100 1 1 2
cp_key1_out_value 2 0 2 100.00 100 1 1 2
cp_key2_out_sel 2 0 2 100.00 100 1 1 2
cp_key2_out_value 2 0 2 100.00 100 1 1 2


Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(2)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cross_key0_out_sel_value 4 2 2 50.00 100 1 1 0
cross_key1_out_sel_value 4 2 2 50.00 100 1 1 0
cross_key2_out_sel_value 4 1 3 75.00 100 1 1 0



Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(4)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
70.83 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(4)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 12 1 11 91.67
Crosses 12 6 6 50.00


Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(4)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_key0_out_sel 2 0 2 100.00 100 1 1 2
cp_key0_out_value 2 0 2 100.00 100 1 1 2
cp_key1_out_sel 2 1 1 50.00 100 1 1 2
cp_key1_out_value 2 0 2 100.00 100 1 1 2
cp_key2_out_sel 2 0 2 100.00 100 1 1 2
cp_key2_out_value 2 0 2 100.00 100 1 1 2


Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(4)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cross_key0_out_sel_value 4 2 2 50.00 100 1 1 0
cross_key1_out_sel_value 4 2 2 50.00 100 1 1 0
cross_key2_out_sel_value 4 2 2 50.00 100 1 1 0



Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(3)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
91.67 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(3)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 12 0 12 100.00
Crosses 12 2 10 83.33


Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(3)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_key0_out_sel 2 0 2 100.00 100 1 1 2
cp_key0_out_value 2 0 2 100.00 100 1 1 2
cp_key1_out_sel 2 0 2 100.00 100 1 1 2
cp_key1_out_value 2 0 2 100.00 100 1 1 2
cp_key2_out_sel 2 0 2 100.00 100 1 1 2
cp_key2_out_value 2 0 2 100.00 100 1 1 2


Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(3)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cross_key0_out_sel_value 4 1 3 75.00 100 1 1 0
cross_key1_out_sel_value 4 1 3 75.00 100 1 1 0
cross_key2_out_sel_value 4 0 4 100.00 100 1 1 0



Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 12 0 12 100.00
Crosses 12 0 12 100.00


Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_key0_out_sel 2 0 2 100.00 100 1 1 2
cp_key0_out_value 2 0 2 100.00 100 1 1 2
cp_key1_out_sel 2 0 2 100.00 100 1 1 2
cp_key1_out_value 2 0 2 100.00 100 1 1 2
cp_key2_out_sel 2 0 2 100.00 100 1 1 2
cp_key2_out_value 2 0 2 100.00 100 1 1 2


Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cross_key0_out_sel_value 4 0 4 100.00 100 1 1 0
cross_key1_out_sel_value 4 0 4 100.00 100 1 1 0
cross_key2_out_sel_value 4 0 4 100.00 100 1 1 0



Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(1)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(1)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 12 0 12 100.00
Crosses 12 0 12 100.00


Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(1)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_key0_out_sel 2 0 2 100.00 100 1 1 2
cp_key0_out_value 2 0 2 100.00 100 1 1 2
cp_key1_out_sel 2 0 2 100.00 100 1 1 2
cp_key1_out_value 2 0 2 100.00 100 1 1 2
cp_key2_out_sel 2 0 2 100.00 100 1 1 2
cp_key2_out_value 2 0 2 100.00 100 1 1 2


Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(1)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cross_key0_out_sel_value 4 0 4 100.00 100 1 1 0
cross_key1_out_sel_value 4 0 4 100.00 100 1 1 0
cross_key2_out_sel_value 4 0 4 100.00 100 1 1 0


Summary for Variable cp_key0_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T347 1
auto[1] 2 1 T347 2



Summary for Variable cp_key0_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for cp_key0_out_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 3 1 T347 3



Summary for Variable cp_key1_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T347 1
auto[1] 2 1 T347 2



Summary for Variable cp_key1_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for cp_key1_out_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 3 1 T347 3



Summary for Variable cp_key2_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 2 1 T347 2
auto[1] 1 1 T347 1



Summary for Variable cp_key2_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for cp_key2_out_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 3 1 T347 3



Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key0_out_sel_value

Element holes
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[1]] * -- -- 2


Covered bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[0] 1 1 T347 1
auto[0] auto[1] 2 1 T347 2



Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key1_out_sel_value

Element holes
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[1]] * -- -- 2


Covered bins
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[0] 1 1 T347 1
auto[0] auto[1] 2 1 T347 2



Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key2_out_sel_value

Element holes
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[1]] * -- -- 2


Covered bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[0] 2 1 T347 2
auto[0] auto[1] 1 1 T347 1


Summary for Variable cp_key0_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 2 1 T13 2
auto[1] 1 1 T13 1



Summary for Variable cp_key0_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for cp_key0_out_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[1] 3 1 T13 3



Summary for Variable cp_key1_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for cp_key1_out_sel

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[1] 3 1 T13 3



Summary for Variable cp_key1_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T13 1
auto[1] 2 1 T13 2



Summary for Variable cp_key2_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T13 1
auto[1] 2 1 T13 2



Summary for Variable cp_key2_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T13 1
auto[1] 2 1 T13 2



Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key0_out_sel_value

Element holes
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[0]] * -- -- 2


Covered bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[1] auto[0] 2 1 T13 2
auto[1] auto[1] 1 1 T13 1



Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key1_out_sel_value

Element holes
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTNUMBERSTATUS
* [auto[0]] -- -- 2


Covered bins
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[1] 1 1 T13 1
auto[1] auto[1] 2 1 T13 2



Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 1 3 75.00 1


Automatically Generated Cross Bins for cross_key2_out_sel_value

Uncovered bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[0]] [auto[0]] 0 1 1


Covered bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[1] 1 1 T13 1
auto[1] auto[0] 1 1 T13 1
auto[1] auto[1] 1 1 T13 1


Summary for Variable cp_key0_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T347 1
auto[1] 2 1 T347 2



Summary for Variable cp_key0_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T347 1
auto[1] 2 1 T347 2



Summary for Variable cp_key1_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for cp_key1_out_sel

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[1] 3 1 T347 3



Summary for Variable cp_key1_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 2 1 T347 2
auto[1] 1 1 T347 1



Summary for Variable cp_key2_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 2 1 T347 2
auto[1] 1 1 T347 1



Summary for Variable cp_key2_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNT
auto[0] 1 1 T347 1
auto[1] 2 1 T347 2



Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key0_out_sel_value

Uncovered bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[0]] [auto[1]] 0 1 1
[auto[1]] [auto[0]] 0 1 1


Covered bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[0] 1 1 T347 1
auto[1] auto[1] 2 1 T347 2



Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key1_out_sel_value

Element holes
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTNUMBERSTATUS
* [auto[0]] -- -- 2


Covered bins
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[1] 2 1 T347 2
auto[1] auto[1] 1 1 T347 1



Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 2 2 50.00 2


Automatically Generated Cross Bins for cross_key2_out_sel_value

Uncovered bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[0]] [auto[0]] 0 1 1
[auto[1]] [auto[1]] 0 1 1


Covered bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTSTATUSTESTCOUNT
auto[0] auto[1] 1 1 T347 1
auto[1] auto[0] 2 1 T347 2


Summary for Variable cp_key0_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] 4 1 T13 2 T347 2
auto[1] 2 1 T13 1 T347 1



Summary for Variable cp_key0_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] 1 1 T13 1 - -
auto[1] 5 1 T13 2 T347 3



Summary for Variable cp_key1_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] 3 1 T13 2 T347 1
auto[1] 3 1 T13 1 T347 2



Summary for Variable cp_key1_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] 5 1 T13 3 T347 2
auto[1] 1 1 T347 1 - -



Summary for Variable cp_key2_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] 4 1 T13 2 T347 2
auto[1] 2 1 T13 1 T347 1



Summary for Variable cp_key2_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] 2 1 T13 2 - -
auto[1] 4 1 T13 1 T347 3



Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 1 3 75.00 1


Automatically Generated Cross Bins for cross_key0_out_sel_value

Uncovered bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[0]] [auto[0]] 0 1 1


Covered bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] auto[1] 1 1 T13 1 - -
auto[1] auto[0] 4 1 T13 2 T347 2
auto[1] auto[1] 1 1 T347 1 - -



Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 1 3 75.00 1


Automatically Generated Cross Bins for cross_key1_out_sel_value

Uncovered bins
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTNUMBERSTATUS
[auto[1]] [auto[0]] 0 1 1


Covered bins
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] auto[0] 3 1 T13 2 T347 1
auto[0] auto[1] 2 1 T13 1 T347 1
auto[1] auto[1] 1 1 T347 1 - -



Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cross_key2_out_sel_value

Bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNT
auto[0] auto[0] 1 1 T13 1 - -
auto[0] auto[1] 1 1 T13 1 - -
auto[1] auto[0] 3 1 T13 1 T347 2
auto[1] auto[1] 1 1 T347 1 - -


Summary for Variable cp_key0_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 109 1 T27 2 T16 3 T42 3
auto[1] 126 1 T13 2 T27 1 T28 3



Summary for Variable cp_key0_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 119 1 T13 1 T27 3 T28 2
auto[1] 116 1 T13 1 T28 1 T16 1



Summary for Variable cp_key1_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 119 1 T28 2 T16 2 T19 1
auto[1] 116 1 T13 2 T27 3 T28 1



Summary for Variable cp_key1_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 125 1 T27 1 T28 1 T16 2
auto[1] 110 1 T13 2 T27 2 T28 2



Summary for Variable cp_key2_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 118 1 T13 1 T27 1 T28 2
auto[1] 117 1 T13 1 T27 2 T28 1



Summary for Variable cp_key2_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 110 1 T13 1 T27 2 T16 1
auto[1] 125 1 T13 1 T27 1 T28 3



Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cross_key0_out_sel_value

Bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 52 1 T27 2 T16 2 T42 1
auto[0] auto[1] 67 1 T13 1 T27 1 T28 2
auto[1] auto[0] 57 1 T16 1 T42 2 T80 1
auto[1] auto[1] 59 1 T13 1 T28 1 T19 2



Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cross_key1_out_sel_value

Bins
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 62 1 T28 1 T16 1 T42 1
auto[0] auto[1] 63 1 T27 1 T16 1 T19 1
auto[1] auto[0] 57 1 T28 1 T16 1 T19 1
auto[1] auto[1] 53 1 T13 2 T27 2 T28 1



Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cross_key2_out_sel_value

Bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 50 1 T27 1 T19 2 T79 1
auto[0] auto[1] 60 1 T13 1 T27 1 T16 1
auto[1] auto[0] 68 1 T13 1 T28 2 T79 1
auto[1] auto[1] 57 1 T27 1 T28 1 T16 2


Summary for Variable cp_key0_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12 1 T13 1 T19 2 T348 1
auto[1] 15 1 T13 2 T16 3 T19 1



Summary for Variable cp_key0_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key0_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12 1 T13 1 T16 2 T179 1
auto[1] 15 1 T13 2 T16 1 T19 3



Summary for Variable cp_key1_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 15 1 T13 2 T16 2 T348 3
auto[1] 12 1 T13 1 T16 1 T19 3



Summary for Variable cp_key1_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key1_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 15 1 T13 2 T16 2 T19 1
auto[1] 12 1 T13 1 T16 1 T19 2



Summary for Variable cp_key2_out_sel

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_sel

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 12 1 T13 2 T16 1 T348 2
auto[1] 15 1 T13 1 T16 2 T19 3



Summary for Variable cp_key2_out_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_key2_out_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 16 1 T13 1 T16 2 T19 2
auto[1] 11 1 T13 2 T16 1 T19 1



Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cross_key0_out_sel_value

Bins
cp_key0_out_valuecp_key0_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 5 1 T179 1 T138 2 T188 2
auto[0] auto[1] 7 1 T13 1 T16 2 T349 3
auto[1] auto[0] 7 1 T13 1 T19 2 T348 1
auto[1] auto[1] 8 1 T13 1 T16 1 T19 1



Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cross_key1_out_sel_value

Bins
cp_key1_out_valuecp_key1_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 7 1 T13 1 T16 1 T348 2
auto[0] auto[1] 8 1 T13 1 T16 1 T19 1
auto[1] auto[0] 8 1 T13 1 T16 1 T348 1
auto[1] auto[1] 4 1 T19 2 T179 1 T138 1



Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cross_key2_out_sel_value

Bins
cp_key2_out_valuecp_key2_out_selCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 8 1 T13 1 T16 1 T348 2
auto[0] auto[1] 8 1 T16 1 T19 2 T179 1
auto[1] auto[0] 4 1 T13 1 T179 1 T138 1
auto[1] auto[1] 7 1 T13 1 T16 1 T19 1

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