| T120 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.981187329 |
|
|
Jan 24 06:46:27 PM PST 24 |
Jan 24 06:46:30 PM PST 24 |
4656397722 ps |
| T121 |
/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.827509427 |
|
|
Jan 24 06:06:08 PM PST 24 |
Jan 24 06:06:21 PM PST 24 |
10312482451 ps |
| T83 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2126694504 |
|
|
Jan 24 06:00:39 PM PST 24 |
Jan 24 06:01:43 PM PST 24 |
95291964250 ps |
| T139 |
/workspace/coverage/default/12.sysrst_ctrl_smoke.3146642933 |
|
|
Jan 24 06:17:24 PM PST 24 |
Jan 24 06:17:30 PM PST 24 |
2110724193 ps |
| T140 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.1282516592 |
|
|
Jan 24 06:25:36 PM PST 24 |
Jan 24 06:25:43 PM PST 24 |
2830772225 ps |
| T141 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2924116361 |
|
|
Jan 24 06:46:34 PM PST 24 |
Jan 24 06:46:47 PM PST 24 |
6088434296 ps |
| T142 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1344755175 |
|
|
Jan 24 06:45:05 PM PST 24 |
Jan 24 06:45:42 PM PST 24 |
14403688615 ps |
| T143 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3189320494 |
|
|
Jan 24 06:09:02 PM PST 24 |
Jan 24 06:35:09 PM PST 24 |
655077083705 ps |
| T144 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.4022555688 |
|
|
Jan 24 06:34:23 PM PST 24 |
Jan 24 06:34:26 PM PST 24 |
2136828316 ps |
| T145 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2177250682 |
|
|
Jan 24 06:37:01 PM PST 24 |
Jan 24 06:37:06 PM PST 24 |
2629960305 ps |
| T223 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2642844616 |
|
|
Jan 24 06:29:42 PM PST 24 |
Jan 24 06:30:32 PM PST 24 |
73957494518 ps |
| T425 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3006929695 |
|
|
Jan 24 06:44:17 PM PST 24 |
Jan 24 06:44:24 PM PST 24 |
2453741943 ps |
| T72 |
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2410582369 |
|
|
Jan 24 06:43:24 PM PST 24 |
Jan 24 06:44:55 PM PST 24 |
71874005759 ps |
| T426 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1598700543 |
|
|
Jan 24 06:42:24 PM PST 24 |
Jan 24 06:42:34 PM PST 24 |
3110463887 ps |
| T427 |
/workspace/coverage/default/3.sysrst_ctrl_smoke.593304328 |
|
|
Jan 24 06:46:24 PM PST 24 |
Jan 24 06:46:28 PM PST 24 |
2114910092 ps |
| T428 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.2685514224 |
|
|
Jan 24 06:41:57 PM PST 24 |
Jan 24 06:42:03 PM PST 24 |
6798332929 ps |
| T429 |
/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.4175671485 |
|
|
Jan 24 06:22:49 PM PST 24 |
Jan 24 06:22:51 PM PST 24 |
2269238639 ps |
| T430 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all.4181494189 |
|
|
Jan 24 06:44:34 PM PST 24 |
Jan 24 06:44:48 PM PST 24 |
9190771172 ps |
| T95 |
/workspace/coverage/default/29.sysrst_ctrl_combo_detect.3601009579 |
|
|
Jan 24 06:36:18 PM PST 24 |
Jan 24 06:37:53 PM PST 24 |
145764053890 ps |
| T240 |
/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2344032813 |
|
|
Jan 24 06:29:13 PM PST 24 |
Jan 24 06:29:18 PM PST 24 |
2617179099 ps |
| T241 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.1991097517 |
|
|
Jan 24 06:20:00 PM PST 24 |
Jan 24 06:20:03 PM PST 24 |
3506728901 ps |
| T73 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.4102807083 |
|
|
Jan 24 06:22:25 PM PST 24 |
Jan 24 06:25:24 PM PST 24 |
147485157197 ps |
| T242 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3823184735 |
|
|
Jan 24 06:04:36 PM PST 24 |
Jan 24 06:04:44 PM PST 24 |
2627922175 ps |
| T243 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.316526496 |
|
|
Jan 24 06:43:45 PM PST 24 |
Jan 24 06:43:47 PM PST 24 |
2074905243 ps |
| T244 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.351688240 |
|
|
Jan 24 06:13:41 PM PST 24 |
Jan 24 06:13:43 PM PST 24 |
2534479075 ps |
| T224 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.53640454 |
|
|
Jan 24 06:47:09 PM PST 24 |
Jan 24 06:48:10 PM PST 24 |
86009535309 ps |
| T237 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.2855429178 |
|
|
Jan 24 06:43:13 PM PST 24 |
Jan 24 06:49:14 PM PST 24 |
142082509382 ps |
| T233 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3339237014 |
|
|
Jan 24 06:45:34 PM PST 24 |
Jan 24 06:48:29 PM PST 24 |
126620298784 ps |
| T225 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1349578750 |
|
|
Jan 24 07:23:40 PM PST 24 |
Jan 24 07:30:41 PM PST 24 |
179825283605 ps |
| T96 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1429700168 |
|
|
Jan 24 06:56:35 PM PST 24 |
Jan 24 06:58:28 PM PST 24 |
43458129709 ps |
| T183 |
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.881086039 |
|
|
Jan 24 06:46:11 PM PST 24 |
Jan 24 06:46:18 PM PST 24 |
4340817891 ps |
| T122 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2881137911 |
|
|
Jan 24 06:07:50 PM PST 24 |
Jan 24 06:07:59 PM PST 24 |
9417755684 ps |
| T97 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.537522151 |
|
|
Jan 24 06:47:07 PM PST 24 |
Jan 24 06:47:27 PM PST 24 |
29091852241 ps |
| T431 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.516796479 |
|
|
Jan 24 06:31:35 PM PST 24 |
Jan 24 06:31:40 PM PST 24 |
4964019241 ps |
| T283 |
/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3216812686 |
|
|
Jan 24 06:42:33 PM PST 24 |
Jan 24 06:46:13 PM PST 24 |
166948820279 ps |
| T432 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2778988962 |
|
|
Jan 24 06:45:53 PM PST 24 |
Jan 24 06:46:02 PM PST 24 |
2607932781 ps |
| T84 |
/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1046359967 |
|
|
Jan 24 06:39:49 PM PST 24 |
Jan 24 06:39:57 PM PST 24 |
5279262703 ps |
| T433 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.2688970323 |
|
|
Jan 24 06:06:57 PM PST 24 |
Jan 24 06:07:04 PM PST 24 |
2013859153 ps |
| T310 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.3763324767 |
|
|
Jan 24 06:38:14 PM PST 24 |
Jan 24 06:39:06 PM PST 24 |
131586522848 ps |
| T434 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3560092997 |
|
|
Jan 24 07:02:39 PM PST 24 |
Jan 24 07:02:46 PM PST 24 |
2531633581 ps |
| T435 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.4198219294 |
|
|
Jan 24 06:44:38 PM PST 24 |
Jan 24 06:44:44 PM PST 24 |
2113420912 ps |
| T436 |
/workspace/coverage/default/25.sysrst_ctrl_smoke.1936489742 |
|
|
Jan 24 06:31:08 PM PST 24 |
Jan 24 06:31:15 PM PST 24 |
2110678638 ps |
| T437 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.98629150 |
|
|
Jan 24 07:12:16 PM PST 24 |
Jan 24 07:12:23 PM PST 24 |
2110856969 ps |
| T438 |
/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1673463408 |
|
|
Jan 24 06:02:52 PM PST 24 |
Jan 24 06:04:00 PM PST 24 |
101172025671 ps |
| T439 |
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3312903773 |
|
|
Jan 24 06:45:04 PM PST 24 |
Jan 24 06:45:09 PM PST 24 |
2456672949 ps |
| T440 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1582992921 |
|
|
Jan 24 06:39:25 PM PST 24 |
Jan 24 06:39:52 PM PST 24 |
9607221261 ps |
| T172 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.520708979 |
|
|
Jan 24 07:03:30 PM PST 24 |
Jan 24 07:03:41 PM PST 24 |
4210085866 ps |
| T123 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.464185062 |
|
|
Jan 24 06:11:42 PM PST 24 |
Jan 24 06:12:43 PM PST 24 |
27146552242 ps |
| T441 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1904830545 |
|
|
Jan 24 06:46:28 PM PST 24 |
Jan 24 06:46:33 PM PST 24 |
2515228626 ps |
| T442 |
/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2308809180 |
|
|
Jan 24 05:59:46 PM PST 24 |
Jan 24 05:59:49 PM PST 24 |
3725909555 ps |
| T124 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3878688546 |
|
|
Jan 24 06:22:30 PM PST 24 |
Jan 24 06:25:27 PM PST 24 |
71929180618 ps |
| T443 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2034123877 |
|
|
Jan 24 08:47:09 PM PST 24 |
Jan 24 08:47:11 PM PST 24 |
2285876743 ps |
| T444 |
/workspace/coverage/default/14.sysrst_ctrl_smoke.1262563921 |
|
|
Jan 24 06:45:07 PM PST 24 |
Jan 24 06:45:09 PM PST 24 |
2124680777 ps |
| T332 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.492240420 |
|
|
Jan 24 06:24:36 PM PST 24 |
Jan 24 06:25:21 PM PST 24 |
18213041439 ps |
| T445 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3428573319 |
|
|
Jan 24 06:42:49 PM PST 24 |
Jan 24 06:42:58 PM PST 24 |
2890729132 ps |
| T246 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2090006607 |
|
|
Jan 24 06:31:44 PM PST 24 |
Jan 24 06:32:10 PM PST 24 |
125480399054 ps |
| T194 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.743608141 |
|
|
Jan 24 06:19:13 PM PST 24 |
Jan 24 06:19:23 PM PST 24 |
2929490788 ps |
| T446 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1990084690 |
|
|
Jan 24 06:44:17 PM PST 24 |
Jan 24 06:44:20 PM PST 24 |
2033662194 ps |
| T447 |
/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.4066105507 |
|
|
Jan 24 06:32:21 PM PST 24 |
Jan 24 06:32:23 PM PST 24 |
2100605688 ps |
| T226 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3642126022 |
|
|
Jan 24 06:17:01 PM PST 24 |
Jan 24 06:18:40 PM PST 24 |
37690737267 ps |
| T448 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.348728307 |
|
|
Jan 24 06:35:47 PM PST 24 |
Jan 24 06:35:48 PM PST 24 |
2171891867 ps |
| T449 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.1032933473 |
|
|
Jan 24 06:43:23 PM PST 24 |
Jan 24 06:43:29 PM PST 24 |
2012120554 ps |
| T450 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1607667958 |
|
|
Jan 24 06:45:27 PM PST 24 |
Jan 24 06:45:36 PM PST 24 |
2466041820 ps |
| T451 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.433420965 |
|
|
Jan 24 06:58:47 PM PST 24 |
Jan 24 06:59:05 PM PST 24 |
4312269330 ps |
| T452 |
/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.589734992 |
|
|
Jan 24 06:35:52 PM PST 24 |
Jan 24 06:36:00 PM PST 24 |
2513911027 ps |
| T335 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.681145930 |
|
|
Jan 24 06:22:05 PM PST 24 |
Jan 24 06:22:19 PM PST 24 |
204092071920 ps |
| T453 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3162006422 |
|
|
Jan 24 06:38:39 PM PST 24 |
Jan 24 06:38:41 PM PST 24 |
2134183979 ps |
| T227 |
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.724469320 |
|
|
Jan 24 06:43:19 PM PST 24 |
Jan 24 06:43:58 PM PST 24 |
76075984476 ps |
| T454 |
/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.1990961654 |
|
|
Jan 24 06:35:45 PM PST 24 |
Jan 24 06:35:53 PM PST 24 |
2451610799 ps |
| T455 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1384206382 |
|
|
Jan 24 06:43:03 PM PST 24 |
Jan 24 06:43:04 PM PST 24 |
2153579929 ps |
| T456 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1048744758 |
|
|
Jan 24 06:04:26 PM PST 24 |
Jan 24 06:04:29 PM PST 24 |
2489919038 ps |
| T457 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.829387936 |
|
|
Jan 24 06:45:08 PM PST 24 |
Jan 24 06:45:19 PM PST 24 |
3533608152 ps |
| T458 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1474244188 |
|
|
Jan 24 06:45:23 PM PST 24 |
Jan 24 06:45:29 PM PST 24 |
2013898209 ps |
| T245 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3825602982 |
|
|
Jan 24 06:42:47 PM PST 24 |
Jan 24 06:43:24 PM PST 24 |
67988024395 ps |
| T459 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2063811242 |
|
|
Jan 24 07:03:53 PM PST 24 |
Jan 24 07:03:56 PM PST 24 |
3070328569 ps |
| T460 |
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1273884012 |
|
|
Jan 24 06:43:03 PM PST 24 |
Jan 24 06:43:08 PM PST 24 |
2462658314 ps |
| T461 |
/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.462021797 |
|
|
Jan 24 06:55:04 PM PST 24 |
Jan 24 06:55:17 PM PST 24 |
2536236396 ps |
| T229 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.873004367 |
|
|
Jan 24 06:25:38 PM PST 24 |
Jan 24 06:28:12 PM PST 24 |
54096809274 ps |
| T336 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2439281825 |
|
|
Jan 24 06:00:02 PM PST 24 |
Jan 24 06:08:29 PM PST 24 |
1724204823132 ps |
| T462 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.3758272766 |
|
|
Jan 24 06:23:32 PM PST 24 |
Jan 24 06:25:29 PM PST 24 |
43620988659 ps |
| T463 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1510109740 |
|
|
Jan 24 06:44:34 PM PST 24 |
Jan 24 06:44:40 PM PST 24 |
2011505340 ps |
| T464 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.74450617 |
|
|
Jan 24 06:39:41 PM PST 24 |
Jan 24 06:39:44 PM PST 24 |
2623447546 ps |
| T465 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.570058789 |
|
|
Jan 24 06:28:56 PM PST 24 |
Jan 24 06:29:02 PM PST 24 |
2011382893 ps |
| T311 |
/workspace/coverage/default/20.sysrst_ctrl_stress_all.1607874325 |
|
|
Jan 24 06:26:36 PM PST 24 |
Jan 24 06:33:32 PM PST 24 |
900177164782 ps |
| T466 |
/workspace/coverage/default/43.sysrst_ctrl_smoke.3603395128 |
|
|
Jan 24 06:44:36 PM PST 24 |
Jan 24 06:44:38 PM PST 24 |
2159431656 ps |
| T467 |
/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3744949509 |
|
|
Jan 24 06:15:11 PM PST 24 |
Jan 24 06:15:13 PM PST 24 |
3812652242 ps |
| T228 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1561945505 |
|
|
Jan 24 07:50:55 PM PST 24 |
Jan 24 07:52:49 PM PST 24 |
43010095977 ps |
| T468 |
/workspace/coverage/default/43.sysrst_ctrl_alert_test.511842679 |
|
|
Jan 24 07:57:45 PM PST 24 |
Jan 24 07:57:48 PM PST 24 |
2073920233 ps |
| T469 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1868613445 |
|
|
Jan 24 06:41:14 PM PST 24 |
Jan 24 06:41:21 PM PST 24 |
3149670905 ps |
| T470 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.299546781 |
|
|
Jan 24 06:38:28 PM PST 24 |
Jan 24 06:38:32 PM PST 24 |
2433449437 ps |
| T471 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1608753983 |
|
|
Jan 24 06:02:48 PM PST 24 |
Jan 24 06:02:53 PM PST 24 |
2513616338 ps |
| T219 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4223194847 |
|
|
Jan 24 06:40:49 PM PST 24 |
Jan 24 06:42:01 PM PST 24 |
56090080484 ps |
| T98 |
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2222093318 |
|
|
Jan 24 07:23:32 PM PST 24 |
Jan 24 07:24:44 PM PST 24 |
26330397409 ps |
| T472 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.496808016 |
|
|
Jan 24 06:39:46 PM PST 24 |
Jan 24 06:39:49 PM PST 24 |
3240108151 ps |
| T473 |
/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3155806942 |
|
|
Jan 24 07:41:11 PM PST 24 |
Jan 24 07:41:18 PM PST 24 |
5151043908 ps |
| T230 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.114612445 |
|
|
Jan 24 06:47:47 PM PST 24 |
Jan 24 06:48:47 PM PST 24 |
89665772556 ps |
| T474 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.2924329274 |
|
|
Jan 24 06:45:30 PM PST 24 |
Jan 24 06:45:37 PM PST 24 |
2008245878 ps |
| T475 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.1738070957 |
|
|
Jan 24 06:29:25 PM PST 24 |
Jan 24 06:34:24 PM PST 24 |
120300408694 ps |
| T288 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2736958879 |
|
|
Jan 24 06:17:53 PM PST 24 |
Jan 24 06:19:15 PM PST 24 |
62666093080 ps |
| T476 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.939960589 |
|
|
Jan 24 07:47:46 PM PST 24 |
Jan 24 07:47:50 PM PST 24 |
2474929080 ps |
| T477 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3696466809 |
|
|
Jan 24 06:43:37 PM PST 24 |
Jan 24 06:43:47 PM PST 24 |
3184016406 ps |
| T478 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1991496558 |
|
|
Jan 24 06:34:47 PM PST 24 |
Jan 24 06:34:50 PM PST 24 |
2631190208 ps |
| T479 |
/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1481953601 |
|
|
Jan 24 06:06:49 PM PST 24 |
Jan 24 06:06:59 PM PST 24 |
3106426196 ps |
| T480 |
/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3510735649 |
|
|
Jan 24 06:42:11 PM PST 24 |
Jan 24 06:42:14 PM PST 24 |
2470483290 ps |
| T99 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.685582221 |
|
|
Jan 24 06:47:13 PM PST 24 |
Jan 24 06:47:22 PM PST 24 |
24389306211 ps |
| T481 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.2006828608 |
|
|
Jan 24 06:33:17 PM PST 24 |
Jan 24 06:33:21 PM PST 24 |
2116042041 ps |
| T290 |
/workspace/coverage/default/11.sysrst_ctrl_combo_detect.70052397 |
|
|
Jan 24 07:01:11 PM PST 24 |
Jan 24 07:02:44 PM PST 24 |
128159435126 ps |
| T482 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1004837817 |
|
|
Jan 24 07:47:10 PM PST 24 |
Jan 24 07:47:16 PM PST 24 |
2017842374 ps |
| T483 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1599134023 |
|
|
Jan 24 06:27:46 PM PST 24 |
Jan 24 06:28:16 PM PST 24 |
22334697250 ps |
| T484 |
/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.2146505885 |
|
|
Jan 24 06:26:04 PM PST 24 |
Jan 24 06:26:12 PM PST 24 |
2609595526 ps |
| T79 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.4283833198 |
|
|
Jan 24 06:38:31 PM PST 24 |
Jan 24 06:40:14 PM PST 24 |
831426786514 ps |
| T204 |
/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.423178832 |
|
|
Jan 24 06:16:27 PM PST 24 |
Jan 24 06:16:35 PM PST 24 |
2514470905 ps |
| T184 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1455716982 |
|
|
Jan 24 06:35:51 PM PST 24 |
Jan 24 06:36:43 PM PST 24 |
22153511340 ps |
| T485 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1393507157 |
|
|
Jan 24 06:44:37 PM PST 24 |
Jan 24 06:44:39 PM PST 24 |
2617344179 ps |
| T486 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1194907416 |
|
|
Jan 24 06:41:51 PM PST 24 |
Jan 24 06:42:03 PM PST 24 |
3909141233 ps |
| T487 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2434689358 |
|
|
Jan 24 07:27:49 PM PST 24 |
Jan 24 07:27:56 PM PST 24 |
2013017951 ps |
| T488 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.1138412102 |
|
|
Jan 24 06:04:16 PM PST 24 |
Jan 24 06:04:20 PM PST 24 |
2017292785 ps |
| T489 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3548127797 |
|
|
Jan 24 07:07:49 PM PST 24 |
Jan 24 07:07:53 PM PST 24 |
2483084577 ps |
| T100 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.1002987701 |
|
|
Jan 24 06:42:40 PM PST 24 |
Jan 24 06:43:40 PM PST 24 |
85910632079 ps |
| T490 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.3287786014 |
|
|
Jan 24 06:43:03 PM PST 24 |
Jan 24 06:43:13 PM PST 24 |
3413124102 ps |
| T491 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.1615430524 |
|
|
Jan 24 06:18:18 PM PST 24 |
Jan 24 06:18:21 PM PST 24 |
2037490118 ps |
| T492 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1392135552 |
|
|
Jan 24 06:06:30 PM PST 24 |
Jan 24 06:06:38 PM PST 24 |
2511781753 ps |
| T493 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3605125807 |
|
|
Jan 24 07:01:12 PM PST 24 |
Jan 24 07:01:31 PM PST 24 |
3224184418 ps |
| T494 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.3744114466 |
|
|
Jan 24 06:29:49 PM PST 24 |
Jan 24 06:29:55 PM PST 24 |
2009683908 ps |
| T495 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2911808246 |
|
|
Jan 24 06:20:57 PM PST 24 |
Jan 24 06:21:05 PM PST 24 |
2627653541 ps |
| T496 |
/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1794898816 |
|
|
Jan 24 06:37:58 PM PST 24 |
Jan 24 06:38:01 PM PST 24 |
4278269952 ps |
| T497 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.320845171 |
|
|
Jan 24 06:44:21 PM PST 24 |
Jan 24 06:44:32 PM PST 24 |
3808910494 ps |
| T498 |
/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.2656749752 |
|
|
Jan 24 06:37:46 PM PST 24 |
Jan 24 06:37:54 PM PST 24 |
2510119524 ps |
| T499 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2251681897 |
|
|
Jan 24 07:44:35 PM PST 24 |
Jan 24 07:44:39 PM PST 24 |
2479455980 ps |
| T500 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1382849938 |
|
|
Jan 24 06:44:44 PM PST 24 |
Jan 24 06:44:47 PM PST 24 |
2634644447 ps |
| T501 |
/workspace/coverage/default/18.sysrst_ctrl_combo_detect.3261451925 |
|
|
Jan 24 06:24:23 PM PST 24 |
Jan 24 06:24:52 PM PST 24 |
46164719984 ps |
| T502 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1876308428 |
|
|
Jan 24 06:46:14 PM PST 24 |
Jan 24 06:46:19 PM PST 24 |
2615225338 ps |
| T503 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.546299584 |
|
|
Jan 24 07:55:08 PM PST 24 |
Jan 24 08:00:01 PM PST 24 |
230352934654 ps |
| T504 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.3423536039 |
|
|
Jan 24 06:36:41 PM PST 24 |
Jan 24 06:36:42 PM PST 24 |
2129943011 ps |
| T198 |
/workspace/coverage/default/23.sysrst_ctrl_edge_detect.4023431883 |
|
|
Jan 24 06:29:38 PM PST 24 |
Jan 24 06:30:49 PM PST 24 |
607895956205 ps |
| T505 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3213351169 |
|
|
Jan 24 06:37:10 PM PST 24 |
Jan 24 06:37:19 PM PST 24 |
3392485253 ps |
| T506 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.681610100 |
|
|
Jan 24 06:15:07 PM PST 24 |
Jan 24 06:15:09 PM PST 24 |
2167626499 ps |
| T507 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.891188431 |
|
|
Jan 24 07:23:57 PM PST 24 |
Jan 24 07:24:04 PM PST 24 |
3566251459 ps |
| T101 |
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1164851094 |
|
|
Jan 24 07:52:31 PM PST 24 |
Jan 24 07:53:24 PM PST 24 |
25585267049 ps |
| T508 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3607236283 |
|
|
Jan 24 06:45:05 PM PST 24 |
Jan 24 06:45:07 PM PST 24 |
2150587874 ps |
| T509 |
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.685631555 |
|
|
Jan 24 10:25:29 PM PST 24 |
Jan 24 10:25:40 PM PST 24 |
2511013195 ps |
| T510 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.433776564 |
|
|
Jan 24 06:17:23 PM PST 24 |
Jan 24 06:17:30 PM PST 24 |
2156871283 ps |
| T511 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2503585688 |
|
|
Jan 24 07:22:47 PM PST 24 |
Jan 24 07:22:56 PM PST 24 |
9031166856 ps |
| T512 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.761433322 |
|
|
Jan 24 06:10:33 PM PST 24 |
Jan 24 06:10:40 PM PST 24 |
2470968048 ps |
| T513 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.1360302782 |
|
|
Jan 24 09:13:01 PM PST 24 |
Jan 24 09:13:26 PM PST 24 |
9345084833 ps |
| T514 |
/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.641755154 |
|
|
Jan 24 06:34:43 PM PST 24 |
Jan 24 06:34:51 PM PST 24 |
2090579427 ps |
| T304 |
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1382835178 |
|
|
Jan 24 06:47:21 PM PST 24 |
Jan 24 06:47:50 PM PST 24 |
45550765626 ps |
| T77 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1854613129 |
|
|
Jan 24 06:12:27 PM PST 24 |
Jan 24 06:12:33 PM PST 24 |
3079939592 ps |
| T111 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1562681167 |
|
|
Jan 24 06:41:13 PM PST 24 |
Jan 24 06:41:22 PM PST 24 |
3303411194 ps |
| T112 |
/workspace/coverage/default/30.sysrst_ctrl_alert_test.1025373037 |
|
|
Jan 24 06:37:36 PM PST 24 |
Jan 24 06:37:43 PM PST 24 |
2014307581 ps |
| T113 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2600699906 |
|
|
Jan 24 07:32:59 PM PST 24 |
Jan 24 07:34:43 PM PST 24 |
39558629383 ps |
| T114 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2836568239 |
|
|
Jan 24 06:13:19 PM PST 24 |
Jan 24 06:13:27 PM PST 24 |
2457114256 ps |
| T115 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.776013392 |
|
|
Jan 24 08:29:33 PM PST 24 |
Jan 24 08:29:36 PM PST 24 |
2635472332 ps |
| T301 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1399830957 |
|
|
Jan 24 06:48:17 PM PST 24 |
Jan 24 06:50:31 PM PST 24 |
94747604449 ps |
| T515 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2789732973 |
|
|
Jan 24 07:00:12 PM PST 24 |
Jan 24 07:02:44 PM PST 24 |
101474794106 ps |
| T80 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.499448230 |
|
|
Jan 24 06:46:42 PM PST 24 |
Jan 24 06:48:10 PM PST 24 |
486726487194 ps |
| T216 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.1253912582 |
|
|
Jan 24 06:42:46 PM PST 24 |
Jan 24 06:42:54 PM PST 24 |
4755307810 ps |
| T516 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.3943241631 |
|
|
Jan 24 07:25:41 PM PST 24 |
Jan 24 07:25:51 PM PST 24 |
2109358430 ps |
| T250 |
/workspace/coverage/default/1.sysrst_ctrl_sec_cm.1250084887 |
|
|
Jan 24 06:04:11 PM PST 24 |
Jan 24 06:05:04 PM PST 24 |
42048925561 ps |
| T330 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2524940350 |
|
|
Jan 24 06:41:58 PM PST 24 |
Jan 24 06:44:21 PM PST 24 |
155234591462 ps |
| T517 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3998744099 |
|
|
Jan 24 06:18:50 PM PST 24 |
Jan 24 06:18:55 PM PST 24 |
2519086631 ps |
| T518 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2899905944 |
|
|
Jan 24 05:59:41 PM PST 24 |
Jan 24 05:59:46 PM PST 24 |
2619322469 ps |
| T519 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.3754432560 |
|
|
Jan 24 06:32:08 PM PST 24 |
Jan 24 06:32:11 PM PST 24 |
2127746364 ps |
| T185 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.2844505858 |
|
|
Jan 24 06:26:25 PM PST 24 |
Jan 24 06:26:35 PM PST 24 |
3591538895 ps |
| T221 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1657780687 |
|
|
Jan 24 06:09:05 PM PST 24 |
Jan 24 06:09:38 PM PST 24 |
54105736273 ps |
| T520 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1102492649 |
|
|
Jan 24 06:12:19 PM PST 24 |
Jan 24 06:12:21 PM PST 24 |
2695254923 ps |
| T521 |
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1250359714 |
|
|
Jan 24 07:02:14 PM PST 24 |
Jan 24 07:02:27 PM PST 24 |
6311636918 ps |
| T522 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.4167107526 |
|
|
Jan 24 06:33:21 PM PST 24 |
Jan 24 06:33:24 PM PST 24 |
2524757637 ps |
| T523 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.159338391 |
|
|
Jan 24 06:49:01 PM PST 24 |
Jan 24 06:49:06 PM PST 24 |
2445984552 ps |
| T524 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1829985936 |
|
|
Jan 24 06:26:00 PM PST 24 |
Jan 24 06:26:07 PM PST 24 |
2470640520 ps |
| T525 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1044348273 |
|
|
Jan 24 07:25:07 PM PST 24 |
Jan 24 07:25:15 PM PST 24 |
2468775085 ps |
| T315 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1367273138 |
|
|
Jan 24 06:12:38 PM PST 24 |
Jan 24 06:14:23 PM PST 24 |
155846804028 ps |
| T526 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.493278110 |
|
|
Jan 24 06:12:33 PM PST 24 |
Jan 24 06:12:36 PM PST 24 |
3028230907 ps |
| T527 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3320455929 |
|
|
Jan 24 06:10:45 PM PST 24 |
Jan 24 06:10:53 PM PST 24 |
2510038015 ps |
| T528 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.3197383340 |
|
|
Jan 24 06:22:37 PM PST 24 |
Jan 24 06:22:40 PM PST 24 |
2031379432 ps |
| T247 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.2172086164 |
|
|
Jan 24 06:21:55 PM PST 24 |
Jan 24 06:24:41 PM PST 24 |
268426413366 ps |
| T529 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1703890475 |
|
|
Jan 24 06:44:32 PM PST 24 |
Jan 24 06:45:11 PM PST 24 |
13796095920 ps |
| T530 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.288382430 |
|
|
Jan 24 06:22:34 PM PST 24 |
Jan 24 06:22:38 PM PST 24 |
2023641731 ps |
| T531 |
/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.497338935 |
|
|
Jan 24 06:21:02 PM PST 24 |
Jan 24 06:32:22 PM PST 24 |
254459516326 ps |
| T532 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all.1682485148 |
|
|
Jan 24 06:17:13 PM PST 24 |
Jan 24 06:17:59 PM PST 24 |
16798621903 ps |
| T533 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2308151217 |
|
|
Jan 24 06:41:57 PM PST 24 |
Jan 24 06:43:04 PM PST 24 |
25081205579 ps |
| T534 |
/workspace/coverage/default/2.sysrst_ctrl_edge_detect.782668729 |
|
|
Jan 24 06:06:15 PM PST 24 |
Jan 24 06:06:18 PM PST 24 |
2793728781 ps |
| T535 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.720362581 |
|
|
Jan 24 05:59:34 PM PST 24 |
Jan 24 05:59:38 PM PST 24 |
2469497207 ps |
| T536 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2299218674 |
|
|
Jan 24 06:20:59 PM PST 24 |
Jan 24 06:21:11 PM PST 24 |
3758906058 ps |
| T284 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.1399892904 |
|
|
Jan 24 06:03:23 PM PST 24 |
Jan 24 06:08:10 PM PST 24 |
113942380005 ps |
| T537 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.1453011267 |
|
|
Jan 24 06:02:18 PM PST 24 |
Jan 24 06:02:26 PM PST 24 |
2448492376 ps |
| T206 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1868244000 |
|
|
Jan 24 07:03:17 PM PST 24 |
Jan 24 07:05:52 PM PST 24 |
1000348698000 ps |
| T538 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2422722763 |
|
|
Jan 24 06:47:15 PM PST 24 |
Jan 24 06:47:48 PM PST 24 |
24586813500 ps |
| T539 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3498684856 |
|
|
Jan 24 06:21:54 PM PST 24 |
Jan 24 06:21:57 PM PST 24 |
2624348822 ps |
| T540 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.2194735656 |
|
|
Jan 24 06:41:14 PM PST 24 |
Jan 24 06:42:56 PM PST 24 |
77343246590 ps |
| T541 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2243389149 |
|
|
Jan 24 06:40:25 PM PST 24 |
Jan 24 06:40:27 PM PST 24 |
2480222293 ps |
| T333 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.297601064 |
|
|
Jan 24 06:48:07 PM PST 24 |
Jan 24 06:49:24 PM PST 24 |
48886811839 ps |
| T81 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4055828 |
|
|
Jan 24 06:14:00 PM PST 24 |
Jan 24 06:14:10 PM PST 24 |
7258239175 ps |
| T163 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1765888320 |
|
|
Jan 24 06:43:35 PM PST 24 |
Jan 24 06:43:41 PM PST 24 |
3357234305 ps |
| T210 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1170506885 |
|
|
Jan 24 07:00:06 PM PST 24 |
Jan 24 07:00:24 PM PST 24 |
22102740054 ps |
| T211 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.346213857 |
|
|
Jan 24 06:07:58 PM PST 24 |
Jan 24 06:09:18 PM PST 24 |
26581447629 ps |
| T212 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.621927120 |
|
|
Jan 24 07:40:43 PM PST 24 |
Jan 24 07:40:44 PM PST 24 |
2674176389 ps |
| T213 |
/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2688296718 |
|
|
Jan 24 09:00:39 PM PST 24 |
Jan 24 09:00:47 PM PST 24 |
3249818896 ps |
| T214 |
/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.709439918 |
|
|
Jan 24 06:38:47 PM PST 24 |
Jan 24 06:38:50 PM PST 24 |
2639438649 ps |
| T215 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.4052889404 |
|
|
Jan 24 07:09:58 PM PST 24 |
Jan 24 07:10:05 PM PST 24 |
2015574769 ps |
| T542 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1933292267 |
|
|
Jan 24 06:47:31 PM PST 24 |
Jan 24 06:48:00 PM PST 24 |
42652429548 ps |
| T543 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4209898972 |
|
|
Jan 24 07:45:54 PM PST 24 |
Jan 24 07:46:19 PM PST 24 |
44165112972 ps |
| T544 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.1382937022 |
|
|
Jan 24 07:09:01 PM PST 24 |
Jan 24 07:09:04 PM PST 24 |
2129697797 ps |
| T545 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4030366656 |
|
|
Jan 24 07:18:40 PM PST 24 |
Jan 24 07:18:44 PM PST 24 |
2528920941 ps |
| T546 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3160444985 |
|
|
Jan 24 07:05:05 PM PST 24 |
Jan 24 07:05:12 PM PST 24 |
4750164309 ps |
| T306 |
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3693966322 |
|
|
Jan 24 06:48:01 PM PST 24 |
Jan 24 06:50:02 PM PST 24 |
85134835184 ps |
| T199 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2183767750 |
|
|
Jan 24 06:45:04 PM PST 24 |
Jan 24 06:45:07 PM PST 24 |
6368749942 ps |
| T547 |
/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3169837054 |
|
|
Jan 24 06:41:42 PM PST 24 |
Jan 24 06:41:45 PM PST 24 |
2155192069 ps |
| T187 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.3280407414 |
|
|
Jan 24 07:43:56 PM PST 24 |
Jan 24 07:44:01 PM PST 24 |
3343914534 ps |
| T548 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.349925203 |
|
|
Jan 24 06:45:38 PM PST 24 |
Jan 24 06:45:42 PM PST 24 |
2533049169 ps |
| T131 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3391727744 |
|
|
Jan 24 06:46:17 PM PST 24 |
Jan 24 06:46:40 PM PST 24 |
35234002818 ps |
| T549 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2378009636 |
|
|
Jan 24 07:26:06 PM PST 24 |
Jan 24 07:26:11 PM PST 24 |
2620487619 ps |
| T550 |
/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2282583028 |
|
|
Jan 24 06:26:53 PM PST 24 |
Jan 24 06:27:00 PM PST 24 |
2465267246 ps |
| T217 |
/workspace/coverage/default/31.sysrst_ctrl_edge_detect.612905119 |
|
|
Jan 24 06:38:15 PM PST 24 |
Jan 24 06:38:18 PM PST 24 |
3879697952 ps |
| T551 |
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.1025018335 |
|
|
Jan 24 06:07:50 PM PST 24 |
Jan 24 06:08:00 PM PST 24 |
3320400490 ps |
| T307 |
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.534107511 |
|
|
Jan 24 07:53:05 PM PST 24 |
Jan 24 07:55:03 PM PST 24 |
92201672514 ps |
| T552 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2827881547 |
|
|
Jan 24 06:42:23 PM PST 24 |
Jan 24 06:42:25 PM PST 24 |
2631791732 ps |
| T553 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.1088451765 |
|
|
Jan 24 06:42:55 PM PST 24 |
Jan 24 06:43:38 PM PST 24 |
15253893405 ps |
| T554 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.696049418 |
|
|
Jan 24 06:42:10 PM PST 24 |
Jan 24 06:42:17 PM PST 24 |
2175019610 ps |
| T555 |
/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.3561507800 |
|
|
Jan 24 06:20:42 PM PST 24 |
Jan 24 06:20:49 PM PST 24 |
2478177435 ps |
| T292 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3808549798 |
|
|
Jan 24 06:47:56 PM PST 24 |
Jan 24 06:49:48 PM PST 24 |
80105698476 ps |
| T556 |
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3867839501 |
|
|
Jan 24 06:54:37 PM PST 24 |
Jan 24 06:54:43 PM PST 24 |
3294535467 ps |
| T557 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3149073641 |
|
|
Jan 24 06:26:57 PM PST 24 |
Jan 24 06:26:59 PM PST 24 |
2078123429 ps |
| T195 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2723693310 |
|
|
Jan 24 08:04:00 PM PST 24 |
Jan 24 08:04:06 PM PST 24 |
3131330588 ps |
| T558 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.4161019647 |
|
|
Jan 24 06:56:37 PM PST 24 |
Jan 24 06:56:54 PM PST 24 |
23843227108 ps |
| T559 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2793985051 |
|
|
Jan 24 06:28:59 PM PST 24 |
Jan 24 06:29:02 PM PST 24 |
2625299832 ps |
| T560 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.783121086 |
|
|
Jan 24 06:40:50 PM PST 24 |
Jan 24 06:40:57 PM PST 24 |
2010220163 ps |
| T234 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2315968135 |
|
|
Jan 24 06:43:39 PM PST 24 |
Jan 24 06:44:12 PM PST 24 |
70617953227 ps |
| T561 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1759426502 |
|
|
Jan 24 08:02:57 PM PST 24 |
Jan 24 08:04:10 PM PST 24 |
31233262757 ps |
| T562 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1074429601 |
|
|
Jan 24 08:41:23 PM PST 24 |
Jan 24 08:41:31 PM PST 24 |
2614312256 ps |
| T563 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.4014597383 |
|
|
Jan 24 06:34:49 PM PST 24 |
Jan 24 06:35:55 PM PST 24 |
99343406443 ps |
| T564 |
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1623528163 |
|
|
Jan 24 06:32:15 PM PST 24 |
Jan 24 06:32:23 PM PST 24 |
2455807968 ps |
| T565 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2234161969 |
|
|
Jan 24 06:47:10 PM PST 24 |
Jan 24 06:47:32 PM PST 24 |
77687989289 ps |
| T312 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.818518207 |
|
|
Jan 24 06:25:30 PM PST 24 |
Jan 24 06:26:09 PM PST 24 |
68501142413 ps |
| T251 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.312924916 |
|
|
Jan 24 06:01:37 PM PST 24 |
Jan 24 06:01:51 PM PST 24 |
22083859263 ps |
| T308 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.596957045 |
|
|
Jan 24 06:37:29 PM PST 24 |
Jan 24 06:38:08 PM PST 24 |
54231201827 ps |
| T102 |
/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3650064240 |
|
|
Jan 24 06:17:08 PM PST 24 |
Jan 24 06:17:59 PM PST 24 |
343341582587 ps |
| T78 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.62487670 |
|
|
Jan 24 07:15:58 PM PST 24 |
Jan 24 07:16:08 PM PST 24 |
3791945773 ps |
| T146 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.176932489 |
|
|
Jan 24 06:06:16 PM PST 24 |
Jan 24 06:06:27 PM PST 24 |
13346703457 ps |
| T188 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.1090303177 |
|
|
Jan 24 06:26:53 PM PST 24 |
Jan 24 06:26:57 PM PST 24 |
2022252477 ps |
| T189 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.103129086 |
|
|
Jan 24 07:52:37 PM PST 24 |
Jan 24 07:52:42 PM PST 24 |
2492690401 ps |
| T190 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1965834461 |
|
|
Jan 24 06:46:27 PM PST 24 |
Jan 24 06:51:51 PM PST 24 |
136175573459 ps |
| T75 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.4173236105 |
|
|
Jan 24 06:03:31 PM PST 24 |
Jan 24 06:03:58 PM PST 24 |
39177766015 ps |
| T191 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.230018655 |
|
|
Jan 24 06:18:55 PM PST 24 |
Jan 24 06:19:04 PM PST 24 |
3310493362 ps |
| T192 |
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2958435465 |
|
|
Jan 24 06:08:20 PM PST 24 |
Jan 24 06:08:22 PM PST 24 |
2584073143 ps |
| T193 |
/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3601714043 |
|
|
Jan 24 06:40:26 PM PST 24 |
Jan 24 06:40:29 PM PST 24 |
2633950418 ps |
| T200 |
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2618825477 |
|
|
Jan 24 06:44:11 PM PST 24 |
Jan 24 06:44:18 PM PST 24 |
3201606380 ps |
| T566 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2415526669 |
|
|
Jan 24 08:09:16 PM PST 24 |
Jan 24 08:09:19 PM PST 24 |
2843044000 ps |
| T567 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3005632590 |
|
|
Jan 24 06:07:03 PM PST 24 |
Jan 24 06:07:06 PM PST 24 |
2259252991 ps |
| T132 |
/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.4262154594 |
|
|
Jan 24 06:36:09 PM PST 24 |
Jan 24 06:36:12 PM PST 24 |
4717547161 ps |