Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.35 99.25 96.16 100.00 94.87 98.64 99.25 93.29


Total tests in report: 903
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
57.08 57.08 60.05 60.05 56.43 56.43 56.61 56.61 94.87 94.87 64.67 64.67 55.15 55.15 11.80 11.80 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3532343664
68.64 11.55 76.23 16.18 69.66 13.24 64.81 8.20 94.87 0.00 77.41 12.74 76.12 20.97 21.35 9.55 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2041136904
79.95 11.31 89.01 12.78 82.88 13.21 94.76 29.95 94.87 0.00 89.14 11.73 79.59 3.46 29.38 8.03 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.3474721078
86.54 6.59 92.92 3.91 88.79 5.91 97.04 2.28 94.87 0.00 92.24 3.10 86.61 7.02 53.28 23.90 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.267247505
89.58 3.04 94.77 1.86 90.41 1.62 97.27 0.23 94.87 0.00 93.94 1.71 91.20 4.59 64.59 11.31 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2126694504
91.37 1.79 96.20 1.42 91.82 1.41 97.27 0.00 94.87 0.00 95.27 1.32 94.76 3.56 69.44 4.85 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.3044607911
92.77 1.40 96.20 0.00 91.84 0.02 97.27 0.00 94.87 0.00 95.27 0.00 94.76 0.00 79.19 9.75 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1868244000
93.75 0.98 97.12 0.92 92.73 0.88 97.72 0.46 94.87 0.00 96.10 0.84 97.00 2.25 80.71 1.52 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2385054602
94.19 0.44 97.17 0.05 93.78 1.05 98.18 0.46 94.87 0.00 96.14 0.03 97.28 0.28 81.88 1.18 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.1788907968
94.51 0.32 97.19 0.02 93.99 0.21 98.41 0.23 94.87 0.00 96.21 0.07 97.28 0.00 83.59 1.71 /workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.3355547548
94.82 0.32 98.16 0.97 94.20 0.21 98.41 0.00 94.87 0.00 97.25 1.04 97.28 0.00 83.59 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.4173236105
95.13 0.30 98.39 0.23 94.37 0.17 99.32 0.91 94.87 0.00 97.29 0.03 97.47 0.19 84.18 0.59 /workspace/coverage/default/3.sysrst_ctrl_stress_all.3244051998
95.40 0.28 98.44 0.05 94.49 0.12 99.32 0.00 94.87 0.00 97.39 0.10 97.66 0.19 85.65 1.47 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.898975987
95.60 0.20 98.56 0.12 94.66 0.17 99.32 0.00 94.87 0.00 97.53 0.14 98.03 0.37 86.24 0.59 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1349578750
95.76 0.16 98.66 0.10 94.68 0.02 99.32 0.00 94.87 0.00 97.70 0.17 98.13 0.09 86.97 0.73 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3650064240
95.92 0.15 98.80 0.14 95.25 0.57 99.32 0.00 94.87 0.00 97.98 0.28 98.22 0.09 86.97 0.00 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.813557967
96.05 0.13 98.82 0.02 95.25 0.00 99.32 0.00 94.87 0.00 98.02 0.03 98.22 0.00 87.86 0.88 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2028243900
96.18 0.13 98.82 0.00 95.25 0.00 99.32 0.00 94.87 0.00 98.02 0.00 98.22 0.00 88.79 0.93 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2524940350
96.28 0.10 98.82 0.00 95.28 0.02 99.77 0.46 94.87 0.00 98.02 0.00 98.31 0.09 88.88 0.10 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.312924916
96.36 0.09 98.87 0.05 95.37 0.10 99.77 0.00 94.87 0.00 98.09 0.07 98.60 0.28 88.98 0.10 /workspace/coverage/default/7.sysrst_ctrl_stress_all.1409448739
96.44 0.08 98.87 0.00 95.40 0.02 99.77 0.00 94.87 0.00 98.09 0.00 98.60 0.00 89.52 0.54 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.724469320
96.51 0.07 98.94 0.07 95.47 0.07 99.77 0.00 94.87 0.00 98.19 0.10 98.60 0.00 89.76 0.24 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.3078104833
96.58 0.07 98.99 0.05 95.49 0.02 99.77 0.00 94.87 0.00 98.26 0.07 98.69 0.09 90.01 0.24 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.499448230
96.65 0.06 98.99 0.00 95.49 0.00 99.77 0.00 94.87 0.00 98.26 0.00 98.69 0.00 90.45 0.44 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.502283469
96.71 0.06 98.99 0.00 95.52 0.02 99.77 0.00 94.87 0.00 98.26 0.00 98.69 0.00 90.84 0.39 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.2775592322
96.76 0.06 99.01 0.02 95.85 0.33 99.77 0.00 94.87 0.00 98.29 0.03 98.69 0.00 90.84 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.4120841894
96.81 0.05 99.08 0.07 95.90 0.05 99.77 0.00 94.87 0.00 98.36 0.07 98.88 0.19 90.84 0.00 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.62487670
96.86 0.05 99.11 0.03 95.97 0.07 99.77 0.00 94.87 0.00 98.40 0.03 99.06 0.19 90.84 0.00 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.2759934731
96.91 0.04 99.11 0.00 96.02 0.05 100.00 0.23 94.87 0.00 98.43 0.03 99.06 0.00 90.84 0.00 /workspace/coverage/default/33.sysrst_ctrl_alert_test.1642866966
96.94 0.03 99.11 0.00 96.02 0.00 100.00 0.00 94.87 0.00 98.43 0.00 99.06 0.00 91.09 0.24 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1920836622
96.97 0.03 99.11 0.00 96.02 0.00 100.00 0.00 94.87 0.00 98.43 0.00 99.06 0.00 91.28 0.20 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.1399892904
97.00 0.03 99.11 0.00 96.02 0.00 100.00 0.00 94.87 0.00 98.43 0.00 99.06 0.00 91.48 0.20 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.53640454
97.03 0.03 99.11 0.00 96.02 0.00 100.00 0.00 94.87 0.00 98.43 0.00 99.06 0.00 91.67 0.20 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1619049889
97.05 0.03 99.15 0.03 96.04 0.02 100.00 0.00 94.87 0.00 98.47 0.03 99.16 0.09 91.67 0.00 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1068957150
97.08 0.03 99.18 0.03 96.06 0.02 100.00 0.00 94.87 0.00 98.50 0.03 99.25 0.09 91.67 0.00 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3609992627
97.10 0.02 99.18 0.00 96.06 0.00 100.00 0.00 94.87 0.00 98.50 0.00 99.25 0.00 91.82 0.15 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2772080425
97.12 0.02 99.18 0.00 96.06 0.00 100.00 0.00 94.87 0.00 98.50 0.00 99.25 0.00 91.97 0.15 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.283568762
97.14 0.01 99.22 0.03 96.06 0.00 100.00 0.00 94.87 0.00 98.57 0.07 99.25 0.00 91.97 0.00 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1722365328
97.15 0.01 99.22 0.00 96.06 0.00 100.00 0.00 94.87 0.00 98.57 0.00 99.25 0.00 92.07 0.10 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3825602982
97.16 0.01 99.22 0.00 96.06 0.00 100.00 0.00 94.87 0.00 98.57 0.00 99.25 0.00 92.16 0.10 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1887123644
97.18 0.01 99.22 0.00 96.06 0.00 100.00 0.00 94.87 0.00 98.57 0.00 99.25 0.00 92.26 0.10 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1091815699
97.19 0.01 99.22 0.00 96.06 0.00 100.00 0.00 94.87 0.00 98.57 0.00 99.25 0.00 92.36 0.10 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1870302238
97.20 0.01 99.22 0.00 96.09 0.02 100.00 0.00 94.87 0.00 98.57 0.00 99.25 0.00 92.41 0.05 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.842351456
97.21 0.01 99.22 0.00 96.11 0.02 100.00 0.00 94.87 0.00 98.57 0.00 99.25 0.00 92.46 0.05 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.858474846
97.22 0.01 99.24 0.02 96.11 0.00 100.00 0.00 94.87 0.00 98.61 0.03 99.25 0.00 92.46 0.00 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2596166280
97.23 0.01 99.25 0.02 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.03 99.25 0.00 92.46 0.00 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.3280407414
97.23 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.51 0.05 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.4050256414
97.24 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.56 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.1429700168
97.25 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.61 0.05 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2854901614
97.26 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.65 0.05 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3436167575
97.26 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.70 0.05 /workspace/coverage/default/15.sysrst_ctrl_stress_all.148639959
97.27 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.75 0.05 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3605358498
97.28 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.80 0.05 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.818518207
97.28 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.85 0.05 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.1597015711
97.29 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.90 0.05 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1665830591
97.30 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 92.95 0.05 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2701496740
97.30 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.00 0.05 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.4101475200
97.31 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.05 0.05 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.238818362
97.32 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.10 0.05 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3277393043
97.33 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.14 0.05 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2687688332
97.33 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.19 0.05 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1432491612
97.34 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.24 0.05 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1168020672
97.35 0.01 99.25 0.00 96.11 0.00 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.29 0.05 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1146061063
97.35 0.01 99.25 0.00 96.14 0.02 100.00 0.00 94.87 0.00 98.64 0.00 99.25 0.00 93.29 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3643323711


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1083851471
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1212847981
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3969051936
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.737522019
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.501477223
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2316801162
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3086237866
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.827408492
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2206735784
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.554171746
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2969881589
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3601504860
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1550697392
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2840845585
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.642066318
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1427387248
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2870242875
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3275210891
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.981541615
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.532350004
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.521769302
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2310822276
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2827700007
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1086816312
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1571205093
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2234250154
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.4236889919
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3700421991
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1916265925
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3408890757
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.301223031
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3982717810
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3099187073
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.107610117
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.2805350428
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3212233570
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2468842107
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1120787148
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1213513295
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1714443272
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2661013183
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1337766198
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1758016934
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3235314703
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3823971002
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3654700598
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3520922783
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2457809868
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3079706260
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2326575140
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.972870420
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1370944071
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1178264115
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.706916271
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2274308086
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3881116285
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1600580726
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3820824657
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.1641057531
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1232687079
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.25967463
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.3720984099
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1819774504
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2972505338
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2306440145
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.294827066
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2982051309
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.182174640
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.4190518664
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3642275755
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2673179390
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.584156992
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1485851906
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.258375384
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.2337811961
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2808494700
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.349546339
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2442478963
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.444221193
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.364389873
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.966514639
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.3218002531
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.3454502357
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.763144049
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.2118371013
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.551733019
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.793496378
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.4216913291
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.3293023107
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.945440229
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.3993319161
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/workspace/coverage/default/43.sysrst_ctrl_alert_test.511842679
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1317605407
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3183964164
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2601154367
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.776488882
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2183767750
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.96940002
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1393507157
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.4198219294
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2385713621
/workspace/coverage/default/43.sysrst_ctrl_smoke.3603395128
/workspace/coverage/default/43.sysrst_ctrl_stress_all.535211650
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4209898972
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.816224383
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1474244188
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.829387936
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2595994731
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3443880764
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2661206156
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2378009636
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3312903773
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3607236283
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4152094103
/workspace/coverage/default/44.sysrst_ctrl_smoke.1475435447
/workspace/coverage/default/44.sysrst_ctrl_stress_all.454039751
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1175881341
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.479608809
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2222463061
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3867839501
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2326990468
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3909418836
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2058324473
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3426938497
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1956620790
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1607667958
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2034123877
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.673138991
/workspace/coverage/default/45.sysrst_ctrl_smoke.2622533602
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3339237014
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3293923080
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.783789886
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1820791388
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3605125807
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2089923757
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3160937860
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2628120526
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2778988962
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.689991253
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3456418189
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.349925203
/workspace/coverage/default/46.sysrst_ctrl_smoke.2538871496
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1247906836
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4028065303
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.862716163
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3778826322
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1127799375
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1426371355
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.881086039
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1876308428
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1044348273
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1396436036
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2745371661
/workspace/coverage/default/47.sysrst_ctrl_smoke.3562360042
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3938357264
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3391727744
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.4050204087
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1232461510
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1965834461
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.385852045
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1535716775
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.361135955
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2924116361
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.4073530060
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1063900322
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3500685231
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1904830545
/workspace/coverage/default/48.sysrst_ctrl_smoke.3982129270
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.981187329
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1004837817
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.546299584
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.821682748
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.537522151
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1839935861
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3292021498
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2866954135
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3057426476
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1053764392
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4030366656
/workspace/coverage/default/49.sysrst_ctrl_smoke.1133794048
/workspace/coverage/default/49.sysrst_ctrl_stress_all.813694377
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3660249400
/workspace/coverage/default/5.sysrst_ctrl_alert_test.288382430
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.662157101
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3931607138
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1657780687
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3189320494
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3531690859
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3922076657
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.257110118
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1786802689
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2958435465
/workspace/coverage/default/5.sysrst_ctrl_smoke.98629150
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3078500013
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1954312120
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.956171871
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2234161969
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3385342395
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.685582221
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3312833328
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2364378208
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1672457603
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1071449850
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1297801853
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2793985051
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.904218559
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1407332198
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2455519231
/workspace/coverage/default/6.sysrst_ctrl_smoke.2574581662
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1344755175
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1455716982
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3561913553
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2422722763
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1164851094
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.949992294
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1170506885
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.4066573417
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.534107511
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1382835178
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2434689358
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.999216945
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1831105476
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1231855138
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2932390174
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.456288446
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1259266083
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.761433322
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2241521026
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3320455929
/workspace/coverage/default/7.sysrst_ctrl_smoke.1162328366
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.464185062
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1250359714
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2222093318
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.380063724
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1933292267
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3858734992
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2599625079
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2600699906
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3422478108
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1201426663
/workspace/coverage/default/8.sysrst_ctrl_alert_test.941560618
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1854613129
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1367273138
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3767019472
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3589730832
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1102492649
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.159338391
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.4007724650
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.981704696
/workspace/coverage/default/8.sysrst_ctrl_smoke.1382937022
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1349440697
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3992465303
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.493278110
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.114612445
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1705417234
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2658633575
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3808549798
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2655742688
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2752205871
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3693966322
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2594311266
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2234842948
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3160444985
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.273828069
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.720597489
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2836568239
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.650450883
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.351688240
/workspace/coverage/default/9.sysrst_ctrl_smoke.1537062975
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3848890115
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2992419998
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4055828
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3882575985
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.297601064
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3804463337
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1397703131
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.4197650602
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1840062214
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2267118455
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2371831977
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1399830957




Total test records in report: 903
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3532343664 Jan 24 02:35:33 PM PST 24 Jan 24 02:35:58 PM PST 24 2611817624 ps
T7 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_errors.1788907968 Jan 24 02:36:20 PM PST 24 Jan 24 02:36:44 PM PST 24 2108011303 ps
T2 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2827700007 Jan 24 02:37:01 PM PST 24 Jan 24 02:37:35 PM PST 24 2042491564 ps
T3 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2310822276 Jan 24 02:37:01 PM PST 24 Jan 24 02:37:35 PM PST 24 2064731830 ps
T22 /workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.1118246529 Jan 24 02:38:21 PM PST 24 Jan 24 02:38:43 PM PST 24 2009388426 ps
T4 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.3474721078 Jan 24 02:35:59 PM PST 24 Jan 24 02:36:28 PM PST 24 22474381987 ps
T23 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2206735784 Jan 24 02:35:39 PM PST 24 Jan 24 02:38:08 PM PST 24 33270596886 ps
T8 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.2775592322 Jan 24 03:39:27 PM PST 24 Jan 24 03:41:20 PM PST 24 42487986669 ps
T24 /workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.2118371013 Jan 24 03:30:50 PM PST 24 Jan 24 03:31:02 PM PST 24 2009885865 ps
T25 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.276562865 Jan 24 02:36:10 PM PST 24 Jan 24 02:36:31 PM PST 24 2069861273 ps
T5 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.3993319161 Jan 24 02:35:56 PM PST 24 Jan 24 02:36:16 PM PST 24 3365827926 ps
T9 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1916265925 Jan 24 02:37:06 PM PST 24 Jan 24 02:37:38 PM PST 24 2070987040 ps
T37 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_intr_test.228277321 Jan 24 02:36:46 PM PST 24 Jan 24 02:37:25 PM PST 24 2011232641 ps
T6 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.301223031 Jan 24 02:41:29 PM PST 24 Jan 24 02:41:52 PM PST 24 9944373683 ps
T10 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.364389873 Jan 24 02:35:49 PM PST 24 Jan 24 02:36:35 PM PST 24 22210017703 ps
T11 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1819774504 Jan 24 02:37:30 PM PST 24 Jan 24 02:38:03 PM PST 24 2054120674 ps
T36 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3820824657 Jan 24 02:43:49 PM PST 24 Jan 24 02:44:11 PM PST 24 2038636965 ps
T282 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_csr_rw.1822276757 Jan 24 02:36:28 PM PST 24 Jan 24 02:37:11 PM PST 24 2027791258 ps
T263 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3881116285 Jan 24 02:37:29 PM PST 24 Jan 24 02:38:02 PM PST 24 2119593602 ps
T32 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.3291412759 Jan 24 02:35:57 PM PST 24 Jan 24 02:36:14 PM PST 24 2040934663 ps
T33 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.2781250415 Jan 24 02:36:09 PM PST 24 Jan 24 02:36:31 PM PST 24 5253054137 ps
T69 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1213513295 Jan 24 02:37:10 PM PST 24 Jan 24 02:37:43 PM PST 24 2180863818 ps
T318 /workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.4216913291 Jan 24 02:44:22 PM PST 24 Jan 24 02:44:50 PM PST 24 2012560800 ps
T258 /workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.3355547548 Jan 24 02:38:00 PM PST 24 Jan 24 02:38:30 PM PST 24 2010257891 ps
T319 /workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.3218002531 Jan 24 02:37:45 PM PST 24 Jan 24 02:38:09 PM PST 24 2034153799 ps
T34 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1120787148 Jan 24 02:37:11 PM PST 24 Jan 24 02:38:14 PM PST 24 42944109141 ps
T269 /workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.3293023107 Jan 24 02:37:50 PM PST 24 Jan 24 02:38:12 PM PST 24 2038265888 ps
T249 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.532350004 Jan 24 02:36:43 PM PST 24 Jan 24 02:37:23 PM PST 24 2078682094 ps
T345 /workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.551733019 Jan 24 02:37:47 PM PST 24 Jan 24 02:38:10 PM PST 24 2036169695 ps
T35 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.584156992 Jan 24 02:35:54 PM PST 24 Jan 24 02:36:13 PM PST 24 3288527365 ps
T346 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.3720984099 Jan 24 02:37:30 PM PST 24 Jan 24 02:38:01 PM PST 24 2227943119 ps
T347 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.1318436630 Jan 24 02:36:10 PM PST 24 Jan 24 02:36:29 PM PST 24 6055210976 ps
T320 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2661013183 Jan 24 02:46:52 PM PST 24 Jan 24 02:47:13 PM PST 24 2024554718 ps
T273 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.3240470887 Jan 24 02:36:43 PM PST 24 Jan 24 02:37:40 PM PST 24 5581130031 ps
T74 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.501477223 Jan 24 02:35:37 PM PST 24 Jan 24 02:36:33 PM PST 24 7932684362 ps
T67 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.813557967 Jan 24 02:37:07 PM PST 24 Jan 24 02:37:44 PM PST 24 5242660438 ps
T321 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_intr_test.1889300971 Jan 24 02:36:23 PM PST 24 Jan 24 02:36:46 PM PST 24 2013340921 ps
T348 /workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.2933038151 Jan 24 02:38:02 PM PST 24 Jan 24 02:38:33 PM PST 24 2011100943 ps
T274 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1600580726 Jan 24 02:37:29 PM PST 24 Jan 24 02:38:05 PM PST 24 2053201090 ps
T349 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_mem_rw_with_rand_reset.3212373764 Jan 24 02:36:43 PM PST 24 Jan 24 02:37:20 PM PST 24 2087772384 ps
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