| SCORE | INSTANCES | WEIGHT | GOAL | AT LEAST | PER INSTANCE | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 75.00 | 1 | 100 | 1 | 1 | 64 | 64 |
| NAME | SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| sysrst_ctrl_combo_precondition_det_cg0 | 66.67 | 1 | 100 | 1 | 64 | 64 |
| sysrst_ctrl_combo_precondition_det_cg1 | 66.67 | 1 | 100 | 1 | 64 | 64 |
| sysrst_ctrl_combo_precondition_det_cg2 | 66.67 | 1 | 100 | 1 | 64 | 64 |
| sysrst_ctrl_combo_precondition_det_cg3 | 100.00 | 1 | 100 | 1 | 64 | 64 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 66.67 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 1 | 2 | 66.67 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 66.67 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 1 | 2 | 66.67 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 66.67 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 1 | 2 | 66.67 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 1 | 2 | 66.67 | 100 | 1 | 1 | 0 |
| SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
| 100.00 | 1 | 100 | 1 | 64 | 64 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables | 3 | 0 | 3 | 100.00 |
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_precondition_timer | 3 | 0 | 3 | 100.00 | 100 | 1 | 1 | 0 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 1 | 2 | 66.67 |
| NAME | COUNT | AT LEAST | NUMBER | STATUS |
| mid_range | 0 | 1 | 1 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| max_range | 22 | 1 | T102 | 1 | T369 | 8 | T380 | 5 | ||||
| min_range | 345 | 1 | T27 | 1 | T48 | 12 | T6 | 13 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 1 | 2 | 66.67 |
| NAME | COUNT | AT LEAST | NUMBER | STATUS |
| max_range | 0 | 1 | 1 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| mid_range | 3 | 1 | T367 | 3 | - | - | - | - | ||||
| min_range | 364 | 1 | T27 | 1 | T48 | 12 | T6 | 13 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 1 | 2 | 66.67 |
| NAME | COUNT | AT LEAST | NUMBER | STATUS |
| mid_range | 0 | 1 | 1 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| max_range | 8 | 1 | T153 | 7 | T387 | 1 | - | - | ||||
| min_range | 359 | 1 | T27 | 1 | T48 | 12 | T6 | 13 |
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins | 3 | 0 | 3 | 100.00 |
| NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
| max_range | 16 | 1 | T6 | 13 | T355 | 3 | - | - | ||||
| mid_range | 8 | 1 | T100 | 1 | T361 | 7 | - | - | ||||
| min_range | 337 | 1 | T27 | 1 | T48 | 12 | T56 | 2 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |