Unified Coverage Report :: Group :: sysrst_ctrl_env_pkg::sysrst_ctrl_auto_blk_key_output_vseq::sysrst_ctrl_auto_blk_out_ctl_cg

Group : sysrst_ctrl_env_pkg::sysrst_ctrl_auto_blk_key_output_vseq::sysrst_ctrl_auto_blk_out_ctl_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	60.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sysrst_ctrl_env_0.1/seq_lib/sysrst_ctrl_auto_blk_key_output_vseq.sv

5 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
sysrst_ctrl_auto_blk_out_ctl_cg_(3)	0.00	1	100	1	64	64
sysrst_ctrl_auto_blk_out_ctl_cg_(4)	0.00	1	100	1	64	64
sysrst_ctrl_auto_blk_out_ctl_cg	100.00	1	100	1	64	64
sysrst_ctrl_auto_blk_out_ctl_cg_(1)	100.00	1	100	1	64	64
sysrst_ctrl_auto_blk_out_ctl_cg_(2)	100.00	1	100	1	64	64

---

Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(3)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
0.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(3)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	12	12	0	0.00
Crosses	12	12	0	0.00

Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(3)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_key0_out_sel	2	2	0	0.00	100	1	1	2
cp_key0_out_value	2	2	0	0.00	100	1	1	2
cp_key1_out_sel	2	2	0	0.00	100	1	1	2
cp_key1_out_value	2	2	0	0.00	100	1	1	2
cp_key2_out_sel	2	2	0	0.00	100	1	1	2
cp_key2_out_value	2	2	0	0.00	100	1	1	2

Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(3)

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cross_key0_out_sel_value	4	4	0	0.00	100	1	1	0
cross_key1_out_sel_value	4	4	0	0.00	100	1	1	0
cross_key2_out_sel_value	4	4	0	0.00	100	1	1	0

---

Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(4)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
0.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(4)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	12	12	0	0.00
Crosses	12	12	0	0.00

Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(4)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_key0_out_sel	2	2	0	0.00	100	1	1	2
cp_key0_out_value	2	2	0	0.00	100	1	1	2
cp_key1_out_sel	2	2	0	0.00	100	1	1	2
cp_key1_out_value	2	2	0	0.00	100	1	1	2
cp_key2_out_sel	2	2	0	0.00	100	1	1	2
cp_key2_out_value	2	2	0	0.00	100	1	1	2

Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(4)

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cross_key0_out_sel_value	4	4	0	0.00	100	1	1	0
cross_key1_out_sel_value	4	4	0	0.00	100	1	1	0
cross_key2_out_sel_value	4	4	0	0.00	100	1	1	0

---

Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	12	0	12	100.00
Crosses	12	0	12	100.00

Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_key0_out_sel	2	0	2	100.00	100	1	1	2
cp_key0_out_value	2	0	2	100.00	100	1	1	2
cp_key1_out_sel	2	0	2	100.00	100	1	1	2
cp_key1_out_value	2	0	2	100.00	100	1	1	2
cp_key2_out_sel	2	0	2	100.00	100	1	1	2
cp_key2_out_value	2	0	2	100.00	100	1	1	2

Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cross_key0_out_sel_value	4	0	4	100.00	100	1	1	0
cross_key1_out_sel_value	4	0	4	100.00	100	1	1	0
cross_key2_out_sel_value	4	0	4	100.00	100	1	1	0

---

Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(1)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(1)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	12	0	12	100.00
Crosses	12	0	12	100.00

Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(1)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_key0_out_sel	2	0	2	100.00	100	1	1	2
cp_key0_out_value	2	0	2	100.00	100	1	1	2
cp_key1_out_sel	2	0	2	100.00	100	1	1	2
cp_key1_out_value	2	0	2	100.00	100	1	1	2
cp_key2_out_sel	2	0	2	100.00	100	1	1	2
cp_key2_out_value	2	0	2	100.00	100	1	1	2

Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(1)

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cross_key0_out_sel_value	4	0	4	100.00	100	1	1	0
cross_key1_out_sel_value	4	0	4	100.00	100	1	1	0
cross_key2_out_sel_value	4	0	4	100.00	100	1	1	0

---

Group Instance : sysrst_ctrl_auto_blk_out_ctl_cg_(2)

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(2)

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	12	0	12	100.00
Crosses	12	0	12	100.00

Variables for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(2)

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_key0_out_sel	2	0	2	100.00	100	1	1	2
cp_key0_out_value	2	0	2	100.00	100	1	1	2
cp_key1_out_sel	2	0	2	100.00	100	1	1	2
cp_key1_out_value	2	0	2	100.00	100	1	1	2
cp_key2_out_sel	2	0	2	100.00	100	1	1	2
cp_key2_out_value	2	0	2	100.00	100	1	1	2

Crosses for Group Instance sysrst_ctrl_auto_blk_out_ctl_cg_(2)

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cross_key0_out_sel_value	4	0	4	100.00	100	1	1	0
cross_key1_out_sel_value	4	0	4	100.00	100	1	1	0
cross_key2_out_sel_value	4	0	4	100.00	100	1	1	0

Summary for Variable cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key0_out_sel

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key0_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key0_out_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key1_out_sel

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key1_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key1_out_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key2_out_sel

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key2_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key2_out_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	4	0	0.00	4

Automatically Generated Cross Bins for cross_key0_out_sel_value

Uncovered bins

cp_key0_out_value	cp_key0_out_sel	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	4

---

Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	4	0	0.00	4

Automatically Generated Cross Bins for cross_key1_out_sel_value

Uncovered bins

cp_key1_out_value	cp_key1_out_sel	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	4

---

Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	4	0	0.00	4

Automatically Generated Cross Bins for cross_key2_out_sel_value

Uncovered bins

cp_key2_out_value	cp_key2_out_sel	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	4

Summary for Variable cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key0_out_sel

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key0_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key0_out_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key1_out_sel

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key1_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key1_out_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key2_out_sel

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Variable cp_key2_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	2	0	0.00

Automatically Generated Bins for cp_key2_out_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
[auto[0] - auto[1]]	--	--	2

---

Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	4	0	0.00	4

Automatically Generated Cross Bins for cross_key0_out_sel_value

Uncovered bins

cp_key0_out_value	cp_key0_out_sel	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	4

---

Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	4	0	0.00	4

Automatically Generated Cross Bins for cross_key1_out_sel_value

Uncovered bins

cp_key1_out_value	cp_key1_out_sel	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	4

---

Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	4	0	0.00	4

Automatically Generated Cross Bins for cross_key2_out_sel_value

Uncovered bins

cp_key2_out_value	cp_key2_out_sel	COUNT	AT LEAST	NUMBER	STATUS
*	*	--	--	4

Summary for Variable cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key0_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

126

1

T26

1

T47

2

T35

2

auto[1]

115

1

T26

2

T47

1

T8

3

---

Summary for Variable cp_key0_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key0_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

127

1

T26

2

T47

2

T8

2

auto[1]

114

1

T26

1

T47

1

T8

1

---

Summary for Variable cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key1_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

120

1

T26

3

T47

2

T8

1

auto[1]

121

1

T47

1

T8

2

T35

2

---

Summary for Variable cp_key1_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key1_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

116

1

T26

2

T47

2

T8

1

auto[1]

125

1

T26

1

T47

1

T8

2

---

Summary for Variable cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key2_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

117

1

T26

2

T8

1

T35

3

auto[1]

124

1

T26

1

T47

3

T8

2

---

Summary for Variable cp_key2_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key2_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

126

1

T26

2

T47

2

T8

2

auto[1]

115

1

T26

1

T47

1

T8

1

---

Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key0_out_sel_value

Bins

cp_key0_out_value

cp_key0_out_sel

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

auto[0]

70

1

T26

1

T47

1

T35

1

auto[0]

auto[1]

57

1

T26

1

T47

1

T8

2

auto[1]

auto[0]

56

1

T47

1

T35

1

T58

2

auto[1]

auto[1]

58

1

T26

1

T8

1

T35

1

---

Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key1_out_sel_value

Bins

cp_key1_out_value

cp_key1_out_sel

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

auto[0]

49

1

T26

2

T47

1

T8

1

auto[0]

auto[1]

67

1

T47

1

T35

1

T57

1

auto[1]

auto[0]

71

1

T26

1

T47

1

T35

1

auto[1]

auto[1]

54

1

T8

2

T35

1

T57

1

---

Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key2_out_sel_value

Bins

cp_key2_out_value

cp_key2_out_sel

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

auto[0]

52

1

T26

1

T35

1

T57

1

auto[0]

auto[1]

74

1

T26

1

T47

2

T8

2

auto[1]

auto[0]

65

1

T26

1

T8

1

T35

2

auto[1]

auto[1]

50

1

T47

1

T57

1

T58

1

Summary for Variable cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key0_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14

1

T19

2

T104

1

T229

1

auto[1]

12

1

T19

1

T104

2

T229

2

---

Summary for Variable cp_key0_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key0_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

18

1

T19

2

T104

3

T229

1

auto[1]

8

1

T19

1

T229

2

T359

1

---

Summary for Variable cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key1_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14

1

T19

1

T104

2

T229

1

auto[1]

12

1

T19

2

T104

1

T229

2

---

Summary for Variable cp_key1_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key1_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

17

1

T19

1

T104

3

T229

1

auto[1]

9

1

T19

2

T229

2

T111

2

---

Summary for Variable cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key2_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

16

1

T19

2

T104

3

T229

2

auto[1]

10

1

T19

1

T229

1

T359

2

---

Summary for Variable cp_key2_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key2_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

14

1

T19

2

T104

2

T229

1

auto[1]

12

1

T19

1

T104

1

T229

2

---

Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key0_out_sel_value

Bins

cp_key0_out_value

cp_key0_out_sel

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

auto[0]

10

1

T19

1

T104

1

T229

1

auto[0]

auto[1]

8

1

T19

1

T104

2

T111

1

auto[1]

auto[0]

4

1

T19

1

T313

1

T114

1

auto[1]

auto[1]

4

1

T229

2

T359

1

T114

1

---

Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key1_out_sel_value

Bins

cp_key1_out_value

cp_key1_out_sel

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

auto[0]

9

1

T104

2

T359

2

T388

1

auto[0]

auto[1]

8

1

T19

1

T104

1

T229

1

auto[1]

auto[0]

5

1

T19

1

T229

1

T111

2

auto[1]

auto[1]

4

1

T19

1

T229

1

T388

1

---

Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key2_out_sel_value

Bins

cp_key2_out_value

cp_key2_out_sel

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

auto[0]

9

1

T19

2

T104

2

T229

1

auto[0]

auto[1]

5

1

T359

1

T111

2

T388

1

auto[1]

auto[0]

7

1

T104

1

T229

1

T359

1

auto[1]

auto[1]

5

1

T19

1

T229

1

T359

1

Summary for Variable cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key0_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

4

1

T359

2

T314

2

-

-

auto[1]

7

1

T229

3

T111

3

T314

1

---

Summary for Variable cp_key0_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key0_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6

1

T229

2

T111

2

T314

2

auto[1]

5

1

T229

1

T359

2

T111

1

---

Summary for Variable cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key1_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

7

1

T229

3

T359

1

T111

2

auto[1]

4

1

T359

1

T111

1

T314

2

---

Summary for Variable cp_key1_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key1_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

5

1

T229

2

T359

1

T111

1

auto[1]

6

1

T229

1

T359

1

T111

2

---

Summary for Variable cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key2_out_sel

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

8

1

T229

3

T359

1

T111

3

auto[1]

3

1

T359

1

T314

2

-

-

---

Summary for Variable cp_key2_out_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_key2_out_value

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

6

1

T229

2

T359

2

T111

2

auto[1]

5

1

T229

1

T111

1

T314

3

---

Summary for Cross cross_key0_out_sel_value

Samples crossed: cp_key0_out_value cp_key0_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key0_out_sel_value

Bins

cp_key0_out_value	cp_key0_out_sel	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	1	1			T314	1		-	-		-	-
auto[0]	auto[1]	5	1			T229	2		T111	2		T314	1
auto[1]	auto[0]	3	1			T359	2		T314	1		-	-
auto[1]	auto[1]	2	1			T229	1		T111	1		-	-

---

Summary for Cross cross_key1_out_sel_value

Samples crossed: cp_key1_out_value cp_key1_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key1_out_sel_value

Bins

cp_key1_out_value	cp_key1_out_sel	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	4	1			T229	2		T359	1		T111	1
auto[0]	auto[1]	1	1			T314	1		-	-		-	-
auto[1]	auto[0]	3	1			T229	1		T111	1		T314	1
auto[1]	auto[1]	3	1			T359	1		T111	1		T314	1

---

Summary for Cross cross_key2_out_sel_value

Samples crossed: cp_key2_out_value cp_key2_out_sel

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cross_key2_out_sel_value

Bins

cp_key2_out_value	cp_key2_out_sel	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	auto[0]	5	1			T229	2		T359	1		T111	2
auto[0]	auto[1]	1	1			T359	1		-	-		-	-
auto[1]	auto[0]	3	1			T229	1		T111	1		T314	1
auto[1]	auto[1]	2	1			T314	2		-	-		-	-