| T438 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.1046651970 |
|
|
Feb 25 12:42:21 PM PST 24 |
Feb 25 12:42:24 PM PST 24 |
2118580585 ps |
| T137 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3595341007 |
|
|
Feb 25 12:43:35 PM PST 24 |
Feb 25 12:43:59 PM PST 24 |
9858440554 ps |
| T439 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.229076862 |
|
|
Feb 25 12:42:53 PM PST 24 |
Feb 25 12:42:55 PM PST 24 |
2491463587 ps |
| T440 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.684009066 |
|
|
Feb 25 12:43:55 PM PST 24 |
Feb 25 12:43:58 PM PST 24 |
2020478986 ps |
| T154 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.1009204000 |
|
|
Feb 25 12:42:19 PM PST 24 |
Feb 25 12:42:24 PM PST 24 |
3109058429 ps |
| T358 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1566156468 |
|
|
Feb 25 12:43:50 PM PST 24 |
Feb 25 12:44:45 PM PST 24 |
24830723252 ps |
| T441 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2574375698 |
|
|
Feb 25 12:43:32 PM PST 24 |
Feb 25 12:43:34 PM PST 24 |
2501800347 ps |
| T442 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.1912568305 |
|
|
Feb 25 12:42:43 PM PST 24 |
Feb 25 12:43:02 PM PST 24 |
15137454803 ps |
| T443 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1307584348 |
|
|
Feb 25 12:42:15 PM PST 24 |
Feb 25 12:42:17 PM PST 24 |
2035500060 ps |
| T444 |
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2610944991 |
|
|
Feb 25 12:42:17 PM PST 24 |
Feb 25 12:42:21 PM PST 24 |
3855286246 ps |
| T445 |
/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.4161281223 |
|
|
Feb 25 12:43:17 PM PST 24 |
Feb 25 12:43:41 PM PST 24 |
40566754900 ps |
| T446 |
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.4021097581 |
|
|
Feb 25 12:43:23 PM PST 24 |
Feb 25 12:43:25 PM PST 24 |
2566717912 ps |
| T447 |
/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2558231417 |
|
|
Feb 25 12:41:54 PM PST 24 |
Feb 25 12:41:59 PM PST 24 |
2448160039 ps |
| T448 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3315310066 |
|
|
Feb 25 12:42:58 PM PST 24 |
Feb 25 12:43:02 PM PST 24 |
2523001785 ps |
| T449 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2350697206 |
|
|
Feb 25 12:42:43 PM PST 24 |
Feb 25 12:42:46 PM PST 24 |
2487851372 ps |
| T135 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.4197135114 |
|
|
Feb 25 12:42:33 PM PST 24 |
Feb 25 12:46:05 PM PST 24 |
80854719838 ps |
| T450 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.1214561162 |
|
|
Feb 25 12:43:00 PM PST 24 |
Feb 25 12:43:06 PM PST 24 |
2014445933 ps |
| T451 |
/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3859823903 |
|
|
Feb 25 12:43:02 PM PST 24 |
Feb 25 12:43:11 PM PST 24 |
3137797974 ps |
| T452 |
/workspace/coverage/default/26.sysrst_ctrl_edge_detect.4016880523 |
|
|
Feb 25 12:42:45 PM PST 24 |
Feb 25 12:42:52 PM PST 24 |
2407356410 ps |
| T453 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.1741730803 |
|
|
Feb 25 12:43:28 PM PST 24 |
Feb 25 12:43:30 PM PST 24 |
2134783475 ps |
| T454 |
/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.671061905 |
|
|
Feb 25 12:42:28 PM PST 24 |
Feb 25 12:42:32 PM PST 24 |
2762676419 ps |
| T157 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2325506013 |
|
|
Feb 25 12:43:36 PM PST 24 |
Feb 25 12:43:40 PM PST 24 |
3901057774 ps |
| T455 |
/workspace/coverage/default/14.sysrst_ctrl_alert_test.800803704 |
|
|
Feb 25 12:42:33 PM PST 24 |
Feb 25 12:42:35 PM PST 24 |
2043504601 ps |
| T456 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1958447028 |
|
|
Feb 25 12:43:21 PM PST 24 |
Feb 25 12:43:40 PM PST 24 |
7227515095 ps |
| T457 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3475116253 |
|
|
Feb 25 12:42:27 PM PST 24 |
Feb 25 12:42:31 PM PST 24 |
2618119601 ps |
| T458 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2666227261 |
|
|
Feb 25 12:42:20 PM PST 24 |
Feb 25 12:42:22 PM PST 24 |
2560287682 ps |
| T459 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.3739490069 |
|
|
Feb 25 12:43:00 PM PST 24 |
Feb 25 12:43:06 PM PST 24 |
2111907961 ps |
| T460 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.667829523 |
|
|
Feb 25 12:43:33 PM PST 24 |
Feb 25 12:43:36 PM PST 24 |
2526694757 ps |
| T461 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.2680084822 |
|
|
Feb 25 12:43:11 PM PST 24 |
Feb 25 12:43:13 PM PST 24 |
2132707961 ps |
| T366 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3288429066 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:43:58 PM PST 24 |
35872783645 ps |
| T82 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.708078337 |
|
|
Feb 25 12:41:59 PM PST 24 |
Feb 25 12:43:46 PM PST 24 |
42125586258 ps |
| T89 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3069899176 |
|
|
Feb 25 12:42:27 PM PST 24 |
Feb 25 12:42:35 PM PST 24 |
6943128139 ps |
| T121 |
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3856175681 |
|
|
Feb 25 12:43:16 PM PST 24 |
Feb 25 12:43:18 PM PST 24 |
2257437177 ps |
| T122 |
/workspace/coverage/default/34.sysrst_ctrl_alert_test.2056036200 |
|
|
Feb 25 12:43:15 PM PST 24 |
Feb 25 12:43:16 PM PST 24 |
2034415093 ps |
| T123 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3200269897 |
|
|
Feb 25 12:42:22 PM PST 24 |
Feb 25 12:42:33 PM PST 24 |
3776433454 ps |
| T124 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2601339018 |
|
|
Feb 25 12:43:29 PM PST 24 |
Feb 25 12:45:01 PM PST 24 |
35367283149 ps |
| T125 |
/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2484275644 |
|
|
Feb 25 12:42:25 PM PST 24 |
Feb 25 12:42:28 PM PST 24 |
2519887006 ps |
| T126 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.510412877 |
|
|
Feb 25 12:42:03 PM PST 24 |
Feb 25 12:42:16 PM PST 24 |
51612479150 ps |
| T127 |
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3938588770 |
|
|
Feb 25 12:43:29 PM PST 24 |
Feb 25 12:43:32 PM PST 24 |
3802952186 ps |
| T128 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.1106540241 |
|
|
Feb 25 12:42:47 PM PST 24 |
Feb 25 12:47:40 PM PST 24 |
107875989129 ps |
| T129 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3163519618 |
|
|
Feb 25 12:42:26 PM PST 24 |
Feb 25 12:42:31 PM PST 24 |
2121752126 ps |
| T462 |
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1042133397 |
|
|
Feb 25 12:43:40 PM PST 24 |
Feb 25 12:43:41 PM PST 24 |
2154622571 ps |
| T463 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1633793683 |
|
|
Feb 25 12:42:35 PM PST 24 |
Feb 25 12:42:42 PM PST 24 |
8324426085 ps |
| T464 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1978497944 |
|
|
Feb 25 12:42:43 PM PST 24 |
Feb 25 12:47:33 PM PST 24 |
109390514850 ps |
| T465 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.207013690 |
|
|
Feb 25 12:42:56 PM PST 24 |
Feb 25 12:43:04 PM PST 24 |
2610710332 ps |
| T466 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3923428754 |
|
|
Feb 25 12:42:17 PM PST 24 |
Feb 25 12:42:24 PM PST 24 |
2525576491 ps |
| T467 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3869711988 |
|
|
Feb 25 12:42:09 PM PST 24 |
Feb 25 12:42:14 PM PST 24 |
6615362051 ps |
| T138 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3643096866 |
|
|
Feb 25 12:42:22 PM PST 24 |
Feb 25 12:42:48 PM PST 24 |
41970117836 ps |
| T468 |
/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2023647254 |
|
|
Feb 25 12:42:39 PM PST 24 |
Feb 25 12:42:41 PM PST 24 |
8142323090 ps |
| T469 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.453121977 |
|
|
Feb 25 12:42:36 PM PST 24 |
Feb 25 12:48:06 PM PST 24 |
129917446172 ps |
| T470 |
/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3542380276 |
|
|
Feb 25 12:42:57 PM PST 24 |
Feb 25 12:43:00 PM PST 24 |
2624572912 ps |
| T471 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2823191909 |
|
|
Feb 25 12:44:05 PM PST 24 |
Feb 25 12:44:28 PM PST 24 |
24097702563 ps |
| T320 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.2456366713 |
|
|
Feb 25 12:42:31 PM PST 24 |
Feb 25 12:44:51 PM PST 24 |
204973185615 ps |
| T472 |
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2977376146 |
|
|
Feb 25 12:43:16 PM PST 24 |
Feb 25 12:44:30 PM PST 24 |
28218903543 ps |
| T473 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.572551103 |
|
|
Feb 25 12:42:36 PM PST 24 |
Feb 25 12:42:45 PM PST 24 |
3278296445 ps |
| T474 |
/workspace/coverage/default/26.sysrst_ctrl_alert_test.4172883304 |
|
|
Feb 25 12:42:54 PM PST 24 |
Feb 25 12:42:57 PM PST 24 |
2023724688 ps |
| T475 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3482270626 |
|
|
Feb 25 12:43:19 PM PST 24 |
Feb 25 12:43:22 PM PST 24 |
3303976249 ps |
| T338 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1929245965 |
|
|
Feb 25 12:42:24 PM PST 24 |
Feb 25 12:45:39 PM PST 24 |
140793204261 ps |
| T176 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2756484951 |
|
|
Feb 25 12:42:03 PM PST 24 |
Feb 25 12:42:24 PM PST 24 |
29664607801 ps |
| T476 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.3575669412 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:34 PM PST 24 |
3696826592 ps |
| T90 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2678380926 |
|
|
Feb 25 12:43:21 PM PST 24 |
Feb 25 12:43:58 PM PST 24 |
54276135494 ps |
| T477 |
/workspace/coverage/default/10.sysrst_ctrl_smoke.47805649 |
|
|
Feb 25 12:42:25 PM PST 24 |
Feb 25 12:42:27 PM PST 24 |
2142147485 ps |
| T478 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3139107096 |
|
|
Feb 25 12:42:17 PM PST 24 |
Feb 25 12:42:27 PM PST 24 |
3596438888 ps |
| T160 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.907857988 |
|
|
Feb 25 12:42:26 PM PST 24 |
Feb 25 12:42:32 PM PST 24 |
2932356258 ps |
| T479 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3589056791 |
|
|
Feb 25 12:43:53 PM PST 24 |
Feb 25 12:49:06 PM PST 24 |
123493757271 ps |
| T480 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.1907019603 |
|
|
Feb 25 12:41:59 PM PST 24 |
Feb 25 12:42:03 PM PST 24 |
2403156048 ps |
| T481 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.110145756 |
|
|
Feb 25 12:43:01 PM PST 24 |
Feb 25 12:43:03 PM PST 24 |
2123133097 ps |
| T482 |
/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1667998514 |
|
|
Feb 25 12:42:42 PM PST 24 |
Feb 25 12:42:44 PM PST 24 |
5901984179 ps |
| T483 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3936187073 |
|
|
Feb 25 12:43:30 PM PST 24 |
Feb 25 12:43:41 PM PST 24 |
3713026856 ps |
| T484 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.2707734652 |
|
|
Feb 25 12:42:25 PM PST 24 |
Feb 25 12:42:27 PM PST 24 |
3428434227 ps |
| T485 |
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3093531821 |
|
|
Feb 25 12:43:43 PM PST 24 |
Feb 25 12:44:02 PM PST 24 |
6805359718 ps |
| T486 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3333474208 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:30 PM PST 24 |
2014052285 ps |
| T487 |
/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1917345257 |
|
|
Feb 25 12:42:44 PM PST 24 |
Feb 25 12:42:47 PM PST 24 |
4776097930 ps |
| T488 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1195901385 |
|
|
Feb 25 12:42:49 PM PST 24 |
Feb 25 12:42:51 PM PST 24 |
2623555170 ps |
| T489 |
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2039484771 |
|
|
Feb 25 12:43:38 PM PST 24 |
Feb 25 12:43:41 PM PST 24 |
2620570296 ps |
| T330 |
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.569140718 |
|
|
Feb 25 12:43:50 PM PST 24 |
Feb 25 12:47:43 PM PST 24 |
84417549520 ps |
| T339 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.2764547750 |
|
|
Feb 25 12:42:37 PM PST 24 |
Feb 25 12:48:38 PM PST 24 |
135215004499 ps |
| T490 |
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2620796563 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:26 PM PST 24 |
2278807817 ps |
| T324 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3055223651 |
|
|
Feb 25 12:41:53 PM PST 24 |
Feb 25 12:45:49 PM PST 24 |
178073841533 ps |
| T93 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.455040834 |
|
|
Feb 25 12:42:58 PM PST 24 |
Feb 25 12:43:02 PM PST 24 |
5608213933 ps |
| T491 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3662129891 |
|
|
Feb 25 12:43:25 PM PST 24 |
Feb 25 12:43:28 PM PST 24 |
2528866485 ps |
| T492 |
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3387147472 |
|
|
Feb 25 12:43:31 PM PST 24 |
Feb 25 12:43:35 PM PST 24 |
2517771903 ps |
| T493 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1251761032 |
|
|
Feb 25 12:43:10 PM PST 24 |
Feb 25 12:43:17 PM PST 24 |
2613128042 ps |
| T494 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1336919335 |
|
|
Feb 25 12:42:36 PM PST 24 |
Feb 25 12:43:34 PM PST 24 |
41985572408 ps |
| T322 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2790858664 |
|
|
Feb 25 12:42:35 PM PST 24 |
Feb 25 12:43:22 PM PST 24 |
63973619095 ps |
| T495 |
/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1479122195 |
|
|
Feb 25 12:42:47 PM PST 24 |
Feb 25 12:42:57 PM PST 24 |
3638513763 ps |
| T496 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.2209788685 |
|
|
Feb 25 12:42:25 PM PST 24 |
Feb 25 12:42:27 PM PST 24 |
2634688015 ps |
| T497 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.270481629 |
|
|
Feb 25 12:43:50 PM PST 24 |
Feb 25 12:43:57 PM PST 24 |
2610521953 ps |
| T498 |
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.782967623 |
|
|
Feb 25 12:43:43 PM PST 24 |
Feb 25 12:43:51 PM PST 24 |
2459306490 ps |
| T499 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.3897964897 |
|
|
Feb 25 12:42:39 PM PST 24 |
Feb 25 12:42:46 PM PST 24 |
2109263746 ps |
| T159 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all.2615768820 |
|
|
Feb 25 12:42:43 PM PST 24 |
Feb 25 12:42:51 PM PST 24 |
15642691650 ps |
| T500 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3220605820 |
|
|
Feb 25 12:42:59 PM PST 24 |
Feb 25 12:43:02 PM PST 24 |
2521316714 ps |
| T139 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.950500826 |
|
|
Feb 25 12:42:16 PM PST 24 |
Feb 25 12:47:08 PM PST 24 |
865046485028 ps |
| T249 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3473970333 |
|
|
Feb 25 12:42:39 PM PST 24 |
Feb 25 12:43:01 PM PST 24 |
51458460178 ps |
| T501 |
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.2755498649 |
|
|
Feb 25 12:42:00 PM PST 24 |
Feb 25 12:42:44 PM PST 24 |
15504312458 ps |
| T151 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all.1632411458 |
|
|
Feb 25 12:42:57 PM PST 24 |
Feb 25 12:45:03 PM PST 24 |
171567777996 ps |
| T216 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2856676515 |
|
|
Feb 25 12:42:19 PM PST 24 |
Feb 25 12:43:50 PM PST 24 |
111088464106 ps |
| T217 |
/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.4157629751 |
|
|
Feb 25 12:42:25 PM PST 24 |
Feb 25 12:42:27 PM PST 24 |
3575435318 ps |
| T218 |
/workspace/coverage/default/30.sysrst_ctrl_edge_detect.2513917201 |
|
|
Feb 25 12:43:07 PM PST 24 |
Feb 25 12:43:09 PM PST 24 |
2448166923 ps |
| T219 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.433934519 |
|
|
Feb 25 12:43:33 PM PST 24 |
Feb 25 12:43:36 PM PST 24 |
2037789714 ps |
| T220 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3673349271 |
|
|
Feb 25 12:43:49 PM PST 24 |
Feb 25 12:45:01 PM PST 24 |
26331423784 ps |
| T221 |
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.23470589 |
|
|
Feb 25 12:43:23 PM PST 24 |
Feb 25 12:43:30 PM PST 24 |
31165540922 ps |
| T136 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3814563333 |
|
|
Feb 25 12:42:33 PM PST 24 |
Feb 25 12:46:50 PM PST 24 |
1070065935024 ps |
| T222 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1705470437 |
|
|
Feb 25 12:42:02 PM PST 24 |
Feb 25 12:42:10 PM PST 24 |
2449080603 ps |
| T223 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1841067464 |
|
|
Feb 25 12:42:19 PM PST 24 |
Feb 25 12:42:25 PM PST 24 |
2614370063 ps |
| T502 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1715669159 |
|
|
Feb 25 12:42:45 PM PST 24 |
Feb 25 12:42:53 PM PST 24 |
2451554082 ps |
| T503 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2729859782 |
|
|
Feb 25 12:43:26 PM PST 24 |
Feb 25 12:43:34 PM PST 24 |
2761412899 ps |
| T504 |
/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3294279340 |
|
|
Feb 25 12:43:05 PM PST 24 |
Feb 25 12:43:11 PM PST 24 |
2488131698 ps |
| T505 |
/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2009534434 |
|
|
Feb 25 12:42:41 PM PST 24 |
Feb 25 12:42:45 PM PST 24 |
2454262459 ps |
| T340 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.196117918 |
|
|
Feb 25 12:43:03 PM PST 24 |
Feb 25 12:47:08 PM PST 24 |
91382370280 ps |
| T91 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.4068166400 |
|
|
Feb 25 12:42:51 PM PST 24 |
Feb 25 12:42:54 PM PST 24 |
6355857336 ps |
| T506 |
/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1937970229 |
|
|
Feb 25 12:42:43 PM PST 24 |
Feb 25 12:42:51 PM PST 24 |
2469927902 ps |
| T507 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.1221246681 |
|
|
Feb 25 12:42:39 PM PST 24 |
Feb 25 12:42:46 PM PST 24 |
2611379416 ps |
| T508 |
/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1163562681 |
|
|
Feb 25 12:42:14 PM PST 24 |
Feb 25 12:42:22 PM PST 24 |
2509700098 ps |
| T509 |
/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.4217798114 |
|
|
Feb 25 12:42:44 PM PST 24 |
Feb 25 12:42:51 PM PST 24 |
2612817282 ps |
| T510 |
/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2087277947 |
|
|
Feb 25 12:42:32 PM PST 24 |
Feb 25 12:42:38 PM PST 24 |
3389773244 ps |
| T511 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.2943878951 |
|
|
Feb 25 12:43:01 PM PST 24 |
Feb 25 12:43:12 PM PST 24 |
8736031617 ps |
| T512 |
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3485129058 |
|
|
Feb 25 12:43:16 PM PST 24 |
Feb 25 12:43:29 PM PST 24 |
4310736106 ps |
| T188 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.4123943002 |
|
|
Feb 25 12:43:14 PM PST 24 |
Feb 25 12:43:25 PM PST 24 |
4761930059 ps |
| T140 |
/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.3257119880 |
|
|
Feb 25 12:42:19 PM PST 24 |
Feb 25 12:43:04 PM PST 24 |
65274432005 ps |
| T201 |
/workspace/coverage/default/6.sysrst_ctrl_alert_test.4107793140 |
|
|
Feb 25 12:42:19 PM PST 24 |
Feb 25 12:42:21 PM PST 24 |
2031734840 ps |
| T202 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1422767312 |
|
|
Feb 25 12:43:00 PM PST 24 |
Feb 25 12:43:40 PM PST 24 |
30777309253 ps |
| T203 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1886700338 |
|
|
Feb 25 12:43:18 PM PST 24 |
Feb 25 12:43:23 PM PST 24 |
2616631280 ps |
| T83 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3776871816 |
|
|
Feb 25 12:41:57 PM PST 24 |
Feb 25 12:42:23 PM PST 24 |
41176834007 ps |
| T204 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.1288427887 |
|
|
Feb 25 12:43:53 PM PST 24 |
Feb 25 12:48:58 PM PST 24 |
111221692898 ps |
| T205 |
/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3348770475 |
|
|
Feb 25 12:42:45 PM PST 24 |
Feb 25 12:42:52 PM PST 24 |
2017533602 ps |
| T206 |
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3599173997 |
|
|
Feb 25 12:43:44 PM PST 24 |
Feb 25 12:44:09 PM PST 24 |
83245065303 ps |
| T207 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.959439788 |
|
|
Feb 25 12:41:57 PM PST 24 |
Feb 25 12:42:03 PM PST 24 |
2069478774 ps |
| T513 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.2700298820 |
|
|
Feb 25 12:43:25 PM PST 24 |
Feb 25 12:43:31 PM PST 24 |
2111592088 ps |
| T514 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.245312588 |
|
|
Feb 25 12:42:10 PM PST 24 |
Feb 25 12:42:17 PM PST 24 |
2181291672 ps |
| T515 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3388409805 |
|
|
Feb 25 12:41:56 PM PST 24 |
Feb 25 12:41:59 PM PST 24 |
3533715663 ps |
| T516 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1872577248 |
|
|
Feb 25 12:42:40 PM PST 24 |
Feb 25 12:42:54 PM PST 24 |
26653417374 ps |
| T517 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2526916618 |
|
|
Feb 25 12:43:48 PM PST 24 |
Feb 25 12:43:49 PM PST 24 |
3233467400 ps |
| T518 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2577551442 |
|
|
Feb 25 12:43:55 PM PST 24 |
Feb 25 12:46:26 PM PST 24 |
54712300766 ps |
| T519 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2330898171 |
|
|
Feb 25 12:43:03 PM PST 24 |
Feb 25 12:43:13 PM PST 24 |
3776303032 ps |
| T520 |
/workspace/coverage/default/41.sysrst_ctrl_alert_test.819525259 |
|
|
Feb 25 12:43:21 PM PST 24 |
Feb 25 12:43:22 PM PST 24 |
2134091499 ps |
| T521 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4040825589 |
|
|
Feb 25 12:43:34 PM PST 24 |
Feb 25 12:44:41 PM PST 24 |
103099091202 ps |
| T522 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.12177314 |
|
|
Feb 25 12:43:16 PM PST 24 |
Feb 25 12:43:22 PM PST 24 |
2155785663 ps |
| T523 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.3056606982 |
|
|
Feb 25 12:42:31 PM PST 24 |
Feb 25 12:48:53 PM PST 24 |
146645891345 ps |
| T524 |
/workspace/coverage/default/43.sysrst_ctrl_smoke.2628777469 |
|
|
Feb 25 12:43:23 PM PST 24 |
Feb 25 12:43:30 PM PST 24 |
2113114629 ps |
| T170 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2238376348 |
|
|
Feb 25 12:43:23 PM PST 24 |
Feb 25 12:43:36 PM PST 24 |
39128095579 ps |
| T525 |
/workspace/coverage/default/17.sysrst_ctrl_edge_detect.4036904127 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:24 PM PST 24 |
2629573815 ps |
| T526 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1061861067 |
|
|
Feb 25 12:43:04 PM PST 24 |
Feb 25 12:43:12 PM PST 24 |
3440712505 ps |
| T359 |
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2861006255 |
|
|
Feb 25 12:43:45 PM PST 24 |
Feb 25 12:47:49 PM PST 24 |
242312528703 ps |
| T527 |
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.547811546 |
|
|
Feb 25 12:43:51 PM PST 24 |
Feb 25 12:43:54 PM PST 24 |
3499650149 ps |
| T528 |
/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2401257815 |
|
|
Feb 25 12:43:18 PM PST 24 |
Feb 25 12:43:26 PM PST 24 |
2608052445 ps |
| T529 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3291680703 |
|
|
Feb 25 12:42:20 PM PST 24 |
Feb 25 12:42:30 PM PST 24 |
3475435834 ps |
| T530 |
/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1726035110 |
|
|
Feb 25 12:42:42 PM PST 24 |
Feb 25 12:42:45 PM PST 24 |
2249629254 ps |
| T531 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.2963105894 |
|
|
Feb 25 12:43:23 PM PST 24 |
Feb 25 12:43:26 PM PST 24 |
2116108423 ps |
| T532 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.364923314 |
|
|
Feb 25 12:42:20 PM PST 24 |
Feb 25 12:42:21 PM PST 24 |
3912713334 ps |
| T533 |
/workspace/coverage/default/36.sysrst_ctrl_smoke.3018019853 |
|
|
Feb 25 12:43:02 PM PST 24 |
Feb 25 12:43:05 PM PST 24 |
2113971604 ps |
| T534 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.4218242247 |
|
|
Feb 25 12:43:40 PM PST 24 |
Feb 25 12:43:48 PM PST 24 |
6974501992 ps |
| T535 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3608808977 |
|
|
Feb 25 12:43:22 PM PST 24 |
Feb 25 12:43:29 PM PST 24 |
2611131132 ps |
| T536 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3883461052 |
|
|
Feb 25 12:43:05 PM PST 24 |
Feb 25 12:43:07 PM PST 24 |
2639864819 ps |
| T119 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1690338533 |
|
|
Feb 25 12:42:50 PM PST 24 |
Feb 25 12:44:03 PM PST 24 |
32356579121 ps |
| T537 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3015643788 |
|
|
Feb 25 12:42:39 PM PST 24 |
Feb 25 12:43:03 PM PST 24 |
31831818655 ps |
| T538 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3253405191 |
|
|
Feb 25 12:43:14 PM PST 24 |
Feb 25 12:43:18 PM PST 24 |
2024321238 ps |
| T539 |
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.553961483 |
|
|
Feb 25 12:42:24 PM PST 24 |
Feb 25 12:42:27 PM PST 24 |
2535552447 ps |
| T540 |
/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2660758090 |
|
|
Feb 25 12:42:59 PM PST 24 |
Feb 25 12:43:03 PM PST 24 |
4192698754 ps |
| T541 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.614109701 |
|
|
Feb 25 12:42:41 PM PST 24 |
Feb 25 12:42:46 PM PST 24 |
3694809455 ps |
| T542 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.3217538825 |
|
|
Feb 25 12:42:52 PM PST 24 |
Feb 25 12:42:55 PM PST 24 |
2016223485 ps |
| T543 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.2271374232 |
|
|
Feb 25 12:42:17 PM PST 24 |
Feb 25 12:42:30 PM PST 24 |
9765241159 ps |
| T544 |
/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3732116151 |
|
|
Feb 25 12:42:05 PM PST 24 |
Feb 25 12:42:11 PM PST 24 |
2464955414 ps |
| T545 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.927463452 |
|
|
Feb 25 12:42:24 PM PST 24 |
Feb 25 12:42:31 PM PST 24 |
2014832476 ps |
| T362 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2564514648 |
|
|
Feb 25 12:43:53 PM PST 24 |
Feb 25 12:44:53 PM PST 24 |
107718978416 ps |
| T546 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.196087084 |
|
|
Feb 25 12:43:04 PM PST 24 |
Feb 25 12:43:07 PM PST 24 |
2495251626 ps |
| T547 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3892455739 |
|
|
Feb 25 12:42:12 PM PST 24 |
Feb 25 12:44:19 PM PST 24 |
187728130358 ps |
| T329 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.713416121 |
|
|
Feb 25 12:42:16 PM PST 24 |
Feb 25 12:42:54 PM PST 24 |
130879779168 ps |
| T548 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3518060096 |
|
|
Feb 25 12:41:56 PM PST 24 |
Feb 25 12:42:00 PM PST 24 |
2515414724 ps |
| T549 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3428797718 |
|
|
Feb 25 12:43:34 PM PST 24 |
Feb 25 12:43:36 PM PST 24 |
2284628063 ps |
| T550 |
/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1130644198 |
|
|
Feb 25 12:42:20 PM PST 24 |
Feb 25 12:45:34 PM PST 24 |
78266568435 ps |
| T551 |
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2607194891 |
|
|
Feb 25 12:42:16 PM PST 24 |
Feb 25 12:42:22 PM PST 24 |
2512943324 ps |
| T552 |
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1679799595 |
|
|
Feb 25 12:42:24 PM PST 24 |
Feb 25 12:42:28 PM PST 24 |
2616134214 ps |
| T553 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1240727737 |
|
|
Feb 25 12:42:20 PM PST 24 |
Feb 25 12:42:43 PM PST 24 |
37275418254 ps |
| T554 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.734713738 |
|
|
Feb 25 12:43:51 PM PST 24 |
Feb 25 12:45:32 PM PST 24 |
43037300642 ps |
| T555 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.1509336226 |
|
|
Feb 25 12:42:38 PM PST 24 |
Feb 25 12:42:41 PM PST 24 |
2018962165 ps |
| T556 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1252255480 |
|
|
Feb 25 12:42:15 PM PST 24 |
Feb 25 12:44:06 PM PST 24 |
43004478900 ps |
| T557 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.919309697 |
|
|
Feb 25 12:43:35 PM PST 24 |
Feb 25 12:44:59 PM PST 24 |
30830371243 ps |
| T186 |
/workspace/coverage/default/16.sysrst_ctrl_edge_detect.9694025 |
|
|
Feb 25 12:42:21 PM PST 24 |
Feb 25 12:42:23 PM PST 24 |
3159888885 ps |
| T349 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3957694643 |
|
|
Feb 25 12:43:52 PM PST 24 |
Feb 25 12:49:38 PM PST 24 |
136820996645 ps |
| T328 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.3331148319 |
|
|
Feb 25 12:42:04 PM PST 24 |
Feb 25 12:55:17 PM PST 24 |
287465520632 ps |
| T558 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.399855482 |
|
|
Feb 25 12:43:57 PM PST 24 |
Feb 25 12:49:21 PM PST 24 |
119026340543 ps |
| T559 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1291681295 |
|
|
Feb 25 12:43:52 PM PST 24 |
Feb 25 12:43:54 PM PST 24 |
3278984992 ps |
| T560 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.85404888 |
|
|
Feb 25 12:43:17 PM PST 24 |
Feb 25 12:43:20 PM PST 24 |
2130162233 ps |
| T561 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.36906353 |
|
|
Feb 25 12:42:56 PM PST 24 |
Feb 25 12:42:59 PM PST 24 |
2209825959 ps |
| T562 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3684422130 |
|
|
Feb 25 12:43:28 PM PST 24 |
Feb 25 12:43:34 PM PST 24 |
2011433380 ps |
| T563 |
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3880463094 |
|
|
Feb 25 12:43:41 PM PST 24 |
Feb 25 12:43:42 PM PST 24 |
9981684670 ps |
| T564 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2987653038 |
|
|
Feb 25 12:42:48 PM PST 24 |
Feb 25 12:42:50 PM PST 24 |
2553878685 ps |
| T565 |
/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2042070630 |
|
|
Feb 25 12:43:01 PM PST 24 |
Feb 25 12:43:03 PM PST 24 |
2571768840 ps |
| T566 |
/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2861304348 |
|
|
Feb 25 12:43:28 PM PST 24 |
Feb 25 12:43:30 PM PST 24 |
2611572352 ps |
| T239 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3582643246 |
|
|
Feb 25 12:43:45 PM PST 24 |
Feb 25 12:46:09 PM PST 24 |
106929931541 ps |
| T567 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.412094635 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:28 PM PST 24 |
3093899163 ps |
| T568 |
/workspace/coverage/default/2.sysrst_ctrl_smoke.2817020422 |
|
|
Feb 25 12:42:05 PM PST 24 |
Feb 25 12:42:11 PM PST 24 |
2111033410 ps |
| T569 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2167116164 |
|
|
Feb 25 12:42:15 PM PST 24 |
Feb 25 12:42:21 PM PST 24 |
2009187644 ps |
| T357 |
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.709776184 |
|
|
Feb 25 12:43:47 PM PST 24 |
Feb 25 12:45:30 PM PST 24 |
169548994563 ps |
| T570 |
/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.427993358 |
|
|
Feb 25 12:42:31 PM PST 24 |
Feb 25 12:42:38 PM PST 24 |
2479862357 ps |
| T571 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1106701817 |
|
|
Feb 25 12:43:00 PM PST 24 |
Feb 25 12:43:03 PM PST 24 |
2041271114 ps |
| T572 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.3983221721 |
|
|
Feb 25 12:42:46 PM PST 24 |
Feb 25 12:42:48 PM PST 24 |
2133689692 ps |
| T171 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3563517468 |
|
|
Feb 25 12:43:26 PM PST 24 |
Feb 25 12:54:13 PM PST 24 |
240566166995 ps |
| T256 |
/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1974220414 |
|
|
Feb 25 12:41:49 PM PST 24 |
Feb 25 12:42:36 PM PST 24 |
42043478754 ps |
| T172 |
/workspace/coverage/default/28.sysrst_ctrl_edge_detect.1641533927 |
|
|
Feb 25 12:42:58 PM PST 24 |
Feb 25 12:43:05 PM PST 24 |
2808819485 ps |
| T281 |
/workspace/coverage/default/23.sysrst_ctrl_smoke.2556170564 |
|
|
Feb 25 12:42:38 PM PST 24 |
Feb 25 12:42:39 PM PST 24 |
2172349747 ps |
| T282 |
/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1769474497 |
|
|
Feb 25 12:42:38 PM PST 24 |
Feb 25 12:42:45 PM PST 24 |
3848734528 ps |
| T283 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.491654906 |
|
|
Feb 25 12:42:21 PM PST 24 |
Feb 25 12:42:25 PM PST 24 |
2620150135 ps |
| T284 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.3035727727 |
|
|
Feb 25 12:42:30 PM PST 24 |
Feb 25 12:42:37 PM PST 24 |
2501111880 ps |
| T285 |
/workspace/coverage/default/31.sysrst_ctrl_combo_detect.529807921 |
|
|
Feb 25 12:43:01 PM PST 24 |
Feb 25 12:43:31 PM PST 24 |
97056786200 ps |
| T286 |
/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3145892058 |
|
|
Feb 25 12:42:33 PM PST 24 |
Feb 25 12:42:34 PM PST 24 |
2192756988 ps |
| T84 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.4082900645 |
|
|
Feb 25 12:43:14 PM PST 24 |
Feb 25 12:45:02 PM PST 24 |
39225906071 ps |
| T287 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1394159773 |
|
|
Feb 25 12:43:41 PM PST 24 |
Feb 25 12:44:58 PM PST 24 |
115158186171 ps |
| T573 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.4016649994 |
|
|
Feb 25 12:43:26 PM PST 24 |
Feb 25 12:44:10 PM PST 24 |
15553363308 ps |
| T189 |
/workspace/coverage/default/27.sysrst_ctrl_edge_detect.194841559 |
|
|
Feb 25 12:42:53 PM PST 24 |
Feb 25 12:43:03 PM PST 24 |
4215469193 ps |
| T574 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3446950464 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:32 PM PST 24 |
16055887101 ps |
| T575 |
/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3487950828 |
|
|
Feb 25 12:43:24 PM PST 24 |
Feb 25 12:43:32 PM PST 24 |
2511402547 ps |
| T576 |
/workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.879666037 |
|
|
Feb 25 12:43:02 PM PST 24 |
Feb 25 12:43:06 PM PST 24 |
9331210622 ps |
| T577 |
/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.4213982150 |
|
|
Feb 25 12:42:56 PM PST 24 |
Feb 25 12:43:07 PM PST 24 |
3589756866 ps |
| T578 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.4214305528 |
|
|
Feb 25 12:43:25 PM PST 24 |
Feb 25 12:43:28 PM PST 24 |
2243288201 ps |
| T579 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all.1043309846 |
|
|
Feb 25 12:42:55 PM PST 24 |
Feb 25 12:44:17 PM PST 24 |
134766973684 ps |
| T190 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3390630183 |
|
|
Feb 25 12:43:43 PM PST 24 |
Feb 25 12:43:53 PM PST 24 |
16278038993 ps |
| T580 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2714071450 |
|
|
Feb 25 12:42:43 PM PST 24 |
Feb 25 12:44:03 PM PST 24 |
31119530331 ps |
| T581 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.419416463 |
|
|
Feb 25 12:43:16 PM PST 24 |
Feb 25 12:43:19 PM PST 24 |
2597001039 ps |
| T158 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2532258358 |
|
|
Feb 25 12:43:27 PM PST 24 |
Feb 25 12:44:39 PM PST 24 |
27896485480 ps |
| T161 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2813235749 |
|
|
Feb 25 12:42:18 PM PST 24 |
Feb 25 12:42:19 PM PST 24 |
4168705292 ps |
| T162 |
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1214237438 |
|
|
Feb 25 12:43:29 PM PST 24 |
Feb 25 12:43:57 PM PST 24 |
19552637682 ps |
| T163 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3295916221 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:26 PM PST 24 |
3523166776 ps |
| T164 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1565449663 |
|
|
Feb 25 12:43:24 PM PST 24 |
Feb 25 12:45:05 PM PST 24 |
143791178508 ps |
| T165 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2512491648 |
|
|
Feb 25 12:42:27 PM PST 24 |
Feb 25 12:44:01 PM PST 24 |
36849554029 ps |
| T166 |
/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2646174041 |
|
|
Feb 25 12:43:10 PM PST 24 |
Feb 25 12:43:33 PM PST 24 |
33791065117 ps |
| T167 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.3904232755 |
|
|
Feb 25 12:42:07 PM PST 24 |
Feb 25 12:42:09 PM PST 24 |
2135760912 ps |
| T168 |
/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.47002867 |
|
|
Feb 25 12:42:48 PM PST 24 |
Feb 25 12:43:00 PM PST 24 |
2204829604 ps |
| T169 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2432808299 |
|
|
Feb 25 12:43:55 PM PST 24 |
Feb 25 12:44:57 PM PST 24 |
50490837320 ps |
| T582 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.493972733 |
|
|
Feb 25 12:42:31 PM PST 24 |
Feb 25 12:42:35 PM PST 24 |
3382666698 ps |
| T88 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.2001109737 |
|
|
Feb 25 12:42:58 PM PST 24 |
Feb 25 12:48:44 PM PST 24 |
163088457212 ps |
| T583 |
/workspace/coverage/default/5.sysrst_ctrl_smoke.3837591585 |
|
|
Feb 25 12:42:21 PM PST 24 |
Feb 25 12:42:23 PM PST 24 |
2122166773 ps |
| T584 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2722788896 |
|
|
Feb 25 12:41:51 PM PST 24 |
Feb 25 12:41:59 PM PST 24 |
2611968304 ps |
| T585 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.4088005699 |
|
|
Feb 25 12:42:42 PM PST 24 |
Feb 25 12:42:48 PM PST 24 |
2012578524 ps |
| T586 |
/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2480117259 |
|
|
Feb 25 12:43:08 PM PST 24 |
Feb 25 12:43:15 PM PST 24 |
3883170912 ps |
| T587 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2280441662 |
|
|
Feb 25 12:43:19 PM PST 24 |
Feb 25 12:43:23 PM PST 24 |
2624968340 ps |
| T588 |
/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.831789288 |
|
|
Feb 25 12:43:17 PM PST 24 |
Feb 25 12:43:19 PM PST 24 |
2574264768 ps |
| T589 |
/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.249216406 |
|
|
Feb 25 12:42:58 PM PST 24 |
Feb 25 12:43:02 PM PST 24 |
2516374095 ps |
| T590 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3247488301 |
|
|
Feb 25 12:42:56 PM PST 24 |
Feb 25 12:43:00 PM PST 24 |
3225352216 ps |
| T591 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1405681794 |
|
|
Feb 25 12:42:51 PM PST 24 |
Feb 25 12:42:53 PM PST 24 |
2534898548 ps |
| T592 |
/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.536338473 |
|
|
Feb 25 12:42:05 PM PST 24 |
Feb 25 12:42:13 PM PST 24 |
2949006837 ps |
| T593 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1686709007 |
|
|
Feb 25 12:43:23 PM PST 24 |
Feb 25 12:43:25 PM PST 24 |
2707943704 ps |
| T594 |
/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.739319537 |
|
|
Feb 25 12:42:23 PM PST 24 |
Feb 25 12:42:31 PM PST 24 |
2511696195 ps |
| T595 |
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3496215665 |
|
|
Feb 25 12:43:29 PM PST 24 |
Feb 25 12:43:36 PM PST 24 |
2222250079 ps |
| T596 |
/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.4265733338 |
|
|
Feb 25 12:43:01 PM PST 24 |
Feb 25 12:43:07 PM PST 24 |
2457002331 ps |
| T597 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.994817901 |
|
|
Feb 25 12:42:10 PM PST 24 |
Feb 25 12:42:13 PM PST 24 |
2116076644 ps |
| T240 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3704406767 |
|
|
Feb 25 12:43:25 PM PST 24 |
Feb 25 12:43:32 PM PST 24 |
23788818167 ps |
| T337 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3088645833 |
|
|
Feb 25 12:42:18 PM PST 24 |
Feb 25 12:42:31 PM PST 24 |
35667580190 ps |
| T598 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3029060450 |
|
|
Feb 25 12:42:57 PM PST 24 |
Feb 25 12:43:00 PM PST 24 |
2525103668 ps |