Summary for Variable cp_ac_present_sel
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_ac_present_sel
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1428 |
1 |
|
|
T1 |
2 |
|
T3 |
26 |
|
T8 |
17 |
| auto[1] |
1942 |
1 |
|
|
T1 |
3 |
|
T3 |
28 |
|
T8 |
8 |
Summary for Variable cp_combo0_h2l
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_combo0_h2l
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2762 |
1 |
|
|
T1 |
5 |
|
T3 |
50 |
|
T8 |
21 |
| auto[1] |
608 |
1 |
|
|
T3 |
4 |
|
T8 |
4 |
|
T9 |
7 |
Summary for Variable cp_combo1_h2l
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_combo1_h2l
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3169 |
1 |
|
|
T1 |
5 |
|
T3 |
51 |
|
T8 |
25 |
| auto[1] |
201 |
1 |
|
|
T3 |
3 |
|
T30 |
4 |
|
T31 |
5 |
Summary for Variable cp_combo2_h2l
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_combo2_h2l
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3151 |
1 |
|
|
T1 |
4 |
|
T3 |
53 |
|
T8 |
23 |
| auto[1] |
219 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T8 |
2 |
Summary for Variable cp_combo3_h2l
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_combo3_h2l
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
3204 |
1 |
|
|
T1 |
4 |
|
T3 |
54 |
|
T8 |
21 |
| auto[1] |
166 |
1 |
|
|
T1 |
1 |
|
T8 |
4 |
|
T32 |
5 |
Summary for Variable cp_interrupt
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_interrupt
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
2154 |
1 |
|
|
T1 |
5 |
|
T3 |
15 |
|
T8 |
12 |
| auto[1] |
1216 |
1 |
|
|
T3 |
39 |
|
T8 |
13 |
|
T9 |
22 |
Summary for Variable cp_key0_in_sel
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key0_in_sel
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1394 |
1 |
|
|
T3 |
23 |
|
T8 |
17 |
|
T9 |
11 |
| auto[1] |
1976 |
1 |
|
|
T1 |
5 |
|
T3 |
31 |
|
T8 |
8 |
Summary for Variable cp_key1_in_sel
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key1_in_sel
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1448 |
1 |
|
|
T1 |
2 |
|
T3 |
21 |
|
T8 |
10 |
| auto[1] |
1922 |
1 |
|
|
T1 |
3 |
|
T3 |
33 |
|
T8 |
15 |
Summary for Variable cp_key2_in_sel
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_key2_in_sel
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1373 |
1 |
|
|
T1 |
2 |
|
T3 |
28 |
|
T8 |
3 |
| auto[1] |
1997 |
1 |
|
|
T1 |
3 |
|
T3 |
26 |
|
T8 |
22 |
Summary for Variable cp_pwrb_in_sel
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for cp_pwrb_in_sel
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
1329 |
1 |
|
|
T1 |
2 |
|
T3 |
23 |
|
T8 |
6 |
| auto[1] |
2041 |
1 |
|
|
T1 |
3 |
|
T3 |
31 |
|
T8 |
19 |
Summary for Cross cross_combo0
Samples crossed: cp_combo0_h2l cp_key0_in_sel cp_key1_in_sel cp_key2_in_sel cp_pwrb_in_sel cp_ac_present_sel cp_interrupt
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
96 |
0 |
96 |
100.00 |
|
| Automatically Generated Cross Bins |
96 |
0 |
96 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cross_combo0
Bins
| cp_combo0_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
48 |
1 |
|
|
T3 |
1 |
|
T30 |
1 |
|
T32 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
14 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T95 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
56 |
1 |
|
|
T13 |
1 |
|
T45 |
2 |
|
T30 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
17 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
57 |
1 |
|
|
T9 |
1 |
|
T13 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
17 |
1 |
|
|
T3 |
3 |
|
T11 |
1 |
|
T297 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
41 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T30 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
19 |
1 |
|
|
T3 |
1 |
|
T123 |
2 |
|
T297 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
51 |
1 |
|
|
T8 |
2 |
|
T31 |
1 |
|
T33 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
17 |
1 |
|
|
T3 |
1 |
|
T123 |
1 |
|
T109 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
46 |
1 |
|
|
T8 |
1 |
|
T42 |
2 |
|
T93 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
35 |
1 |
|
|
T11 |
2 |
|
T42 |
2 |
|
T297 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
39 |
1 |
|
|
T45 |
1 |
|
T30 |
2 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
26 |
1 |
|
|
T3 |
3 |
|
T8 |
3 |
|
T11 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
56 |
1 |
|
|
T3 |
1 |
|
T30 |
9 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
21 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T95 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
53 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T45 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
9 |
1 |
|
|
T9 |
1 |
|
T298 |
1 |
|
T246 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
43 |
1 |
|
|
T13 |
1 |
|
T45 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
21 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
47 |
1 |
|
|
T45 |
1 |
|
T26 |
1 |
|
T33 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
19 |
1 |
|
|
T11 |
1 |
|
T123 |
1 |
|
T95 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
57 |
1 |
|
|
T3 |
1 |
|
T8 |
1 |
|
T32 |
16 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
30 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
46 |
1 |
|
|
T8 |
1 |
|
T13 |
2 |
|
T45 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
20 |
1 |
|
|
T3 |
2 |
|
T9 |
1 |
|
T259 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
51 |
1 |
|
|
T13 |
7 |
|
T76 |
1 |
|
T108 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
20 |
1 |
|
|
T3 |
1 |
|
T250 |
1 |
|
T298 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
40 |
1 |
|
|
T3 |
1 |
|
T26 |
7 |
|
T93 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
38 |
1 |
|
|
T122 |
6 |
|
T95 |
1 |
|
T250 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
96 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T31 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
36 |
1 |
|
|
T3 |
3 |
|
T8 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
58 |
1 |
|
|
T45 |
1 |
|
T76 |
2 |
|
T189 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
14 |
1 |
|
|
T3 |
2 |
|
T250 |
1 |
|
T299 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
46 |
1 |
|
|
T45 |
1 |
|
T42 |
1 |
|
T76 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
22 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
47 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T26 |
3 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
33 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
67 |
1 |
|
|
T45 |
1 |
|
T33 |
1 |
|
T93 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
18 |
1 |
|
|
T9 |
1 |
|
T123 |
1 |
|
T300 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
54 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T33 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
19 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T259 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
45 |
1 |
|
|
T3 |
2 |
|
T42 |
1 |
|
T76 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
20 |
1 |
|
|
T3 |
2 |
|
T11 |
2 |
|
T299 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
62 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T214 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
36 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T216 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
75 |
1 |
|
|
T45 |
2 |
|
T42 |
2 |
|
T189 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
36 |
1 |
|
|
T11 |
1 |
|
T42 |
5 |
|
T110 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
49 |
1 |
|
|
T3 |
2 |
|
T31 |
1 |
|
T106 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
17 |
1 |
|
|
T3 |
4 |
|
T11 |
1 |
|
T216 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
36 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T33 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
19 |
1 |
|
|
T9 |
2 |
|
T259 |
1 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
47 |
1 |
|
|
T3 |
1 |
|
T13 |
1 |
|
T45 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
25 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
63 |
1 |
|
|
T3 |
1 |
|
T123 |
1 |
|
T76 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
40 |
1 |
|
|
T3 |
3 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
51 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T121 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
21 |
1 |
|
|
T121 |
2 |
|
T216 |
2 |
|
T250 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
35 |
1 |
|
|
T33 |
2 |
|
T93 |
1 |
|
T122 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
48 |
1 |
|
|
T11 |
1 |
|
T123 |
1 |
|
T122 |
3 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
91 |
1 |
|
|
T8 |
2 |
|
T13 |
4 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
46 |
1 |
|
|
T3 |
3 |
|
T8 |
4 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
318 |
1 |
|
|
T1 |
2 |
|
T3 |
4 |
|
T9 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
18 |
1 |
|
|
T3 |
1 |
|
T123 |
1 |
|
T216 |
1 |
| auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
9 |
1 |
|
|
T95 |
1 |
|
T216 |
1 |
|
T297 |
1 |
| auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
7 |
1 |
|
|
T297 |
1 |
|
T110 |
2 |
|
T256 |
1 |
| auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
5 |
1 |
|
|
T9 |
1 |
|
T216 |
1 |
|
T138 |
1 |
| auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
7 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T110 |
1 |
| auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
9 |
1 |
|
|
T123 |
1 |
|
T256 |
1 |
|
T301 |
3 |
| auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
12 |
1 |
|
|
T42 |
1 |
|
T259 |
1 |
|
T110 |
1 |
| auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
7 |
1 |
|
|
T95 |
1 |
|
T255 |
1 |
|
T301 |
1 |
| auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
13 |
1 |
|
|
T8 |
1 |
|
T123 |
1 |
|
T138 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T123 |
1 |
|
T256 |
1 |
|
T138 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
5 |
1 |
|
|
T123 |
1 |
|
T252 |
1 |
|
T301 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
9 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T95 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
3 |
1 |
|
|
T95 |
1 |
|
T216 |
1 |
|
T197 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
7 |
1 |
|
|
T259 |
1 |
|
T255 |
1 |
|
T138 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
7 |
1 |
|
|
T259 |
1 |
|
T256 |
1 |
|
T302 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
8 |
1 |
|
|
T8 |
2 |
|
T9 |
1 |
|
T259 |
1 |
| auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
6 |
1 |
|
|
T8 |
1 |
|
T301 |
1 |
|
T197 |
1 |
| auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
12 |
1 |
|
|
T259 |
1 |
|
T297 |
1 |
|
T138 |
2 |
| auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
5 |
1 |
|
|
T42 |
1 |
|
T259 |
1 |
|
T138 |
1 |
| auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
7 |
1 |
|
|
T95 |
1 |
|
T216 |
1 |
|
T259 |
1 |
| auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
10 |
1 |
|
|
T95 |
1 |
|
T298 |
1 |
|
T110 |
1 |
| auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T259 |
1 |
|
T303 |
1 |
|
T302 |
1 |
| auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
8 |
1 |
|
|
T110 |
1 |
|
T246 |
1 |
|
T256 |
1 |
| auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
13 |
1 |
|
|
T123 |
1 |
|
T297 |
1 |
|
T110 |
1 |
| auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
15 |
1 |
|
|
T42 |
5 |
|
T95 |
2 |
|
T300 |
1 |
| auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
6 |
1 |
|
|
T3 |
1 |
|
T256 |
1 |
|
T197 |
1 |
| auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
12 |
1 |
|
|
T123 |
1 |
|
T41 |
1 |
|
T95 |
1 |
| auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
9 |
1 |
|
|
T259 |
1 |
|
T299 |
1 |
|
T256 |
1 |
| auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
12 |
1 |
|
|
T109 |
1 |
|
T297 |
1 |
|
T299 |
1 |
| auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
9 |
1 |
|
|
T121 |
1 |
|
T216 |
1 |
|
T297 |
1 |
| auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
7 |
1 |
|
|
T123 |
1 |
|
T95 |
1 |
|
T299 |
1 |
| auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
12 |
1 |
|
|
T97 |
1 |
|
T255 |
1 |
|
T113 |
2 |
| auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
162 |
1 |
|
|
T3 |
2 |
|
T9 |
3 |
|
T11 |
2 |
User Defined Cross Bins for cross_combo0
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| invalid0 |
0 |
Excluded |
Summary for Cross cross_combo1
Samples crossed: cp_combo1_h2l cp_key0_in_sel cp_key1_in_sel cp_key2_in_sel cp_pwrb_in_sel cp_ac_present_sel cp_interrupt
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
96 |
30 |
66 |
68.75 |
30 |
| Automatically Generated Cross Bins |
96 |
30 |
66 |
68.75 |
30 |
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cross_combo1
Element holes
| cp_combo1_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | NUMBER | STATUS |
| [auto[1]] |
[auto[0]] |
[auto[0]] |
[auto[0]] |
* |
* |
[auto[1]] |
-- |
-- |
4 |
|
| [auto[1]] |
[auto[0]] |
[auto[0]] |
[auto[1]] |
[auto[0]] |
* |
[auto[1]] |
-- |
-- |
2 |
|
| [auto[1]] |
[auto[0]] |
[auto[1]] |
* |
* |
* |
[auto[1]] |
-- |
-- |
8 |
|
| [auto[1]] |
[auto[1]] |
[auto[0]] |
* |
* |
* |
[auto[1]] |
-- |
-- |
8 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
* |
* |
[auto[1]] |
-- |
-- |
4 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
* |
[auto[1]] |
-- |
-- |
2 |
|
Uncovered bins
| cp_combo1_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | NUMBER | STATUS |
| [auto[1]] |
[auto[0]] |
[auto[0]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
0 |
1 |
1 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
| cp_combo1_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
54 |
1 |
|
|
T3 |
1 |
|
T30 |
1 |
|
T32 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
23 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T95 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
62 |
1 |
|
|
T13 |
1 |
|
T45 |
2 |
|
T30 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
24 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
61 |
1 |
|
|
T9 |
1 |
|
T13 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
22 |
1 |
|
|
T3 |
3 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
42 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T30 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
26 |
1 |
|
|
T3 |
2 |
|
T9 |
1 |
|
T123 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
54 |
1 |
|
|
T8 |
2 |
|
T31 |
1 |
|
T33 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
26 |
1 |
|
|
T3 |
1 |
|
T123 |
2 |
|
T109 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
53 |
1 |
|
|
T8 |
1 |
|
T42 |
2 |
|
T93 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
47 |
1 |
|
|
T11 |
2 |
|
T42 |
3 |
|
T259 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
42 |
1 |
|
|
T45 |
1 |
|
T30 |
2 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
32 |
1 |
|
|
T3 |
3 |
|
T8 |
3 |
|
T11 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
54 |
1 |
|
|
T3 |
1 |
|
T30 |
5 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
34 |
1 |
|
|
T8 |
2 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
61 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T45 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
15 |
1 |
|
|
T9 |
1 |
|
T123 |
1 |
|
T298 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
49 |
1 |
|
|
T13 |
1 |
|
T45 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
26 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
50 |
1 |
|
|
T45 |
1 |
|
T26 |
1 |
|
T33 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
28 |
1 |
|
|
T9 |
1 |
|
T11 |
2 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
63 |
1 |
|
|
T3 |
1 |
|
T8 |
1 |
|
T32 |
16 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
33 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
49 |
1 |
|
|
T8 |
1 |
|
T13 |
2 |
|
T45 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
27 |
1 |
|
|
T3 |
2 |
|
T9 |
1 |
|
T259 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
54 |
1 |
|
|
T13 |
7 |
|
T242 |
1 |
|
T76 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T3 |
1 |
|
T259 |
1 |
|
T250 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
42 |
1 |
|
|
T3 |
1 |
|
T26 |
7 |
|
T93 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
46 |
1 |
|
|
T8 |
2 |
|
T9 |
1 |
|
T122 |
6 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
97 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T31 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
42 |
1 |
|
|
T3 |
3 |
|
T8 |
2 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
64 |
1 |
|
|
T45 |
1 |
|
T242 |
1 |
|
T76 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
26 |
1 |
|
|
T3 |
2 |
|
T259 |
1 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
54 |
1 |
|
|
T45 |
1 |
|
T42 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
45 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T26 |
3 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
40 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
65 |
1 |
|
|
T45 |
1 |
|
T31 |
1 |
|
T33 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T9 |
1 |
|
T123 |
1 |
|
T95 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
56 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
25 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T259 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
49 |
1 |
|
|
T3 |
2 |
|
T42 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T3 |
2 |
|
T11 |
2 |
|
T299 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
71 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T214 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
49 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
81 |
1 |
|
|
T45 |
2 |
|
T42 |
2 |
|
T93 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
51 |
1 |
|
|
T11 |
1 |
|
T42 |
10 |
|
T95 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
55 |
1 |
|
|
T3 |
2 |
|
T31 |
2 |
|
T33 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
23 |
1 |
|
|
T3 |
5 |
|
T11 |
1 |
|
T216 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
44 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T31 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
31 |
1 |
|
|
T9 |
2 |
|
T123 |
1 |
|
T41 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
51 |
1 |
|
|
T3 |
1 |
|
T13 |
1 |
|
T45 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
34 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
68 |
1 |
|
|
T3 |
1 |
|
T33 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
52 |
1 |
|
|
T3 |
3 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
56 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T242 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
30 |
1 |
|
|
T121 |
3 |
|
T216 |
3 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
40 |
1 |
|
|
T33 |
2 |
|
T93 |
2 |
|
T122 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
55 |
1 |
|
|
T11 |
1 |
|
T123 |
2 |
|
T122 |
3 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
88 |
1 |
|
|
T8 |
2 |
|
T13 |
4 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
58 |
1 |
|
|
T3 |
3 |
|
T8 |
4 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
198 |
1 |
|
|
T1 |
2 |
|
T3 |
1 |
|
T9 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
162 |
1 |
|
|
T3 |
3 |
|
T9 |
3 |
|
T11 |
2 |
| auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
1 |
1 |
|
|
T304 |
1 |
|
- |
- |
|
- |
- |
| auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
18 |
1 |
|
|
T123 |
3 |
|
T216 |
3 |
|
T300 |
1 |
User Defined Cross Bins for cross_combo1
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| invalid0 |
0 |
Excluded |
Summary for Cross cross_combo2
Samples crossed: cp_combo2_h2l cp_key0_in_sel cp_key1_in_sel cp_key2_in_sel cp_pwrb_in_sel cp_ac_present_sel cp_interrupt
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
96 |
28 |
68 |
70.83 |
28 |
| Automatically Generated Cross Bins |
96 |
28 |
68 |
70.83 |
28 |
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cross_combo2
Element holes
| cp_combo2_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | NUMBER | STATUS |
| [auto[1]] |
[auto[0]] |
* |
[auto[0]] |
* |
* |
[auto[1]] |
-- |
-- |
8 |
|
| [auto[1]] |
[auto[0]] |
* |
[auto[1]] |
[auto[0]] |
* |
[auto[1]] |
-- |
-- |
4 |
|
| [auto[1]] |
[auto[0]] |
* |
[auto[1]] |
[auto[1]] |
[auto[0]] |
[auto[1]] |
-- |
-- |
2 |
|
| [auto[1]] |
[auto[1]] |
[auto[0]] |
* |
* |
* |
[auto[1]] |
-- |
-- |
8 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
[auto[0]] |
* |
[auto[1]] |
-- |
-- |
2 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
* |
[auto[1]] |
-- |
-- |
2 |
|
Uncovered bins
| cp_combo2_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | NUMBER | STATUS |
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
0 |
1 |
1 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
| cp_combo2_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
54 |
1 |
|
|
T3 |
1 |
|
T30 |
1 |
|
T32 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
23 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T95 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
62 |
1 |
|
|
T13 |
1 |
|
T45 |
2 |
|
T30 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
24 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
63 |
1 |
|
|
T9 |
1 |
|
T13 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
22 |
1 |
|
|
T3 |
3 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
46 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T30 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
26 |
1 |
|
|
T3 |
2 |
|
T9 |
1 |
|
T123 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
52 |
1 |
|
|
T8 |
2 |
|
T31 |
1 |
|
T33 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
26 |
1 |
|
|
T3 |
1 |
|
T123 |
2 |
|
T109 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
53 |
1 |
|
|
T8 |
1 |
|
T42 |
2 |
|
T93 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
47 |
1 |
|
|
T11 |
2 |
|
T42 |
3 |
|
T259 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
44 |
1 |
|
|
T45 |
1 |
|
T30 |
2 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
33 |
1 |
|
|
T3 |
3 |
|
T8 |
3 |
|
T11 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
61 |
1 |
|
|
T3 |
1 |
|
T30 |
9 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
33 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
62 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T45 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
15 |
1 |
|
|
T9 |
1 |
|
T123 |
1 |
|
T298 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
49 |
1 |
|
|
T13 |
1 |
|
T45 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
26 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
50 |
1 |
|
|
T45 |
1 |
|
T26 |
1 |
|
T33 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
28 |
1 |
|
|
T9 |
1 |
|
T11 |
2 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
63 |
1 |
|
|
T3 |
1 |
|
T8 |
1 |
|
T32 |
16 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
33 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
49 |
1 |
|
|
T8 |
1 |
|
T13 |
1 |
|
T45 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
27 |
1 |
|
|
T3 |
2 |
|
T9 |
1 |
|
T259 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
53 |
1 |
|
|
T13 |
7 |
|
T242 |
1 |
|
T76 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T3 |
1 |
|
T259 |
1 |
|
T250 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
40 |
1 |
|
|
T3 |
1 |
|
T26 |
7 |
|
T93 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
46 |
1 |
|
|
T8 |
2 |
|
T9 |
1 |
|
T122 |
6 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
96 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T31 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
41 |
1 |
|
|
T3 |
3 |
|
T8 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
64 |
1 |
|
|
T45 |
1 |
|
T242 |
1 |
|
T76 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
26 |
1 |
|
|
T3 |
2 |
|
T259 |
1 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
55 |
1 |
|
|
T45 |
1 |
|
T42 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
49 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T26 |
3 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
40 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
66 |
1 |
|
|
T45 |
1 |
|
T31 |
1 |
|
T33 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T9 |
1 |
|
T123 |
1 |
|
T95 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
57 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
25 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T259 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
49 |
1 |
|
|
T3 |
2 |
|
T42 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T3 |
2 |
|
T11 |
2 |
|
T299 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
68 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T214 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
49 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
81 |
1 |
|
|
T45 |
2 |
|
T42 |
2 |
|
T93 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
51 |
1 |
|
|
T11 |
1 |
|
T42 |
10 |
|
T95 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
56 |
1 |
|
|
T3 |
2 |
|
T31 |
2 |
|
T33 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
23 |
1 |
|
|
T3 |
5 |
|
T11 |
1 |
|
T216 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
46 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T31 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
31 |
1 |
|
|
T9 |
2 |
|
T123 |
1 |
|
T41 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
51 |
1 |
|
|
T3 |
1 |
|
T13 |
1 |
|
T45 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
33 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
68 |
1 |
|
|
T3 |
1 |
|
T33 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
52 |
1 |
|
|
T3 |
3 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
50 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T242 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
30 |
1 |
|
|
T121 |
3 |
|
T216 |
3 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
40 |
1 |
|
|
T33 |
2 |
|
T93 |
2 |
|
T122 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
55 |
1 |
|
|
T11 |
1 |
|
T123 |
2 |
|
T122 |
3 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
86 |
1 |
|
|
T8 |
2 |
|
T13 |
3 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
58 |
1 |
|
|
T3 |
3 |
|
T8 |
4 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
184 |
1 |
|
|
T1 |
1 |
|
T3 |
3 |
|
T45 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
151 |
1 |
|
|
T3 |
3 |
|
T9 |
2 |
|
T11 |
2 |
| auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
1 |
1 |
|
|
T8 |
1 |
|
- |
- |
|
- |
- |
| auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
1 |
1 |
|
|
T8 |
1 |
|
- |
- |
|
- |
- |
| auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
1 |
1 |
|
|
T305 |
1 |
|
- |
- |
|
- |
- |
| auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
29 |
1 |
|
|
T9 |
1 |
|
T216 |
3 |
|
T259 |
1 |
User Defined Cross Bins for cross_combo2
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| invalid0 |
0 |
Excluded |
Summary for Cross cross_combo3
Samples crossed: cp_combo3_h2l cp_key0_in_sel cp_key1_in_sel cp_key2_in_sel cp_pwrb_in_sel cp_ac_present_sel cp_interrupt
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
96 |
30 |
66 |
68.75 |
30 |
| Automatically Generated Cross Bins |
96 |
30 |
66 |
68.75 |
30 |
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cross_combo3
Element holes
| cp_combo3_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | NUMBER | STATUS |
| [auto[1]] |
[auto[0]] |
[auto[0]] |
* |
* |
* |
[auto[1]] |
-- |
-- |
8 |
|
| [auto[1]] |
[auto[0]] |
[auto[1]] |
[auto[0]] |
* |
* |
[auto[1]] |
-- |
-- |
4 |
|
| [auto[1]] |
[auto[0]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
* |
[auto[1]] |
-- |
-- |
2 |
|
| [auto[1]] |
[auto[1]] |
[auto[0]] |
* |
* |
* |
[auto[1]] |
-- |
-- |
8 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
* |
* |
[auto[1]] |
-- |
-- |
4 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
* |
[auto[1]] |
-- |
-- |
2 |
|
Uncovered bins
| cp_combo3_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | NUMBER | STATUS |
| [auto[1]] |
[auto[0]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
0 |
1 |
1 |
|
| [auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[1]] |
[auto[0]] |
[auto[1]] |
0 |
1 |
1 |
|
Covered bins
| cp_combo3_h2l | cp_key0_in_sel | cp_key1_in_sel | cp_key2_in_sel | cp_pwrb_in_sel | cp_ac_present_sel | cp_interrupt | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
54 |
1 |
|
|
T3 |
1 |
|
T30 |
1 |
|
T32 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
23 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T95 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
61 |
1 |
|
|
T13 |
1 |
|
T45 |
2 |
|
T30 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
24 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
61 |
1 |
|
|
T9 |
1 |
|
T13 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
22 |
1 |
|
|
T3 |
3 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
45 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T30 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
26 |
1 |
|
|
T3 |
2 |
|
T9 |
1 |
|
T123 |
2 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
51 |
1 |
|
|
T8 |
2 |
|
T31 |
1 |
|
T33 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
26 |
1 |
|
|
T3 |
1 |
|
T123 |
2 |
|
T109 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
53 |
1 |
|
|
T8 |
1 |
|
T42 |
2 |
|
T93 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
47 |
1 |
|
|
T11 |
2 |
|
T42 |
3 |
|
T259 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
44 |
1 |
|
|
T45 |
1 |
|
T30 |
2 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
33 |
1 |
|
|
T3 |
3 |
|
T8 |
3 |
|
T11 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
61 |
1 |
|
|
T3 |
1 |
|
T30 |
9 |
|
T42 |
1 |
| auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
34 |
1 |
|
|
T8 |
2 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
62 |
1 |
|
|
T8 |
1 |
|
T11 |
1 |
|
T45 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
15 |
1 |
|
|
T9 |
1 |
|
T123 |
1 |
|
T298 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
49 |
1 |
|
|
T13 |
1 |
|
T45 |
1 |
|
T32 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
26 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
50 |
1 |
|
|
T45 |
1 |
|
T26 |
1 |
|
T33 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
28 |
1 |
|
|
T9 |
1 |
|
T11 |
2 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
52 |
1 |
|
|
T3 |
1 |
|
T8 |
1 |
|
T32 |
11 |
| auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
33 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
48 |
1 |
|
|
T8 |
1 |
|
T13 |
2 |
|
T45 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
27 |
1 |
|
|
T3 |
2 |
|
T9 |
1 |
|
T259 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
51 |
1 |
|
|
T13 |
7 |
|
T242 |
1 |
|
T76 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T3 |
1 |
|
T259 |
1 |
|
T250 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
44 |
1 |
|
|
T3 |
1 |
|
T26 |
7 |
|
T93 |
2 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
44 |
1 |
|
|
T9 |
1 |
|
T122 |
6 |
|
T95 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
94 |
1 |
|
|
T8 |
1 |
|
T45 |
1 |
|
T31 |
1 |
| auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
42 |
1 |
|
|
T3 |
3 |
|
T8 |
2 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
64 |
1 |
|
|
T45 |
1 |
|
T242 |
1 |
|
T76 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
26 |
1 |
|
|
T3 |
2 |
|
T259 |
1 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
55 |
1 |
|
|
T45 |
1 |
|
T42 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
27 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
48 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T26 |
3 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
40 |
1 |
|
|
T3 |
1 |
|
T9 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
70 |
1 |
|
|
T45 |
1 |
|
T31 |
1 |
|
T33 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T9 |
1 |
|
T123 |
1 |
|
T95 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
57 |
1 |
|
|
T1 |
1 |
|
T45 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
25 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T259 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
49 |
1 |
|
|
T3 |
2 |
|
T42 |
1 |
|
T31 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
28 |
1 |
|
|
T3 |
2 |
|
T11 |
2 |
|
T299 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
69 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T214 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
49 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
77 |
1 |
|
|
T45 |
2 |
|
T42 |
2 |
|
T93 |
2 |
| auto[0] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
51 |
1 |
|
|
T11 |
1 |
|
T42 |
10 |
|
T95 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[0] |
55 |
1 |
|
|
T3 |
2 |
|
T31 |
2 |
|
T33 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
auto[1] |
23 |
1 |
|
|
T3 |
5 |
|
T11 |
1 |
|
T216 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[0] |
44 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T31 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
auto[1] |
31 |
1 |
|
|
T9 |
2 |
|
T123 |
1 |
|
T41 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[0] |
49 |
1 |
|
|
T3 |
1 |
|
T13 |
1 |
|
T45 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
auto[1] |
34 |
1 |
|
|
T9 |
1 |
|
T11 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[0] |
58 |
1 |
|
|
T3 |
1 |
|
T33 |
1 |
|
T123 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
52 |
1 |
|
|
T3 |
3 |
|
T9 |
1 |
|
T11 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[0] |
56 |
1 |
|
|
T8 |
1 |
|
T93 |
1 |
|
T242 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
auto[1] |
30 |
1 |
|
|
T121 |
3 |
|
T216 |
3 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[0] |
43 |
1 |
|
|
T33 |
2 |
|
T93 |
2 |
|
T122 |
2 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
auto[1] |
55 |
1 |
|
|
T11 |
1 |
|
T123 |
2 |
|
T122 |
3 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[0] |
89 |
1 |
|
|
T13 |
4 |
|
T31 |
1 |
|
T93 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
58 |
1 |
|
|
T3 |
3 |
|
T8 |
4 |
|
T297 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
238 |
1 |
|
|
T1 |
1 |
|
T3 |
4 |
|
T9 |
1 |
| auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
169 |
1 |
|
|
T3 |
3 |
|
T9 |
3 |
|
T11 |
2 |
| auto[1] |
auto[0] |
auto[1] |
auto[1] |
auto[1] |
auto[0] |
auto[1] |
2 |
1 |
|
|
T8 |
2 |
|
- |
- |
|
- |
- |
| auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
auto[1] |
11 |
1 |
|
|
T297 |
4 |
|
T110 |
1 |
|
T300 |
1 |
User Defined Cross Bins for cross_combo3
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| invalid0 |
0 |
Excluded |