T455 |
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1932571867 |
|
|
Apr 18 02:22:56 PM PDT 24 |
Apr 18 02:22:58 PM PDT 24 |
2521922610 ps |
T456 |
/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1834234296 |
|
|
Apr 18 02:21:57 PM PDT 24 |
Apr 18 02:22:05 PM PDT 24 |
4958986264 ps |
T369 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3339937495 |
|
|
Apr 18 02:23:03 PM PDT 24 |
Apr 18 02:26:52 PM PDT 24 |
83162092200 ps |
T457 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1553041345 |
|
|
Apr 18 02:23:15 PM PDT 24 |
Apr 18 02:23:24 PM PDT 24 |
2885137406 ps |
T458 |
/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3961809300 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:22:45 PM PDT 24 |
3613916575 ps |
T459 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3076960416 |
|
|
Apr 18 02:20:18 PM PDT 24 |
Apr 18 02:20:28 PM PDT 24 |
3798014069 ps |
T460 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.1390884596 |
|
|
Apr 18 02:21:21 PM PDT 24 |
Apr 18 02:21:27 PM PDT 24 |
2111258685 ps |
T461 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.1066912955 |
|
|
Apr 18 02:19:44 PM PDT 24 |
Apr 18 02:19:50 PM PDT 24 |
2615516936 ps |
T462 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1602607719 |
|
|
Apr 18 02:20:28 PM PDT 24 |
Apr 18 02:20:38 PM PDT 24 |
3553073691 ps |
T463 |
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2193208936 |
|
|
Apr 18 02:22:40 PM PDT 24 |
Apr 18 02:22:44 PM PDT 24 |
2623417134 ps |
T464 |
/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2999536558 |
|
|
Apr 18 02:21:13 PM PDT 24 |
Apr 18 02:21:18 PM PDT 24 |
2609840199 ps |
T465 |
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2996312116 |
|
|
Apr 18 02:23:36 PM PDT 24 |
Apr 18 02:23:41 PM PDT 24 |
23399274387 ps |
T466 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.3846672179 |
|
|
Apr 18 02:21:11 PM PDT 24 |
Apr 18 02:21:13 PM PDT 24 |
2075369390 ps |
T366 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3432023765 |
|
|
Apr 18 02:23:37 PM PDT 24 |
Apr 18 02:24:59 PM PDT 24 |
120953740604 ps |
T467 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2075665446 |
|
|
Apr 18 02:21:16 PM PDT 24 |
Apr 18 02:21:19 PM PDT 24 |
5451388846 ps |
T187 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3212695870 |
|
|
Apr 18 02:23:13 PM PDT 24 |
Apr 18 02:23:23 PM PDT 24 |
5957142436 ps |
T96 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.17048883 |
|
|
Apr 18 02:23:14 PM PDT 24 |
Apr 18 02:23:17 PM PDT 24 |
4933148051 ps |
T468 |
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1340899548 |
|
|
Apr 18 02:23:17 PM PDT 24 |
Apr 18 02:23:24 PM PDT 24 |
2512824887 ps |
T153 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2282531707 |
|
|
Apr 18 02:22:10 PM PDT 24 |
Apr 18 02:23:01 PM PDT 24 |
37217700516 ps |
T230 |
/workspace/coverage/default/18.sysrst_ctrl_alert_test.2005744590 |
|
|
Apr 18 02:21:20 PM PDT 24 |
Apr 18 02:21:21 PM PDT 24 |
2072597190 ps |
T89 |
/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.983988632 |
|
|
Apr 18 02:21:43 PM PDT 24 |
Apr 18 02:23:19 PM PDT 24 |
35478969676 ps |
T231 |
/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3573720722 |
|
|
Apr 18 02:21:50 PM PDT 24 |
Apr 18 02:21:56 PM PDT 24 |
2179129503 ps |
T119 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.4233183987 |
|
|
Apr 18 02:21:37 PM PDT 24 |
Apr 18 02:21:40 PM PDT 24 |
5168085989 ps |
T232 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.2454500296 |
|
|
Apr 18 02:22:17 PM PDT 24 |
Apr 18 02:22:21 PM PDT 24 |
2468464786 ps |
T154 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.568174470 |
|
|
Apr 18 02:20:58 PM PDT 24 |
Apr 18 02:21:00 PM PDT 24 |
4222147541 ps |
T233 |
/workspace/coverage/default/34.sysrst_ctrl_smoke.903952829 |
|
|
Apr 18 02:22:24 PM PDT 24 |
Apr 18 02:22:30 PM PDT 24 |
2114042871 ps |
T234 |
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3862258452 |
|
|
Apr 18 02:22:58 PM PDT 24 |
Apr 18 02:23:00 PM PDT 24 |
2534952637 ps |
T235 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect.1775768048 |
|
|
Apr 18 02:21:58 PM PDT 24 |
Apr 18 02:22:27 PM PDT 24 |
97238836892 ps |
T120 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2363905778 |
|
|
Apr 18 02:21:42 PM PDT 24 |
Apr 18 02:22:46 PM PDT 24 |
206650424660 ps |
T269 |
/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1406498085 |
|
|
Apr 18 02:21:05 PM PDT 24 |
Apr 18 02:21:18 PM PDT 24 |
31902012924 ps |
T469 |
/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2516197105 |
|
|
Apr 18 02:19:51 PM PDT 24 |
Apr 18 02:19:54 PM PDT 24 |
2523736238 ps |
T470 |
/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3835999038 |
|
|
Apr 18 02:21:36 PM PDT 24 |
Apr 18 02:21:41 PM PDT 24 |
2460613618 ps |
T471 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2635154294 |
|
|
Apr 18 02:20:29 PM PDT 24 |
Apr 18 02:20:33 PM PDT 24 |
2468010751 ps |
T472 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2240461387 |
|
|
Apr 18 02:23:34 PM PDT 24 |
Apr 18 02:23:51 PM PDT 24 |
26850143153 ps |
T121 |
/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3566730718 |
|
|
Apr 18 02:21:54 PM PDT 24 |
Apr 18 02:21:58 PM PDT 24 |
5579809656 ps |
T155 |
/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3356701441 |
|
|
Apr 18 02:21:40 PM PDT 24 |
Apr 18 02:23:55 PM PDT 24 |
1248679524835 ps |
T473 |
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1487034212 |
|
|
Apr 18 02:22:58 PM PDT 24 |
Apr 18 02:23:08 PM PDT 24 |
12164127571 ps |
T474 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.376737542 |
|
|
Apr 18 02:21:31 PM PDT 24 |
Apr 18 02:21:34 PM PDT 24 |
2533266838 ps |
T353 |
/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2655927608 |
|
|
Apr 18 02:21:06 PM PDT 24 |
Apr 18 02:27:50 PM PDT 24 |
144146841243 ps |
T202 |
/workspace/coverage/default/11.sysrst_ctrl_edge_detect.1947238997 |
|
|
Apr 18 02:20:43 PM PDT 24 |
Apr 18 02:20:46 PM PDT 24 |
4411936278 ps |
T475 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all.1403048055 |
|
|
Apr 18 02:21:16 PM PDT 24 |
Apr 18 02:21:54 PM PDT 24 |
14216560143 ps |
T476 |
/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.2313822905 |
|
|
Apr 18 02:20:02 PM PDT 24 |
Apr 18 02:20:04 PM PDT 24 |
2149477451 ps |
T477 |
/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.3015340562 |
|
|
Apr 18 02:21:23 PM PDT 24 |
Apr 18 02:21:29 PM PDT 24 |
2205467346 ps |
T478 |
/workspace/coverage/default/28.sysrst_ctrl_smoke.850190683 |
|
|
Apr 18 02:21:57 PM PDT 24 |
Apr 18 02:22:01 PM PDT 24 |
2119457121 ps |
T479 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.197531435 |
|
|
Apr 18 02:21:03 PM PDT 24 |
Apr 18 02:33:24 PM PDT 24 |
275686581873 ps |
T480 |
/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2247363181 |
|
|
Apr 18 02:22:11 PM PDT 24 |
Apr 18 02:22:19 PM PDT 24 |
2615134209 ps |
T94 |
/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.412380743 |
|
|
Apr 18 02:21:35 PM PDT 24 |
Apr 18 02:21:40 PM PDT 24 |
2999108605 ps |
T481 |
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.907491718 |
|
|
Apr 18 02:20:18 PM PDT 24 |
Apr 18 02:20:22 PM PDT 24 |
2191957819 ps |
T482 |
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3924300496 |
|
|
Apr 18 02:23:31 PM PDT 24 |
Apr 18 02:23:37 PM PDT 24 |
2013004000 ps |
T483 |
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1276370809 |
|
|
Apr 18 02:23:23 PM PDT 24 |
Apr 18 02:23:27 PM PDT 24 |
3927179266 ps |
T484 |
/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3119681480 |
|
|
Apr 18 02:21:06 PM PDT 24 |
Apr 18 02:21:09 PM PDT 24 |
2486410496 ps |
T485 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3055520911 |
|
|
Apr 18 02:21:42 PM PDT 24 |
Apr 18 02:21:50 PM PDT 24 |
2513582939 ps |
T486 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3958100612 |
|
|
Apr 18 02:22:30 PM PDT 24 |
Apr 18 02:22:35 PM PDT 24 |
2480693177 ps |
T487 |
/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.271947265 |
|
|
Apr 18 02:19:57 PM PDT 24 |
Apr 18 02:20:05 PM PDT 24 |
2611198401 ps |
T488 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.2860531729 |
|
|
Apr 18 02:20:28 PM PDT 24 |
Apr 18 02:20:34 PM PDT 24 |
2111901257 ps |
T489 |
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3042210394 |
|
|
Apr 18 02:23:02 PM PDT 24 |
Apr 18 02:23:13 PM PDT 24 |
3717297224 ps |
T156 |
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3803558336 |
|
|
Apr 18 02:23:05 PM PDT 24 |
Apr 18 02:23:07 PM PDT 24 |
4797342716 ps |
T490 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1092483169 |
|
|
Apr 18 02:20:40 PM PDT 24 |
Apr 18 02:20:46 PM PDT 24 |
2016745979 ps |
T223 |
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3427173550 |
|
|
Apr 18 02:23:22 PM PDT 24 |
Apr 18 02:23:25 PM PDT 24 |
3926443573 ps |
T491 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.4060554913 |
|
|
Apr 18 02:22:25 PM PDT 24 |
Apr 18 02:22:27 PM PDT 24 |
2125422761 ps |
T492 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.446681980 |
|
|
Apr 18 02:22:11 PM PDT 24 |
Apr 18 02:22:14 PM PDT 24 |
2186811728 ps |
T493 |
/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2028263779 |
|
|
Apr 18 02:22:32 PM PDT 24 |
Apr 18 02:22:33 PM PDT 24 |
2661024140 ps |
T494 |
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2755063598 |
|
|
Apr 18 02:23:14 PM PDT 24 |
Apr 18 02:23:17 PM PDT 24 |
3291737334 ps |
T495 |
/workspace/coverage/default/34.sysrst_ctrl_stress_all.502278985 |
|
|
Apr 18 02:22:32 PM PDT 24 |
Apr 18 02:22:52 PM PDT 24 |
13290586818 ps |
T496 |
/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2276837350 |
|
|
Apr 18 02:20:54 PM PDT 24 |
Apr 18 02:21:03 PM PDT 24 |
2447933162 ps |
T497 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1353285583 |
|
|
Apr 18 02:20:28 PM PDT 24 |
Apr 18 02:20:32 PM PDT 24 |
2530333833 ps |
T498 |
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2231030739 |
|
|
Apr 18 02:22:47 PM PDT 24 |
Apr 18 02:22:50 PM PDT 24 |
2205393122 ps |
T351 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.4095223001 |
|
|
Apr 18 02:21:27 PM PDT 24 |
Apr 18 02:24:05 PM PDT 24 |
64557231285 ps |
T499 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2131751540 |
|
|
Apr 18 02:19:57 PM PDT 24 |
Apr 18 02:20:04 PM PDT 24 |
2454406640 ps |
T374 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.918698159 |
|
|
Apr 18 02:22:58 PM PDT 24 |
Apr 18 02:26:17 PM PDT 24 |
75096876879 ps |
T500 |
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2002653012 |
|
|
Apr 18 02:20:20 PM PDT 24 |
Apr 18 02:20:23 PM PDT 24 |
6721325684 ps |
T501 |
/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.429669469 |
|
|
Apr 18 02:20:57 PM PDT 24 |
Apr 18 02:21:02 PM PDT 24 |
2475962821 ps |
T502 |
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2512237308 |
|
|
Apr 18 02:23:00 PM PDT 24 |
Apr 18 02:23:02 PM PDT 24 |
2551201435 ps |
T503 |
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1609595623 |
|
|
Apr 18 02:23:11 PM PDT 24 |
Apr 18 02:23:13 PM PDT 24 |
2190900240 ps |
T504 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.3253728514 |
|
|
Apr 18 02:20:45 PM PDT 24 |
Apr 18 02:20:51 PM PDT 24 |
2078219105 ps |
T384 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2687951733 |
|
|
Apr 18 02:21:41 PM PDT 24 |
Apr 18 02:21:59 PM PDT 24 |
23362001567 ps |
T272 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1342828113 |
|
|
Apr 18 02:23:19 PM PDT 24 |
Apr 18 02:23:36 PM PDT 24 |
55366209363 ps |
T273 |
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3029125955 |
|
|
Apr 18 02:22:57 PM PDT 24 |
Apr 18 02:24:26 PM PDT 24 |
63972360271 ps |
T505 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.2620653660 |
|
|
Apr 18 02:21:37 PM PDT 24 |
Apr 18 02:30:38 PM PDT 24 |
197788261085 ps |
T506 |
/workspace/coverage/default/33.sysrst_ctrl_alert_test.1008615379 |
|
|
Apr 18 02:22:28 PM PDT 24 |
Apr 18 02:22:30 PM PDT 24 |
2041958943 ps |
T507 |
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2959661581 |
|
|
Apr 18 02:23:33 PM PDT 24 |
Apr 18 02:23:56 PM PDT 24 |
24845600400 ps |
T508 |
/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3045855716 |
|
|
Apr 18 02:21:52 PM PDT 24 |
Apr 18 02:21:58 PM PDT 24 |
2617439418 ps |
T394 |
/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.4267375745 |
|
|
Apr 18 02:19:49 PM PDT 24 |
Apr 18 02:24:27 PM PDT 24 |
1121730999052 ps |
T509 |
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3047115899 |
|
|
Apr 18 02:20:26 PM PDT 24 |
Apr 18 02:20:28 PM PDT 24 |
2133364645 ps |
T212 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2029687995 |
|
|
Apr 18 02:20:51 PM PDT 24 |
Apr 18 02:20:54 PM PDT 24 |
2412381936 ps |
T274 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect.2489572266 |
|
|
Apr 18 02:22:09 PM PDT 24 |
Apr 18 02:27:39 PM PDT 24 |
127170213874 ps |
T88 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.189854935 |
|
|
Apr 18 02:19:55 PM PDT 24 |
Apr 18 02:21:26 PM PDT 24 |
35667381441 ps |
T188 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.815564991 |
|
|
Apr 18 02:22:09 PM PDT 24 |
Apr 18 02:23:59 PM PDT 24 |
94608620779 ps |
T282 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.4055079403 |
|
|
Apr 18 02:20:03 PM PDT 24 |
Apr 18 02:21:02 PM PDT 24 |
22009536809 ps |
T510 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1223116333 |
|
|
Apr 18 02:21:21 PM PDT 24 |
Apr 18 02:21:29 PM PDT 24 |
2999881486 ps |
T511 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect.631708566 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:22:56 PM PDT 24 |
87432984678 ps |
T512 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2634952142 |
|
|
Apr 18 02:21:52 PM PDT 24 |
Apr 18 02:22:00 PM PDT 24 |
2475853055 ps |
T372 |
/workspace/coverage/default/25.sysrst_ctrl_combo_detect.1898181070 |
|
|
Apr 18 02:21:50 PM PDT 24 |
Apr 18 02:22:03 PM PDT 24 |
94584935683 ps |
T513 |
/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3444645338 |
|
|
Apr 18 02:22:26 PM PDT 24 |
Apr 18 02:22:27 PM PDT 24 |
2095229286 ps |
T363 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3112471960 |
|
|
Apr 18 02:23:34 PM PDT 24 |
Apr 18 02:28:33 PM PDT 24 |
115030765999 ps |
T514 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3469720288 |
|
|
Apr 18 02:23:31 PM PDT 24 |
Apr 18 02:23:37 PM PDT 24 |
2410895094 ps |
T350 |
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3696378351 |
|
|
Apr 18 02:23:28 PM PDT 24 |
Apr 18 02:24:53 PM PDT 24 |
133263981780 ps |
T515 |
/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1236347376 |
|
|
Apr 18 02:21:42 PM PDT 24 |
Apr 18 02:21:50 PM PDT 24 |
2610336765 ps |
T516 |
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.3808558001 |
|
|
Apr 18 02:22:42 PM PDT 24 |
Apr 18 02:22:49 PM PDT 24 |
2502908082 ps |
T517 |
/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3049019743 |
|
|
Apr 18 02:22:25 PM PDT 24 |
Apr 18 02:22:27 PM PDT 24 |
2478858420 ps |
T518 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.3414988403 |
|
|
Apr 18 02:21:40 PM PDT 24 |
Apr 18 02:21:43 PM PDT 24 |
2121522961 ps |
T519 |
/workspace/coverage/default/29.sysrst_ctrl_alert_test.3463728578 |
|
|
Apr 18 02:22:13 PM PDT 24 |
Apr 18 02:22:15 PM PDT 24 |
2029534010 ps |
T520 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3694469774 |
|
|
Apr 18 02:23:40 PM PDT 24 |
Apr 18 02:24:05 PM PDT 24 |
53987746524 ps |
T521 |
/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1923346786 |
|
|
Apr 18 02:21:11 PM PDT 24 |
Apr 18 02:23:49 PM PDT 24 |
393942233982 ps |
T522 |
/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.120315331 |
|
|
Apr 18 02:21:07 PM PDT 24 |
Apr 18 02:21:09 PM PDT 24 |
2647790295 ps |
T523 |
/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.2547642329 |
|
|
Apr 18 02:22:30 PM PDT 24 |
Apr 18 02:22:38 PM PDT 24 |
2511276566 ps |
T275 |
/workspace/coverage/default/35.sysrst_ctrl_combo_detect.744683929 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:25:41 PM PDT 24 |
68900226101 ps |
T524 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3970984560 |
|
|
Apr 18 02:20:14 PM PDT 24 |
Apr 18 02:20:21 PM PDT 24 |
2436226948 ps |
T525 |
/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1644625500 |
|
|
Apr 18 02:21:20 PM PDT 24 |
Apr 18 02:21:28 PM PDT 24 |
2458905696 ps |
T526 |
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2062697363 |
|
|
Apr 18 02:20:29 PM PDT 24 |
Apr 18 02:20:35 PM PDT 24 |
2012486697 ps |
T527 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.965050636 |
|
|
Apr 18 02:19:52 PM PDT 24 |
Apr 18 02:19:59 PM PDT 24 |
2298953888 ps |
T277 |
/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3897941051 |
|
|
Apr 18 02:21:02 PM PDT 24 |
Apr 18 02:21:40 PM PDT 24 |
27096933142 ps |
T528 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.125705442 |
|
|
Apr 18 02:23:27 PM PDT 24 |
Apr 18 02:23:52 PM PDT 24 |
31449305326 ps |
T529 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.4202966573 |
|
|
Apr 18 02:22:14 PM PDT 24 |
Apr 18 02:22:21 PM PDT 24 |
2013380724 ps |
T530 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1770531210 |
|
|
Apr 18 02:23:00 PM PDT 24 |
Apr 18 02:23:01 PM PDT 24 |
2211415460 ps |
T531 |
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2411764954 |
|
|
Apr 18 02:22:46 PM PDT 24 |
Apr 18 02:22:48 PM PDT 24 |
2040534215 ps |
T532 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3489899046 |
|
|
Apr 18 02:23:34 PM PDT 24 |
Apr 18 02:23:55 PM PDT 24 |
26356828125 ps |
T533 |
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.183957527 |
|
|
Apr 18 02:22:57 PM PDT 24 |
Apr 18 02:42:26 PM PDT 24 |
987868830989 ps |
T367 |
/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.2444328820 |
|
|
Apr 18 02:20:55 PM PDT 24 |
Apr 18 02:21:37 PM PDT 24 |
45837783402 ps |
T534 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2909452469 |
|
|
Apr 18 02:19:45 PM PDT 24 |
Apr 18 02:19:52 PM PDT 24 |
2484030001 ps |
T278 |
/workspace/coverage/default/23.sysrst_ctrl_combo_detect.2202156289 |
|
|
Apr 18 02:21:40 PM PDT 24 |
Apr 18 02:23:10 PM PDT 24 |
33584636417 ps |
T226 |
/workspace/coverage/default/14.sysrst_ctrl_stress_all.2341551858 |
|
|
Apr 18 02:21:00 PM PDT 24 |
Apr 18 03:08:40 PM PDT 24 |
1089791175366 ps |
T535 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.2116808706 |
|
|
Apr 18 02:22:46 PM PDT 24 |
Apr 18 02:22:53 PM PDT 24 |
2613049966 ps |
T283 |
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2486763352 |
|
|
Apr 18 02:20:30 PM PDT 24 |
Apr 18 02:20:58 PM PDT 24 |
22020146182 ps |
T158 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.4152904719 |
|
|
Apr 18 02:21:46 PM PDT 24 |
Apr 18 02:23:18 PM PDT 24 |
76464361276 ps |
T536 |
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.90257498 |
|
|
Apr 18 02:23:22 PM PDT 24 |
Apr 18 02:23:24 PM PDT 24 |
2780500871 ps |
T537 |
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2358554289 |
|
|
Apr 18 02:22:57 PM PDT 24 |
Apr 18 02:23:03 PM PDT 24 |
2010948162 ps |
T538 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1462255528 |
|
|
Apr 18 02:23:38 PM PDT 24 |
Apr 18 02:23:50 PM PDT 24 |
31173741909 ps |
T222 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1615828374 |
|
|
Apr 18 02:23:07 PM PDT 24 |
Apr 18 02:24:03 PM PDT 24 |
41262234529 ps |
T539 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all.365826544 |
|
|
Apr 18 02:21:11 PM PDT 24 |
Apr 18 02:21:16 PM PDT 24 |
10315186469 ps |
T365 |
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.196820690 |
|
|
Apr 18 02:23:31 PM PDT 24 |
Apr 18 02:24:21 PM PDT 24 |
36282013184 ps |
T540 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.2561256790 |
|
|
Apr 18 02:22:09 PM PDT 24 |
Apr 18 02:25:20 PM PDT 24 |
75976240042 ps |
T541 |
/workspace/coverage/default/10.sysrst_ctrl_combo_detect.1703653788 |
|
|
Apr 18 02:20:41 PM PDT 24 |
Apr 18 02:28:10 PM PDT 24 |
173356156255 ps |
T97 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1728554745 |
|
|
Apr 18 02:22:49 PM PDT 24 |
Apr 18 02:24:18 PM PDT 24 |
1468175337003 ps |
T542 |
/workspace/coverage/default/45.sysrst_ctrl_stress_all.711218935 |
|
|
Apr 18 02:23:08 PM PDT 24 |
Apr 18 02:23:49 PM PDT 24 |
14903435021 ps |
T159 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.1533182941 |
|
|
Apr 18 02:22:23 PM PDT 24 |
Apr 18 02:22:25 PM PDT 24 |
4723382519 ps |
T543 |
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.2568322887 |
|
|
Apr 18 02:22:53 PM PDT 24 |
Apr 18 02:22:55 PM PDT 24 |
2636872945 ps |
T544 |
/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1690850909 |
|
|
Apr 18 02:21:54 PM PDT 24 |
Apr 18 02:21:57 PM PDT 24 |
2631304996 ps |
T545 |
/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1245732191 |
|
|
Apr 18 02:21:06 PM PDT 24 |
Apr 18 02:21:16 PM PDT 24 |
3590522795 ps |
T546 |
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1275205425 |
|
|
Apr 18 02:23:13 PM PDT 24 |
Apr 18 02:23:17 PM PDT 24 |
5216925519 ps |
T547 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.2003834732 |
|
|
Apr 18 02:20:06 PM PDT 24 |
Apr 18 02:20:08 PM PDT 24 |
2031223124 ps |
T548 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3531557437 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:22:38 PM PDT 24 |
2043332997 ps |
T224 |
/workspace/coverage/default/36.sysrst_ctrl_edge_detect.2883030617 |
|
|
Apr 18 02:22:36 PM PDT 24 |
Apr 18 02:22:39 PM PDT 24 |
3727567046 ps |
T549 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.1533074518 |
|
|
Apr 18 02:20:23 PM PDT 24 |
Apr 18 02:20:30 PM PDT 24 |
2110750214 ps |
T360 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.4012765802 |
|
|
Apr 18 02:23:26 PM PDT 24 |
Apr 18 02:25:27 PM PDT 24 |
147389711115 ps |
T386 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.688296064 |
|
|
Apr 18 02:23:11 PM PDT 24 |
Apr 18 02:23:45 PM PDT 24 |
50764342663 ps |
T550 |
/workspace/coverage/default/10.sysrst_ctrl_edge_detect.2067092229 |
|
|
Apr 18 02:20:42 PM PDT 24 |
Apr 18 02:20:44 PM PDT 24 |
2356077053 ps |
T551 |
/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2067310107 |
|
|
Apr 18 02:21:08 PM PDT 24 |
Apr 18 02:21:11 PM PDT 24 |
2632580354 ps |
T552 |
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2935177551 |
|
|
Apr 18 02:22:45 PM PDT 24 |
Apr 18 02:22:47 PM PDT 24 |
2814265805 ps |
T553 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1168803780 |
|
|
Apr 18 02:20:30 PM PDT 24 |
Apr 18 02:21:05 PM PDT 24 |
13060616309 ps |
T160 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.2826888400 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:25:03 PM PDT 24 |
59845380567 ps |
T554 |
/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1589199507 |
|
|
Apr 18 02:22:30 PM PDT 24 |
Apr 18 02:22:42 PM PDT 24 |
3544482281 ps |
T555 |
/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1645027521 |
|
|
Apr 18 02:21:10 PM PDT 24 |
Apr 18 02:21:14 PM PDT 24 |
2512202924 ps |
T556 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2543656187 |
|
|
Apr 18 02:23:33 PM PDT 24 |
Apr 18 02:25:27 PM PDT 24 |
45078675571 ps |
T557 |
/workspace/coverage/default/37.sysrst_ctrl_smoke.1112201770 |
|
|
Apr 18 02:22:39 PM PDT 24 |
Apr 18 02:22:45 PM PDT 24 |
2111242141 ps |
T558 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1684804096 |
|
|
Apr 18 02:20:22 PM PDT 24 |
Apr 18 02:22:28 PM PDT 24 |
100398070911 ps |
T559 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2556866983 |
|
|
Apr 18 02:23:24 PM PDT 24 |
Apr 18 02:23:31 PM PDT 24 |
2187738044 ps |
T560 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.509077002 |
|
|
Apr 18 02:20:14 PM PDT 24 |
Apr 18 02:20:17 PM PDT 24 |
4653776126 ps |
T561 |
/workspace/coverage/default/1.sysrst_ctrl_alert_test.1810989814 |
|
|
Apr 18 02:19:59 PM PDT 24 |
Apr 18 02:20:01 PM PDT 24 |
2042289375 ps |
T393 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2354723737 |
|
|
Apr 18 02:23:29 PM PDT 24 |
Apr 18 02:26:14 PM PDT 24 |
61742497683 ps |
T562 |
/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.1523820956 |
|
|
Apr 18 02:19:46 PM PDT 24 |
Apr 18 02:19:48 PM PDT 24 |
2154539353 ps |
T563 |
/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2335111409 |
|
|
Apr 18 02:20:44 PM PDT 24 |
Apr 18 02:20:46 PM PDT 24 |
2628013993 ps |
T564 |
/workspace/coverage/default/10.sysrst_ctrl_pin_override_test.1819774444 |
|
|
Apr 18 02:20:44 PM PDT 24 |
Apr 18 02:20:46 PM PDT 24 |
2525628895 ps |
T565 |
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.278170244 |
|
|
Apr 18 02:23:14 PM PDT 24 |
Apr 18 02:23:17 PM PDT 24 |
2628987160 ps |
T566 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.4250948041 |
|
|
Apr 18 02:20:28 PM PDT 24 |
Apr 18 02:20:34 PM PDT 24 |
3545184845 ps |
T567 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1300588665 |
|
|
Apr 18 02:22:38 PM PDT 24 |
Apr 18 02:22:44 PM PDT 24 |
2231914598 ps |
T244 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.3783716637 |
|
|
Apr 18 02:21:38 PM PDT 24 |
Apr 18 02:21:45 PM PDT 24 |
3419874600 ps |
T91 |
/workspace/coverage/default/18.sysrst_ctrl_edge_detect.1126513446 |
|
|
Apr 18 02:21:18 PM PDT 24 |
Apr 18 02:21:23 PM PDT 24 |
3318740883 ps |
T250 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all.1014625849 |
|
|
Apr 18 02:22:33 PM PDT 24 |
Apr 18 02:27:12 PM PDT 24 |
203065650295 ps |
T251 |
/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1326932648 |
|
|
Apr 18 02:22:19 PM PDT 24 |
Apr 18 02:22:23 PM PDT 24 |
3279771468 ps |
T252 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.709652030 |
|
|
Apr 18 02:19:56 PM PDT 24 |
Apr 18 02:20:03 PM PDT 24 |
2190625802 ps |
T253 |
/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3678011407 |
|
|
Apr 18 02:22:10 PM PDT 24 |
Apr 18 02:22:12 PM PDT 24 |
2499330029 ps |
T254 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.10011515 |
|
|
Apr 18 02:22:00 PM PDT 24 |
Apr 18 02:22:02 PM PDT 24 |
2526328111 ps |
T255 |
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1131373196 |
|
|
Apr 18 02:23:13 PM PDT 24 |
Apr 18 02:23:16 PM PDT 24 |
2030108410 ps |
T245 |
/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3933316709 |
|
|
Apr 18 02:20:40 PM PDT 24 |
Apr 18 02:21:48 PM PDT 24 |
107735219708 ps |
T256 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.3703367640 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:23:09 PM PDT 24 |
11668034390 ps |
T257 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.2200731959 |
|
|
Apr 18 02:19:50 PM PDT 24 |
Apr 18 02:19:52 PM PDT 24 |
2191868032 ps |
T568 |
/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3114977926 |
|
|
Apr 18 02:20:50 PM PDT 24 |
Apr 18 02:20:53 PM PDT 24 |
2626521227 ps |
T569 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1074125858 |
|
|
Apr 18 02:19:44 PM PDT 24 |
Apr 18 02:19:49 PM PDT 24 |
2515510239 ps |
T570 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3217000840 |
|
|
Apr 18 02:19:59 PM PDT 24 |
Apr 18 02:20:02 PM PDT 24 |
2420582311 ps |
T571 |
/workspace/coverage/default/32.sysrst_ctrl_stress_all.596912115 |
|
|
Apr 18 02:22:19 PM PDT 24 |
Apr 18 02:22:50 PM PDT 24 |
10528695777 ps |
T572 |
/workspace/coverage/default/44.sysrst_ctrl_smoke.3744187361 |
|
|
Apr 18 02:23:02 PM PDT 24 |
Apr 18 02:23:08 PM PDT 24 |
2111265832 ps |
T573 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.1473239410 |
|
|
Apr 18 02:20:05 PM PDT 24 |
Apr 18 02:20:11 PM PDT 24 |
2011045615 ps |
T375 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2541538659 |
|
|
Apr 18 02:22:39 PM PDT 24 |
Apr 18 02:29:21 PM PDT 24 |
162856869854 ps |
T258 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all.1357879425 |
|
|
Apr 18 02:21:10 PM PDT 24 |
Apr 18 02:23:22 PM PDT 24 |
188465029100 ps |
T574 |
/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.1738507314 |
|
|
Apr 18 02:21:42 PM PDT 24 |
Apr 18 02:21:48 PM PDT 24 |
3367730603 ps |
T575 |
/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2500919622 |
|
|
Apr 18 02:20:50 PM PDT 24 |
Apr 18 02:20:52 PM PDT 24 |
2535807087 ps |
T576 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2362334872 |
|
|
Apr 18 02:23:34 PM PDT 24 |
Apr 18 02:28:39 PM PDT 24 |
109480962408 ps |
T577 |
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.572465195 |
|
|
Apr 18 02:23:07 PM PDT 24 |
Apr 18 02:23:09 PM PDT 24 |
2487394597 ps |
T578 |
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3932892559 |
|
|
Apr 18 02:23:18 PM PDT 24 |
Apr 18 02:23:19 PM PDT 24 |
2660904300 ps |
T579 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2467437500 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:22:38 PM PDT 24 |
2633348456 ps |
T580 |
/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.170620064 |
|
|
Apr 18 02:21:43 PM PDT 24 |
Apr 18 02:21:50 PM PDT 24 |
2513691088 ps |
T581 |
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.462745458 |
|
|
Apr 18 02:23:01 PM PDT 24 |
Apr 18 02:23:09 PM PDT 24 |
2612056985 ps |
T582 |
/workspace/coverage/default/18.sysrst_ctrl_smoke.169406017 |
|
|
Apr 18 02:21:11 PM PDT 24 |
Apr 18 02:21:17 PM PDT 24 |
2111184645 ps |
T583 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3226344315 |
|
|
Apr 18 02:19:57 PM PDT 24 |
Apr 18 02:20:03 PM PDT 24 |
2366881517 ps |
T584 |
/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1756106987 |
|
|
Apr 18 02:22:30 PM PDT 24 |
Apr 18 02:23:52 PM PDT 24 |
32018396217 ps |
T585 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3176389714 |
|
|
Apr 18 02:21:26 PM PDT 24 |
Apr 18 02:22:08 PM PDT 24 |
26085731596 ps |
T141 |
/workspace/coverage/default/0.sysrst_ctrl_stress_all.2452273692 |
|
|
Apr 18 02:19:49 PM PDT 24 |
Apr 18 02:20:21 PM PDT 24 |
17852045330 ps |
T586 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1371918314 |
|
|
Apr 18 02:20:03 PM PDT 24 |
Apr 18 02:20:05 PM PDT 24 |
2647254538 ps |
T587 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.2556207362 |
|
|
Apr 18 02:23:17 PM PDT 24 |
Apr 18 02:23:18 PM PDT 24 |
2143560606 ps |
T588 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2706417082 |
|
|
Apr 18 02:23:34 PM PDT 24 |
Apr 18 02:24:39 PM PDT 24 |
25329780222 ps |
T358 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3234024420 |
|
|
Apr 18 02:23:09 PM PDT 24 |
Apr 18 02:24:44 PM PDT 24 |
132856787557 ps |
T589 |
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.929818997 |
|
|
Apr 18 02:20:17 PM PDT 24 |
Apr 18 02:20:21 PM PDT 24 |
3648026577 ps |
T590 |
/workspace/coverage/default/12.sysrst_ctrl_alert_test.4039576784 |
|
|
Apr 18 02:20:54 PM PDT 24 |
Apr 18 02:20:56 PM PDT 24 |
2041175362 ps |
T591 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2780167983 |
|
|
Apr 18 02:20:34 PM PDT 24 |
Apr 18 02:20:40 PM PDT 24 |
2047555672 ps |
T592 |
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1867375418 |
|
|
Apr 18 02:22:51 PM PDT 24 |
Apr 18 02:22:52 PM PDT 24 |
3767975122 ps |
T279 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3390842065 |
|
|
Apr 18 02:23:22 PM PDT 24 |
Apr 18 02:25:09 PM PDT 24 |
40608070513 ps |
T593 |
/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2741177901 |
|
|
Apr 18 02:20:54 PM PDT 24 |
Apr 18 02:23:55 PM PDT 24 |
128103082694 ps |
T594 |
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3284622473 |
|
|
Apr 18 02:20:25 PM PDT 24 |
Apr 18 02:20:32 PM PDT 24 |
2467683388 ps |
T161 |
/workspace/coverage/default/13.sysrst_ctrl_edge_detect.3307820029 |
|
|
Apr 18 02:20:57 PM PDT 24 |
Apr 18 02:21:01 PM PDT 24 |
6665084578 ps |
T595 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.3472334360 |
|
|
Apr 18 02:22:47 PM PDT 24 |
Apr 18 02:22:51 PM PDT 24 |
2115836505 ps |
T228 |
/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2880062191 |
|
|
Apr 18 02:21:13 PM PDT 24 |
Apr 18 02:23:19 PM PDT 24 |
90391430513 ps |
T596 |
/workspace/coverage/default/16.sysrst_ctrl_smoke.352434395 |
|
|
Apr 18 02:21:06 PM PDT 24 |
Apr 18 02:21:09 PM PDT 24 |
2128688181 ps |
T597 |
/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3300229489 |
|
|
Apr 18 02:19:46 PM PDT 24 |
Apr 18 02:21:44 PM PDT 24 |
41648918858 ps |
T598 |
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1957134127 |
|
|
Apr 18 02:20:19 PM PDT 24 |
Apr 18 02:20:29 PM PDT 24 |
3451821838 ps |
T599 |
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1224633994 |
|
|
Apr 18 02:22:53 PM PDT 24 |
Apr 18 02:22:55 PM PDT 24 |
2047630017 ps |
T600 |
/workspace/coverage/default/23.sysrst_ctrl_alert_test.186814822 |
|
|
Apr 18 02:21:42 PM PDT 24 |
Apr 18 02:21:43 PM PDT 24 |
2093889865 ps |
T601 |
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2541927517 |
|
|
Apr 18 02:23:13 PM PDT 24 |
Apr 18 02:23:18 PM PDT 24 |
2616380749 ps |
T602 |
/workspace/coverage/default/29.sysrst_ctrl_stress_all.1316290973 |
|
|
Apr 18 02:22:12 PM PDT 24 |
Apr 18 02:22:19 PM PDT 24 |
8770970150 ps |
T385 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3754536136 |
|
|
Apr 18 02:23:40 PM PDT 24 |
Apr 18 02:27:29 PM PDT 24 |
86948687736 ps |
T603 |
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4101307760 |
|
|
Apr 18 02:23:07 PM PDT 24 |
Apr 18 02:23:15 PM PDT 24 |
2510827036 ps |
T604 |
/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.233757508 |
|
|
Apr 18 02:19:45 PM PDT 24 |
Apr 18 02:19:53 PM PDT 24 |
2514514737 ps |
T605 |
/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.396901115 |
|
|
Apr 18 02:22:30 PM PDT 24 |
Apr 18 02:22:33 PM PDT 24 |
2472908394 ps |
T606 |
/workspace/coverage/default/15.sysrst_ctrl_smoke.2058165669 |
|
|
Apr 18 02:20:59 PM PDT 24 |
Apr 18 02:21:01 PM PDT 24 |
2156620865 ps |
T126 |
/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3463729259 |
|
|
Apr 18 02:21:11 PM PDT 24 |
Apr 18 02:24:54 PM PDT 24 |
2802505364034 ps |
T607 |
/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2410745123 |
|
|
Apr 18 02:21:37 PM PDT 24 |
Apr 18 02:21:44 PM PDT 24 |
2610647097 ps |
T361 |
/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.666494679 |
|
|
Apr 18 02:21:59 PM PDT 24 |
Apr 18 02:22:49 PM PDT 24 |
66075915221 ps |
T130 |
/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2789838542 |
|
|
Apr 18 02:21:32 PM PDT 24 |
Apr 18 02:21:56 PM PDT 24 |
65877906580 ps |
T162 |
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.661561061 |
|
|
Apr 18 02:23:02 PM PDT 24 |
Apr 18 02:23:53 PM PDT 24 |
789510623379 ps |
T608 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.3825393474 |
|
|
Apr 18 02:21:46 PM PDT 24 |
Apr 18 02:21:53 PM PDT 24 |
2010726596 ps |
T609 |
/workspace/coverage/default/32.sysrst_ctrl_smoke.426652008 |
|
|
Apr 18 02:22:14 PM PDT 24 |
Apr 18 02:22:20 PM PDT 24 |
2111516255 ps |
T610 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3265708671 |
|
|
Apr 18 02:21:54 PM PDT 24 |
Apr 18 02:21:58 PM PDT 24 |
2519086495 ps |
T387 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3418737032 |
|
|
Apr 18 02:23:31 PM PDT 24 |
Apr 18 02:24:13 PM PDT 24 |
61008999309 ps |
T611 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3345112147 |
|
|
Apr 18 02:22:31 PM PDT 24 |
Apr 18 02:22:33 PM PDT 24 |
2212928967 ps |
T612 |
/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.698344947 |
|
|
Apr 18 02:22:34 PM PDT 24 |
Apr 18 02:23:36 PM PDT 24 |
105192056631 ps |
T613 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.349449483 |
|
|
Apr 18 02:21:59 PM PDT 24 |
Apr 18 02:23:25 PM PDT 24 |
124555830175 ps |
T614 |
/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1323544804 |
|
|
Apr 18 02:20:54 PM PDT 24 |
Apr 18 02:21:00 PM PDT 24 |
2526185857 ps |
T396 |
/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2809294292 |
|
|
Apr 18 02:21:21 PM PDT 24 |
Apr 18 02:23:01 PM PDT 24 |
160501781678 ps |
T615 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all.805646260 |
|
|
Apr 18 02:22:43 PM PDT 24 |
Apr 18 02:22:52 PM PDT 24 |
15603496244 ps |
T362 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2074160666 |
|
|
Apr 18 02:22:51 PM PDT 24 |
Apr 18 02:24:26 PM PDT 24 |
126250161791 ps |
T616 |
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3064496762 |
|
|
Apr 18 02:20:18 PM PDT 24 |
Apr 18 02:20:24 PM PDT 24 |
2016443594 ps |
T617 |
/workspace/coverage/default/28.sysrst_ctrl_alert_test.4259131854 |
|
|
Apr 18 02:22:11 PM PDT 24 |
Apr 18 02:22:14 PM PDT 24 |
2033160942 ps |
T392 |
/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2761058528 |
|
|
Apr 18 02:22:09 PM PDT 24 |
Apr 18 02:23:27 PM PDT 24 |
118637173545 ps |
T618 |
/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3138195047 |
|
|
Apr 18 02:21:08 PM PDT 24 |
Apr 18 02:21:13 PM PDT 24 |
3708841366 ps |
T619 |
/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3942358828 |
|
|
Apr 18 02:22:35 PM PDT 24 |
Apr 18 02:22:45 PM PDT 24 |
3260099421 ps |
T620 |
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.978729495 |
|
|
Apr 18 02:23:37 PM PDT 24 |
Apr 18 02:23:42 PM PDT 24 |
2465510827 ps |
T621 |
/workspace/coverage/default/22.sysrst_ctrl_alert_test.2466703384 |
|
|
Apr 18 02:21:43 PM PDT 24 |
Apr 18 02:21:49 PM PDT 24 |
2012999988 ps |
T127 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2834917708 |
|
|
Apr 18 02:19:44 PM PDT 24 |
Apr 18 02:19:55 PM PDT 24 |
6385264816 ps |
T622 |
/workspace/coverage/default/1.sysrst_ctrl_smoke.3369583760 |
|
|
Apr 18 02:19:49 PM PDT 24 |
Apr 18 02:19:53 PM PDT 24 |
2113092202 ps |
T623 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.473941414 |
|
|
Apr 18 02:20:55 PM PDT 24 |
Apr 18 02:20:57 PM PDT 24 |
2526603659 ps |