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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.29 99.38 96.41 100.00 97.44 98.85 99.61 89.33


Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T357 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2647942365 Apr 21 01:08:33 PM PDT 24 Apr 21 01:09:25 PM PDT 24 86286720786 ps
T160 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.1737477994 Apr 21 01:06:49 PM PDT 24 Apr 21 01:07:04 PM PDT 24 5386726424 ps
T350 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1257409060 Apr 21 01:07:37 PM PDT 24 Apr 21 01:08:07 PM PDT 24 50755490885 ps
T128 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1417841193 Apr 21 01:08:26 PM PDT 24 Apr 21 01:13:49 PM PDT 24 2675759645688 ps
T441 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.860858349 Apr 21 01:08:31 PM PDT 24 Apr 21 01:08:47 PM PDT 24 22987410652 ps
T442 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1802312462 Apr 21 01:06:55 PM PDT 24 Apr 21 01:06:57 PM PDT 24 3777502376 ps
T443 /workspace/coverage/default/35.sysrst_ctrl_alert_test.80811933 Apr 21 01:08:02 PM PDT 24 Apr 21 01:08:08 PM PDT 24 2014051828 ps
T258 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.293065444 Apr 21 01:07:59 PM PDT 24 Apr 21 01:13:05 PM PDT 24 130712824619 ps
T180 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2625901441 Apr 21 01:06:47 PM PDT 24 Apr 21 01:07:55 PM PDT 24 103722559563 ps
T444 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2346640629 Apr 21 01:06:49 PM PDT 24 Apr 21 01:06:52 PM PDT 24 3435621145 ps
T445 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2106551468 Apr 21 01:06:44 PM PDT 24 Apr 21 01:06:48 PM PDT 24 3640413988 ps
T92 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.751041540 Apr 21 01:07:29 PM PDT 24 Apr 21 01:17:05 PM PDT 24 1824433392595 ps
T446 /workspace/coverage/default/19.sysrst_ctrl_alert_test.194581498 Apr 21 01:07:17 PM PDT 24 Apr 21 01:07:19 PM PDT 24 2027799056 ps
T447 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.4037232340 Apr 21 01:08:33 PM PDT 24 Apr 21 01:08:37 PM PDT 24 2635645154 ps
T448 /workspace/coverage/default/31.sysrst_ctrl_alert_test.418918462 Apr 21 01:07:51 PM PDT 24 Apr 21 01:07:53 PM PDT 24 2051015179 ps
T449 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.161474920 Apr 21 01:06:39 PM PDT 24 Apr 21 01:06:41 PM PDT 24 2205645212 ps
T450 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1003697540 Apr 21 01:06:53 PM PDT 24 Apr 21 01:07:01 PM PDT 24 2510029559 ps
T451 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.2468404678 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:33 PM PDT 24 3916059468 ps
T452 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2392699695 Apr 21 01:08:10 PM PDT 24 Apr 21 01:08:17 PM PDT 24 2469600544 ps
T453 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3815219618 Apr 21 01:06:47 PM PDT 24 Apr 21 01:06:49 PM PDT 24 3883255982 ps
T289 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.3549926206 Apr 21 01:06:40 PM PDT 24 Apr 21 01:07:10 PM PDT 24 42084545962 ps
T454 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.841074989 Apr 21 01:08:35 PM PDT 24 Apr 21 01:08:42 PM PDT 24 4407370904 ps
T272 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.295687253 Apr 21 01:06:58 PM PDT 24 Apr 21 01:08:04 PM PDT 24 99222562213 ps
T455 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4003433937 Apr 21 01:08:48 PM PDT 24 Apr 21 01:09:15 PM PDT 24 44806706963 ps
T456 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.336636126 Apr 21 01:08:28 PM PDT 24 Apr 21 01:09:03 PM PDT 24 62493619113 ps
T457 /workspace/coverage/default/16.sysrst_ctrl_alert_test.3521107077 Apr 21 01:07:11 PM PDT 24 Apr 21 01:07:17 PM PDT 24 2011539204 ps
T200 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3346897465 Apr 21 01:07:25 PM PDT 24 Apr 21 01:09:14 PM PDT 24 43185323987 ps
T105 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2030854881 Apr 21 01:07:42 PM PDT 24 Apr 21 01:08:00 PM PDT 24 103469787025 ps
T458 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.4249864164 Apr 21 01:07:57 PM PDT 24 Apr 21 01:08:04 PM PDT 24 2511487359 ps
T459 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4205346396 Apr 21 01:08:28 PM PDT 24 Apr 21 01:08:30 PM PDT 24 2472785043 ps
T381 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1231921279 Apr 21 01:06:55 PM PDT 24 Apr 21 01:08:33 PM PDT 24 74799932192 ps
T460 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2617546987 Apr 21 01:07:32 PM PDT 24 Apr 21 01:07:44 PM PDT 24 4007618575 ps
T461 /workspace/coverage/default/31.sysrst_ctrl_stress_all.1665647416 Apr 21 01:07:46 PM PDT 24 Apr 21 01:07:56 PM PDT 24 13520066269 ps
T462 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3679015589 Apr 21 01:07:04 PM PDT 24 Apr 21 01:07:06 PM PDT 24 2618148657 ps
T250 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3438013861 Apr 21 01:06:32 PM PDT 24 Apr 21 01:07:38 PM PDT 24 24582388442 ps
T463 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1524615637 Apr 21 01:07:42 PM PDT 24 Apr 21 01:07:44 PM PDT 24 2538172169 ps
T464 /workspace/coverage/default/44.sysrst_ctrl_smoke.2746145659 Apr 21 01:08:27 PM PDT 24 Apr 21 01:08:29 PM PDT 24 2125516589 ps
T465 /workspace/coverage/default/41.sysrst_ctrl_smoke.2350668924 Apr 21 01:08:24 PM PDT 24 Apr 21 01:08:27 PM PDT 24 2117306253 ps
T466 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2595094973 Apr 21 01:07:43 PM PDT 24 Apr 21 01:07:46 PM PDT 24 5687694437 ps
T467 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.257158798 Apr 21 01:08:05 PM PDT 24 Apr 21 01:08:08 PM PDT 24 2130333446 ps
T373 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3075309988 Apr 21 01:07:34 PM PDT 24 Apr 21 01:08:49 PM PDT 24 107893224468 ps
T94 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2210700699 Apr 21 01:06:37 PM PDT 24 Apr 21 01:06:44 PM PDT 24 9692260998 ps
T204 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.807750747 Apr 21 01:08:24 PM PDT 24 Apr 21 01:08:30 PM PDT 24 2217158983 ps
T205 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.820457573 Apr 21 01:07:24 PM PDT 24 Apr 21 01:07:34 PM PDT 24 3429718989 ps
T206 /workspace/coverage/default/38.sysrst_ctrl_alert_test.1893022220 Apr 21 01:08:23 PM PDT 24 Apr 21 01:08:25 PM PDT 24 2067800624 ps
T207 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1577112385 Apr 21 01:08:40 PM PDT 24 Apr 21 01:08:48 PM PDT 24 2959312408 ps
T208 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1215130696 Apr 21 01:06:32 PM PDT 24 Apr 21 01:06:35 PM PDT 24 3328778136 ps
T209 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1365098195 Apr 21 01:06:42 PM PDT 24 Apr 21 01:06:49 PM PDT 24 2398146818 ps
T210 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2687883451 Apr 21 01:08:53 PM PDT 24 Apr 21 01:09:08 PM PDT 24 20101056483 ps
T211 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2841183390 Apr 21 01:08:30 PM PDT 24 Apr 21 01:08:33 PM PDT 24 2635257508 ps
T212 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1431699698 Apr 21 01:06:46 PM PDT 24 Apr 21 01:06:49 PM PDT 24 3416935894 ps
T161 /workspace/coverage/default/38.sysrst_ctrl_stress_all.256341615 Apr 21 01:08:12 PM PDT 24 Apr 21 01:08:58 PM PDT 24 18550031781 ps
T468 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1196756940 Apr 21 01:06:59 PM PDT 24 Apr 21 01:07:03 PM PDT 24 2622694942 ps
T310 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1319766568 Apr 21 01:08:33 PM PDT 24 Apr 21 01:10:37 PM PDT 24 50050126106 ps
T106 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.587022960 Apr 21 01:07:13 PM PDT 24 Apr 21 01:12:02 PM PDT 24 318189653977 ps
T469 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.4252182342 Apr 21 01:07:50 PM PDT 24 Apr 21 01:07:57 PM PDT 24 2512125613 ps
T237 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.3873227772 Apr 21 01:07:25 PM PDT 24 Apr 21 01:07:33 PM PDT 24 3664015815 ps
T470 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.981585370 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:27 PM PDT 24 2830170331 ps
T471 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1115286969 Apr 21 01:06:47 PM PDT 24 Apr 21 01:06:52 PM PDT 24 2462214037 ps
T472 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.1893573557 Apr 21 01:06:59 PM PDT 24 Apr 21 01:07:04 PM PDT 24 3419914471 ps
T473 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.3463237627 Apr 21 01:08:13 PM PDT 24 Apr 21 01:08:16 PM PDT 24 3153210877 ps
T474 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.4178441130 Apr 21 01:08:24 PM PDT 24 Apr 21 01:08:27 PM PDT 24 2493591542 ps
T475 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.3694896049 Apr 21 01:07:05 PM PDT 24 Apr 21 01:07:08 PM PDT 24 2459618910 ps
T371 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1173497001 Apr 21 01:08:53 PM PDT 24 Apr 21 01:10:16 PM PDT 24 124439078219 ps
T476 /workspace/coverage/default/26.sysrst_ctrl_stress_all.264080755 Apr 21 01:07:36 PM PDT 24 Apr 21 01:09:28 PM PDT 24 162078287457 ps
T477 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3611056140 Apr 21 01:08:28 PM PDT 24 Apr 21 01:08:33 PM PDT 24 4022967204 ps
T478 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.4159407295 Apr 21 01:06:43 PM PDT 24 Apr 21 01:06:51 PM PDT 24 5401015612 ps
T382 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.3414904363 Apr 21 01:07:05 PM PDT 24 Apr 21 01:09:35 PM PDT 24 54541359179 ps
T479 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2290239073 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:33 PM PDT 24 2227774196 ps
T480 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3394773343 Apr 21 01:08:03 PM PDT 24 Apr 21 01:08:10 PM PDT 24 4262177357 ps
T481 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3743715917 Apr 21 01:08:25 PM PDT 24 Apr 21 01:08:34 PM PDT 24 2512368656 ps
T482 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2036088015 Apr 21 01:07:38 PM PDT 24 Apr 21 01:08:48 PM PDT 24 26831663147 ps
T483 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.1551298776 Apr 21 01:07:42 PM PDT 24 Apr 21 01:07:46 PM PDT 24 2619263867 ps
T484 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.449429975 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:39 PM PDT 24 2612679152 ps
T485 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2244943993 Apr 21 01:06:49 PM PDT 24 Apr 21 01:06:57 PM PDT 24 2610676655 ps
T486 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2926787092 Apr 21 01:07:18 PM PDT 24 Apr 21 01:07:24 PM PDT 24 4783915994 ps
T487 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.593238895 Apr 21 01:06:42 PM PDT 24 Apr 21 01:06:49 PM PDT 24 2615472878 ps
T389 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2652163923 Apr 21 01:07:22 PM PDT 24 Apr 21 01:10:30 PM PDT 24 167115477878 ps
T488 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.810780909 Apr 21 01:07:16 PM PDT 24 Apr 21 01:07:25 PM PDT 24 2510385555 ps
T489 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3901289866 Apr 21 01:06:33 PM PDT 24 Apr 21 01:06:41 PM PDT 24 2612011795 ps
T490 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2571444327 Apr 21 01:07:38 PM PDT 24 Apr 21 01:07:52 PM PDT 24 4901208836 ps
T354 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.284255443 Apr 21 01:06:37 PM PDT 24 Apr 21 01:08:05 PM PDT 24 129277250764 ps
T491 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1314837639 Apr 21 01:06:49 PM PDT 24 Apr 21 01:06:58 PM PDT 24 11432185586 ps
T492 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2183229186 Apr 21 01:07:16 PM PDT 24 Apr 21 01:08:43 PM PDT 24 68722235384 ps
T374 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.645628286 Apr 21 01:06:44 PM PDT 24 Apr 21 01:08:42 PM PDT 24 48085494764 ps
T334 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2809909564 Apr 21 01:08:31 PM PDT 24 Apr 21 01:09:08 PM PDT 24 85494793570 ps
T493 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1329047123 Apr 21 01:08:33 PM PDT 24 Apr 21 01:08:42 PM PDT 24 2611145015 ps
T494 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2238078325 Apr 21 01:07:05 PM PDT 24 Apr 21 01:07:13 PM PDT 24 3878777627 ps
T495 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.4280801582 Apr 21 01:08:22 PM PDT 24 Apr 21 01:09:25 PM PDT 24 85747986071 ps
T496 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.4062697933 Apr 21 01:08:01 PM PDT 24 Apr 21 01:08:04 PM PDT 24 2633118917 ps
T497 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2501966144 Apr 21 01:06:42 PM PDT 24 Apr 21 01:06:44 PM PDT 24 2482679070 ps
T498 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3281723801 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:34 PM PDT 24 2231259686 ps
T499 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.207702325 Apr 21 01:07:14 PM PDT 24 Apr 21 01:07:18 PM PDT 24 2618931689 ps
T375 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1990360410 Apr 21 01:08:24 PM PDT 24 Apr 21 01:09:46 PM PDT 24 63350587051 ps
T500 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2124782213 Apr 21 01:06:59 PM PDT 24 Apr 21 01:07:07 PM PDT 24 2461992165 ps
T83 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.887660447 Apr 21 01:08:52 PM PDT 24 Apr 21 01:09:29 PM PDT 24 54202233670 ps
T196 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.1532254440 Apr 21 01:08:37 PM PDT 24 Apr 21 01:08:39 PM PDT 24 2916745467 ps
T501 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.182836295 Apr 21 01:07:01 PM PDT 24 Apr 21 01:07:05 PM PDT 24 3605487135 ps
T502 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3761305064 Apr 21 01:07:23 PM PDT 24 Apr 21 01:07:28 PM PDT 24 2465427897 ps
T503 /workspace/coverage/default/0.sysrst_ctrl_smoke.3641096321 Apr 21 01:06:29 PM PDT 24 Apr 21 01:06:35 PM PDT 24 2111334044 ps
T504 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1487555398 Apr 21 01:07:49 PM PDT 24 Apr 21 01:07:51 PM PDT 24 2501862627 ps
T505 /workspace/coverage/default/49.sysrst_ctrl_smoke.2099059719 Apr 21 01:08:40 PM PDT 24 Apr 21 01:08:45 PM PDT 24 2111058234 ps
T506 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1682824847 Apr 21 01:06:31 PM PDT 24 Apr 21 01:06:33 PM PDT 24 2495832850 ps
T259 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.4277859452 Apr 21 01:07:56 PM PDT 24 Apr 21 01:13:49 PM PDT 24 141278099049 ps
T507 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.1829212603 Apr 21 01:06:36 PM PDT 24 Apr 21 01:10:05 PM PDT 24 83671122868 ps
T215 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.4263567175 Apr 21 01:08:23 PM PDT 24 Apr 21 01:08:30 PM PDT 24 4052978895 ps
T260 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.2753147347 Apr 21 01:08:39 PM PDT 24 Apr 21 01:09:48 PM PDT 24 105399453123 ps
T273 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.3800277921 Apr 21 01:07:24 PM PDT 24 Apr 21 01:08:46 PM PDT 24 141713731473 ps
T508 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3826255381 Apr 21 01:08:08 PM PDT 24 Apr 21 01:08:18 PM PDT 24 3726951815 ps
T509 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3532649792 Apr 21 01:06:51 PM PDT 24 Apr 21 01:06:52 PM PDT 24 2578437771 ps
T364 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1953241859 Apr 21 01:07:50 PM PDT 24 Apr 21 01:08:59 PM PDT 24 127721174236 ps
T510 /workspace/coverage/default/4.sysrst_ctrl_smoke.1396385481 Apr 21 01:06:42 PM PDT 24 Apr 21 01:06:45 PM PDT 24 2125892644 ps
T511 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2630236354 Apr 21 01:07:24 PM PDT 24 Apr 21 01:08:34 PM PDT 24 1696850978471 ps
T162 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.289690115 Apr 21 01:07:59 PM PDT 24 Apr 21 01:08:10 PM PDT 24 4396423362 ps
T321 /workspace/coverage/default/11.sysrst_ctrl_stress_all.1377891397 Apr 21 01:06:59 PM PDT 24 Apr 21 01:14:46 PM PDT 24 179570183122 ps
T512 /workspace/coverage/default/24.sysrst_ctrl_alert_test.497237786 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:33 PM PDT 24 2038824295 ps
T513 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.2673127995 Apr 21 01:07:01 PM PDT 24 Apr 21 01:07:07 PM PDT 24 3238335949 ps
T514 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.3984202438 Apr 21 01:06:48 PM PDT 24 Apr 21 01:06:51 PM PDT 24 2572858790 ps
T291 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2842633630 Apr 21 01:07:58 PM PDT 24 Apr 21 01:09:05 PM PDT 24 25050873533 ps
T515 /workspace/coverage/default/24.sysrst_ctrl_stress_all.457060447 Apr 21 01:07:31 PM PDT 24 Apr 21 01:08:12 PM PDT 24 15787268153 ps
T95 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2233943054 Apr 21 01:06:36 PM PDT 24 Apr 21 01:06:47 PM PDT 24 5771853158 ps
T151 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2375668818 Apr 21 01:08:09 PM PDT 24 Apr 21 01:08:11 PM PDT 24 2624048804 ps
T152 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3028707393 Apr 21 01:08:25 PM PDT 24 Apr 21 01:08:29 PM PDT 24 3585767525 ps
T153 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.4231559579 Apr 21 01:08:33 PM PDT 24 Apr 21 01:12:10 PM PDT 24 90808790486 ps
T154 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3833842539 Apr 21 01:06:55 PM PDT 24 Apr 21 01:06:57 PM PDT 24 2484486727 ps
T155 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1325241592 Apr 21 01:06:55 PM PDT 24 Apr 21 01:06:57 PM PDT 24 5653557660 ps
T156 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3045419468 Apr 21 01:07:36 PM PDT 24 Apr 21 01:07:38 PM PDT 24 2717273436 ps
T157 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3784961315 Apr 21 01:06:43 PM PDT 24 Apr 21 01:06:47 PM PDT 24 3321142018 ps
T158 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2210036165 Apr 21 01:06:37 PM PDT 24 Apr 21 01:06:51 PM PDT 24 4599947383 ps
T159 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1913482209 Apr 21 01:08:03 PM PDT 24 Apr 21 01:09:50 PM PDT 24 41946878544 ps
T516 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.292696768 Apr 21 01:07:51 PM PDT 24 Apr 21 01:07:52 PM PDT 24 2523114147 ps
T517 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2298896641 Apr 21 01:08:24 PM PDT 24 Apr 21 01:08:34 PM PDT 24 8893765960 ps
T518 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3049617506 Apr 21 01:08:08 PM PDT 24 Apr 21 01:08:12 PM PDT 24 2450819104 ps
T519 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.4065881122 Apr 21 01:07:10 PM PDT 24 Apr 21 01:07:13 PM PDT 24 2636512231 ps
T520 /workspace/coverage/default/14.sysrst_ctrl_smoke.4162599022 Apr 21 01:07:05 PM PDT 24 Apr 21 01:07:07 PM PDT 24 2129583866 ps
T132 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1527135673 Apr 21 01:06:40 PM PDT 24 Apr 21 01:07:50 PM PDT 24 2030255076503 ps
T521 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.4293628595 Apr 21 01:06:40 PM PDT 24 Apr 21 01:06:48 PM PDT 24 2458373834 ps
T522 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2080311662 Apr 21 01:06:55 PM PDT 24 Apr 21 01:06:57 PM PDT 24 2633760808 ps
T163 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.659927248 Apr 21 01:07:54 PM PDT 24 Apr 21 01:09:04 PM PDT 24 114952352231 ps
T523 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3539064570 Apr 21 01:07:51 PM PDT 24 Apr 21 01:07:57 PM PDT 24 3378124823 ps
T524 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1670936201 Apr 21 01:07:49 PM PDT 24 Apr 21 01:07:58 PM PDT 24 2828360918 ps
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T526 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.743591879 Apr 21 01:07:02 PM PDT 24 Apr 21 01:07:13 PM PDT 24 3609100196 ps
T527 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2033331029 Apr 21 01:06:54 PM PDT 24 Apr 21 01:06:55 PM PDT 24 3959679171 ps
T528 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.3650247105 Apr 21 01:06:34 PM PDT 24 Apr 21 01:06:42 PM PDT 24 2429812693 ps
T529 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.4153036979 Apr 21 01:07:20 PM PDT 24 Apr 21 01:07:23 PM PDT 24 2631754748 ps
T530 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.1735671210 Apr 21 01:07:01 PM PDT 24 Apr 21 01:07:05 PM PDT 24 3537594825 ps
T531 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2937402768 Apr 21 01:06:51 PM PDT 24 Apr 21 01:06:54 PM PDT 24 2489678278 ps
T532 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3199201283 Apr 21 01:06:34 PM PDT 24 Apr 21 01:06:41 PM PDT 24 2463592169 ps
T533 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2592289647 Apr 21 01:07:09 PM PDT 24 Apr 21 01:07:11 PM PDT 24 2169010289 ps
T353 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2707773376 Apr 21 01:06:43 PM PDT 24 Apr 21 01:08:24 PM PDT 24 76866242132 ps
T281 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.3897439781 Apr 21 01:06:48 PM PDT 24 Apr 21 01:07:23 PM PDT 24 59670787402 ps
T534 /workspace/coverage/default/33.sysrst_ctrl_alert_test.3242664273 Apr 21 01:07:56 PM PDT 24 Apr 21 01:07:58 PM PDT 24 2045939187 ps
T535 /workspace/coverage/default/17.sysrst_ctrl_smoke.1560115004 Apr 21 01:07:08 PM PDT 24 Apr 21 01:07:12 PM PDT 24 2118059164 ps
T536 /workspace/coverage/default/48.sysrst_ctrl_stress_all.1545382131 Apr 21 01:08:37 PM PDT 24 Apr 21 01:08:42 PM PDT 24 13505838824 ps
T107 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.2754034135 Apr 21 01:06:58 PM PDT 24 Apr 21 01:08:08 PM PDT 24 104592572976 ps
T537 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2223678751 Apr 21 01:07:51 PM PDT 24 Apr 21 01:07:59 PM PDT 24 2507599677 ps
T538 /workspace/coverage/default/48.sysrst_ctrl_smoke.2263216379 Apr 21 01:08:35 PM PDT 24 Apr 21 01:08:39 PM PDT 24 2116279109 ps
T539 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.1924365728 Apr 21 01:07:50 PM PDT 24 Apr 21 01:07:56 PM PDT 24 2100369623 ps
T363 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.4009977436 Apr 21 01:08:45 PM PDT 24 Apr 21 01:09:37 PM PDT 24 85138706889 ps
T540 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1933292157 Apr 21 01:07:59 PM PDT 24 Apr 21 01:08:05 PM PDT 24 2109069922 ps
T541 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.2314744031 Apr 21 01:07:30 PM PDT 24 Apr 21 01:07:37 PM PDT 24 4947242906 ps
T141 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3818095258 Apr 21 01:08:24 PM PDT 24 Apr 21 01:13:34 PM PDT 24 813499858161 ps
T542 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.558419781 Apr 21 01:08:30 PM PDT 24 Apr 21 01:08:40 PM PDT 24 3418742331 ps
T543 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3209324414 Apr 21 01:07:12 PM PDT 24 Apr 21 01:07:15 PM PDT 24 2480551160 ps
T544 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.4069266404 Apr 21 01:07:34 PM PDT 24 Apr 21 01:07:41 PM PDT 24 3296971698 ps
T545 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2708525393 Apr 21 01:07:52 PM PDT 24 Apr 21 01:07:58 PM PDT 24 2629410760 ps
T546 /workspace/coverage/default/4.sysrst_ctrl_alert_test.2922860694 Apr 21 01:06:41 PM PDT 24 Apr 21 01:06:47 PM PDT 24 2012512507 ps
T547 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.497030840 Apr 21 01:08:54 PM PDT 24 Apr 21 01:09:20 PM PDT 24 30100318229 ps
T274 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.2937768034 Apr 21 01:08:08 PM PDT 24 Apr 21 01:09:00 PM PDT 24 30175414639 ps
T365 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1277147244 Apr 21 01:08:46 PM PDT 24 Apr 21 01:09:36 PM PDT 24 67226888266 ps
T548 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3688429005 Apr 21 01:07:39 PM PDT 24 Apr 21 01:07:45 PM PDT 24 2231187162 ps
T549 /workspace/coverage/default/26.sysrst_ctrl_smoke.2614054479 Apr 21 01:07:31 PM PDT 24 Apr 21 01:07:33 PM PDT 24 2126733642 ps
T550 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1048004972 Apr 21 01:07:03 PM PDT 24 Apr 21 01:07:11 PM PDT 24 2964339692 ps
T261 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.666885707 Apr 21 01:08:27 PM PDT 24 Apr 21 01:09:30 PM PDT 24 91661276952 ps
T239 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3787627793 Apr 21 01:07:04 PM PDT 24 Apr 21 01:08:07 PM PDT 24 27300265517 ps
T551 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3313655876 Apr 21 01:07:25 PM PDT 24 Apr 21 01:07:30 PM PDT 24 2618983115 ps
T552 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.151847639 Apr 21 01:07:54 PM PDT 24 Apr 21 01:07:58 PM PDT 24 2714402809 ps
T553 /workspace/coverage/default/36.sysrst_ctrl_stress_all.1076429973 Apr 21 01:08:08 PM PDT 24 Apr 21 01:08:36 PM PDT 24 11449771711 ps
T554 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.1364154851 Apr 21 01:07:11 PM PDT 24 Apr 21 01:07:13 PM PDT 24 2695893935 ps
T369 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1761479952 Apr 21 01:08:53 PM PDT 24 Apr 21 01:09:50 PM PDT 24 93917950333 ps
T555 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.78276462 Apr 21 01:08:46 PM PDT 24 Apr 21 01:09:54 PM PDT 24 49468604870 ps
T556 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.450492456 Apr 21 01:06:41 PM PDT 24 Apr 21 01:06:44 PM PDT 24 3487690288 ps
T557 /workspace/coverage/default/11.sysrst_ctrl_smoke.2535574307 Apr 21 01:06:54 PM PDT 24 Apr 21 01:07:01 PM PDT 24 2112457260 ps
T558 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.844977278 Apr 21 01:07:16 PM PDT 24 Apr 21 01:30:53 PM PDT 24 546905959153 ps
T559 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1401674463 Apr 21 01:08:08 PM PDT 24 Apr 21 01:08:17 PM PDT 24 3573828428 ps
T560 /workspace/coverage/default/31.sysrst_ctrl_smoke.1272780677 Apr 21 01:07:49 PM PDT 24 Apr 21 01:07:52 PM PDT 24 2126702764 ps
T561 /workspace/coverage/default/40.sysrst_ctrl_alert_test.724147784 Apr 21 01:08:15 PM PDT 24 Apr 21 01:08:18 PM PDT 24 2020649442 ps
T562 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.878312622 Apr 21 01:08:30 PM PDT 24 Apr 21 01:08:32 PM PDT 24 2181057970 ps
T563 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.4144574438 Apr 21 01:07:59 PM PDT 24 Apr 21 01:08:01 PM PDT 24 3433122378 ps
T564 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3284733883 Apr 21 01:07:06 PM PDT 24 Apr 21 01:07:15 PM PDT 24 3198568004 ps
T565 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.380215127 Apr 21 01:08:34 PM PDT 24 Apr 21 01:08:46 PM PDT 24 51913054367 ps
T240 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.2995870955 Apr 21 01:08:27 PM PDT 24 Apr 21 01:08:31 PM PDT 24 4494323324 ps
T566 /workspace/coverage/default/29.sysrst_ctrl_smoke.2484181472 Apr 21 01:07:40 PM PDT 24 Apr 21 01:07:41 PM PDT 24 2148542053 ps
T567 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.1875739656 Apr 21 01:08:08 PM PDT 24 Apr 21 01:08:10 PM PDT 24 3444649207 ps
T568 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2589471409 Apr 21 01:08:25 PM PDT 24 Apr 21 01:08:35 PM PDT 24 3333537457 ps
T569 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.390961000 Apr 21 01:06:51 PM PDT 24 Apr 21 01:06:59 PM PDT 24 38806778575 ps
T376 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3278530133 Apr 21 01:08:53 PM PDT 24 Apr 21 01:09:29 PM PDT 24 53488413829 ps
T570 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.648039154 Apr 21 01:07:18 PM PDT 24 Apr 21 01:17:42 PM PDT 24 284472754208 ps
T571 /workspace/coverage/default/21.sysrst_ctrl_smoke.3187556757 Apr 21 01:07:22 PM PDT 24 Apr 21 01:07:28 PM PDT 24 2112747793 ps
T572 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1749536459 Apr 21 01:07:56 PM PDT 24 Apr 21 01:08:04 PM PDT 24 35590365247 ps
T358 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.690872353 Apr 21 01:08:48 PM PDT 24 Apr 21 01:10:27 PM PDT 24 53839110903 ps
T573 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1192860978 Apr 21 01:08:37 PM PDT 24 Apr 21 01:08:43 PM PDT 24 3474863076 ps
T391 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3028443793 Apr 21 01:07:25 PM PDT 24 Apr 21 01:09:26 PM PDT 24 42983415723 ps
T367 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2886593480 Apr 21 01:08:28 PM PDT 24 Apr 21 01:09:42 PM PDT 24 107033020816 ps
T574 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1332032384 Apr 21 01:07:45 PM PDT 24 Apr 21 01:07:49 PM PDT 24 2519095983 ps
T575 /workspace/coverage/default/10.sysrst_ctrl_smoke.3800408403 Apr 21 01:06:54 PM PDT 24 Apr 21 01:06:56 PM PDT 24 2133509689 ps
T197 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.1943461176 Apr 21 01:06:51 PM PDT 24 Apr 21 01:06:52 PM PDT 24 2862462660 ps
T576 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.374644169 Apr 21 01:06:33 PM PDT 24 Apr 21 01:06:39 PM PDT 24 2245589200 ps
T577 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3351941812 Apr 21 01:06:47 PM PDT 24 Apr 21 01:06:50 PM PDT 24 3241343817 ps
T89 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3204324192 Apr 21 01:08:47 PM PDT 24 Apr 21 01:09:09 PM PDT 24 63051242206 ps
T578 /workspace/coverage/default/45.sysrst_ctrl_smoke.3877056118 Apr 21 01:08:26 PM PDT 24 Apr 21 01:08:29 PM PDT 24 2128164219 ps
T579 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.4173843727 Apr 21 01:07:17 PM PDT 24 Apr 21 01:07:24 PM PDT 24 2515528326 ps
T580 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2112599290 Apr 21 01:08:53 PM PDT 24 Apr 21 01:10:43 PM PDT 24 78130143914 ps
T581 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2792585287 Apr 21 01:08:33 PM PDT 24 Apr 21 01:08:36 PM PDT 24 3185852891 ps
T582 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.433475918 Apr 21 01:06:42 PM PDT 24 Apr 21 01:06:49 PM PDT 24 2066884061 ps
T583 /workspace/coverage/default/35.sysrst_ctrl_stress_all.2144344557 Apr 21 01:08:02 PM PDT 24 Apr 21 01:08:40 PM PDT 24 13506583228 ps
T584 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2526204112 Apr 21 01:08:32 PM PDT 24 Apr 21 01:08:42 PM PDT 24 3733309543 ps
T585 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1652280536 Apr 21 01:07:45 PM PDT 24 Apr 21 01:07:48 PM PDT 24 2633456789 ps
T586 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4145466215 Apr 21 01:06:46 PM PDT 24 Apr 21 01:17:16 PM PDT 24 2241244448197 ps
T587 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1579952212 Apr 21 01:06:50 PM PDT 24 Apr 21 01:06:54 PM PDT 24 2048891136 ps
T588 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3618728052 Apr 21 01:06:55 PM PDT 24 Apr 21 01:06:58 PM PDT 24 2735898696 ps
T388 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2722779649 Apr 21 01:08:54 PM PDT 24 Apr 21 01:10:54 PM PDT 24 45804993526 ps
T589 /workspace/coverage/default/28.sysrst_ctrl_smoke.2119262589 Apr 21 01:07:35 PM PDT 24 Apr 21 01:07:38 PM PDT 24 2123201081 ps
T214 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3471208181 Apr 21 01:08:24 PM PDT 24 Apr 21 01:08:29 PM PDT 24 5086955511 ps
T218 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3344948467 Apr 21 01:06:43 PM PDT 24 Apr 21 01:06:46 PM PDT 24 2282482782 ps
T219 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.651830395 Apr 21 01:07:09 PM PDT 24 Apr 21 01:07:55 PM PDT 24 41847648576 ps
T220 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1271261242 Apr 21 01:06:38 PM PDT 24 Apr 21 01:07:45 PM PDT 24 258390442828 ps
T221 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1995580013 Apr 21 01:06:52 PM PDT 24 Apr 21 01:06:55 PM PDT 24 2471135761 ps
T222 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2367041601 Apr 21 01:07:12 PM PDT 24 Apr 21 01:07:15 PM PDT 24 6016242878 ps
T223 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3928611722 Apr 21 01:07:58 PM PDT 24 Apr 21 01:08:11 PM PDT 24 23605305761 ps
T224 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2391165866 Apr 21 01:08:11 PM PDT 24 Apr 21 01:09:17 PM PDT 24 95720488283 ps
T225 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3880277617 Apr 21 01:08:28 PM PDT 24 Apr 21 01:08:36 PM PDT 24 2458052589 ps
T226 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.2964751763 Apr 21 01:07:58 PM PDT 24 Apr 21 01:08:41 PM PDT 24 99173007729 ps
T590 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.590957031 Apr 21 01:07:14 PM PDT 24 Apr 21 01:07:20 PM PDT 24 2017019680 ps
T591 /workspace/coverage/default/37.sysrst_ctrl_alert_test.2185217669 Apr 21 01:08:12 PM PDT 24 Apr 21 01:08:14 PM PDT 24 2040054104 ps
T332 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1100348039 Apr 21 01:08:34 PM PDT 24 Apr 21 01:09:39 PM PDT 24 27088299456 ps
T592 /workspace/coverage/default/28.sysrst_ctrl_alert_test.1041615977 Apr 21 01:07:42 PM PDT 24 Apr 21 01:07:48 PM PDT 24 2010216507 ps
T593 /workspace/coverage/default/12.sysrst_ctrl_stress_all.888345499 Apr 21 01:06:57 PM PDT 24 Apr 21 01:06:59 PM PDT 24 7464831501 ps
T594 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.33673443 Apr 21 01:07:40 PM PDT 24 Apr 21 01:08:31 PM PDT 24 86496252877 ps
T595 /workspace/coverage/default/16.sysrst_ctrl_smoke.342814912 Apr 21 01:07:08 PM PDT 24 Apr 21 01:07:10 PM PDT 24 2132823153 ps
T142 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3447233738 Apr 21 01:06:43 PM PDT 24 Apr 21 01:10:13 PM PDT 24 646453857110 ps
T596 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3536983769 Apr 21 01:08:33 PM PDT 24 Apr 21 01:08:36 PM PDT 24 2550688045 ps
T597 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2643392496 Apr 21 01:07:37 PM PDT 24 Apr 21 01:07:40 PM PDT 24 2636901963 ps
T598 /workspace/coverage/default/19.sysrst_ctrl_stress_all.87469757 Apr 21 01:07:15 PM PDT 24 Apr 21 01:07:25 PM PDT 24 17113257670 ps
T599 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3032012696 Apr 21 01:07:04 PM PDT 24 Apr 21 01:07:06 PM PDT 24 2520896634 ps
T600 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.280959752 Apr 21 01:07:46 PM PDT 24 Apr 21 01:07:54 PM PDT 24 2615002231 ps
T601 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1852861171 Apr 21 01:06:59 PM PDT 24 Apr 21 01:07:02 PM PDT 24 2527694284 ps
T602 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3034663565 Apr 21 01:08:08 PM PDT 24 Apr 21 01:08:11 PM PDT 24 2539251636 ps
T603 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.1132603807 Apr 21 01:07:58 PM PDT 24 Apr 21 01:08:10 PM PDT 24 3872070396 ps
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