Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.29	99.38	96.41	100.00	97.44	98.85	99.61	89.33

Total tests in report: 914

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
56.12	56.12	73.63	73.63	62.31	62.31	91.55	91.55	8.97	8.97	76.82	76.82	57.03	57.03	22.51	22.51	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1682608715
75.77	19.65	88.41	14.78	79.80	17.49	95.43	3.88	51.28	42.31	89.32	12.50	80.35	23.31	45.79	23.28	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3887384656
82.55	6.78	95.22	6.81	88.90	9.10	97.49	2.05	61.54	10.26	94.79	5.47	89.11	8.77	50.82	5.03	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2876554305
87.23	4.68	96.73	1.51	90.47	1.57	97.49	0.00	74.36	12.82	96.12	1.33	92.77	3.66	62.67	11.85	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.841202943
90.27	3.04	98.19	1.46	92.26	1.79	97.49	0.00	90.38	16.03	97.52	1.40	93.35	0.58	62.67	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1659694638
91.49	1.22	98.26	0.07	93.48	1.21	98.17	0.68	90.38	0.00	97.63	0.11	93.35	0.00	69.13	6.46	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2335420015
92.71	1.22	98.53	0.26	93.91	0.43	98.17	0.00	91.67	1.28	98.08	0.44	95.38	2.02	73.23	4.10	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3801993041
93.54	0.83	98.62	0.09	94.16	0.25	98.17	0.00	91.67	0.00	98.11	0.04	95.47	0.10	78.56	5.33	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1745650741
94.02	0.48	98.68	0.06	94.24	0.08	98.17	0.00	91.67	0.00	98.11	0.00	97.01	1.54	80.26	1.69	/workspace/coverage/default/8.sysrst_ctrl_stress_all.1658761526
94.38	0.36	98.79	0.11	94.31	0.08	98.17	0.00	93.59	1.92	98.23	0.11	97.30	0.29	80.26	0.00	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2392163902
94.68	0.31	98.82	0.04	94.31	0.00	98.17	0.00	93.59	0.00	98.23	0.00	97.30	0.00	82.36	2.10	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2967186513
94.97	0.29	98.82	0.00	94.34	0.03	99.77	1.60	93.59	0.00	98.23	0.00	97.40	0.10	82.67	0.31	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3416266463
95.21	0.24	98.90	0.07	94.39	0.05	99.77	0.00	94.87	1.28	98.30	0.07	97.59	0.19	82.67	0.00	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.3637831394
95.42	0.21	98.94	0.04	94.41	0.03	99.77	0.00	95.51	0.64	98.34	0.04	98.27	0.67	82.72	0.05	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1279908568
95.57	0.15	98.94	0.00	94.51	0.10	99.77	0.00	95.51	0.00	98.34	0.00	99.04	0.77	82.87	0.15	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3733374674
95.71	0.14	98.94	0.00	94.54	0.03	99.77	0.00	95.51	0.00	98.34	0.00	99.13	0.10	83.74	0.87	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2569940857
95.85	0.14	98.97	0.04	94.57	0.03	99.77	0.00	96.15	0.64	98.37	0.04	99.23	0.10	83.90	0.15	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.2330632598
95.98	0.13	99.01	0.04	94.57	0.00	99.77	0.00	96.15	0.00	98.37	0.00	99.23	0.00	84.77	0.87	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3053797169
96.10	0.12	99.01	0.00	95.32	0.76	99.77	0.00	96.15	0.00	98.37	0.00	99.23	0.00	84.87	0.10	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.4186084309
96.22	0.12	99.05	0.04	95.35	0.03	99.77	0.00	96.79	0.64	98.41	0.04	99.33	0.10	84.87	0.00	/workspace/coverage/default/1.sysrst_ctrl_stress_all.2210700699
96.34	0.12	99.09	0.04	95.37	0.03	99.77	0.00	97.44	0.64	98.45	0.04	99.42	0.10	84.87	0.00	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3471208181
96.44	0.10	99.09	0.00	95.37	0.00	99.77	0.00	97.44	0.00	98.45	0.00	99.42	0.00	85.54	0.67	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1257409060
96.52	0.08	99.10	0.02	95.42	0.05	99.77	0.00	97.44	0.00	98.45	0.00	99.42	0.00	86.00	0.46	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1403173894
96.58	0.06	99.10	0.00	95.73	0.30	99.77	0.00	97.44	0.00	98.45	0.00	99.52	0.10	86.05	0.05	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1654716209
96.64	0.06	99.16	0.06	95.80	0.08	100.00	0.23	97.44	0.00	98.48	0.04	99.52	0.00	86.05	0.00	/workspace/coverage/default/27.sysrst_ctrl_alert_test.879321600
96.69	0.05	99.16	0.00	95.80	0.00	100.00	0.00	97.44	0.00	98.48	0.00	99.52	0.00	86.41	0.36	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1761479952
96.73	0.04	99.20	0.04	95.96	0.15	100.00	0.00	97.44	0.00	98.56	0.07	99.52	0.00	86.46	0.05	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2806353314
96.78	0.04	99.22	0.02	95.96	0.00	100.00	0.00	97.44	0.00	98.60	0.04	99.52	0.00	86.72	0.26	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2203524224
96.82	0.04	99.22	0.00	95.98	0.03	100.00	0.00	97.44	0.00	98.60	0.00	99.61	0.10	86.87	0.15	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1205787563
96.85	0.04	99.25	0.04	96.01	0.03	100.00	0.00	97.44	0.00	98.60	0.00	99.61	0.00	87.08	0.21	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1910655035
96.89	0.04	99.25	0.00	96.26	0.25	100.00	0.00	97.44	0.00	98.60	0.00	99.61	0.00	87.08	0.00	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.4022333080
96.92	0.03	99.25	0.00	96.28	0.03	100.00	0.00	97.44	0.00	98.60	0.00	99.61	0.00	87.28	0.21	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2916813554
96.95	0.03	99.25	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.60	0.00	99.61	0.00	87.49	0.21	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2518409632
96.98	0.03	99.25	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.60	0.00	99.61	0.00	87.69	0.21	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.2707773376
97.01	0.02	99.31	0.06	96.28	0.00	100.00	0.00	97.44	0.00	98.71	0.11	99.61	0.00	87.69	0.00	/workspace/coverage/default/4.sysrst_ctrl_stress_all.2625901441
97.03	0.02	99.31	0.00	96.28	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.85	0.15	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2351725089
97.05	0.02	99.31	0.00	96.31	0.03	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.95	0.10	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1159115316
97.06	0.02	99.33	0.02	96.31	0.00	100.00	0.00	97.44	0.00	98.74	0.04	99.61	0.00	88.00	0.05	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1934189013
97.08	0.01	99.33	0.00	96.31	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	88.10	0.10	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3919097227
97.09	0.01	99.33	0.00	96.31	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	88.21	0.10	/workspace/coverage/default/13.sysrst_ctrl_stress_all.3694485397
97.11	0.01	99.33	0.00	96.31	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	88.31	0.10	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1127642421
97.12	0.01	99.33	0.00	96.31	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	88.41	0.10	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.645628286
97.13	0.01	99.33	0.00	96.31	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	88.51	0.10	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3732510870
97.15	0.01	99.33	0.00	96.31	0.00	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	88.62	0.10	/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2886593480
97.16	0.01	99.33	0.00	96.39	0.08	100.00	0.00	97.44	0.00	98.74	0.00	99.61	0.00	88.62	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1753689811
97.17	0.01	99.35	0.02	96.39	0.00	100.00	0.00	97.44	0.00	98.78	0.04	99.61	0.00	88.62	0.00	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4263567175
97.18	0.01	99.37	0.02	96.39	0.00	100.00	0.00	97.44	0.00	98.82	0.04	99.61	0.00	88.62	0.00	/workspace/coverage/default/47.sysrst_ctrl_stress_all.2669759294
97.18	0.01	99.38	0.02	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.04	99.61	0.00	88.62	0.00	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3628045284
97.19	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	88.67	0.05	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2573325220
97.20	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	88.72	0.05	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3355459541
97.21	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	88.77	0.05	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1806474160
97.21	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	88.82	0.05	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1527135673
97.22	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	88.87	0.05	/workspace/coverage/default/10.sysrst_ctrl_stress_all.4158290778
97.23	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	88.92	0.05	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1603775197
97.24	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	88.97	0.05	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1250146245
97.24	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	89.03	0.05	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1910771396
97.25	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	89.08	0.05	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2091763382
97.26	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	89.13	0.05	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3649692492
97.26	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	89.18	0.05	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4254872084
97.27	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	89.23	0.05	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.4061195738
97.28	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	89.28	0.05	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2722779649
97.29	0.01	99.38	0.00	96.39	0.00	100.00	0.00	97.44	0.00	98.85	0.00	99.61	0.00	89.33	0.05	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3392305944

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2152719034
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1532130151
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3762752430
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2083790185
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3570591766
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.770832601
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2364589170
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3959140941
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.4005348330
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3654516545
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.4168654387
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2484809481
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.410531216
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3863600315
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.458137419
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3281305476
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.458671092
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3106083693
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.4099319696
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3322155284
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.498495869
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.79752114
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1220271040
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.897303855
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3121661970
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1495752084
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1427933120
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2755395429
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.338664273
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3486330910
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.74109540
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.94456966
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.233550396
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1196903777
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1296218558
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.135190323
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.156824693
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2693092512
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.83941000
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.958699231
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1611926988
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2845621191
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3251130377
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.9598106
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2613240865
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2539936793
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2370092628
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.4100559487
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2187023981
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.803841828
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3456145631
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2308074110
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.3254604602
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.3379330964
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.4268195065
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.4228554561
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2561386307
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.333663537
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2115105576
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.921460672
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3501669509
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.1212365971
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2943316983
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/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.593238895
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2501966144
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.433475918
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.2253256005
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3165334115
/workspace/coverage/default/4.sysrst_ctrl_smoke.1396385481
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3828876064
/workspace/coverage/default/40.sysrst_ctrl_alert_test.724147784
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.852630040
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.4098244150
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2391165866
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3860458016
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3463237627
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1064976571
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2392699695
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2290239073
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1052979044
/workspace/coverage/default/40.sysrst_ctrl_smoke.3537671361
/workspace/coverage/default/40.sysrst_ctrl_stress_all.758881275
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3818095258
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2705499416
/workspace/coverage/default/41.sysrst_ctrl_alert_test.3874414667
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.274890325
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.473884795
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.899694196
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4163785914
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.4178441130
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.530148807
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3433872274
/workspace/coverage/default/41.sysrst_ctrl_smoke.2350668924
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1199241630
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3190262254
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.307217951
/workspace/coverage/default/42.sysrst_ctrl_alert_test.316401206
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.150159568
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3609605014
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1990360410
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.981585370
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.4037232340
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4205346396
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3575357733
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3743715917
/workspace/coverage/default/42.sysrst_ctrl_smoke.606776360
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2056374711
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1417841193
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3938204385
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2589471409
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2065547285
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2995870955
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2448127222
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2766728937
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2335234729
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2343674388
/workspace/coverage/default/43.sysrst_ctrl_smoke.193527722
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3757816078
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.29033029
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2298896641
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3000269873
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3028707393
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.666885707
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.336636126
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1540201503
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3396855386
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3993405876
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.119367879
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1200577193
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.213239398
/workspace/coverage/default/44.sysrst_ctrl_smoke.2746145659
/workspace/coverage/default/44.sysrst_ctrl_stress_all.509086764
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.860858349
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2149417941
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1200710508
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2792585287
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3530798020
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2647942365
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3611056140
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1464053466
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1329047123
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3116247492
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1160534074
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3536983769
/workspace/coverage/default/45.sysrst_ctrl_smoke.3877056118
/workspace/coverage/default/45.sysrst_ctrl_stress_all.95729194
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1319766568
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.103990856
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2469014847
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.558419781
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.4231559579
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.489373616
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2007704316
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2388070397
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1403398317
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3880277617
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3182415788
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1436203306
/workspace/coverage/default/46.sysrst_ctrl_smoke.3422434048
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1360968615
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2809909564
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.841074989
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3076887008
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2526204112
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1877705478
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.380215127
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1855322323
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2841183390
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2476883776
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.878312622
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4071565423
/workspace/coverage/default/47.sysrst_ctrl_smoke.4081895520
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1100348039
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1708843477
/workspace/coverage/default/48.sysrst_ctrl_alert_test.914633555
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.726063688
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1257267370
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1199511753
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2004956722
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1532254440
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2333405012
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3499088840
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3337249603
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1646871446
/workspace/coverage/default/48.sysrst_ctrl_smoke.2263216379
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1545382131
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.435975485
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3337485483
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1045733195
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1192860978
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2753147347
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1577112385
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.459540202
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4033457333
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2067946962
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3882103477
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3175690451
/workspace/coverage/default/49.sysrst_ctrl_smoke.2099059719
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1484677955
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1579206564
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3684942968
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2346640629
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3897439781
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1882903598
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3815219618
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2842999354
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3525409248
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2250606751
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2995639553
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2424600599
/workspace/coverage/default/5.sysrst_ctrl_smoke.4086990962
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2297357932
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4145466215
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3447233738
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1277147244
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2896091887
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1250505516
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.4009977436
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.400617579
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1414388069
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.690872353
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2581935772
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1751206301
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1431699698
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1059913619
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3977471454
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3984202438
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2244943993
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2232404185
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2195032232
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2035031822
/workspace/coverage/default/6.sysrst_ctrl_smoke.2130210862
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2754946914
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.367226814
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1841579614
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.78276462
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3204324192
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3926757749
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1250415710
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.497030840
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.733122446
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1569492477
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3236702150
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2741362919
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1811209463
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.390961000
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3351941812
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1737477994
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1704808396
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1115286969
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1442313898
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3882607455
/workspace/coverage/default/7.sysrst_ctrl_smoke.149046216
/workspace/coverage/default/7.sysrst_ctrl_stress_all.733273305
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1314837639
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2643122410
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.4003433937
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.837439232
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2383198077
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2733328451
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.928792316
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.887660447
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2656973225
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2692377093
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1102166357
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2033331029
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1943461176
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1939290950
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2937402768
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1579952212
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3532649792
/workspace/coverage/default/8.sysrst_ctrl_smoke.1741826119
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.103730585
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1210224502
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.477980391
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2575015645
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2112599290
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1173497001
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2796581790
/workspace/coverage/default/9.sysrst_ctrl_alert_test.131995443
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.1127788926
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1231921279
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2218267447
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1802312462
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3694378306
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1241164714
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3833842539
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2964470154
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1003697540
/workspace/coverage/default/9.sysrst_ctrl_smoke.24695820
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2044785152
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1325241592
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3800206746
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.696934882
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3801023725
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3278530133
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2687883451
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2932900253
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1886885366

Total test records in report: 914

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T5	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.3925997068	Apr 21 01:07:07 PM PDT 24	Apr 21 01:08:31 PM PDT 24	137728398738 ps
T1	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1682608715	Apr 21 01:06:52 PM PDT 24	Apr 21 01:08:31 PM PDT 24	37643947778 ps
T2	/workspace/coverage/default/49.sysrst_ctrl_edge_detect.459540202	Apr 21 01:08:39 PM PDT 24	Apr 21 01:08:46 PM PDT 24	4642466512 ps
T12	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2643122410	Apr 21 01:08:53 PM PDT 24	Apr 21 01:10:07 PM PDT 24	26080609016 ps
T13	/workspace/coverage/default/49.sysrst_ctrl_alert_test.1045733195	Apr 21 01:08:47 PM PDT 24	Apr 21 01:08:49 PM PDT 24	2044900957 ps
T14	/workspace/coverage/default/32.sysrst_ctrl_alert_test.436614386	Apr 21 01:07:52 PM PDT 24	Apr 21 01:07:58 PM PDT 24	2014357086 ps
T3	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2876554305	Apr 21 01:08:51 PM PDT 24	Apr 21 01:11:05 PM PDT 24	167346234143 ps
T6	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.4227018968	Apr 21 01:08:01 PM PDT 24	Apr 21 01:08:05 PM PDT 24	2488230286 ps
T15	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3378994336	Apr 21 01:06:43 PM PDT 24	Apr 21 01:06:47 PM PDT 24	3519496507 ps
T16	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1385553349	Apr 21 01:08:25 PM PDT 24	Apr 21 01:08:34 PM PDT 24	3083389920 ps
T17	/workspace/coverage/default/27.sysrst_ctrl_alert_test.879321600	Apr 21 01:07:35 PM PDT 24	Apr 21 01:07:37 PM PDT 24	2070436870 ps
T4	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3887384656	Apr 21 01:06:45 PM PDT 24	Apr 21 01:08:21 PM PDT 24	1572502216274 ps
T49	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.3378098750	Apr 21 01:07:05 PM PDT 24	Apr 21 01:07:09 PM PDT 24	2093726719 ps
T50	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4086928304	Apr 21 01:08:01 PM PDT 24	Apr 21 01:08:05 PM PDT 24	4058790722 ps
T7	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1403173894	Apr 21 01:07:26 PM PDT 24	Apr 21 01:08:09 PM PDT 24	67565762116 ps
T51	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1540201503	Apr 21 01:08:28 PM PDT 24	Apr 21 01:08:30 PM PDT 24	3439198113 ps
T8	/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.103730585	Apr 21 01:06:54 PM PDT 24	Apr 21 01:06:56 PM PDT 24	4734009026 ps
T52	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2195032232	Apr 21 01:06:46 PM PDT 24	Apr 21 01:06:49 PM PDT 24	2262326402 ps
T22	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3804891805	Apr 21 01:07:01 PM PDT 24	Apr 21 01:07:03 PM PDT 24	2590697759 ps
T53	/workspace/coverage/default/20.sysrst_ctrl_smoke.673865596	Apr 21 01:07:18 PM PDT 24	Apr 21 01:07:25 PM PDT 24	2111983821 ps
T54	/workspace/coverage/default/34.sysrst_ctrl_smoke.2545119692	Apr 21 01:07:54 PM PDT 24	Apr 21 01:07:55 PM PDT 24	2211960611 ps
T59	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.2431106706	Apr 21 01:07:34 PM PDT 24	Apr 21 01:07:39 PM PDT 24	5283327995 ps
T123	/workspace/coverage/default/38.sysrst_ctrl_smoke.2971851750	Apr 21 01:08:06 PM PDT 24	Apr 21 01:08:08 PM PDT 24	2123812511 ps
T330	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.653123307	Apr 21 01:06:38 PM PDT 24	Apr 21 01:06:40 PM PDT 24	2825863403 ps
T69	/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2655324273	Apr 21 01:07:41 PM PDT 24	Apr 21 01:07:45 PM PDT 24	2523218323 ps
T288	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.3416266463	Apr 21 01:06:33 PM PDT 24	Apr 21 01:06:38 PM PDT 24	22353607999 ps
T70	/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3165913257	Apr 21 01:07:11 PM PDT 24	Apr 21 01:07:15 PM PDT 24	2615714770 ps
T38	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1910655035	Apr 21 01:08:48 PM PDT 24	Apr 21 01:11:03 PM PDT 24	104126226337 ps
T21	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1493385511	Apr 21 01:07:19 PM PDT 24	Apr 21 01:07:26 PM PDT 24	2470416040 ps
T40	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.2052709792	Apr 21 01:07:27 PM PDT 24	Apr 21 01:12:42 PM PDT 24	123073250815 ps
T111	/workspace/coverage/default/17.sysrst_ctrl_alert_test.3216715621	Apr 21 01:07:13 PM PDT 24	Apr 21 01:07:16 PM PDT 24	2027126234 ps
T63	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1661424637	Apr 21 01:06:58 PM PDT 24	Apr 21 01:07:05 PM PDT 24	2467314837 ps
T28	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2705499416	Apr 21 01:08:12 PM PDT 24	Apr 21 01:08:22 PM PDT 24	14258758507 ps
T112	/workspace/coverage/default/18.sysrst_ctrl_pin_access_test.750490397	Apr 21 01:07:15 PM PDT 24	Apr 21 01:07:17 PM PDT 24	2063275135 ps
T71	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2228504506	Apr 21 01:07:28 PM PDT 24	Apr 21 01:07:30 PM PDT 24	2633967999 ps
T64	/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1231800727	Apr 21 01:08:00 PM PDT 24	Apr 21 01:08:04 PM PDT 24	2465338223 ps
T113	/workspace/coverage/default/11.sysrst_ctrl_alert_test.3386027698	Apr 21 01:06:55 PM PDT 24	Apr 21 01:07:01 PM PDT 24	2013196900 ps
T72	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4163785914	Apr 21 01:08:23 PM PDT 24	Apr 21 01:08:28 PM PDT 24	2617991551 ps
T9	/workspace/coverage/default/25.sysrst_ctrl_stress_all.3943794042	Apr 21 01:07:34 PM PDT 24	Apr 21 01:07:38 PM PDT 24	14967848536 ps
T73	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3402267477	Apr 21 01:06:37 PM PDT 24	Apr 21 01:06:39 PM PDT 24	2544206393 ps
T37	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.400617579	Apr 21 01:08:48 PM PDT 24	Apr 21 01:11:25 PM PDT 24	63671025605 ps
T235	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3575357733	Apr 21 01:08:26 PM PDT 24	Apr 21 01:08:29 PM PDT 24	2153766380 ps
T65	/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2627258202	Apr 21 01:07:29 PM PDT 24	Apr 21 01:07:37 PM PDT 24	2480046766 ps
T41	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1250505516	Apr 21 01:08:49 PM PDT 24	Apr 21 01:09:14 PM PDT 24	24092857707 ps
T236	/workspace/coverage/default/30.sysrst_ctrl_smoke.2060488310	Apr 21 01:07:45 PM PDT 24	Apr 21 01:07:51 PM PDT 24	2109855307 ps
T23	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.4190105812	Apr 21 01:07:16 PM PDT 24	Apr 21 01:07:26 PM PDT 24	3397039218 ps
T74	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3094243280	Apr 21 01:07:42 PM PDT 24	Apr 21 01:07:44 PM PDT 24	2529776596 ps
T10	/workspace/coverage/default/8.sysrst_ctrl_stress_all.1658761526	Apr 21 01:06:57 PM PDT 24	Apr 21 01:07:15 PM PDT 24	68105071473 ps
T323	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2424600599	Apr 21 01:06:41 PM PDT 24	Apr 21 01:06:43 PM PDT 24	2556985746 ps
T66	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.221672034	Apr 21 01:06:59 PM PDT 24	Apr 21 01:07:01 PM PDT 24	2487030847 ps
T324	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1159463621	Apr 21 01:07:02 PM PDT 24	Apr 21 01:07:04 PM PDT 24	2235335064 ps
T325	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.425542386	Apr 21 01:07:22 PM PDT 24	Apr 21 01:07:24 PM PDT 24	2526379073 ps
T327	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3182415788	Apr 21 01:08:34 PM PDT 24	Apr 21 01:08:36 PM PDT 24	2077436545 ps
T67	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.435975485	Apr 21 01:08:38 PM PDT 24	Apr 21 01:09:33 PM PDT 24	21039154413 ps
T328	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3993405876	Apr 21 01:08:34 PM PDT 24	Apr 21 01:08:42 PM PDT 24	2611265796 ps
T98	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.1787872530	Apr 21 01:06:37 PM PDT 24	Apr 21 01:06:38 PM PDT 24	2253772264 ps
T329	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3860458016	Apr 21 01:08:25 PM PDT 24	Apr 21 01:08:28 PM PDT 24	2700520526 ps
T42	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2796581790	Apr 21 01:08:50 PM PDT 24	Apr 21 01:12:22 PM PDT 24	80579545066 ps
T11	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.841202943	Apr 21 01:08:23 PM PDT 24	Apr 21 01:09:20 PM PDT 24	121052285987 ps
T55	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1368580595	Apr 21 01:07:07 PM PDT 24	Apr 21 01:07:15 PM PDT 24	6446541367 ps
T56	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1654716209	Apr 21 01:06:37 PM PDT 24	Apr 21 01:06:48 PM PDT 24	191482097720 ps
T68	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3394013907	Apr 21 01:07:42 PM PDT 24	Apr 21 01:07:45 PM PDT 24	2484600335 ps
T60	/workspace/coverage/default/27.sysrst_ctrl_stress_all.3978717349	Apr 21 01:07:34 PM PDT 24	Apr 21 01:07:37 PM PDT 24	17332900740 ps
T149	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.2309236702	Apr 21 01:07:43 PM PDT 24	Apr 21 01:07:46 PM PDT 24	2463194723 ps
T57	/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2028653850	Apr 21 01:06:36 PM PDT 24	Apr 21 01:06:39 PM PDT 24	8026061524 ps
T150	/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1954761171	Apr 21 01:07:26 PM PDT 24	Apr 21 01:07:34 PM PDT 24	2512629348 ps
T58	/workspace/coverage/default/41.sysrst_ctrl_combo_detect.473884795	Apr 21 01:08:28 PM PDT 24	Apr 21 01:11:23 PM PDT 24	73260106070 ps
T43	/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.1662872931	Apr 21 01:07:01 PM PDT 24	Apr 21 01:07:06 PM PDT 24	3655661593 ps
T309	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2359667722	Apr 21 01:07:53 PM PDT 24	Apr 21 01:07:54 PM PDT 24	2643417263 ps
T61	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1669174698	Apr 21 01:08:00 PM PDT 24	Apr 21 01:16:59 PM PDT 24	2587427515172 ps
T136	/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.619578364	Apr 21 01:07:47 PM PDT 24	Apr 21 01:07:48 PM PDT 24	2147352582 ps
T62	/workspace/coverage/default/16.sysrst_ctrl_stress_all.3651067161	Apr 21 01:07:11 PM PDT 24	Apr 21 01:07:19 PM PDT 24	14503311834 ps
T121	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.3924049326	Apr 21 01:07:48 PM PDT 24	Apr 21 01:09:48 PM PDT 24	87838260449 ps
T137	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.635410224	Apr 21 01:07:36 PM PDT 24	Apr 21 01:07:42 PM PDT 24	2172097429 ps
T138	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.2815421345	Apr 21 01:08:03 PM PDT 24	Apr 21 01:08:11 PM PDT 24	2511904057 ps
T77	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1748214754	Apr 21 01:06:31 PM PDT 24	Apr 21 01:06:35 PM PDT 24	6383026181 ps
T139	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1534349650	Apr 21 01:07:44 PM PDT 24	Apr 21 01:07:50 PM PDT 24	2116612682 ps
T44	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.274890325	Apr 21 01:08:26 PM PDT 24	Apr 21 01:08:29 PM PDT 24	3317019975 ps
T45	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2198138615	Apr 21 01:07:59 PM PDT 24	Apr 21 01:08:18 PM PDT 24	6668381994 ps
T39	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2383198077	Apr 21 01:08:52 PM PDT 24	Apr 21 01:09:43 PM PDT 24	44171353472 ps
T322	/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2205413143	Apr 21 01:07:55 PM PDT 24	Apr 21 01:08:02 PM PDT 24	2451915572 ps
T46	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.3186605873	Apr 21 01:07:21 PM PDT 24	Apr 21 01:07:32 PM PDT 24	3485259816 ps
T34	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1504630454	Apr 21 01:08:04 PM PDT 24	Apr 21 01:08:36 PM PDT 24	24819074500 ps
T385	/workspace/coverage/default/9.sysrst_ctrl_stress_all.2044785152	Apr 21 01:06:52 PM PDT 24	Apr 21 01:07:04 PM PDT 24	8220545200 ps
T47	/workspace/coverage/default/23.sysrst_ctrl_stress_all.1166070016	Apr 21 01:07:28 PM PDT 24	Apr 21 01:07:57 PM PDT 24	707498853910 ps
T393	/workspace/coverage/default/25.sysrst_ctrl_smoke.577477283	Apr 21 01:07:29 PM PDT 24	Apr 21 01:07:35 PM PDT 24	2111387022 ps
T394	/workspace/coverage/default/47.sysrst_ctrl_smoke.4081895520	Apr 21 01:08:31 PM PDT 24	Apr 21 01:08:37 PM PDT 24	2110548696 ps
T32	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1934189013	Apr 21 01:08:29 PM PDT 24	Apr 21 01:08:52 PM PDT 24	408557607381 ps
T75	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1559792995	Apr 21 01:06:41 PM PDT 24	Apr 21 01:06:44 PM PDT 24	2326162790 ps
T181	/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3368978035	Apr 21 01:06:33 PM PDT 24	Apr 21 01:14:36 PM PDT 24	392447142472 ps
T182	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.1218171605	Apr 21 01:07:31 PM PDT 24	Apr 21 01:07:38 PM PDT 24	2048495110 ps
T183	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3165334115	Apr 21 01:06:45 PM PDT 24	Apr 21 01:07:13 PM PDT 24	42137834135 ps
T36	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.990844529	Apr 21 01:08:24 PM PDT 24	Apr 21 01:08:29 PM PDT 24	4173278895 ps
T33	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3396855386	Apr 21 01:08:34 PM PDT 24	Apr 21 01:08:37 PM PDT 24	4812445711 ps
T78	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1801283729	Apr 21 01:07:15 PM PDT 24	Apr 21 01:07:17 PM PDT 24	6645507253 ps
T184	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1442313898	Apr 21 01:06:46 PM PDT 24	Apr 21 01:06:52 PM PDT 24	2100315615 ps
T185	/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2950103527	Apr 21 01:08:03 PM PDT 24	Apr 21 01:08:09 PM PDT 24	2080078520 ps
T35	/workspace/coverage/default/33.sysrst_ctrl_stress_all.2361894772	Apr 21 01:07:52 PM PDT 24	Apr 21 01:08:03 PM PDT 24	14068970067 ps
T146	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.2284980628	Apr 21 01:07:30 PM PDT 24	Apr 21 01:07:36 PM PDT 24	5052842215 ps
T395	/workspace/coverage/default/47.sysrst_ctrl_alert_test.3076887008	Apr 21 01:08:39 PM PDT 24	Apr 21 01:08:45 PM PDT 24	2011051702 ps
T396	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1897792928	Apr 21 01:08:01 PM PDT 24	Apr 21 01:08:05 PM PDT 24	2101494978 ps
T79	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.307217951	Apr 21 01:08:14 PM PDT 24	Apr 21 01:08:17 PM PDT 24	3885818156 ps
T29	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1250146245	Apr 21 01:08:06 PM PDT 24	Apr 21 01:11:34 PM PDT 24	82356507772 ps
T397	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1623051624	Apr 21 01:07:32 PM PDT 24	Apr 21 01:07:35 PM PDT 24	2479290786 ps
T398	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1352426723	Apr 21 01:07:50 PM PDT 24	Apr 21 01:07:52 PM PDT 24	2040532470 ps
T122	/workspace/coverage/default/41.sysrst_ctrl_stress_all.1199241630	Apr 21 01:08:24 PM PDT 24	Apr 21 01:10:44 PM PDT 24	92652860141 ps
T399	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1241164714	Apr 21 01:06:52 PM PDT 24	Apr 21 01:06:55 PM PDT 24	2621495657 ps
T252	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.584094233	Apr 21 01:06:38 PM PDT 24	Apr 21 01:06:39 PM PDT 24	2511997340 ps
T326	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1646871446	Apr 21 01:08:38 PM PDT 24	Apr 21 01:08:46 PM PDT 24	2511660848 ps
T48	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2741362919	Apr 21 01:06:50 PM PDT 24	Apr 21 01:06:53 PM PDT 24	3385057058 ps
T400	/workspace/coverage/default/46.sysrst_ctrl_smoke.3422434048	Apr 21 01:08:30 PM PDT 24	Apr 21 01:08:32 PM PDT 24	2144537401 ps
T401	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2226388213	Apr 21 01:06:55 PM PDT 24	Apr 21 01:07:03 PM PDT 24	3004105830 ps
T76	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.928792316	Apr 21 01:08:50 PM PDT 24	Apr 21 01:10:02 PM PDT 24	207606737515 ps
T124	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.3533416097	Apr 21 01:07:01 PM PDT 24	Apr 21 01:09:19 PM PDT 24	100316264913 ps
T125	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.794830498	Apr 21 01:07:02 PM PDT 24	Apr 21 01:07:05 PM PDT 24	4872674001 ps
T80	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.2924816347	Apr 21 01:08:10 PM PDT 24	Apr 21 01:09:31 PM PDT 24	119766528066 ps
T253	/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.837439232	Apr 21 01:08:52 PM PDT 24	Apr 21 01:14:34 PM PDT 24	127247602731 ps
T402	/workspace/coverage/default/24.sysrst_ctrl_smoke.3550419714	Apr 21 01:07:29 PM PDT 24	Apr 21 01:07:32 PM PDT 24	2116563132 ps
T403	/workspace/coverage/default/6.sysrst_ctrl_smoke.2130210862	Apr 21 01:06:44 PM PDT 24	Apr 21 01:06:47 PM PDT 24	2125551203 ps
T167	/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3694378306	Apr 21 01:06:53 PM PDT 24	Apr 21 01:06:56 PM PDT 24	4858831358 ps
T404	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2221175644	Apr 21 01:07:26 PM PDT 24	Apr 21 01:07:28 PM PDT 24	2055472743 ps
T405	/workspace/coverage/default/7.sysrst_ctrl_alert_test.3236702150	Apr 21 01:06:50 PM PDT 24	Apr 21 01:06:52 PM PDT 24	2027175480 ps
T97	/workspace/coverage/default/3.sysrst_ctrl_stress_all.174050112	Apr 21 01:06:43 PM PDT 24	Apr 21 01:06:53 PM PDT 24	7609982925 ps
T86	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.2330632598	Apr 21 01:07:29 PM PDT 24	Apr 21 01:07:35 PM PDT 24	3854730454 ps
T81	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.3309364800	Apr 21 01:07:40 PM PDT 24	Apr 21 01:08:06 PM PDT 24	36504766312 ps
T114	/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3116247492	Apr 21 01:08:29 PM PDT 24	Apr 21 01:08:33 PM PDT 24	2489669257 ps
T99	/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2218267447	Apr 21 01:07:00 PM PDT 24	Apr 21 01:08:16 PM PDT 24	28581821261 ps
T115	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2049883093	Apr 21 01:07:01 PM PDT 24	Apr 21 01:08:21 PM PDT 24	40519072215 ps
T116	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2901638974	Apr 21 01:07:26 PM PDT 24	Apr 21 01:10:25 PM PDT 24	72274299859 ps
T117	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.1806474160	Apr 21 01:06:35 PM PDT 24	Apr 21 01:10:21 PM PDT 24	94941007805 ps
T118	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1877705478	Apr 21 01:08:33 PM PDT 24	Apr 21 01:15:28 PM PDT 24	167316893489 ps
T119	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2660454133	Apr 21 01:07:32 PM PDT 24	Apr 21 01:07:41 PM PDT 24	2868729034 ps
T120	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.3012655558	Apr 21 01:07:31 PM PDT 24	Apr 21 01:09:43 PM PDT 24	415705441064 ps
T316	/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.3659880459	Apr 21 01:07:39 PM PDT 24	Apr 21 01:07:45 PM PDT 24	2071413633 ps
T317	/workspace/coverage/default/39.sysrst_ctrl_alert_test.2428651677	Apr 21 01:08:11 PM PDT 24	Apr 21 01:08:13 PM PDT 24	2062371249 ps
T147	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.19718309	Apr 21 01:07:13 PM PDT 24	Apr 21 01:07:53 PM PDT 24	59547824181 ps
T82	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1659694638	Apr 21 01:06:34 PM PDT 24	Apr 21 01:07:49 PM PDT 24	30826582382 ps
T318	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1832901946	Apr 21 01:07:55 PM PDT 24	Apr 21 01:07:58 PM PDT 24	2522367399 ps
T319	/workspace/coverage/default/12.sysrst_ctrl_smoke.1195503500	Apr 21 01:07:12 PM PDT 24	Apr 21 01:07:18 PM PDT 24	2110838089 ps
T148	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3318718188	Apr 21 01:08:10 PM PDT 24	Apr 21 01:08:13 PM PDT 24	3529603774 ps
T320	/workspace/coverage/default/12.sysrst_ctrl_alert_test.3959032370	Apr 21 01:06:59 PM PDT 24	Apr 21 01:07:01 PM PDT 24	2054459123 ps
T168	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.2748361270	Apr 21 01:07:17 PM PDT 24	Apr 21 01:07:20 PM PDT 24	3551597994 ps
T255	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.2364414911	Apr 21 01:07:37 PM PDT 24	Apr 21 01:10:02 PM PDT 24	54946787833 ps
T262	/workspace/coverage/default/39.sysrst_ctrl_stress_all.757798984	Apr 21 01:08:31 PM PDT 24	Apr 21 01:08:37 PM PDT 24	10486662760 ps
T263	/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.93859172	Apr 21 01:07:05 PM PDT 24	Apr 21 01:07:13 PM PDT 24	2514269096 ps
T264	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2569940857	Apr 21 01:08:24 PM PDT 24	Apr 21 01:11:55 PM PDT 24	170557109355 ps
T265	/workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2167136355	Apr 21 01:07:10 PM PDT 24	Apr 21 01:20:49 PM PDT 24	308246193926 ps
T100	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.733122446	Apr 21 01:08:48 PM PDT 24	Apr 21 01:09:52 PM PDT 24	25328663113 ps
T266	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3609605014	Apr 21 01:08:24 PM PDT 24	Apr 21 01:13:29 PM PDT 24	128260821050 ps
T101	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3852632528	Apr 21 01:07:30 PM PDT 24	Apr 21 01:08:04 PM PDT 24	53608500293 ps
T267	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2767627034	Apr 21 01:07:58 PM PDT 24	Apr 21 01:08:01 PM PDT 24	2646682286 ps
T268	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2944119177	Apr 21 01:07:38 PM PDT 24	Apr 21 01:07:41 PM PDT 24	2477352596 ps
T283	/workspace/coverage/default/7.sysrst_ctrl_smoke.149046216	Apr 21 01:06:46 PM PDT 24	Apr 21 01:06:50 PM PDT 24	2120753530 ps
T284	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.955579638	Apr 21 01:07:22 PM PDT 24	Apr 21 01:07:30 PM PDT 24	2608484664 ps
T285	/workspace/coverage/default/1.sysrst_ctrl_alert_test.3503888386	Apr 21 01:06:35 PM PDT 24	Apr 21 01:06:41 PM PDT 24	2013322986 ps
T406	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.482377293	Apr 21 01:06:39 PM PDT 24	Apr 21 01:06:41 PM PDT 24	2433915591 ps
T30	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2518409632	Apr 21 01:07:14 PM PDT 24	Apr 21 01:08:46 PM PDT 24	70906757918 ps
T228	/workspace/coverage/default/42.sysrst_ctrl_stress_all.2056374711	Apr 21 01:08:25 PM PDT 24	Apr 21 01:08:58 PM PDT 24	11313834203 ps
T229	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1504615365	Apr 21 01:06:54 PM PDT 24	Apr 21 01:06:56 PM PDT 24	2194631422 ps
T230	/workspace/coverage/default/20.sysrst_ctrl_stress_all.2801680173	Apr 21 01:07:22 PM PDT 24	Apr 21 01:16:59 PM PDT 24	209259272854 ps
T231	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2004632699	Apr 21 01:08:28 PM PDT 24	Apr 21 01:08:36 PM PDT 24	2508599703 ps
T232	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.455172444	Apr 21 01:06:32 PM PDT 24	Apr 21 01:06:42 PM PDT 24	3362885259 ps
T233	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2065547285	Apr 21 01:08:24 PM PDT 24	Apr 21 01:08:30 PM PDT 24	3453188009 ps
T178	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1855322323	Apr 21 01:08:36 PM PDT 24	Apr 21 01:08:38 PM PDT 24	3110585859 ps
T234	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1744340957	Apr 21 01:07:30 PM PDT 24	Apr 21 01:13:22 PM PDT 24	127506676727 ps
T91	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1745650741	Apr 21 01:07:52 PM PDT 24	Apr 21 01:08:45 PM PDT 24	171203314736 ps
T275	/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.3770488923	Apr 21 01:07:58 PM PDT 24	Apr 21 01:08:00 PM PDT 24	2823003589 ps
T256	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.2079989824	Apr 21 01:07:11 PM PDT 24	Apr 21 01:07:16 PM PDT 24	27723519733 ps
T276	/workspace/coverage/default/6.sysrst_ctrl_alert_test.1751206301	Apr 21 01:06:49 PM PDT 24	Apr 21 01:06:55 PM PDT 24	2014569006 ps
T277	/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.833647469	Apr 21 01:07:24 PM PDT 24	Apr 21 01:07:27 PM PDT 24	2468277205 ps
T278	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3175690451	Apr 21 01:08:40 PM PDT 24	Apr 21 01:08:41 PM PDT 24	2699503483 ps
T126	/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1841579614	Apr 21 01:06:49 PM PDT 24	Apr 21 01:07:00 PM PDT 24	10735790066 ps
T279	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1120208269	Apr 21 01:07:31 PM PDT 24	Apr 21 01:07:34 PM PDT 24	2505139185 ps
T257	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.3921151394	Apr 21 01:07:31 PM PDT 24	Apr 21 01:07:58 PM PDT 24	38666036068 ps
T254	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.1181174905	Apr 21 01:07:10 PM PDT 24	Apr 21 01:09:45 PM PDT 24	63239556873 ps
T407	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.1445595344	Apr 21 01:07:25 PM PDT 24	Apr 21 01:07:28 PM PDT 24	3361449553 ps
T408	/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.852630040	Apr 21 01:08:36 PM PDT 24	Apr 21 01:08:46 PM PDT 24	3400877706 ps
T351	/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3530798020	Apr 21 01:08:33 PM PDT 24	Apr 21 01:09:32 PM PDT 24	107422115167 ps
T213	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1464053466	Apr 21 01:08:28 PM PDT 24	Apr 21 01:08:37 PM PDT 24	3114322802 ps
T409	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3946022465	Apr 21 01:07:09 PM PDT 24	Apr 21 01:07:19 PM PDT 24	4964787716 ps
T410	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2995639553	Apr 21 01:06:43 PM PDT 24	Apr 21 01:06:45 PM PDT 24	2122672105 ps
T411	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3499088840	Apr 21 01:08:33 PM PDT 24	Apr 21 01:08:41 PM PDT 24	2466152470 ps
T412	/workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1814387848	Apr 21 01:07:22 PM PDT 24	Apr 21 01:07:24 PM PDT 24	3268586014 ps
T269	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2967186513	Apr 21 01:08:57 PM PDT 24	Apr 21 01:15:07 PM PDT 24	143142870054 ps
T413	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4033457333	Apr 21 01:08:40 PM PDT 24	Apr 21 01:08:44 PM PDT 24	2614210401 ps
T102	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1210224502	Apr 21 01:08:48 PM PDT 24	Apr 21 01:09:56 PM PDT 24	24332009390 ps
T179	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.440535397	Apr 21 01:07:45 PM PDT 24	Apr 21 01:07:47 PM PDT 24	4514517322 ps
T414	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2232404185	Apr 21 01:06:48 PM PDT 24	Apr 21 01:06:53 PM PDT 24	2464526897 ps
T415	/workspace/coverage/default/41.sysrst_ctrl_alert_test.3874414667	Apr 21 01:08:23 PM PDT 24	Apr 21 01:08:26 PM PDT 24	2036613527 ps
T31	/workspace/coverage/default/28.sysrst_ctrl_edge_detect.2419697714	Apr 21 01:07:37 PM PDT 24	Apr 21 01:07:41 PM PDT 24	3707039161 ps
T199	/workspace/coverage/default/47.sysrst_ctrl_stress_all.2669759294	Apr 21 01:08:36 PM PDT 24	Apr 21 01:09:08 PM PDT 24	13942939366 ps
T416	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1436203306	Apr 21 01:08:32 PM PDT 24	Apr 21 01:08:40 PM PDT 24	2510577228 ps
T417	/workspace/coverage/default/20.sysrst_ctrl_alert_test.2351103883	Apr 21 01:07:20 PM PDT 24	Apr 21 01:07:22 PM PDT 24	2031516116 ps
T270	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3053797169	Apr 21 01:08:47 PM PDT 24	Apr 21 01:17:56 PM PDT 24	195052869901 ps
T103	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2896091887	Apr 21 01:08:46 PM PDT 24	Apr 21 01:09:05 PM PDT 24	26854516465 ps
T331	/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2186496488	Apr 21 01:08:26 PM PDT 24	Apr 21 01:08:35 PM PDT 24	7942814807 ps
T418	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2435768023	Apr 21 01:06:34 PM PDT 24	Apr 21 01:06:36 PM PDT 24	2085386402 ps
T216	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.268751792	Apr 21 01:07:46 PM PDT 24	Apr 21 01:07:53 PM PDT 24	3164771058 ps
T419	/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3001113914	Apr 21 01:07:42 PM PDT 24	Apr 21 01:07:48 PM PDT 24	3275885729 ps
T311	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2351725089	Apr 21 01:08:50 PM PDT 24	Apr 21 01:10:32 PM PDT 24	75288956452 ps
T271	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.4098244150	Apr 21 01:08:33 PM PDT 24	Apr 21 01:10:29 PM PDT 24	166590023281 ps
T420	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.827617401	Apr 21 01:08:25 PM PDT 24	Apr 21 01:08:34 PM PDT 24	2613204754 ps
T421	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.2867061964	Apr 21 01:07:07 PM PDT 24	Apr 21 01:07:15 PM PDT 24	2610641014 ps
T96	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1203341853	Apr 21 01:07:03 PM PDT 24	Apr 21 01:07:04 PM PDT 24	7147505424 ps
T422	/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3337249603	Apr 21 01:08:35 PM PDT 24	Apr 21 01:08:42 PM PDT 24	2209317410 ps
T312	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.1695342572	Apr 21 01:07:12 PM PDT 24	Apr 21 01:08:58 PM PDT 24	76895363846 ps
T423	/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2964470154	Apr 21 01:07:01 PM PDT 24	Apr 21 01:07:05 PM PDT 24	2080728350 ps
T251	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1239366534	Apr 21 01:08:06 PM PDT 24	Apr 21 01:09:03 PM PDT 24	79858250260 ps
T313	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3392305944	Apr 21 01:08:58 PM PDT 24	Apr 21 01:10:08 PM PDT 24	57084596404 ps
T127	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.132087420	Apr 21 01:08:27 PM PDT 24	Apr 21 01:09:05 PM PDT 24	29820066684 ps
T424	/workspace/coverage/default/3.sysrst_ctrl_smoke.253878371	Apr 21 01:06:39 PM PDT 24	Apr 21 01:06:41 PM PDT 24	2140123572 ps
T93	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1279908568	Apr 21 01:07:07 PM PDT 24	Apr 21 01:14:22 PM PDT 24	1039049470091 ps
T88	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1127642421	Apr 21 01:07:05 PM PDT 24	Apr 21 01:09:07 PM PDT 24	89880787229 ps
T87	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3801993041	Apr 21 01:06:56 PM PDT 24	Apr 21 01:07:49 PM PDT 24	338530164265 ps
T187	/workspace/coverage/default/15.sysrst_ctrl_stress_all.3411417071	Apr 21 01:07:06 PM PDT 24	Apr 21 01:07:24 PM PDT 24	6447098424 ps
T188	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2250606751	Apr 21 01:06:48 PM PDT 24	Apr 21 01:06:53 PM PDT 24	2486590963 ps
T189	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2778577522	Apr 21 01:07:14 PM PDT 24	Apr 21 01:07:17 PM PDT 24	2524851052 ps
T190	/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.726063688	Apr 21 01:08:34 PM PDT 24	Apr 21 01:08:36 PM PDT 24	3764924832 ps
T191	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1716855719	Apr 21 01:07:27 PM PDT 24	Apr 21 01:07:31 PM PDT 24	2521842425 ps
T192	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2476883776	Apr 21 01:08:32 PM PDT 24	Apr 21 01:08:38 PM PDT 24	2449997826 ps
T193	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1257267370	Apr 21 01:08:38 PM PDT 24	Apr 21 01:10:38 PM PDT 24	45790428740 ps
T194	/workspace/coverage/default/21.sysrst_ctrl_alert_test.1295180432	Apr 21 01:07:21 PM PDT 24	Apr 21 01:07:27 PM PDT 24	2015126802 ps
T195	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.3906693455	Apr 21 01:07:58 PM PDT 24	Apr 21 01:08:07 PM PDT 24	3123094238 ps
T140	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1579206564	Apr 21 01:08:37 PM PDT 24	Apr 21 01:08:42 PM PDT 24	7300974632 ps
T308	/workspace/coverage/default/45.sysrst_ctrl_stress_all.95729194	Apr 21 01:08:27 PM PDT 24	Apr 21 01:08:55 PM PDT 24	13864351737 ps
T425	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3073396560	Apr 21 01:07:26 PM PDT 24	Apr 21 01:07:32 PM PDT 24	2128252280 ps
T426	/workspace/coverage/default/39.sysrst_ctrl_smoke.734538533	Apr 21 01:08:25 PM PDT 24	Apr 21 01:08:29 PM PDT 24	2120878201 ps
T356	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2091763382	Apr 21 01:08:48 PM PDT 24	Apr 21 01:13:41 PM PDT 24	106451607775 ps
T427	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1939290950	Apr 21 01:06:57 PM PDT 24	Apr 21 01:07:00 PM PDT 24	2633245431 ps
T428	/workspace/coverage/default/15.sysrst_ctrl_alert_test.1637173093	Apr 21 01:07:16 PM PDT 24	Apr 21 01:07:22 PM PDT 24	2010838448 ps
T429	/workspace/coverage/default/36.sysrst_ctrl_smoke.493776750	Apr 21 01:08:02 PM PDT 24	Apr 21 01:08:04 PM PDT 24	2166314218 ps
T430	/workspace/coverage/default/37.sysrst_ctrl_stress_all.2840214918	Apr 21 01:08:08 PM PDT 24	Apr 21 01:08:15 PM PDT 24	6762791189 ps
T431	/workspace/coverage/default/23.sysrst_ctrl_alert_test.3789506307	Apr 21 01:07:31 PM PDT 24	Apr 21 01:07:34 PM PDT 24	2024633949 ps
T432	/workspace/coverage/default/34.sysrst_ctrl_alert_test.229688042	Apr 21 01:07:56 PM PDT 24	Apr 21 01:07:58 PM PDT 24	2039306597 ps
T392	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.266890746	Apr 21 01:07:45 PM PDT 24	Apr 21 01:08:04 PM PDT 24	40488321788 ps
T372	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3919097227	Apr 21 01:07:03 PM PDT 24	Apr 21 01:11:43 PM PDT 24	214999618214 ps
T433	/workspace/coverage/default/36.sysrst_ctrl_alert_test.2701132267	Apr 21 01:08:09 PM PDT 24	Apr 21 01:08:14 PM PDT 24	2012780454 ps
T434	/workspace/coverage/default/0.sysrst_ctrl_alert_test.2580602482	Apr 21 01:06:34 PM PDT 24	Apr 21 01:06:40 PM PDT 24	2012097131 ps
T378	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3649692492	Apr 21 01:08:47 PM PDT 24	Apr 21 01:09:08 PM PDT 24	29882373538 ps
T435	/workspace/coverage/default/23.sysrst_ctrl_smoke.1403147363	Apr 21 01:07:29 PM PDT 24	Apr 21 01:07:33 PM PDT 24	2117495122 ps
T280	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1102166357	Apr 21 01:06:52 PM PDT 24	Apr 21 01:09:11 PM PDT 24	100178239505 ps
T436	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3042518806	Apr 21 01:06:58 PM PDT 24	Apr 21 01:07:01 PM PDT 24	3973723166 ps
T437	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2831357982	Apr 21 01:07:36 PM PDT 24	Apr 21 01:07:40 PM PDT 24	3625860326 ps
T438	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.869410212	Apr 21 01:07:46 PM PDT 24	Apr 21 01:07:48 PM PDT 24	2787684260 ps
T104	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3592313990	Apr 21 01:08:03 PM PDT 24	Apr 21 01:08:13 PM PDT 24	3962166664 ps
T439	/workspace/coverage/default/45.sysrst_ctrl_alert_test.1200710508	Apr 21 01:08:28 PM PDT 24	Apr 21 01:08:30 PM PDT 24	2049325522 ps
T352	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3732510870	Apr 21 01:07:48 PM PDT 24	Apr 21 01:08:46 PM PDT 24	60677074080 ps
T186	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.609812185	Apr 21 01:06:41 PM PDT 24	Apr 21 01:07:02 PM PDT 24	413848267179 ps
T217	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3603307684	Apr 21 01:07:23 PM PDT 24	Apr 21 01:07:25 PM PDT 24	4209316598 ps
T440	/workspace/coverage/default/18.sysrst_ctrl_alert_test.226722547	Apr 21 01:07:13 PM PDT 24	Apr 21 01:07:15 PM PDT 24	2040232560 ps