Name |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.530589909 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1408307544 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2263005200 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2078656105 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3533585939 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2569086252 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.945267682 |
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1450838073 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3354127188 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.123103864 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2397992494 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3723467969 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2197320589 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.630010988 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3887324953 |
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2710479907 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1619565333 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3952440503 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2742082788 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1890254828 |
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1022069718 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3331326192 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2056020595 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1722108702 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1537328023 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.371681424 |
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.793900140 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1521400934 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.549273354 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1139961183 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.367663603 |
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1798096407 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3193023983 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.112559113 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2333069922 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.228178726 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3056669479 |
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3518373692 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1573592818 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1085108373 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3413476388 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1457671952 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3240014772 |
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2148322788 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2082573025 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4138104509 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.882711274 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3947345559 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3692034163 |
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.201083890 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3080878632 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3351176417 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2884618922 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.737851303 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2432418733 |
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.126304545 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1201382795 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3305120941 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.525061395 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.4093808222 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3159556082 |
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.985991843 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.707847658 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.930778081 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2093360266 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.4279939187 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.255757656 |
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.163672394 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2075370390 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1410434209 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1493651 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.4205256616 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1803981824 |
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2553924872 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3360229300 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1592993333 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3162917074 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.3389788387 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2168570722 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.682661524 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2540657698 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.927441348 |
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.4036546855 |
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.1403765044 |
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.3074170873 |
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.1121555816 |
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.3681508436 |
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.345338039 |
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.2685821450 |
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.2647461691 |
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.1608108773 |
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.2174762242 |
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.1918477444 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.1356115847 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.18063733 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2195231296 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.287899321 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.147380174 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.3799458208 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.1521015655 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.2703286649 |
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.631523741 |
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.3389271178 |
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/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.3278398819 |
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.2648755278 |
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/workspace/coverage/cover_reg_top/35.sysrst_ctrl_intr_test.1882789262 |
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/workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.3182822024 |
/workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.3678068479 |
/workspace/coverage/cover_reg_top/39.sysrst_ctrl_intr_test.2546493074 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.2382972997 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.211526883 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.2152651787 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_mem_rw_with_rand_reset.3567918449 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.3210764879 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_intr_test.3012794862 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_same_csr_outstanding.4206517262 |
/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.646159075 |
/workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.3747784261 |
/workspace/coverage/cover_reg_top/41.sysrst_ctrl_intr_test.1680614137 |
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/workspace/coverage/cover_reg_top/43.sysrst_ctrl_intr_test.966114723 |
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/workspace/coverage/cover_reg_top/45.sysrst_ctrl_intr_test.1965271139 |
/workspace/coverage/cover_reg_top/46.sysrst_ctrl_intr_test.2185155557 |
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/workspace/coverage/cover_reg_top/48.sysrst_ctrl_intr_test.2361654368 |
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/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.1238007317 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_rw.3303536765 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_intr_test.132584401 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_same_csr_outstanding.1644480216 |
/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.140143070 |
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/workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_rw.2699043461 |
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/workspace/coverage/default/0.sysrst_ctrl_alert_test.2731219633 |
/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3365905250 |
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/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3003729390 |
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2067638780 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1585435565 |
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1191854993 |
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2710853369 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2515512544 |
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4150522655 |
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.871521233 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2770430871 |
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1099342294 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2930772544 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3746036190 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2528950005 |
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.4163163949 |
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1738502323 |
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.544315226 |
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3069462593 |
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3672139003 |
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.530407872 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3996662296 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2547683173 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3928347834 |
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3758047558 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1091338235 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2120522083 |
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.736247899 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3305391224 |
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2271271030 |
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1909507158 |
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.545506363 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.4211530184 |
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4158375259 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3305817801 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.589772853 |
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3392887509 |
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.4132912451 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2245382435 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.4224045200 |
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3669146701 |
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1572447546 |
/workspace/coverage/default/9.sysrst_ctrl_smoke.3810854661 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2869386026 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3465883261 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3099331080 |
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2686560805 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2578230375 |
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4187712609 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2051478650 |
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1867099377 |
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2208604688 |
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2784467218 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2560863491 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T4 |
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3388578455 |
|
|
May 02 04:16:31 PM PDT 24 |
May 02 04:16:38 PM PDT 24 |
4264674591 ps |
T1 |
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1372487915 |
|
|
May 02 04:16:21 PM PDT 24 |
May 02 04:16:29 PM PDT 24 |
272164750696 ps |
T2 |
/workspace/coverage/default/33.sysrst_ctrl_edge_detect.1564398625 |
|
|
May 02 04:15:30 PM PDT 24 |
May 02 04:15:33 PM PDT 24 |
2895374167 ps |
T12 |
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3498595793 |
|
|
May 02 04:13:02 PM PDT 24 |
May 02 04:13:13 PM PDT 24 |
3608028328 ps |
T3 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all.1304097029 |
|
|
May 02 04:15:43 PM PDT 24 |
May 02 04:15:50 PM PDT 24 |
7697313643 ps |
T13 |
/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2279470000 |
|
|
May 02 04:15:23 PM PDT 24 |
May 02 04:15:26 PM PDT 24 |
2503919773 ps |
T14 |
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1346107419 |
|
|
May 02 04:16:03 PM PDT 24 |
May 02 04:16:14 PM PDT 24 |
3652504018 ps |
T15 |
/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3964042881 |
|
|
May 02 04:12:39 PM PDT 24 |
May 02 04:12:45 PM PDT 24 |
3161204918 ps |
T5 |
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.72425948 |
|
|
May 02 04:16:05 PM PDT 24 |
May 02 04:16:12 PM PDT 24 |
3666989242 ps |
T6 |
/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1441409312 |
|
|
May 02 04:15:31 PM PDT 24 |
May 02 04:15:36 PM PDT 24 |
4933966637 ps |
T7 |
/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1168975951 |
|
|
May 02 04:12:25 PM PDT 24 |
May 02 04:13:47 PM PDT 24 |
32140287562 ps |
T50 |
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.616259256 |
|
|
May 02 04:15:43 PM PDT 24 |
May 02 04:15:46 PM PDT 24 |
5279808017 ps |
T8 |
/workspace/coverage/default/20.sysrst_ctrl_edge_detect.4072894076 |
|
|
May 02 04:14:29 PM PDT 24 |
May 02 04:14:40 PM PDT 24 |
4670826446 ps |
T9 |
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2858452771 |
|
|
May 02 04:12:48 PM PDT 24 |
May 02 04:13:11 PM PDT 24 |
127103955528 ps |
T23 |
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.703135736 |
|
|
May 02 04:15:51 PM PDT 24 |
May 02 04:15:56 PM PDT 24 |
2620420911 ps |
T10 |
/workspace/coverage/default/28.sysrst_ctrl_stress_all.4260530670 |
|
|
May 02 04:15:06 PM PDT 24 |
May 02 04:15:32 PM PDT 24 |
9540403682 ps |
T51 |
/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3412740494 |
|
|
May 02 04:15:22 PM PDT 24 |
May 02 04:15:31 PM PDT 24 |
2509286498 ps |
T11 |
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3305391224 |
|
|
May 02 04:16:37 PM PDT 24 |
May 02 04:18:55 PM PDT 24 |
49107473318 ps |
T52 |
/workspace/coverage/default/11.sysrst_ctrl_smoke.2431629172 |
|
|
May 02 04:13:29 PM PDT 24 |
May 02 04:13:33 PM PDT 24 |
2112781743 ps |
T16 |
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.346754490 |
|
|
May 02 04:16:30 PM PDT 24 |
May 02 04:18:04 PM PDT 24 |
67111256786 ps |
T30 |
/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3375866133 |
|
|
May 02 04:12:28 PM PDT 24 |
May 02 04:21:45 PM PDT 24 |
202797918849 ps |
T20 |
/workspace/coverage/default/27.sysrst_ctrl_stress_all.2344839302 |
|
|
May 02 04:14:59 PM PDT 24 |
May 02 04:15:12 PM PDT 24 |
11485166772 ps |
T54 |
/workspace/coverage/default/2.sysrst_ctrl_pin_override_test.578885441 |
|
|
May 02 04:12:30 PM PDT 24 |
May 02 04:12:34 PM PDT 24 |
2540398589 ps |
T55 |
/workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.2493102864 |
|
|
May 02 04:15:38 PM PDT 24 |
May 02 04:15:44 PM PDT 24 |
2968753307 ps |
T63 |
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.91441148 |
|
|
May 02 04:12:48 PM PDT 24 |
May 02 04:12:51 PM PDT 24 |
2538501015 ps |
T56 |
/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.589915542 |
|
|
May 02 04:14:37 PM PDT 24 |
May 02 04:14:42 PM PDT 24 |
2754263025 ps |
T84 |
/workspace/coverage/default/31.sysrst_ctrl_alert_test.744783788 |
|
|
May 02 04:15:23 PM PDT 24 |
May 02 04:15:27 PM PDT 24 |
2025295701 ps |
T57 |
/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.273272724 |
|
|
May 02 04:14:30 PM PDT 24 |
May 02 04:14:34 PM PDT 24 |
4349838924 ps |
T85 |
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1415853928 |
|
|
May 02 04:16:05 PM PDT 24 |
May 02 04:16:08 PM PDT 24 |
2047139022 ps |
T141 |
/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3597153348 |
|
|
May 02 04:15:33 PM PDT 24 |
May 02 04:15:40 PM PDT 24 |
2083276243 ps |
T28 |
/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.991388270 |
|
|
May 02 04:13:38 PM PDT 24 |
May 02 04:13:47 PM PDT 24 |
8702418536 ps |
T142 |
/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1585925086 |
|
|
May 02 04:15:09 PM PDT 24 |
May 02 04:15:11 PM PDT 24 |
2256426920 ps |
T33 |
/workspace/coverage/default/25.sysrst_ctrl_edge_detect.3589023171 |
|
|
May 02 04:14:53 PM PDT 24 |
May 02 04:17:31 PM PDT 24 |
1182767097793 ps |
T29 |
/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3184559225 |
|
|
May 02 04:15:38 PM PDT 24 |
May 02 04:15:42 PM PDT 24 |
8290423071 ps |
T129 |
/workspace/coverage/default/13.sysrst_ctrl_smoke.2033039110 |
|
|
May 02 04:13:43 PM PDT 24 |
May 02 04:13:50 PM PDT 24 |
2110849808 ps |
T53 |
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2209782068 |
|
|
May 02 04:16:18 PM PDT 24 |
May 02 04:16:22 PM PDT 24 |
6622517588 ps |
T64 |
/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3638798143 |
|
|
May 02 04:14:59 PM PDT 24 |
May 02 04:15:04 PM PDT 24 |
2617560330 ps |
T65 |
/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3625945761 |
|
|
May 02 04:15:17 PM PDT 24 |
May 02 04:15:22 PM PDT 24 |
2522802333 ps |
T32 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2968374819 |
|
|
May 02 04:14:44 PM PDT 24 |
May 02 04:16:19 PM PDT 24 |
65155237178 ps |
T39 |
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.60713498 |
|
|
May 02 04:15:50 PM PDT 24 |
May 02 04:15:56 PM PDT 24 |
3527987116 ps |
T86 |
/workspace/coverage/default/9.sysrst_ctrl_alert_test.4211530184 |
|
|
May 02 04:13:24 PM PDT 24 |
May 02 04:13:31 PM PDT 24 |
2008984811 ps |
T21 |
/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2978968685 |
|
|
May 02 04:14:57 PM PDT 24 |
May 02 04:15:01 PM PDT 24 |
2455788797 ps |
T22 |
/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.47762492 |
|
|
May 02 04:12:29 PM PDT 24 |
May 02 04:12:32 PM PDT 24 |
2464606857 ps |
T41 |
/workspace/coverage/default/22.sysrst_ctrl_combo_detect.3183475123 |
|
|
May 02 04:14:40 PM PDT 24 |
May 02 04:17:58 PM PDT 24 |
150927221274 ps |
T42 |
/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2590853854 |
|
|
May 02 04:13:53 PM PDT 24 |
May 02 04:14:02 PM PDT 24 |
3259795005 ps |
T273 |
/workspace/coverage/default/6.sysrst_ctrl_smoke.3255918257 |
|
|
May 02 04:13:02 PM PDT 24 |
May 02 04:13:09 PM PDT 24 |
2113013696 ps |
T31 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.21388907 |
|
|
May 02 04:16:06 PM PDT 24 |
May 02 04:17:16 PM PDT 24 |
98068811347 ps |
T58 |
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.4224045200 |
|
|
May 02 04:13:23 PM PDT 24 |
May 02 04:13:26 PM PDT 24 |
2457235102 ps |
T43 |
/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1846051219 |
|
|
May 02 04:15:37 PM PDT 24 |
May 02 04:17:04 PM PDT 24 |
32844865302 ps |
T274 |
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2586557569 |
|
|
May 02 04:16:18 PM PDT 24 |
May 02 04:16:23 PM PDT 24 |
2687613967 ps |
T44 |
/workspace/coverage/default/26.sysrst_ctrl_combo_detect.2177914177 |
|
|
May 02 04:14:51 PM PDT 24 |
May 02 04:21:57 PM PDT 24 |
171970483925 ps |
T34 |
/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1073416384 |
|
|
May 02 04:12:12 PM PDT 24 |
May 02 04:13:59 PM PDT 24 |
39462252272 ps |
T275 |
/workspace/coverage/default/19.sysrst_ctrl_smoke.1087535885 |
|
|
May 02 04:14:21 PM PDT 24 |
May 02 04:14:26 PM PDT 24 |
2121213885 ps |
T276 |
/workspace/coverage/default/37.sysrst_ctrl_alert_test.836917941 |
|
|
May 02 04:15:45 PM PDT 24 |
May 02 04:15:48 PM PDT 24 |
2038650832 ps |
T45 |
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3596935524 |
|
|
May 02 04:15:52 PM PDT 24 |
May 02 04:19:44 PM PDT 24 |
162477278025 ps |
T59 |
/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1107385509 |
|
|
May 02 04:15:37 PM PDT 24 |
May 02 04:16:55 PM PDT 24 |
45121077407 ps |
T35 |
/workspace/coverage/default/2.sysrst_ctrl_stress_all.1970038683 |
|
|
May 02 04:12:30 PM PDT 24 |
May 02 04:13:10 PM PDT 24 |
15420013736 ps |
T83 |
/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2670813842 |
|
|
May 02 04:15:45 PM PDT 24 |
May 02 04:20:50 PM PDT 24 |
118444782299 ps |
T252 |
/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3793037918 |
|
|
May 02 04:14:21 PM PDT 24 |
May 02 04:14:26 PM PDT 24 |
2735322993 ps |
T60 |
/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1315082000 |
|
|
May 02 04:15:37 PM PDT 24 |
May 02 04:15:45 PM PDT 24 |
2459469776 ps |
T36 |
/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3505384507 |
|
|
May 02 04:15:22 PM PDT 24 |
May 02 04:17:05 PM PDT 24 |
72875048714 ps |
T46 |
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1585435565 |
|
|
May 02 04:16:37 PM PDT 24 |
May 02 04:17:04 PM PDT 24 |
37275225880 ps |
T253 |
/workspace/coverage/default/26.sysrst_ctrl_smoke.1127509969 |
|
|
May 02 04:14:57 PM PDT 24 |
May 02 04:15:04 PM PDT 24 |
2111685987 ps |
T47 |
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.963815944 |
|
|
May 02 04:16:39 PM PDT 24 |
May 02 04:18:12 PM PDT 24 |
149073670509 ps |
T254 |
/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3268247483 |
|
|
May 02 04:13:44 PM PDT 24 |
May 02 04:13:52 PM PDT 24 |
2509589102 ps |
T242 |
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.16261854 |
|
|
May 02 04:15:53 PM PDT 24 |
May 02 04:19:48 PM PDT 24 |
111654061558 ps |
T255 |
/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.559700365 |
|
|
May 02 04:14:37 PM PDT 24 |
May 02 04:14:40 PM PDT 24 |
2534588117 ps |
T66 |
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.580310514 |
|
|
May 02 04:16:04 PM PDT 24 |
May 02 04:16:40 PM PDT 24 |
131055622766 ps |
T243 |
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1235572289 |
|
|
May 02 04:13:00 PM PDT 24 |
May 02 04:16:58 PM PDT 24 |
121341898996 ps |
T299 |
/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.4119325306 |
|
|
May 02 04:14:44 PM PDT 24 |
May 02 04:14:51 PM PDT 24 |
2511115487 ps |
T331 |
/workspace/coverage/default/24.sysrst_ctrl_stress_all.3528946189 |
|
|
May 02 04:14:55 PM PDT 24 |
May 02 04:17:08 PM PDT 24 |
194966765742 ps |
T104 |
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3305817801 |
|
|
May 02 04:13:22 PM PDT 24 |
May 02 04:15:16 PM PDT 24 |
167416749465 ps |
T378 |
/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3353120383 |
|
|
May 02 04:12:33 PM PDT 24 |
May 02 04:12:36 PM PDT 24 |
2108715816 ps |
T67 |
/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2007580188 |
|
|
May 02 04:12:04 PM PDT 24 |
May 02 04:12:06 PM PDT 24 |
3184074883 ps |
T379 |
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3246793958 |
|
|
May 02 04:15:52 PM PDT 24 |
May 02 04:16:09 PM PDT 24 |
5177717069 ps |
T380 |
/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.4002434004 |
|
|
May 02 04:14:08 PM PDT 24 |
May 02 04:14:13 PM PDT 24 |
3943496794 ps |
T381 |
/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.422716725 |
|
|
May 02 04:15:14 PM PDT 24 |
May 02 04:15:17 PM PDT 24 |
2796685362 ps |
T268 |
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.259811509 |
|
|
May 02 04:16:19 PM PDT 24 |
May 02 04:16:53 PM PDT 24 |
49757538256 ps |
T48 |
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.4096283073 |
|
|
May 02 04:13:08 PM PDT 24 |
May 02 04:13:13 PM PDT 24 |
3173669824 ps |
T305 |
/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.3508107749 |
|
|
May 02 04:14:00 PM PDT 24 |
May 02 04:14:06 PM PDT 24 |
2217594493 ps |
T306 |
/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3681483955 |
|
|
May 02 04:14:23 PM PDT 24 |
May 02 04:14:35 PM PDT 24 |
4299780365 ps |
T234 |
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.523861966 |
|
|
May 02 04:16:20 PM PDT 24 |
May 02 04:21:11 PM PDT 24 |
121034460818 ps |
T37 |
/workspace/coverage/default/12.sysrst_ctrl_edge_detect.3984313154 |
|
|
May 02 04:13:44 PM PDT 24 |
May 02 04:13:49 PM PDT 24 |
3456163586 ps |
T208 |
/workspace/coverage/default/45.sysrst_ctrl_smoke.182317079 |
|
|
May 02 04:16:04 PM PDT 24 |
May 02 04:16:11 PM PDT 24 |
2114337680 ps |
T209 |
/workspace/coverage/default/27.sysrst_ctrl_alert_test.1439074487 |
|
|
May 02 04:15:01 PM PDT 24 |
May 02 04:15:06 PM PDT 24 |
2019151476 ps |
T38 |
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.903901137 |
|
|
May 02 04:15:50 PM PDT 24 |
May 02 04:16:01 PM PDT 24 |
4641516172 ps |
T105 |
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2770430871 |
|
|
May 02 04:16:40 PM PDT 24 |
May 02 04:19:59 PM PDT 24 |
80801005499 ps |
T189 |
/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3998456519 |
|
|
May 02 04:14:00 PM PDT 24 |
May 02 04:14:02 PM PDT 24 |
3685577178 ps |
T210 |
/workspace/coverage/default/38.sysrst_ctrl_smoke.2120535707 |
|
|
May 02 04:15:43 PM PDT 24 |
May 02 04:15:50 PM PDT 24 |
2111632436 ps |
T68 |
/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2274113407 |
|
|
May 02 04:14:12 PM PDT 24 |
May 02 04:14:16 PM PDT 24 |
7113386893 ps |
T156 |
/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3715443870 |
|
|
May 02 04:14:28 PM PDT 24 |
May 02 04:14:32 PM PDT 24 |
2637605790 ps |
T96 |
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1697763455 |
|
|
May 02 04:16:19 PM PDT 24 |
May 02 04:16:34 PM PDT 24 |
11341630731 ps |
T157 |
/workspace/coverage/default/3.sysrst_ctrl_alert_test.3142335798 |
|
|
May 02 04:12:42 PM PDT 24 |
May 02 04:12:45 PM PDT 24 |
2041744946 ps |
T135 |
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2117660379 |
|
|
May 02 04:16:04 PM PDT 24 |
May 02 04:16:08 PM PDT 24 |
5363621975 ps |
T61 |
/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3233117292 |
|
|
May 02 04:13:40 PM PDT 24 |
May 02 04:13:48 PM PDT 24 |
2466038799 ps |
T158 |
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.912841463 |
|
|
May 02 04:16:41 PM PDT 24 |
May 02 04:21:28 PM PDT 24 |
106020810571 ps |
T159 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1170747879 |
|
|
May 02 04:12:42 PM PDT 24 |
May 02 04:12:49 PM PDT 24 |
2348525703 ps |
T72 |
/workspace/coverage/default/2.sysrst_ctrl_sec_cm.4079924027 |
|
|
May 02 04:12:28 PM PDT 24 |
May 02 04:12:58 PM PDT 24 |
22014995354 ps |
T49 |
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2930772544 |
|
|
May 02 04:13:16 PM PDT 24 |
May 02 04:16:16 PM PDT 24 |
266277385949 ps |
T263 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4061870766 |
|
|
May 02 04:12:23 PM PDT 24 |
May 02 04:12:31 PM PDT 24 |
2529636565 ps |
T264 |
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2090836688 |
|
|
May 02 04:16:31 PM PDT 24 |
May 02 04:16:43 PM PDT 24 |
4183058005 ps |
T199 |
/workspace/coverage/default/32.sysrst_ctrl_edge_detect.897240916 |
|
|
May 02 04:15:29 PM PDT 24 |
May 02 04:15:36 PM PDT 24 |
4414166333 ps |
T265 |
/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.4104016103 |
|
|
May 02 04:14:22 PM PDT 24 |
May 02 04:14:30 PM PDT 24 |
5273670375 ps |
T102 |
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1190359987 |
|
|
May 02 04:15:45 PM PDT 24 |
May 02 04:15:49 PM PDT 24 |
3384421096 ps |
T62 |
/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1815303514 |
|
|
May 02 04:14:14 PM PDT 24 |
May 02 04:14:24 PM PDT 24 |
2468570196 ps |
T266 |
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3313503622 |
|
|
May 02 04:15:47 PM PDT 24 |
May 02 04:17:54 PM PDT 24 |
54997290922 ps |
T267 |
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2972238967 |
|
|
May 02 04:15:58 PM PDT 24 |
May 02 04:20:53 PM PDT 24 |
112051950631 ps |
T382 |
/workspace/coverage/default/4.sysrst_ctrl_smoke.2181285838 |
|
|
May 02 04:12:41 PM PDT 24 |
May 02 04:12:44 PM PDT 24 |
2131487975 ps |
T247 |
/workspace/coverage/default/5.sysrst_ctrl_stress_all.4250972672 |
|
|
May 02 04:12:55 PM PDT 24 |
May 02 04:15:26 PM PDT 24 |
151799740572 ps |
T383 |
/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.4180943491 |
|
|
May 02 04:12:22 PM PDT 24 |
May 02 04:12:25 PM PDT 24 |
2646070855 ps |
T384 |
/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3750902315 |
|
|
May 02 04:13:49 PM PDT 24 |
May 02 04:13:52 PM PDT 24 |
2630623208 ps |
T385 |
/workspace/coverage/default/2.sysrst_ctrl_alert_test.3466192683 |
|
|
May 02 04:12:30 PM PDT 24 |
May 02 04:12:32 PM PDT 24 |
2111832697 ps |
T128 |
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1213936363 |
|
|
May 02 04:16:01 PM PDT 24 |
May 02 04:16:04 PM PDT 24 |
3425864715 ps |
T295 |
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2165092273 |
|
|
May 02 04:12:54 PM PDT 24 |
May 02 04:13:01 PM PDT 24 |
2465842363 ps |
T386 |
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2158223904 |
|
|
May 02 04:13:09 PM PDT 24 |
May 02 04:13:17 PM PDT 24 |
2565341717 ps |
T106 |
/workspace/coverage/default/30.sysrst_ctrl_stress_all.1632341104 |
|
|
May 02 04:15:17 PM PDT 24 |
May 02 04:23:24 PM PDT 24 |
208942849859 ps |
T107 |
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2051478650 |
|
|
May 02 04:16:39 PM PDT 24 |
May 02 04:16:58 PM PDT 24 |
25602260883 ps |
T387 |
/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3650231405 |
|
|
May 02 04:14:16 PM PDT 24 |
May 02 04:14:25 PM PDT 24 |
2609092611 ps |
T388 |
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.4016153400 |
|
|
May 02 04:12:43 PM PDT 24 |
May 02 04:12:51 PM PDT 24 |
2390953374 ps |
T389 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.980579416 |
|
|
May 02 04:12:22 PM PDT 24 |
May 02 04:12:26 PM PDT 24 |
2429755899 ps |
T98 |
/workspace/coverage/default/13.sysrst_ctrl_stress_all.200671615 |
|
|
May 02 04:13:52 PM PDT 24 |
May 02 04:14:08 PM PDT 24 |
160395171568 ps |
T390 |
/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1162983346 |
|
|
May 02 04:11:56 PM PDT 24 |
May 02 04:12:00 PM PDT 24 |
2472897736 ps |
T103 |
/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3546196441 |
|
|
May 02 04:14:38 PM PDT 24 |
May 02 04:15:48 PM PDT 24 |
52533342933 ps |
T269 |
/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1727319640 |
|
|
May 02 04:12:22 PM PDT 24 |
May 02 04:13:38 PM PDT 24 |
30421698510 ps |
T280 |
/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2079060211 |
|
|
May 02 04:14:38 PM PDT 24 |
May 02 04:14:43 PM PDT 24 |
3928259191 ps |
T281 |
/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3454544963 |
|
|
May 02 04:15:09 PM PDT 24 |
May 02 04:15:13 PM PDT 24 |
2035288508 ps |
T282 |
/workspace/coverage/default/24.sysrst_ctrl_alert_test.171016474 |
|
|
May 02 04:14:51 PM PDT 24 |
May 02 04:14:54 PM PDT 24 |
2025498779 ps |
T136 |
/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1294294715 |
|
|
May 02 04:15:00 PM PDT 24 |
May 02 04:15:09 PM PDT 24 |
4409777631 ps |
T137 |
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2869386026 |
|
|
May 02 04:13:24 PM PDT 24 |
May 02 04:13:43 PM PDT 24 |
18749358573 ps |
T270 |
/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.310943478 |
|
|
May 02 04:14:52 PM PDT 24 |
May 02 04:15:03 PM PDT 24 |
3641125450 ps |
T40 |
/workspace/coverage/default/35.sysrst_ctrl_edge_detect.959774107 |
|
|
May 02 04:15:37 PM PDT 24 |
May 02 04:15:45 PM PDT 24 |
2987760500 ps |
T283 |
/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2451128995 |
|
|
May 02 04:15:08 PM PDT 24 |
May 02 04:15:12 PM PDT 24 |
4126223714 ps |
T138 |
/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2401326542 |
|
|
May 02 04:15:07 PM PDT 24 |
May 02 04:15:15 PM PDT 24 |
5839713183 ps |
T300 |
/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1170834513 |
|
|
May 02 04:15:00 PM PDT 24 |
May 02 04:15:02 PM PDT 24 |
2613613008 ps |
T391 |
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2314847244 |
|
|
May 02 04:16:11 PM PDT 24 |
May 02 04:16:13 PM PDT 24 |
2234960685 ps |
T392 |
/workspace/coverage/default/40.sysrst_ctrl_smoke.1469805833 |
|
|
May 02 04:15:50 PM PDT 24 |
May 02 04:15:57 PM PDT 24 |
2111211412 ps |
T393 |
/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3646922108 |
|
|
May 02 04:13:42 PM PDT 24 |
May 02 04:13:47 PM PDT 24 |
2187867950 ps |
T245 |
/workspace/coverage/default/19.sysrst_ctrl_combo_detect.3080872773 |
|
|
May 02 04:14:21 PM PDT 24 |
May 02 04:17:07 PM PDT 24 |
124682810918 ps |
T248 |
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.4238804484 |
|
|
May 02 04:16:19 PM PDT 24 |
May 02 04:18:17 PM PDT 24 |
46685032681 ps |
T296 |
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3455415774 |
|
|
May 02 04:13:02 PM PDT 24 |
May 02 04:13:07 PM PDT 24 |
2476216735 ps |
T394 |
/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2379685563 |
|
|
May 02 04:15:43 PM PDT 24 |
May 02 04:15:51 PM PDT 24 |
2611823185 ps |
T91 |
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2578230375 |
|
|
May 02 04:16:38 PM PDT 24 |
May 02 04:19:19 PM PDT 24 |
62606774352 ps |
T395 |
/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2447281126 |
|
|
May 02 04:13:35 PM PDT 24 |
May 02 04:13:37 PM PDT 24 |
2113888674 ps |
T396 |
/workspace/coverage/default/38.sysrst_ctrl_alert_test.4288540160 |
|
|
May 02 04:15:48 PM PDT 24 |
May 02 04:15:54 PM PDT 24 |
2011416568 ps |
T179 |
/workspace/coverage/default/19.sysrst_ctrl_edge_detect.3222734015 |
|
|
May 02 04:14:20 PM PDT 24 |
May 02 04:14:22 PM PDT 24 |
3482523973 ps |
T397 |
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.146233549 |
|
|
May 02 04:16:01 PM PDT 24 |
May 02 04:16:03 PM PDT 24 |
2528496308 ps |
T97 |
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3099331080 |
|
|
May 02 04:13:22 PM PDT 24 |
May 02 04:13:53 PM PDT 24 |
353878625134 ps |
T398 |
/workspace/coverage/default/20.sysrst_ctrl_alert_test.2150193970 |
|
|
May 02 04:14:30 PM PDT 24 |
May 02 04:14:37 PM PDT 24 |
2013427069 ps |
T301 |
/workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1175868141 |
|
|
May 02 04:14:59 PM PDT 24 |
May 02 04:15:04 PM PDT 24 |
2521345533 ps |
T399 |
/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.948944131 |
|
|
May 02 04:11:58 PM PDT 24 |
May 02 04:12:05 PM PDT 24 |
2607641467 ps |
T400 |
/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1974566835 |
|
|
May 02 04:12:35 PM PDT 24 |
May 02 04:12:43 PM PDT 24 |
2527155588 ps |
T401 |
/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.255689944 |
|
|
May 02 04:15:22 PM PDT 24 |
May 02 04:15:25 PM PDT 24 |
2630210148 ps |
T277 |
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4139459469 |
|
|
May 02 04:16:05 PM PDT 24 |
May 02 04:17:27 PM PDT 24 |
107289484883 ps |
T402 |
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.451310562 |
|
|
May 02 04:15:59 PM PDT 24 |
May 02 04:16:02 PM PDT 24 |
2657077356 ps |
T403 |
/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3341359055 |
|
|
May 02 04:12:33 PM PDT 24 |
May 02 04:12:36 PM PDT 24 |
2971740586 ps |
T175 |
/workspace/coverage/default/22.sysrst_ctrl_edge_detect.3763958472 |
|
|
May 02 04:14:40 PM PDT 24 |
May 02 04:14:48 PM PDT 24 |
4857327145 ps |
T404 |
/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1654814518 |
|
|
May 02 04:15:04 PM PDT 24 |
May 02 04:15:06 PM PDT 24 |
2254553725 ps |
T302 |
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1672554505 |
|
|
May 02 04:15:46 PM PDT 24 |
May 02 04:15:53 PM PDT 24 |
2601021988 ps |
T405 |
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.376039475 |
|
|
May 02 04:16:20 PM PDT 24 |
May 02 04:16:26 PM PDT 24 |
3300355941 ps |
T406 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all.4147758424 |
|
|
May 02 04:14:05 PM PDT 24 |
May 02 04:14:24 PM PDT 24 |
6072293943 ps |
T407 |
/workspace/coverage/default/41.sysrst_ctrl_smoke.2686634883 |
|
|
May 02 04:15:53 PM PDT 24 |
May 02 04:16:01 PM PDT 24 |
2112579429 ps |
T408 |
/workspace/coverage/default/16.sysrst_ctrl_alert_test.521033916 |
|
|
May 02 04:14:10 PM PDT 24 |
May 02 04:14:16 PM PDT 24 |
2015139643 ps |
T244 |
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2560863491 |
|
|
May 02 04:16:42 PM PDT 24 |
May 02 04:18:25 PM PDT 24 |
40505314609 ps |
T333 |
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.186584094 |
|
|
May 02 04:16:30 PM PDT 24 |
May 02 04:22:16 PM PDT 24 |
131249567777 ps |
T409 |
/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.3712589536 |
|
|
May 02 04:13:51 PM PDT 24 |
May 02 04:13:55 PM PDT 24 |
4072639935 ps |
T410 |
/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.960635508 |
|
|
May 02 04:14:29 PM PDT 24 |
May 02 04:14:38 PM PDT 24 |
2508153913 ps |
T336 |
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.4135457449 |
|
|
May 02 04:16:29 PM PDT 24 |
May 02 04:17:52 PM PDT 24 |
128541762707 ps |
T187 |
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1370727848 |
|
|
May 02 04:16:11 PM PDT 24 |
May 02 04:16:20 PM PDT 24 |
3630548286 ps |
T411 |
/workspace/coverage/default/31.sysrst_ctrl_smoke.1513972556 |
|
|
May 02 04:15:15 PM PDT 24 |
May 02 04:15:20 PM PDT 24 |
2115164410 ps |
T344 |
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1091338235 |
|
|
May 02 04:16:40 PM PDT 24 |
May 02 04:16:58 PM PDT 24 |
83393890610 ps |
T412 |
/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1869306765 |
|
|
May 02 04:15:23 PM PDT 24 |
May 02 04:15:30 PM PDT 24 |
2125099476 ps |
T176 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all.255499075 |
|
|
May 02 04:16:11 PM PDT 24 |
May 02 04:21:16 PM PDT 24 |
121800161724 ps |
T231 |
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2120522083 |
|
|
May 02 04:16:37 PM PDT 24 |
May 02 04:17:05 PM PDT 24 |
39007974843 ps |
T413 |
/workspace/coverage/default/49.sysrst_ctrl_smoke.2234546945 |
|
|
May 02 04:16:20 PM PDT 24 |
May 02 04:16:23 PM PDT 24 |
2139524101 ps |
T414 |
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3966362058 |
|
|
May 02 04:16:32 PM PDT 24 |
May 02 04:16:35 PM PDT 24 |
2458047016 ps |
T215 |
/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.414655776 |
|
|
May 02 04:13:57 PM PDT 24 |
May 02 04:15:09 PM PDT 24 |
36247478016 ps |
T297 |
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3873301208 |
|
|
May 02 04:16:13 PM PDT 24 |
May 02 04:16:21 PM PDT 24 |
2453288346 ps |
T415 |
/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2343289847 |
|
|
May 02 04:14:17 PM PDT 24 |
May 02 04:14:29 PM PDT 24 |
4162465707 ps |
T416 |
/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2780505728 |
|
|
May 02 04:15:30 PM PDT 24 |
May 02 04:15:34 PM PDT 24 |
2127819504 ps |
T332 |
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2991215678 |
|
|
May 02 04:16:31 PM PDT 24 |
May 02 04:24:51 PM PDT 24 |
203723929184 ps |
T180 |
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2626625012 |
|
|
May 02 04:13:09 PM PDT 24 |
May 02 04:13:16 PM PDT 24 |
2897887609 ps |
T271 |
/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1961658219 |
|
|
May 02 04:15:23 PM PDT 24 |
May 02 04:15:26 PM PDT 24 |
3257065050 ps |
T417 |
/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.29627896 |
|
|
May 02 04:15:52 PM PDT 24 |
May 02 04:15:59 PM PDT 24 |
2111536274 ps |
T162 |
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2489529480 |
|
|
May 02 04:16:14 PM PDT 24 |
May 02 04:17:39 PM PDT 24 |
36865613006 ps |
T418 |
/workspace/coverage/default/24.sysrst_ctrl_smoke.765980135 |
|
|
May 02 04:14:44 PM PDT 24 |
May 02 04:14:48 PM PDT 24 |
2120611598 ps |
T108 |
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4283102533 |
|
|
May 02 04:16:30 PM PDT 24 |
May 02 04:17:21 PM PDT 24 |
74212788022 ps |
T419 |
/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.96531627 |
|
|
May 02 04:13:35 PM PDT 24 |
May 02 04:13:41 PM PDT 24 |
2080610706 ps |
T272 |
/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3718461649 |
|
|
May 02 04:15:08 PM PDT 24 |
May 02 04:15:11 PM PDT 24 |
3236379667 ps |
T139 |
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1598653223 |
|
|
May 02 04:16:21 PM PDT 24 |
May 02 04:16:24 PM PDT 24 |
6520380007 ps |
T360 |
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.493611487 |
|
|
May 02 04:16:15 PM PDT 24 |
May 02 04:16:53 PM PDT 24 |
59231864390 ps |
T420 |
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2012951011 |
|
|
May 02 04:16:35 PM PDT 24 |
May 02 04:18:44 PM PDT 24 |
46493249838 ps |
T140 |
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3384690725 |
|
|
May 02 04:15:58 PM PDT 24 |
May 02 04:16:05 PM PDT 24 |
8326347411 ps |
T421 |
/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3803902348 |
|
|
May 02 04:12:35 PM PDT 24 |
May 02 04:12:44 PM PDT 24 |
2668953258 ps |
T292 |
/workspace/coverage/default/36.sysrst_ctrl_stress_all.4173111197 |
|
|
May 02 04:15:37 PM PDT 24 |
May 02 04:16:02 PM PDT 24 |
9073026330 ps |
T94 |
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.4180010568 |
|
|
May 02 04:16:31 PM PDT 24 |
May 02 04:18:33 PM PDT 24 |
46354906004 ps |
T422 |
/workspace/coverage/default/13.sysrst_ctrl_alert_test.2010457777 |
|
|
May 02 04:13:52 PM PDT 24 |
May 02 04:13:55 PM PDT 24 |
2048296362 ps |
T423 |
/workspace/coverage/default/25.sysrst_ctrl_alert_test.940246001 |
|
|
May 02 04:14:53 PM PDT 24 |
May 02 04:14:55 PM PDT 24 |
2039589242 ps |
T303 |
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.693914096 |
|
|
May 02 04:15:51 PM PDT 24 |
May 02 04:15:53 PM PDT 24 |
7502925118 ps |
T177 |
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.940358605 |
|
|
May 02 04:13:02 PM PDT 24 |
May 02 04:13:41 PM PDT 24 |
200984609312 ps |
T284 |
/workspace/coverage/default/27.sysrst_ctrl_smoke.267023048 |
|
|
May 02 04:15:01 PM PDT 24 |
May 02 04:15:05 PM PDT 24 |
2116004398 ps |
T285 |
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2805588359 |
|
|
May 02 04:15:43 PM PDT 24 |
May 02 04:15:46 PM PDT 24 |
2559878554 ps |
T286 |
/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3333432602 |
|
|
May 02 04:15:21 PM PDT 24 |
May 02 04:15:24 PM PDT 24 |
2478226429 ps |
T287 |
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.281652356 |
|
|
May 02 04:16:29 PM PDT 24 |
May 02 04:16:56 PM PDT 24 |
77745064729 ps |
T109 |
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.4148490549 |
|
|
May 02 04:16:39 PM PDT 24 |
May 02 04:17:39 PM PDT 24 |
23583493030 ps |
T288 |
/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3492376884 |
|
|
May 02 04:14:59 PM PDT 24 |
May 02 04:15:03 PM PDT 24 |
3839331629 ps |
T289 |
/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.4280119132 |
|
|
May 02 04:14:52 PM PDT 24 |
May 02 04:15:03 PM PDT 24 |
4052063349 ps |
T290 |
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2245382435 |
|
|
May 02 04:13:23 PM PDT 24 |
May 02 04:13:26 PM PDT 24 |
2615819271 ps |
T291 |
/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3721825403 |
|
|
May 02 04:14:58 PM PDT 24 |
May 02 04:15:00 PM PDT 24 |
3884545613 ps |
T258 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect.1774423621 |
|
|
May 02 04:14:31 PM PDT 24 |
May 02 04:14:58 PM PDT 24 |
43794983651 ps |
T424 |
/workspace/coverage/default/42.sysrst_ctrl_smoke.3224618140 |
|
|
May 02 04:15:58 PM PDT 24 |
May 02 04:16:04 PM PDT 24 |
2111870594 ps |
T259 |
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3746036190 |
|
|
May 02 04:13:16 PM PDT 24 |
May 02 04:15:02 PM PDT 24 |
84622251588 ps |
T235 |
/workspace/coverage/default/24.sysrst_ctrl_combo_detect.3797579768 |
|
|
May 02 04:14:44 PM PDT 24 |
May 02 04:16:23 PM PDT 24 |
133201581201 ps |
T160 |
/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1333496992 |
|
|
May 02 04:14:51 PM PDT 24 |
May 02 04:15:06 PM PDT 24 |
21686253815 ps |
T203 |
/workspace/coverage/default/37.sysrst_ctrl_edge_detect.172968337 |
|
|
May 02 04:15:42 PM PDT 24 |
May 02 04:15:55 PM PDT 24 |
4444457539 ps |
T307 |
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.92412972 |
|
|
May 02 04:16:05 PM PDT 24 |
May 02 04:16:14 PM PDT 24 |
2611992888 ps |
T308 |
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.3637161843 |
|
|
May 02 04:15:58 PM PDT 24 |
May 02 04:16:00 PM PDT 24 |
2076090442 ps |
T309 |
/workspace/coverage/default/8.sysrst_ctrl_smoke.3996662296 |
|
|
May 02 04:13:15 PM PDT 24 |
May 02 04:13:17 PM PDT 24 |
2157219691 ps |
T310 |
/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2272907848 |
|
|
May 02 04:14:43 PM PDT 24 |
May 02 04:15:36 PM PDT 24 |
84929344174 ps |
T311 |
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2025281985 |
|
|
May 02 04:12:54 PM PDT 24 |
May 02 04:13:05 PM PDT 24 |
3467820966 ps |
T312 |
/workspace/coverage/default/33.sysrst_ctrl_smoke.1128879489 |
|
|
May 02 04:15:22 PM PDT 24 |
May 02 04:15:26 PM PDT 24 |
2122641582 ps |
T313 |
/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1746541021 |
|
|
May 02 04:15:00 PM PDT 24 |
May 02 04:15:08 PM PDT 24 |
2449076747 ps |
T314 |
/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.4239804483 |
|
|
May 02 04:15:51 PM PDT 24 |
May 02 04:16:02 PM PDT 24 |
3620064347 ps |
T425 |
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3547885507 |
|
|
May 02 04:16:08 PM PDT 24 |
May 02 04:16:10 PM PDT 24 |
2239940416 ps |
T426 |
/workspace/coverage/default/7.sysrst_ctrl_smoke.2410722621 |
|
|
May 02 04:13:08 PM PDT 24 |
May 02 04:13:11 PM PDT 24 |
2136739069 ps |
T427 |
/workspace/coverage/default/30.sysrst_ctrl_smoke.3189407071 |
|
|
May 02 04:15:06 PM PDT 24 |
May 02 04:15:10 PM PDT 24 |
2120470693 ps |
T100 |
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2547683173 |
|
|
May 02 04:13:16 PM PDT 24 |
May 02 04:17:41 PM PDT 24 |
1368316212545 ps |
T428 |
/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2710783789 |
|
|
May 02 04:14:47 PM PDT 24 |
May 02 04:14:50 PM PDT 24 |
2189703384 ps |
T429 |
/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.47255929 |
|
|
May 02 04:14:14 PM PDT 24 |
May 02 04:14:25 PM PDT 24 |
3423556424 ps |
T430 |
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2301556443 |
|
|
May 02 04:16:31 PM PDT 24 |
May 02 04:19:17 PM PDT 24 |
62155463927 ps |
T249 |
/workspace/coverage/default/1.sysrst_ctrl_combo_detect.874677562 |
|
|
May 02 04:12:22 PM PDT 24 |
May 02 04:12:45 PM PDT 24 |
38443455205 ps |
T431 |
/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3472801599 |
|
|
May 02 04:13:31 PM PDT 24 |
May 02 04:13:35 PM PDT 24 |
2623936571 ps |
T432 |
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2230481873 |
|
|
May 02 04:15:43 PM PDT 24 |
May 02 04:15:46 PM PDT 24 |
2180234264 ps |
T101 |
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1494643947 |
|
|
May 02 04:15:58 PM PDT 24 |
May 02 04:16:27 PM PDT 24 |
28483057413 ps |
T232 |
/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.1709234120 |
|
|
May 02 04:14:14 PM PDT 24 |
May 02 04:15:40 PM PDT 24 |
32306605103 ps |
T233 |
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.2515512544 |
|
|
May 02 04:16:41 PM PDT 24 |
May 02 04:19:14 PM PDT 24 |
74581689025 ps |
T433 |
/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1295703193 |
|
|
May 02 04:12:35 PM PDT 24 |
May 02 04:12:43 PM PDT 24 |
2614207369 ps |
T236 |
/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.504861050 |
|
|
May 02 04:15:44 PM PDT 24 |
May 02 04:18:23 PM PDT 24 |
65477479544 ps |
T434 |
/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3628541622 |
|
|
May 02 04:15:16 PM PDT 24 |
May 02 04:15:23 PM PDT 24 |
3619943308 ps |
T435 |
/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.211058959 |
|
|
May 02 04:14:29 PM PDT 24 |
May 02 04:15:33 PM PDT 24 |
60641250318 ps |
T110 |
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3692980294 |
|
|
May 02 04:12:55 PM PDT 24 |
May 02 04:14:40 PM PDT 24 |
76321304757 ps |
T95 |
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3713311035 |
|
|
May 02 04:16:32 PM PDT 24 |
May 02 04:19:01 PM PDT 24 |
58080644436 ps |
T436 |
/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1006537859 |
|
|
May 02 04:15:01 PM PDT 24 |
May 02 04:15:46 PM PDT 24 |
35829113944 ps |
T437 |
/workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2804752942 |
|
|
May 02 04:13:52 PM PDT 24 |
May 02 04:13:57 PM PDT 24 |
2617603524 ps |
T438 |
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1637558121 |
|
|
May 02 04:16:30 PM PDT 24 |
May 02 04:16:32 PM PDT 24 |
2145678239 ps |
T439 |
/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1791302296 |
|
|
May 02 04:14:21 PM PDT 24 |
May 02 04:14:26 PM PDT 24 |
2204601545 ps |
T440 |
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3399837818 |
|
|
May 02 04:16:16 PM PDT 24 |
May 02 04:16:23 PM PDT 24 |
2010742168 ps |
T441 |
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1598333301 |
|
|
May 02 04:12:48 PM PDT 24 |
May 02 04:12:54 PM PDT 24 |
5828526291 ps |
T92 |
/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3048315021 |
|
|
May 02 04:14:14 PM PDT 24 |
May 02 04:15:28 PM PDT 24 |
61557992686 ps |
T190 |
/workspace/coverage/default/0.sysrst_ctrl_alert_test.2731219633 |
|
|
May 02 04:12:12 PM PDT 24 |
May 02 04:12:15 PM PDT 24 |
2042376555 ps |
T191 |
/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1953749120 |
|
|
May 02 04:14:52 PM PDT 24 |
May 02 04:15:00 PM PDT 24 |
2465731419 ps |