Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.93 99.37 96.81 100.00 97.44 98.82 99.61 93.49


Total tests in report: 916
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
60.43 60.43 78.90 78.90 68.17 68.17 91.89 91.89 17.95 17.95 79.22 79.22 68.50 68.50 18.41 18.41 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4028369204
74.94 14.51 89.23 10.34 80.08 11.91 92.58 0.68 68.59 50.64 89.50 10.28 84.39 15.90 20.24 1.83 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2331130396
81.07 6.12 93.02 3.79 85.26 5.18 94.86 2.28 75.00 6.41 92.64 3.14 89.02 4.62 37.67 17.44 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2874704847
84.50 3.44 97.03 4.01 91.05 5.79 95.78 0.91 77.56 2.56 96.56 3.92 91.14 2.12 42.41 4.74 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2039544212
87.45 2.95 97.03 0.00 91.08 0.03 95.78 0.00 77.56 0.00 96.56 0.00 94.51 3.37 59.63 17.22 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1830556480
89.17 1.72 97.91 0.88 91.41 0.33 96.58 0.80 86.54 8.97 97.15 0.59 94.89 0.39 59.74 0.11 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2104638460
90.51 1.34 97.91 0.00 91.56 0.15 97.03 0.46 86.54 0.00 97.19 0.04 95.38 0.48 67.98 8.23 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.346987295
91.73 1.22 97.95 0.04 92.77 1.21 97.72 0.68 86.54 0.00 97.30 0.11 95.38 0.00 74.49 6.51 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.4240642045
92.55 0.82 98.23 0.28 93.50 0.73 97.72 0.00 89.10 2.56 97.56 0.26 96.82 1.45 74.92 0.43 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3353814842
93.13 0.58 98.38 0.15 93.88 0.38 98.17 0.46 89.10 0.00 97.71 0.15 96.92 0.10 77.72 2.80 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1543814912
93.54 0.42 98.51 0.13 93.98 0.10 98.17 0.00 91.03 1.92 97.86 0.15 97.21 0.29 78.04 0.32 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1577165675
93.84 0.30 98.60 0.09 94.03 0.05 98.17 0.00 92.31 1.28 97.97 0.11 97.40 0.19 78.42 0.38 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3075587879
94.14 0.30 98.66 0.06 94.24 0.20 98.17 0.00 92.31 0.00 97.97 0.00 97.40 0.00 80.25 1.83 /workspace/coverage/default/39.sysrst_ctrl_stress_all.1001956004
94.43 0.29 98.66 0.00 94.31 0.08 98.17 0.00 92.31 0.00 97.97 0.00 97.59 0.19 82.02 1.78 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2433155070
94.72 0.29 98.75 0.09 94.46 0.15 98.17 0.00 93.59 1.28 98.08 0.11 97.98 0.39 82.02 0.00 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.411528653
95.01 0.28 98.75 0.00 94.49 0.03 99.77 1.60 93.59 0.00 98.08 0.00 98.07 0.10 82.29 0.27 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1461766823
95.26 0.25 98.84 0.09 94.57 0.08 99.77 0.00 94.87 1.28 98.19 0.11 98.27 0.19 82.29 0.00 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1372222994
95.48 0.23 98.86 0.02 94.57 0.00 99.77 0.00 94.87 0.00 98.19 0.00 98.27 0.00 83.85 1.56 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1602824818
95.67 0.19 98.90 0.04 94.57 0.00 99.77 0.00 94.87 0.00 98.19 0.00 98.27 0.00 85.15 1.29 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.4271410243
95.84 0.17 98.92 0.02 94.62 0.05 99.77 0.00 94.87 0.00 98.23 0.04 98.36 0.10 86.11 0.97 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1816429547
95.99 0.15 98.92 0.00 94.62 0.00 99.77 0.00 94.87 0.00 98.23 0.00 98.36 0.00 87.19 1.08 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3368668399
96.14 0.14 98.92 0.00 95.58 0.96 99.77 0.00 94.87 0.00 98.23 0.00 98.36 0.00 87.24 0.05 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.4225798356
96.27 0.14 98.97 0.06 95.60 0.03 99.77 0.00 95.51 0.64 98.30 0.07 98.46 0.10 87.30 0.05 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1596138226
96.41 0.13 99.01 0.04 95.70 0.10 99.77 0.00 95.51 0.00 98.30 0.00 99.04 0.58 87.51 0.22 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3806450542
96.53 0.12 99.05 0.04 95.75 0.05 99.77 0.00 96.15 0.64 98.34 0.04 99.13 0.10 87.51 0.00 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.956531305
96.65 0.12 99.09 0.04 95.78 0.03 99.77 0.00 96.79 0.64 98.37 0.04 99.23 0.10 87.51 0.00 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.2665731688
96.77 0.12 99.12 0.04 95.80 0.03 99.77 0.00 97.44 0.64 98.41 0.04 99.33 0.10 87.51 0.00 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1573242175
96.87 0.10 99.12 0.00 95.98 0.18 99.77 0.00 97.44 0.00 98.48 0.07 99.33 0.00 87.94 0.43 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3386135758
96.96 0.09 99.12 0.00 95.98 0.00 99.77 0.00 97.44 0.00 98.48 0.00 99.33 0.00 88.59 0.65 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.480470339
97.04 0.08 99.12 0.00 95.98 0.00 99.77 0.00 97.44 0.00 98.48 0.00 99.33 0.00 89.18 0.59 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.727674665
97.12 0.08 99.14 0.02 96.06 0.08 99.77 0.00 97.44 0.00 98.52 0.04 99.42 0.10 89.50 0.32 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.4272546074
97.20 0.07 99.18 0.04 96.16 0.10 99.77 0.00 97.44 0.00 98.60 0.07 99.52 0.10 89.72 0.22 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_csr_rw.4227715571
97.25 0.05 99.18 0.00 96.49 0.33 99.77 0.00 97.44 0.00 98.60 0.00 99.52 0.00 89.77 0.05 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1620086786
97.31 0.05 99.20 0.02 96.49 0.00 99.77 0.00 97.44 0.00 98.63 0.04 99.52 0.00 90.10 0.32 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.3019790139
97.36 0.05 99.20 0.00 96.49 0.00 99.77 0.00 97.44 0.00 98.63 0.00 99.52 0.00 90.47 0.38 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2591215366
97.41 0.05 99.25 0.06 96.56 0.08 100.00 0.23 97.44 0.00 98.63 0.00 99.52 0.00 90.47 0.00 /workspace/coverage/default/14.sysrst_ctrl_alert_test.1812052712
97.46 0.05 99.27 0.02 96.56 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 90.80 0.32 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4174753741
97.49 0.03 99.27 0.00 96.59 0.03 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 91.01 0.22 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.3593234592
97.52 0.03 99.27 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 91.23 0.22 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.2351422740
97.56 0.03 99.27 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 91.44 0.22 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3858579010
97.58 0.02 99.27 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 91.60 0.16 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2873103678
97.60 0.02 99.27 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 91.77 0.16 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.13870814
97.62 0.02 99.27 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 91.93 0.16 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.877119759
97.65 0.02 99.27 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 92.09 0.16 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1173578849
97.67 0.02 99.27 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.52 0.00 92.25 0.16 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3282093120
97.69 0.02 99.31 0.04 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.07 99.52 0.00 92.25 0.00 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.2071291813
97.70 0.02 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.36 0.11 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.3125035527
97.72 0.02 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.47 0.11 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3289035512
97.73 0.02 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.57 0.11 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1630952390
97.75 0.02 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.68 0.11 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2900163473
97.76 0.02 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.79 0.11 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1474984346
97.78 0.02 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 92.90 0.11 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3461664308
97.79 0.02 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.52 0.00 93.00 0.11 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2188848961
97.81 0.01 99.31 0.00 96.59 0.00 100.00 0.00 97.44 0.00 98.71 0.00 99.61 0.10 93.00 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.83716935
97.82 0.01 99.31 0.00 96.61 0.03 100.00 0.00 97.44 0.00 98.71 0.00 99.61 0.00 93.06 0.05 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2401915685
97.83 0.01 99.31 0.00 96.69 0.08 100.00 0.00 97.44 0.00 98.71 0.00 99.61 0.00 93.06 0.00 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2359623341
97.84 0.01 99.33 0.02 96.69 0.00 100.00 0.00 97.44 0.00 98.74 0.04 99.61 0.00 93.06 0.00 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.2438664535
97.85 0.01 99.35 0.02 96.69 0.00 100.00 0.00 97.44 0.00 98.78 0.04 99.61 0.00 93.06 0.00 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.3566764445
97.85 0.01 99.37 0.02 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.04 99.61 0.00 93.06 0.00 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1523693343
97.86 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.11 0.05 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.217295706
97.87 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.16 0.05 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1515885302
97.88 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.22 0.05 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2091050602
97.88 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.27 0.05 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.1159297453
97.89 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.33 0.05 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1527823517
97.90 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.38 0.05 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.4165391992
97.91 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.43 0.05 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2793806880
97.92 0.01 99.37 0.00 96.69 0.00 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.49 0.05 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3364175171
97.92 0.01 99.37 0.00 96.74 0.05 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.49 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.739500634
97.93 0.01 99.37 0.00 96.76 0.03 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.49 0.00 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.948043480
97.93 0.01 99.37 0.00 96.79 0.03 100.00 0.00 97.44 0.00 98.82 0.00 99.61 0.00 93.49 0.00 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1642364790


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1466146246
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1715052578
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3731865182
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.781864398
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.120776638
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2908605852
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1713223041
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3732864090
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.4271802071
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.252129918
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1397933652
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1110194337
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2017475930
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1155082584
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.731521594
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3225798746
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3678955480
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.161785937
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.4246431171
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1294185374
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1478284416
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.614440234
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.759549308
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1951003522
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1802807129
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.833937591
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.961156135
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.785421119
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3801528712
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.451199847
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1199405656
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1420679831
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.2070063775
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.4128550625
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.802262429
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2682460073
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.4166364308
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2386024505
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.130051546
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.887068129
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2167081450
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2393658144
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2569901618
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1372984437
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1429993172
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3551702560
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3609651418
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3388005248
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3803738857
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.4127797518
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1875656276
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.4186098358
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.590928844
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3822195857
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1720107415
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.1506332755
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2111146766
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3749475812
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.907703988
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.702163195
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.546658179
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.286427674
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.4016238069
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.127282404
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.3972062264
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.3963725350
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.999038608
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2735416168
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.4132037683
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.1075724732
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.1300146339
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1012286851
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2689158053
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1677249563
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1280936321
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.4007859652
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/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1254816535
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.550591444
/workspace/coverage/default/41.sysrst_ctrl_smoke.1262506670
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3749117459
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2798413916
/workspace/coverage/default/42.sysrst_ctrl_alert_test.338445497
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3308804558
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2004806613
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2365143949
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3638854864
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1650560964
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.58876741
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1327427682
/workspace/coverage/default/42.sysrst_ctrl_smoke.4281512466
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1830976063
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.704836489
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1744313449
/workspace/coverage/default/43.sysrst_ctrl_alert_test.4071870013
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.589352960
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2992991625
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1432027323
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3702194535
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1242650348
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3715493104
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2267859871
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.42938332
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2376912892
/workspace/coverage/default/43.sysrst_ctrl_smoke.2648975796
/workspace/coverage/default/43.sysrst_ctrl_stress_all.575485151
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3858861438
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2203025835
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4240444133
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3201881143
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3981986381
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4219314375
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3545816361
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1666716985
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3986237810
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.398071394
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4267618387
/workspace/coverage/default/44.sysrst_ctrl_smoke.4090340725
/workspace/coverage/default/44.sysrst_ctrl_stress_all.37166436
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.490470668
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1575466240
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.376345919
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2953699320
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.35061530
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3551811733
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2491035377
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3982638571
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.3041867873
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4112020447
/workspace/coverage/default/45.sysrst_ctrl_smoke.1785087870
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3760562899
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1154535748
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1842589656
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1565985200
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1028962584
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.9294988
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3248808241
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1540002672
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1877124960
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2203557096
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3928407898
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3127104238
/workspace/coverage/default/46.sysrst_ctrl_smoke.422398514
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3476505499
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3266575101
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1800872102
/workspace/coverage/default/47.sysrst_ctrl_alert_test.138530676
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3747381404
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2269675527
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2956770345
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2624507426
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2337349563
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1564838371
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4124734581
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3488258170
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1826784491
/workspace/coverage/default/47.sysrst_ctrl_smoke.900932871
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2113259823
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2463332031
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1176748558
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2947252619
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1038601072
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1661782137
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4003826933
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2008452140
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2642193167
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2550045228
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2710923799
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2188196710
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3621088285
/workspace/coverage/default/48.sysrst_ctrl_smoke.3841336974
/workspace/coverage/default/48.sysrst_ctrl_stress_all.44588378
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.230299114
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3012824931
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1818048014
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2959488541
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.48089993
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3639424759
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2458812963
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1139080586
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2727654282
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1886244989
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.121296908
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.343755974
/workspace/coverage/default/49.sysrst_ctrl_smoke.1052042924
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3768463715
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1110396707
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3220935944
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3400404395
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2987691915
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.549519150
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3260143598
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3810339526
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.871847109
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2386208347
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.863989107
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3908464710
/workspace/coverage/default/5.sysrst_ctrl_smoke.1151050112
/workspace/coverage/default/5.sysrst_ctrl_stress_all.474862875
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1270660355
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1969471755
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1363994105
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.738745384
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2152047038
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2463586245
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1535921830
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.590034881
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1889233900
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2798406335
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3795780445
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3064771496
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1226937557
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3252095356
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2290087661
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2618152986
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2921481711
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2297883541
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.305353802
/workspace/coverage/default/6.sysrst_ctrl_smoke.1887745147
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2434408229
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3567888486
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2232572260
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1838561872
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.3820836561
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3998271633
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2650946916
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3425646420
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3695994082
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2695923977
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2081516444
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1897753326
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3531161227
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1083035892
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3986064687
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1473443697
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2970595794
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1972154145
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.4066008179
/workspace/coverage/default/7.sysrst_ctrl_smoke.1283338124
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1407609577
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1423816191
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1949337243
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2763169368
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3250963203
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.368479620
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1275311422
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1539931357
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.360301622
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1377233439
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.16522686
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2627603182
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2723009528
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3941298990
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1010218804
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2987093546
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3263397311
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.4292485915
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1219833328
/workspace/coverage/default/8.sysrst_ctrl_smoke.1591423481
/workspace/coverage/default/8.sysrst_ctrl_stress_all.793862355
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2476238902
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1272927449
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2417096075
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3799278342
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2913474231
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1928429492
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1218921301
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2144855841
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1232791730
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3276901232
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2955141249
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4138386700
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3338499318
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.827538976
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3990117057
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.4279882240
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1826713938
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2823157170
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3726193280
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1559288715
/workspace/coverage/default/9.sysrst_ctrl_smoke.2398525403
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3959141275
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2364808101
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3320993515
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.510269606
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1118561100
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2792357069
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.529279653
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.775526674
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.165949975




Total test records in report: 916
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/21.sysrst_ctrl_stress_all.1960824565 May 07 03:23:41 PM PDT 24 May 07 03:23:47 PM PDT 24 176875864807 ps
T5 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1223642611 May 07 03:24:17 PM PDT 24 May 07 03:24:23 PM PDT 24 2515024431 ps
T1 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1620086786 May 07 03:23:46 PM PDT 24 May 07 03:23:51 PM PDT 24 4578605033 ps
T2 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.549519150 May 07 03:23:21 PM PDT 24 May 07 03:23:37 PM PDT 24 43257385116 ps
T3 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1543814912 May 07 03:24:31 PM PDT 24 May 07 03:25:16 PM PDT 24 43409308452 ps
T13 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.4012721631 May 07 03:22:59 PM PDT 24 May 07 03:23:10 PM PDT 24 2613514620 ps
T14 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3946600968 May 07 03:23:35 PM PDT 24 May 07 03:23:39 PM PDT 24 2477949955 ps
T15 /workspace/coverage/default/10.sysrst_ctrl_stress_all.2805608883 May 07 03:23:26 PM PDT 24 May 07 03:24:03 PM PDT 24 13247526778 ps
T6 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.4028369204 May 07 03:24:49 PM PDT 24 May 07 03:30:21 PM PDT 24 125255442727 ps
T7 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.510269606 May 07 03:24:52 PM PDT 24 May 07 03:25:27 PM PDT 24 47792711431 ps
T16 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3542439094 May 07 03:24:30 PM PDT 24 May 07 03:24:35 PM PDT 24 3701271650 ps
T17 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.775526674 May 07 03:24:52 PM PDT 24 May 07 03:25:20 PM PDT 24 36041583915 ps
T21 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2104638460 May 07 03:22:56 PM PDT 24 May 07 03:24:21 PM PDT 24 35174936932 ps
T48 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3803694085 May 07 03:23:48 PM PDT 24 May 07 03:23:58 PM PDT 24 2508070870 ps
T49 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3726193280 May 07 03:23:15 PM PDT 24 May 07 03:23:20 PM PDT 24 2076676519 ps
T50 /workspace/coverage/default/27.sysrst_ctrl_smoke.1535046468 May 07 03:23:56 PM PDT 24 May 07 03:24:04 PM PDT 24 2108121939 ps
T8 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.2548259337 May 07 03:24:17 PM PDT 24 May 07 03:24:43 PM PDT 24 32345627585 ps
T51 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3931693331 May 07 03:22:57 PM PDT 24 May 07 03:23:08 PM PDT 24 6958275892 ps
T52 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3229531449 May 07 03:23:25 PM PDT 24 May 07 03:23:34 PM PDT 24 2611424256 ps
T53 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3941298990 May 07 03:23:31 PM PDT 24 May 07 03:23:39 PM PDT 24 4610023752 ps
T42 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1388277015 May 07 03:23:49 PM PDT 24 May 07 03:25:45 PM PDT 24 46438088742 ps
T9 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.139400366 May 07 03:24:32 PM PDT 24 May 07 03:24:41 PM PDT 24 2412538875 ps
T174 /workspace/coverage/default/14.sysrst_ctrl_smoke.3746339051 May 07 03:23:41 PM PDT 24 May 07 03:23:48 PM PDT 24 2110322377 ps
T175 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3260143598 May 07 03:23:14 PM PDT 24 May 07 03:23:27 PM PDT 24 4297751090 ps
T10 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.677359235 May 07 03:23:45 PM PDT 24 May 07 03:24:12 PM PDT 24 46829170089 ps
T11 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2039544212 May 07 03:23:03 PM PDT 24 May 07 03:25:19 PM PDT 24 200414422061 ps
T176 /workspace/coverage/default/14.sysrst_ctrl_alert_test.1812052712 May 07 03:23:22 PM PDT 24 May 07 03:23:25 PM PDT 24 2030688806 ps
T60 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1447253074 May 07 03:23:05 PM PDT 24 May 07 03:23:51 PM PDT 24 16447415536 ps
T61 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3748901266 May 07 03:24:10 PM PDT 24 May 07 03:24:18 PM PDT 24 2610972837 ps
T43 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.131080464 May 07 03:23:47 PM PDT 24 May 07 03:24:25 PM PDT 24 26338997965 ps
T12 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.172558559 May 07 03:24:00 PM PDT 24 May 07 03:24:09 PM PDT 24 2487766764 ps
T22 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1155191675 May 07 03:23:46 PM PDT 24 May 07 03:23:52 PM PDT 24 6638549443 ps
T126 /workspace/coverage/default/37.sysrst_ctrl_alert_test.2378408248 May 07 03:24:29 PM PDT 24 May 07 03:24:36 PM PDT 24 2019693228 ps
T26 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2135177593 May 07 03:23:23 PM PDT 24 May 07 03:23:41 PM PDT 24 1967398987133 ps
T62 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.2963773269 May 07 03:23:39 PM PDT 24 May 07 03:23:43 PM PDT 24 2633992507 ps
T127 /workspace/coverage/default/32.sysrst_ctrl_smoke.913750044 May 07 03:24:07 PM PDT 24 May 07 03:24:14 PM PDT 24 2111659795 ps
T64 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1218921301 May 07 03:24:45 PM PDT 24 May 07 03:25:24 PM PDT 24 54467268913 ps
T29 /workspace/coverage/default/39.sysrst_ctrl_stress_all.1001956004 May 07 03:24:27 PM PDT 24 May 07 03:26:42 PM PDT 24 183911257223 ps
T63 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3386135758 May 07 03:23:33 PM PDT 24 May 07 03:23:37 PM PDT 24 2530010211 ps
T128 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2366319843 May 07 03:24:07 PM PDT 24 May 07 03:24:14 PM PDT 24 2233385600 ps
T129 /workspace/coverage/default/15.sysrst_ctrl_alert_test.2494792688 May 07 03:23:31 PM PDT 24 May 07 03:23:35 PM PDT 24 2026162053 ps
T292 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1270660355 May 07 03:23:08 PM PDT 24 May 07 03:23:45 PM PDT 24 13589967058 ps
T402 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1951728240 May 07 03:24:07 PM PDT 24 May 07 03:24:11 PM PDT 24 2240502703 ps
T350 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.902972110 May 07 03:23:34 PM PDT 24 May 07 03:23:38 PM PDT 24 2528978021 ps
T403 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.344737344 May 07 03:23:54 PM PDT 24 May 07 03:24:00 PM PDT 24 2095678597 ps
T30 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.2290087661 May 07 03:23:12 PM PDT 24 May 07 03:26:58 PM PDT 24 914539320883 ps
T182 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3983741946 May 07 03:24:31 PM PDT 24 May 07 03:24:37 PM PDT 24 2632187959 ps
T183 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4267618387 May 07 03:24:45 PM PDT 24 May 07 03:24:54 PM PDT 24 2512138826 ps
T184 /workspace/coverage/default/46.sysrst_ctrl_alert_test.1565985200 May 07 03:24:40 PM PDT 24 May 07 03:24:44 PM PDT 24 2019658168 ps
T185 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1333158018 May 07 03:23:45 PM PDT 24 May 07 03:23:50 PM PDT 24 2222529251 ps
T186 /workspace/coverage/default/32.sysrst_ctrl_alert_test.2949496073 May 07 03:24:11 PM PDT 24 May 07 03:24:18 PM PDT 24 2011111597 ps
T187 /workspace/coverage/default/45.sysrst_ctrl_stress_all.3760562899 May 07 03:24:38 PM PDT 24 May 07 03:24:49 PM PDT 24 13410724005 ps
T188 /workspace/coverage/default/43.sysrst_ctrl_smoke.2648975796 May 07 03:24:26 PM PDT 24 May 07 03:24:31 PM PDT 24 2121527178 ps
T27 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2953512167 May 07 03:24:09 PM PDT 24 May 07 03:24:43 PM PDT 24 45976374794 ps
T28 /workspace/coverage/default/20.sysrst_ctrl_stress_all.3860354829 May 07 03:23:38 PM PDT 24 May 07 03:23:57 PM PDT 24 13164105824 ps
T65 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4174753741 May 07 03:24:51 PM PDT 24 May 07 03:28:19 PM PDT 24 101345524456 ps
T80 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1498222673 May 07 03:23:03 PM PDT 24 May 07 03:23:20 PM PDT 24 22861395969 ps
T57 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.841043294 May 07 03:24:20 PM PDT 24 May 07 03:24:25 PM PDT 24 2483405433 ps
T261 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3695994082 May 07 03:24:49 PM PDT 24 May 07 03:25:27 PM PDT 24 58392245136 ps
T23 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.13870814 May 07 03:23:47 PM PDT 24 May 07 03:24:52 PM PDT 24 29469634999 ps
T81 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.2269675527 May 07 03:24:32 PM PDT 24 May 07 03:24:51 PM PDT 24 22688954757 ps
T279 /workspace/coverage/default/0.sysrst_ctrl_smoke.1385261786 May 07 03:23:09 PM PDT 24 May 07 03:23:11 PM PDT 24 2157266097 ps
T262 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3071681529 May 07 03:24:27 PM PDT 24 May 07 03:25:20 PM PDT 24 72634461411 ps
T280 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1132516550 May 07 03:23:23 PM PDT 24 May 07 03:23:26 PM PDT 24 2534231840 ps
T54 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.4221419537 May 07 03:23:29 PM PDT 24 May 07 03:23:34 PM PDT 24 3833795140 ps
T58 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3982638571 May 07 03:24:39 PM PDT 24 May 07 03:24:47 PM PDT 24 2460822155 ps
T103 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.3355676093 May 07 03:24:14 PM PDT 24 May 07 03:25:42 PM PDT 24 132281689334 ps
T55 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.2086727153 May 07 03:23:46 PM PDT 24 May 07 03:24:47 PM PDT 24 872836015930 ps
T281 /workspace/coverage/default/29.sysrst_ctrl_alert_test.2640246790 May 07 03:23:58 PM PDT 24 May 07 03:24:05 PM PDT 24 2016317935 ps
T263 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.4271410243 May 07 03:23:52 PM PDT 24 May 07 03:25:01 PM PDT 24 92826802525 ps
T38 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2874704847 May 07 03:23:47 PM PDT 24 May 07 03:28:01 PM PDT 24 92575832368 ps
T105 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.250007044 May 07 03:22:59 PM PDT 24 May 07 03:27:48 PM PDT 24 136789816676 ps
T35 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.2530697946 May 07 03:23:45 PM PDT 24 May 07 03:23:50 PM PDT 24 2513228165 ps
T59 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1463795494 May 07 03:24:27 PM PDT 24 May 07 03:24:38 PM PDT 24 2458923286 ps
T142 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.727674665 May 07 03:24:51 PM PDT 24 May 07 03:31:19 PM PDT 24 151385441140 ps
T143 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2059837107 May 07 03:22:55 PM PDT 24 May 07 03:30:38 PM PDT 24 168962163442 ps
T144 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1949337243 May 07 03:24:49 PM PDT 24 May 07 03:25:01 PM PDT 24 48441663439 ps
T145 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.1899541154 May 07 03:24:01 PM PDT 24 May 07 03:25:46 PM PDT 24 77542722641 ps
T146 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2409025274 May 07 03:24:16 PM PDT 24 May 07 03:24:25 PM PDT 24 2609057408 ps
T147 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.2607852846 May 07 03:24:16 PM PDT 24 May 07 03:27:21 PM PDT 24 128146986439 ps
T236 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.366919260 May 07 03:24:23 PM PDT 24 May 07 03:24:27 PM PDT 24 2463353489 ps
T237 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1461766823 May 07 03:23:02 PM PDT 24 May 07 03:23:21 PM PDT 24 22068406519 ps
T44 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3486010481 May 07 03:24:13 PM PDT 24 May 07 03:24:17 PM PDT 24 3273021402 ps
T304 /workspace/coverage/default/18.sysrst_ctrl_smoke.2737282694 May 07 03:23:36 PM PDT 24 May 07 03:23:41 PM PDT 24 2111560709 ps
T305 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1650560964 May 07 03:24:28 PM PDT 24 May 07 03:24:34 PM PDT 24 2494672812 ps
T306 /workspace/coverage/default/30.sysrst_ctrl_smoke.3570368635 May 07 03:24:00 PM PDT 24 May 07 03:24:05 PM PDT 24 2114346184 ps
T272 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1602824818 May 07 03:24:48 PM PDT 24 May 07 03:25:44 PM PDT 24 189569531845 ps
T307 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1838131308 May 07 03:23:23 PM PDT 24 May 07 03:23:26 PM PDT 24 2474859546 ps
T308 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.398071394 May 07 03:24:29 PM PDT 24 May 07 03:24:38 PM PDT 24 2193344872 ps
T34 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.1121677675 May 07 03:23:53 PM PDT 24 May 07 03:24:04 PM PDT 24 3374340033 ps
T82 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2127402515 May 07 03:23:22 PM PDT 24 May 07 03:24:32 PM PDT 24 25084018786 ps
T31 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.619652285 May 07 03:23:54 PM PDT 24 May 07 03:24:00 PM PDT 24 3533750014 ps
T154 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3952377405 May 07 03:22:57 PM PDT 24 May 07 03:23:03 PM PDT 24 2463022293 ps
T155 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2991605184 May 07 03:23:47 PM PDT 24 May 07 03:24:11 PM PDT 24 14883308578 ps
T156 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2970595794 May 07 03:23:10 PM PDT 24 May 07 03:23:13 PM PDT 24 2486679898 ps
T56 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.703209855 May 07 03:24:16 PM PDT 24 May 07 03:24:26 PM PDT 24 7061631983 ps
T157 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4124734581 May 07 03:24:42 PM PDT 24 May 07 03:24:51 PM PDT 24 2456422269 ps
T158 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.3646299105 May 07 03:24:21 PM PDT 24 May 07 03:25:09 PM PDT 24 17352233494 ps
T159 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3289035512 May 07 03:23:44 PM PDT 24 May 07 03:23:53 PM PDT 24 2510300031 ps
T216 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1281653991 May 07 03:24:19 PM PDT 24 May 07 03:24:26 PM PDT 24 2619393004 ps
T217 /workspace/coverage/default/48.sysrst_ctrl_smoke.3841336974 May 07 03:24:34 PM PDT 24 May 07 03:24:42 PM PDT 24 2108428336 ps
T318 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.4034216851 May 07 03:23:31 PM PDT 24 May 07 03:23:37 PM PDT 24 2447221043 ps
T319 /workspace/coverage/default/19.sysrst_ctrl_smoke.979076384 May 07 03:23:42 PM PDT 24 May 07 03:23:46 PM PDT 24 2120489451 ps
T284 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.1688198411 May 07 03:23:07 PM PDT 24 May 07 03:24:08 PM PDT 24 22007082783 ps
T320 /workspace/coverage/default/28.sysrst_ctrl_alert_test.1490695926 May 07 03:23:50 PM PDT 24 May 07 03:23:55 PM PDT 24 2025551036 ps
T266 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2552245967 May 07 03:23:42 PM PDT 24 May 07 03:25:30 PM PDT 24 150630226607 ps
T83 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2793806880 May 07 03:24:43 PM PDT 24 May 07 03:25:34 PM PDT 24 71987253943 ps
T404 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.4028136116 May 07 03:23:44 PM PDT 24 May 07 03:23:48 PM PDT 24 2467609417 ps
T405 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3175942299 May 07 03:22:54 PM PDT 24 May 07 03:23:04 PM PDT 24 2249899622 ps
T32 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2331130396 May 07 03:23:01 PM PDT 24 May 07 03:23:19 PM PDT 24 38389225546 ps
T45 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3368668399 May 07 03:24:36 PM PDT 24 May 07 03:24:48 PM PDT 24 20372903706 ps
T238 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.480470339 May 07 03:24:09 PM PDT 24 May 07 03:25:44 PM PDT 24 135303981117 ps
T33 /workspace/coverage/default/30.sysrst_ctrl_stress_all.2655174632 May 07 03:23:58 PM PDT 24 May 07 03:24:05 PM PDT 24 14548491154 ps
T239 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.1932315900 May 07 03:23:44 PM PDT 24 May 07 03:23:49 PM PDT 24 2633428729 ps
T240 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1123704957 May 07 03:23:05 PM PDT 24 May 07 03:23:46 PM PDT 24 51772981797 ps
T46 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.16522686 May 07 03:23:21 PM PDT 24 May 07 03:23:24 PM PDT 24 3517038681 ps
T39 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.411528653 May 07 03:24:02 PM PDT 24 May 07 03:24:11 PM PDT 24 3876707908 ps
T40 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.3106181686 May 07 03:23:38 PM PDT 24 May 07 03:23:40 PM PDT 24 4699657641 ps
T36 /workspace/coverage/default/44.sysrst_ctrl_stress_all.37166436 May 07 03:24:44 PM PDT 24 May 07 03:24:53 PM PDT 24 8318227570 ps
T136 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.343755974 May 07 03:24:32 PM PDT 24 May 07 03:24:42 PM PDT 24 2513778932 ps
T137 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3164968517 May 07 03:23:34 PM PDT 24 May 07 03:23:39 PM PDT 24 2615544870 ps
T47 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.298815965 May 07 03:23:23 PM PDT 24 May 07 03:23:27 PM PDT 24 3250568198 ps
T138 /workspace/coverage/default/27.sysrst_ctrl_alert_test.430241584 May 07 03:23:57 PM PDT 24 May 07 03:24:01 PM PDT 24 2026195603 ps
T139 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.3042584074 May 07 03:24:13 PM PDT 24 May 07 03:24:22 PM PDT 24 2610729169 ps
T66 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3137231734 May 07 03:23:25 PM PDT 24 May 07 03:24:54 PM PDT 24 744303608365 ps
T140 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3496732544 May 07 03:24:16 PM PDT 24 May 07 03:24:21 PM PDT 24 3582760182 ps
T406 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1054777263 May 07 03:23:32 PM PDT 24 May 07 03:23:37 PM PDT 24 2463909176 ps
T37 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.213115233 May 07 03:24:15 PM PDT 24 May 07 03:24:19 PM PDT 24 3715210836 ps
T41 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.1010218804 May 07 03:23:20 PM PDT 24 May 07 03:23:26 PM PDT 24 3262986159 ps
T407 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3701526006 May 07 03:23:01 PM PDT 24 May 07 03:23:10 PM PDT 24 2138368104 ps
T369 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1711732143 May 07 03:22:59 PM PDT 24 May 07 03:23:40 PM PDT 24 29602652272 ps
T408 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1972154145 May 07 03:23:04 PM PDT 24 May 07 03:23:08 PM PDT 24 2151119681 ps
T370 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.20487623 May 07 03:23:30 PM PDT 24 May 07 03:27:30 PM PDT 24 93264495247 ps
T84 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2364808101 May 07 03:23:12 PM PDT 24 May 07 03:24:05 PM PDT 24 39614314149 ps
T409 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3049551517 May 07 03:23:45 PM PDT 24 May 07 03:23:49 PM PDT 24 2220083588 ps
T410 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1539931357 May 07 03:24:49 PM PDT 24 May 07 03:25:17 PM PDT 24 37676379311 ps
T411 /workspace/coverage/default/21.sysrst_ctrl_smoke.3803898080 May 07 03:23:49 PM PDT 24 May 07 03:23:58 PM PDT 24 2112233130 ps
T321 /workspace/coverage/default/33.sysrst_ctrl_stress_all.4048622887 May 07 03:24:17 PM PDT 24 May 07 03:24:39 PM PDT 24 14709660209 ps
T412 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1984679338 May 07 03:23:04 PM PDT 24 May 07 03:23:13 PM PDT 24 2015291827 ps
T413 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2608288060 May 07 03:24:07 PM PDT 24 May 07 03:24:10 PM PDT 24 2067150181 ps
T401 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4112020447 May 07 03:24:43 PM PDT 24 May 07 03:24:52 PM PDT 24 2509976543 ps
T414 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2386208347 May 07 03:23:05 PM PDT 24 May 07 03:23:10 PM PDT 24 2495032990 ps
T71 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.948043480 May 07 03:24:12 PM PDT 24 May 07 03:25:44 PM PDT 24 120890843765 ps
T415 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.1952210967 May 07 03:23:56 PM PDT 24 May 07 03:24:02 PM PDT 24 2618535685 ps
T416 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.1730783509 May 07 03:23:30 PM PDT 24 May 07 03:23:32 PM PDT 24 2136322118 ps
T417 /workspace/coverage/default/48.sysrst_ctrl_alert_test.2947252619 May 07 03:24:38 PM PDT 24 May 07 03:24:44 PM PDT 24 2016632452 ps
T418 /workspace/coverage/default/42.sysrst_ctrl_smoke.4281512466 May 07 03:24:31 PM PDT 24 May 07 03:24:39 PM PDT 24 2111449886 ps
T78 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2779610688 May 07 03:24:14 PM PDT 24 May 07 03:24:24 PM PDT 24 5347217310 ps
T355 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1838561872 May 07 03:24:42 PM PDT 24 May 07 03:25:33 PM PDT 24 76433153116 ps
T313 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.3049296146 May 07 03:23:04 PM PDT 24 May 07 03:29:11 PM PDT 24 163860384448 ps
T397 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.1515885302 May 07 03:23:09 PM PDT 24 May 07 03:26:27 PM PDT 24 165635999698 ps
T309 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1830556480 May 07 03:23:42 PM PDT 24 May 07 03:24:27 PM PDT 24 383092617969 ps
T354 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1099160113 May 07 03:24:13 PM PDT 24 May 07 03:25:14 PM PDT 24 48369792439 ps
T419 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.4023037012 May 07 03:24:06 PM PDT 24 May 07 03:24:14 PM PDT 24 2702747438 ps
T285 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.982798282 May 07 03:23:04 PM PDT 24 May 07 03:23:22 PM PDT 24 22060178058 ps
T420 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3513032883 May 07 03:23:41 PM PDT 24 May 07 03:23:44 PM PDT 24 2536014779 ps
T162 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.2085432445 May 07 03:23:47 PM PDT 24 May 07 03:23:56 PM PDT 24 450738266368 ps
T400 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.590034881 May 07 03:24:40 PM PDT 24 May 07 03:25:31 PM PDT 24 96227457992 ps
T323 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.1699988347 May 07 03:24:17 PM PDT 24 May 07 03:24:22 PM PDT 24 2627176820 ps
T421 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.4260176522 May 07 03:24:01 PM PDT 24 May 07 03:24:10 PM PDT 24 2613305249 ps
T422 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1097494767 May 07 03:24:13 PM PDT 24 May 07 03:24:17 PM PDT 24 2620579071 ps
T423 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3804709693 May 07 03:24:11 PM PDT 24 May 07 03:24:17 PM PDT 24 2464160367 ps
T172 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3545816361 May 07 03:24:42 PM PDT 24 May 07 03:24:49 PM PDT 24 3736309530 ps
T424 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.4263617102 May 07 03:23:22 PM PDT 24 May 07 03:23:31 PM PDT 24 2614564300 ps
T274 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3364175171 May 07 03:24:50 PM PDT 24 May 07 03:25:25 PM PDT 24 42455116052 ps
T425 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1393268458 May 07 03:23:25 PM PDT 24 May 07 03:23:33 PM PDT 24 2509300950 ps
T426 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3127104238 May 07 03:24:42 PM PDT 24 May 07 03:24:48 PM PDT 24 2522435801 ps
T427 /workspace/coverage/default/38.sysrst_ctrl_alert_test.2460869938 May 07 03:24:26 PM PDT 24 May 07 03:24:30 PM PDT 24 2050805452 ps
T107 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3285686512 May 07 03:23:55 PM PDT 24 May 07 03:24:38 PM PDT 24 106917001007 ps
T85 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.165949975 May 07 03:24:54 PM PDT 24 May 07 03:25:06 PM PDT 24 25869209002 ps
T329 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.4292485915 May 07 03:23:15 PM PDT 24 May 07 03:23:19 PM PDT 24 2090924752 ps
T79 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.221959282 May 07 03:22:56 PM PDT 24 May 07 03:23:02 PM PDT 24 3897513956 ps
T330 /workspace/coverage/default/24.sysrst_ctrl_smoke.3709113933 May 07 03:23:44 PM PDT 24 May 07 03:23:48 PM PDT 24 2137583274 ps
T104 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.2317255375 May 07 03:22:55 PM PDT 24 May 07 03:23:08 PM PDT 24 3396872330 ps
T331 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1518870365 May 07 03:23:40 PM PDT 24 May 07 03:23:44 PM PDT 24 2623689322 ps
T332 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3676082374 May 07 03:23:50 PM PDT 24 May 07 03:23:55 PM PDT 24 2487341724 ps
T333 /workspace/coverage/default/46.sysrst_ctrl_smoke.422398514 May 07 03:24:31 PM PDT 24 May 07 03:24:40 PM PDT 24 2109966410 ps
T334 /workspace/coverage/default/10.sysrst_ctrl_smoke.312494107 May 07 03:23:24 PM PDT 24 May 07 03:23:31 PM PDT 24 2112431066 ps
T106 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.1563136940 May 07 03:24:19 PM PDT 24 May 07 03:24:31 PM PDT 24 3505019707 ps
T67 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2401915685 May 07 03:24:48 PM PDT 24 May 07 03:28:36 PM PDT 24 82802181740 ps
T173 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1749631615 May 07 03:23:44 PM PDT 24 May 07 03:23:48 PM PDT 24 4119159288 ps
T108 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2189986739 May 07 03:24:07 PM PDT 24 May 07 03:24:19 PM PDT 24 13293453986 ps
T428 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.863989107 May 07 03:22:57 PM PDT 24 May 07 03:23:04 PM PDT 24 2194541331 ps
T352 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.890668775 May 07 03:22:56 PM PDT 24 May 07 03:26:50 PM PDT 24 166722815476 ps
T324 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.2725221450 May 07 03:23:58 PM PDT 24 May 07 03:24:05 PM PDT 24 2513654243 ps
T429 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.800755929 May 07 03:24:09 PM PDT 24 May 07 03:24:20 PM PDT 24 3215475981 ps
T268 /workspace/coverage/default/34.sysrst_ctrl_stress_all.1115902172 May 07 03:24:17 PM PDT 24 May 07 03:24:36 PM PDT 24 106163465187 ps
T86 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.4141810507 May 07 03:24:21 PM PDT 24 May 07 03:24:41 PM PDT 24 25846348189 ps
T430 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2317073201 May 07 03:23:39 PM PDT 24 May 07 03:23:51 PM PDT 24 3714700521 ps
T431 /workspace/coverage/default/41.sysrst_ctrl_alert_test.4257422396 May 07 03:24:29 PM PDT 24 May 07 03:24:35 PM PDT 24 2015180588 ps
T432 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4024331479 May 07 03:22:57 PM PDT 24 May 07 03:23:08 PM PDT 24 2349902934 ps
T310 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.370551206 May 07 03:23:32 PM PDT 24 May 07 03:23:41 PM PDT 24 3233004062 ps
T161 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2846659227 May 07 03:23:50 PM PDT 24 May 07 03:29:54 PM PDT 24 134048173288 ps
T325 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3010535377 May 07 03:22:58 PM PDT 24 May 07 03:23:06 PM PDT 24 2520124987 ps
T433 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1842589656 May 07 03:24:30 PM PDT 24 May 07 03:24:40 PM PDT 24 4132992212 ps
T434 /workspace/coverage/default/9.sysrst_ctrl_alert_test.2955141249 May 07 03:23:25 PM PDT 24 May 07 03:23:29 PM PDT 24 2026202104 ps
T435 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.934071770 May 07 03:23:41 PM PDT 24 May 07 03:23:49 PM PDT 24 2199727272 ps
T436 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2624507426 May 07 03:24:46 PM PDT 24 May 07 03:24:52 PM PDT 24 4489676678 ps
T437 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3466137068 May 07 03:23:01 PM PDT 24 May 07 03:23:16 PM PDT 24 3809183691 ps
T163 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.2266812568 May 07 03:23:43 PM PDT 24 May 07 03:23:47 PM PDT 24 3159290811 ps
T438 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2987691915 May 07 03:23:17 PM PDT 24 May 07 03:23:30 PM PDT 24 3912914472 ps
T375 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.738745384 May 07 03:24:41 PM PDT 24 May 07 03:30:36 PM PDT 24 202815404667 ps
T134 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1830749377 May 07 03:23:58 PM PDT 24 May 07 03:24:02 PM PDT 24 2857854921 ps
T439 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.237864045 May 07 03:23:55 PM PDT 24 May 07 03:24:05 PM PDT 24 2611652632 ps
T440 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.632150983 May 07 03:23:47 PM PDT 24 May 07 03:27:00 PM PDT 24 297290161589 ps
T441 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.1389108997 May 07 03:23:45 PM PDT 24 May 07 03:23:50 PM PDT 24 3839601693 ps
T442 /workspace/coverage/default/11.sysrst_ctrl_stress_all.520550160 May 07 03:23:24 PM PDT 24 May 07 03:23:30 PM PDT 24 7445756098 ps
T443 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3415494876 May 07 03:24:31 PM PDT 24 May 07 03:24:36 PM PDT 24 2465203494 ps
T444 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1068213378 May 07 03:24:04 PM PDT 24 May 07 03:24:09 PM PDT 24 3755134106 ps
T75 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3353814842 May 07 03:23:34 PM PDT 24 May 07 03:23:47 PM PDT 24 40887932543 ps
T117 /workspace/coverage/default/12.sysrst_ctrl_alert_test.3731994455 May 07 03:23:30 PM PDT 24 May 07 03:23:37 PM PDT 24 2013893422 ps
T118 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.416172093 May 07 03:23:35 PM PDT 24 May 07 03:24:48 PM PDT 24 115391380663 ps
T73 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.956531305 May 07 03:24:28 PM PDT 24 May 07 03:24:35 PM PDT 24 2806051978 ps
T119 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.535729999 May 07 03:23:33 PM PDT 24 May 07 03:23:40 PM PDT 24 2613330813 ps
T120 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.346987295 May 07 03:24:17 PM PDT 24 May 07 03:26:08 PM PDT 24 156756265104 ps
T121 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1942546285 May 07 03:24:26 PM PDT 24 May 07 03:29:42 PM PDT 24 1501763584040 ps
T122 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3252208598 May 07 03:22:55 PM PDT 24 May 07 03:23:02 PM PDT 24 3435375935 ps
T123 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1666716985 May 07 03:24:28 PM PDT 24 May 07 03:24:35 PM PDT 24 2620588470 ps
T109 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2039706870 May 07 03:23:23 PM PDT 24 May 07 03:23:27 PM PDT 24 8681698806 ps
T72 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2434408229 May 07 03:23:05 PM PDT 24 May 07 03:23:15 PM PDT 24 11452441768 ps
T214 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1618534758 May 07 03:24:21 PM PDT 24 May 07 03:24:38 PM PDT 24 26093535337 ps
T215 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2167493129 May 07 03:23:20 PM PDT 24 May 07 03:23:26 PM PDT 24 2014446958 ps
T445 /workspace/coverage/default/31.sysrst_ctrl_stress_all.22912505 May 07 03:24:02 PM PDT 24 May 07 03:24:27 PM PDT 24 9624254668 ps
T446 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.193031294 May 07 03:23:59 PM PDT 24 May 07 03:24:06 PM PDT 24 2017966989 ps
T111 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.3230385679 May 07 03:23:45 PM PDT 24 May 07 03:23:55 PM PDT 24 3138310005 ps
T447 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2392646909 May 07 03:23:52 PM PDT 24 May 07 03:23:57 PM PDT 24 2476645942 ps
T448 /workspace/coverage/default/42.sysrst_ctrl_alert_test.338445497 May 07 03:24:29 PM PDT 24 May 07 03:24:36 PM PDT 24 2024612225 ps
T135 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2433155070 May 07 03:23:51 PM PDT 24 May 07 03:25:15 PM PDT 24 340134892572 ps
T449 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.971866193 May 07 03:24:14 PM PDT 24 May 07 03:24:20 PM PDT 24 2867091616 ps
T450 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2222291578 May 07 03:23:25 PM PDT 24 May 07 03:23:27 PM PDT 24 2506512080 ps
T314 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.4153949673 May 07 03:24:25 PM PDT 24 May 07 03:25:46 PM PDT 24 116725498738 ps
T269 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.2992991625 May 07 03:24:36 PM PDT 24 May 07 03:25:36 PM PDT 24 130645044401 ps
T451 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.871847109 May 07 03:23:00 PM PDT 24 May 07 03:23:06 PM PDT 24 2632017224 ps
T398 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.831909533 May 07 03:24:20 PM PDT 24 May 07 03:24:32 PM PDT 24 3543223264 ps
T452 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4240444133 May 07 03:24:38 PM PDT 24 May 07 03:24:51 PM PDT 24 3869490682 ps
T141 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1523693343 May 07 03:24:30 PM PDT 24 May 07 03:24:41 PM PDT 24 2719788415 ps
T148 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1093663686 May 07 03:24:06 PM PDT 24 May 07 03:24:58 PM PDT 24 154906970719 ps
T149 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2693451744 May 07 03:23:50 PM PDT 24 May 07 03:24:32 PM PDT 24 60345769992 ps
T453 /workspace/coverage/default/1.sysrst_ctrl_alert_test.1766082501 May 07 03:22:54 PM PDT 24 May 07 03:22:59 PM PDT 24 2027890278 ps
T454 /workspace/coverage/default/18.sysrst_ctrl_alert_test.2719991232 May 07 03:23:38 PM PDT 24 May 07 03:23:41 PM PDT 24 2105351150 ps
T455 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1473443697 May 07 03:23:06 PM PDT 24 May 07 03:23:10 PM PDT 24 2627234583 ps
T373 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.867956016 May 07 03:24:00 PM PDT 24 May 07 03:25:19 PM PDT 24 112942818655 ps
T275 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.2035976723 May 07 03:23:43 PM PDT 24 May 07 03:27:09 PM PDT 24 85623863715 ps
T456 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.3522827602 May 07 03:23:51 PM PDT 24 May 07 03:23:58 PM PDT 24 2516118158 ps
T457 /workspace/coverage/default/45.sysrst_ctrl_smoke.1785087870 May 07 03:24:44 PM PDT 24 May 07 03:24:48 PM PDT 24 2135038862 ps
T395 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3849125138 May 07 03:24:29 PM PDT 24 May 07 03:24:58 PM PDT 24 35856500179 ps
T458 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1083035892 May 07 03:23:07 PM PDT 24 May 07 03:23:19 PM PDT 24 3819315349 ps
T459 /workspace/coverage/default/7.sysrst_ctrl_alert_test.2081516444 May 07 03:23:20 PM PDT 24 May 07 03:23:26 PM PDT 24 2013115498 ps
T460 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2710567394 May 07 03:24:05 PM PDT 24 May 07 03:24:16 PM PDT 24 3319706267 ps
T376 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.529279653 May 07 03:24:57 PM PDT 24 May 07 03:26:23 PM PDT 24 63802579892 ps
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