Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.73 99.33 96.38 100.00 96.15 98.82 99.42 94.03


Total tests in report: 915
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
53.39 53.39 77.46 77.46 63.80 63.80 64.27 64.27 11.54 11.54 78.26 78.26 65.32 65.32 13.08 13.08 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1512137488
71.65 18.26 89.08 11.63 81.90 18.10 87.33 23.06 36.54 25.00 89.39 11.13 78.61 13.29 38.68 25.60 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3291900860
78.15 6.50 92.78 3.69 85.44 3.54 88.24 0.91 60.26 23.72 92.61 3.22 87.09 8.48 40.60 1.92 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1951113266
81.94 3.80 92.95 0.17 85.54 0.10 88.24 0.00 64.74 4.49 92.83 0.22 88.82 1.73 60.49 19.89 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2091115220
84.81 2.86 94.51 1.57 87.59 2.05 88.24 0.00 78.21 13.46 94.49 1.66 90.08 1.25 60.54 0.05 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2572633265
87.58 2.77 96.68 2.16 90.52 2.93 97.49 9.25 78.21 0.00 96.60 2.11 90.94 0.87 62.62 2.08 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.4116720371
89.56 1.98 97.29 0.62 91.41 0.88 97.49 0.00 82.05 3.85 97.15 0.55 94.61 3.66 66.93 4.31 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2850081313
90.92 1.36 97.74 0.45 92.09 0.68 97.49 0.00 85.26 3.21 97.41 0.26 95.76 1.16 70.72 3.79 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2480659315
92.07 1.15 97.80 0.06 93.10 1.01 97.49 0.00 85.26 0.00 97.49 0.07 96.34 0.58 77.05 6.33 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.613772618
92.90 0.82 98.30 0.50 93.55 0.46 97.49 0.00 88.46 3.21 97.82 0.33 97.59 1.25 77.05 0.00 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.1466339686
93.57 0.67 98.38 0.07 93.71 0.15 97.49 0.00 89.74 1.28 97.89 0.07 97.59 0.00 80.17 3.12 /workspace/coverage/default/5.sysrst_ctrl_stress_all.2333601937
93.92 0.36 98.47 0.09 93.83 0.13 97.49 0.00 89.74 0.00 97.89 0.00 97.69 0.10 82.35 2.18 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2945770390
94.22 0.30 98.58 0.11 94.03 0.20 97.49 0.00 90.38 0.64 98.00 0.11 97.98 0.29 83.07 0.73 /workspace/coverage/default/43.sysrst_ctrl_stress_all.467659786
94.52 0.30 98.62 0.04 94.11 0.08 97.49 0.00 91.03 0.64 98.04 0.04 98.17 0.19 84.16 1.09 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3688141394
94.80 0.29 98.68 0.06 94.16 0.05 97.49 0.00 91.67 0.64 98.11 0.07 98.27 0.10 85.25 1.09 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4271928580
95.04 0.24 98.73 0.06 94.24 0.08 98.86 1.37 91.67 0.00 98.11 0.00 98.27 0.00 85.41 0.16 /workspace/coverage/default/1.sysrst_ctrl_alert_test.17342239
95.26 0.22 98.75 0.02 94.51 0.28 99.54 0.68 91.67 0.00 98.15 0.04 98.27 0.00 85.93 0.52 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3505901116
95.48 0.22 98.86 0.11 94.51 0.00 99.54 0.00 92.31 0.64 98.19 0.04 98.27 0.00 86.66 0.73 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2756611007
95.66 0.19 98.90 0.04 94.54 0.03 99.54 0.00 92.95 0.64 98.23 0.04 98.36 0.10 87.12 0.47 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2294802587
95.83 0.17 98.90 0.00 95.48 0.94 99.54 0.00 92.95 0.00 98.23 0.00 98.36 0.00 87.38 0.26 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.3347825482
95.99 0.16 98.97 0.07 95.55 0.08 99.54 0.00 93.59 0.64 98.34 0.11 98.55 0.19 87.38 0.00 /workspace/coverage/default/40.sysrst_ctrl_stress_all.3653223909
96.12 0.13 98.97 0.00 95.55 0.00 99.54 0.00 93.59 0.00 98.34 0.00 98.55 0.00 88.32 0.93 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.4231024800
96.25 0.13 99.01 0.04 95.58 0.03 99.54 0.00 94.23 0.64 98.37 0.04 98.65 0.10 88.37 0.05 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.960171959
96.38 0.13 99.05 0.04 95.60 0.03 99.54 0.00 94.87 0.64 98.41 0.04 98.75 0.10 88.42 0.05 /workspace/coverage/default/49.sysrst_ctrl_stress_all.3573845268
96.50 0.12 99.09 0.04 95.60 0.00 99.54 0.00 94.87 0.00 98.41 0.00 98.75 0.00 89.25 0.83 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.2194219421
96.62 0.12 99.12 0.04 95.63 0.03 99.54 0.00 95.51 0.64 98.45 0.04 98.84 0.10 89.25 0.00 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.678000970
96.74 0.12 99.16 0.04 95.65 0.03 99.54 0.00 96.15 0.64 98.48 0.04 98.94 0.10 89.25 0.00 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1168907686
96.84 0.10 99.16 0.00 95.68 0.03 100.00 0.46 96.15 0.00 98.48 0.00 99.04 0.10 89.36 0.10 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.4290558692
96.91 0.08 99.18 0.02 95.68 0.00 100.00 0.00 96.15 0.00 98.48 0.00 99.13 0.10 89.77 0.42 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2403378613
96.99 0.07 99.18 0.00 95.68 0.00 100.00 0.00 96.15 0.00 98.48 0.00 99.13 0.00 90.29 0.52 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.165896145
97.06 0.07 99.18 0.00 95.68 0.00 100.00 0.00 96.15 0.00 98.48 0.00 99.13 0.00 90.76 0.47 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3138281891
97.11 0.06 99.18 0.00 95.68 0.00 100.00 0.00 96.15 0.00 98.48 0.00 99.13 0.00 91.17 0.42 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1799403142
97.17 0.06 99.22 0.04 95.78 0.10 100.00 0.00 96.15 0.00 98.56 0.07 99.33 0.19 91.17 0.00 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2165580771
97.22 0.05 99.22 0.00 95.78 0.00 100.00 0.00 96.15 0.00 98.56 0.00 99.33 0.00 91.54 0.36 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.861597590
97.28 0.05 99.22 0.00 95.78 0.00 100.00 0.00 96.15 0.00 98.56 0.00 99.33 0.00 91.90 0.36 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3641621902
97.32 0.05 99.22 0.00 96.11 0.33 100.00 0.00 96.15 0.00 98.56 0.00 99.33 0.00 91.90 0.00 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1691406934
97.36 0.04 99.22 0.00 96.11 0.00 100.00 0.00 96.15 0.00 98.56 0.00 99.33 0.00 92.16 0.26 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1302877271
97.39 0.03 99.22 0.00 96.13 0.03 100.00 0.00 96.15 0.00 98.56 0.00 99.42 0.10 92.26 0.10 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3881237901
97.42 0.03 99.22 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.56 0.00 99.42 0.00 92.47 0.21 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2374893486
97.44 0.02 99.23 0.02 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.04 99.42 0.00 92.58 0.10 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1778958186
97.47 0.02 99.23 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.00 99.42 0.00 92.73 0.16 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3548282051
97.49 0.02 99.23 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.00 99.42 0.00 92.89 0.16 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.2383360294
97.51 0.02 99.23 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.00 99.42 0.00 93.04 0.16 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2806168225
97.53 0.01 99.23 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.00 99.42 0.00 93.15 0.10 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.259964901
97.54 0.01 99.23 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.00 99.42 0.00 93.25 0.10 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.3189376229
97.56 0.01 99.23 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.00 99.42 0.00 93.35 0.10 /workspace/coverage/default/33.sysrst_ctrl_stress_all.812118335
97.57 0.01 99.23 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.60 0.00 99.42 0.00 93.46 0.10 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.148504471
97.58 0.01 99.25 0.02 96.13 0.00 100.00 0.00 96.15 0.00 98.67 0.07 99.42 0.00 93.46 0.00 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.1603400913
97.59 0.01 99.27 0.02 96.13 0.00 100.00 0.00 96.15 0.00 98.71 0.04 99.42 0.00 93.46 0.00 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.708020707
97.60 0.01 99.29 0.02 96.13 0.00 100.00 0.00 96.15 0.00 98.74 0.04 99.42 0.00 93.46 0.00 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.3370955918
97.61 0.01 99.31 0.02 96.13 0.00 100.00 0.00 96.15 0.00 98.78 0.04 99.42 0.00 93.46 0.00 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3712489247
97.62 0.01 99.33 0.02 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.04 99.42 0.00 93.46 0.00 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.4267464768
97.62 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.51 0.05 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.2464863925
97.63 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.56 0.05 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2684296067
97.64 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.61 0.05 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.82756826
97.65 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.67 0.05 /workspace/coverage/default/1.sysrst_ctrl_stress_all.3398656053
97.65 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.72 0.05 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.2792965597
97.66 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.77 0.05 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2462825440
97.67 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.82 0.05 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3356569127
97.68 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.87 0.05 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3876944459
97.68 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.93 0.05 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2185668833
97.69 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 93.98 0.05 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4276123514
97.70 0.01 99.33 0.00 96.13 0.00 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 94.03 0.05 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1645404483
97.70 0.01 99.33 0.00 96.18 0.05 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 94.03 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3259905618
97.71 0.01 99.33 0.00 96.23 0.05 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 94.03 0.00 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2393039400
97.72 0.01 99.33 0.00 96.28 0.05 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 94.03 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.481817600
97.72 0.01 99.33 0.00 96.31 0.03 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 94.03 0.00 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.1705779721
97.73 0.01 99.33 0.00 96.33 0.03 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 94.03 0.00 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.1881907063
97.73 0.01 99.33 0.00 96.36 0.03 100.00 0.00 96.15 0.00 98.82 0.00 99.42 0.00 94.03 0.00 /workspace/coverage/default/14.sysrst_ctrl_stress_all.685018085


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.875455693
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1940191941
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2560796109
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.246814533
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.633920075
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3997496645
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3603091740
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2606627192
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2431485894
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3312737098
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2028593544
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1931114804
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.4095951102
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.835171812
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.4184460619
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.177904381
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3839574680
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.758697217
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3796885520
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2512317887
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3990196703
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2634244215
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1140820079
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2996026365
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1048959894
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.906253022
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1396106729
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3051304185
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.699520459
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.740605591
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.4198202666
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2836859140
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.4221273355
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1944990134
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.2195576057
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3541944387
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.823700369
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3236312191
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.474802469
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2325552573
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.220189532
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1603605803
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3691051893
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1650999452
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3186683983
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1178610317
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1836931333
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1393062649
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1901173463
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1525352453
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3202166195
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1855066672
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2785346207
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2568922476
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.433262761
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2177807201
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2306504963
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.137170551
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.4047493958
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2462216043
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2164976880
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.2785269845
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2170716296
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2720757448
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.4001116165
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3631054217
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.822316548
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2302821748
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.4293586461
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.664132113
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1545197067
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3030672778
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.457044919
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.87370233
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2467209254
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1011015260
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.1637989784
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2477290319
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.4096104075
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/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3583327188
/workspace/coverage/default/41.sysrst_ctrl_smoke.291621564
/workspace/coverage/default/41.sysrst_ctrl_stress_all.960869501
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.4044897208
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3927907096
/workspace/coverage/default/42.sysrst_ctrl_alert_test.933943629
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3670202710
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2645429393
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1856613423
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.226694338
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1751146556
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2564025768
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1714451991
/workspace/coverage/default/42.sysrst_ctrl_smoke.4020977922
/workspace/coverage/default/42.sysrst_ctrl_stress_all.2725072772
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1807918779
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2942382358
/workspace/coverage/default/43.sysrst_ctrl_alert_test.4227240415
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3331303327
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1997542675
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2539632356
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1126101766
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2963573877
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1866862939
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2348359366
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1037276664
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.107772387
/workspace/coverage/default/43.sysrst_ctrl_smoke.3473476777
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.160124720
/workspace/coverage/default/44.sysrst_ctrl_alert_test.615301681
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.516293537
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2876107519
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2142226391
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1419825985
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3592602712
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.389091129
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2945690246
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1623233645
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.810451330
/workspace/coverage/default/44.sysrst_ctrl_smoke.4035966440
/workspace/coverage/default/44.sysrst_ctrl_stress_all.762719691
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3977310389
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2834420143
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.4242369377
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1804772638
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4231140550
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1177376541
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.902512790
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2346128841
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1871686504
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3589631165
/workspace/coverage/default/45.sysrst_ctrl_smoke.3344820306
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1020935495
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.4040333439
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.470956087
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2643047331
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.742231178
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3534896311
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2282713841
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3710781481
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.411669198
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3769215778
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1855437528
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2191542160
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3794150647
/workspace/coverage/default/46.sysrst_ctrl_smoke.2161330746
/workspace/coverage/default/46.sysrst_ctrl_stress_all.814044753
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.378794523
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1919643303
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1862652072
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3166097712
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.686811221
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1182944562
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1218451884
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.509797249
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.15243414
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.400964427
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2752534380
/workspace/coverage/default/47.sysrst_ctrl_smoke.900735104
/workspace/coverage/default/47.sysrst_ctrl_stress_all.4256714547
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3795658936
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1124426945
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1715586671
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2544620689
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.946825082
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1726440032
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4275674306
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2283866959
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2139327264
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3383694426
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1911811744
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1328320858
/workspace/coverage/default/48.sysrst_ctrl_smoke.2331486746
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1539455725
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.601325531
/workspace/coverage/default/49.sysrst_ctrl_alert_test.807105315
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.403170892
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2851832596
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2399384000
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.130051589
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.730418795
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.133326795
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2355685732
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.764963918
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.501220525
/workspace/coverage/default/49.sysrst_ctrl_smoke.3261939316
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2142247548
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1757327985
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2058025378
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1739033669
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3691039174
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1441046590
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1005733782
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3024800357
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2208390398
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3471096598
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.2713517057
/workspace/coverage/default/5.sysrst_ctrl_smoke.1819951243
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4099087395
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.4074393640
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3942770337
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.748022917
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2671714670
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2868922396
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1794721197
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.981009145
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2495491683
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1877519960
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1912054151
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.184361328
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.4282482411
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1673160378
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.50030834
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2062400109
/workspace/coverage/default/6.sysrst_ctrl_smoke.1561544146
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3179515653
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1781830483
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3300009983
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.420913841
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2173997709
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.403099215
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1479304123
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1221215910
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.582758662
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2556404837
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2773583266
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3982774839
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.4283890569
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2914707272
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.243806361
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.83724206
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3708816617
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2546539667
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.82104384
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1934387007
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3617675361
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3682966588
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.4229397435
/workspace/coverage/default/7.sysrst_ctrl_smoke.20742630
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3160507075
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.777184141
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3844524080
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3287314470
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.769538247
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1358050538
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1240962451
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1373994582
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.430007977
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3295322435
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1872409976
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3823553696
/workspace/coverage/default/8.sysrst_ctrl_alert_test.842594964
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.4143327218
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.974154307
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2718758039
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1351501610
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.43972908
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1425401781
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3807917260
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1735164226
/workspace/coverage/default/8.sysrst_ctrl_smoke.2995782942
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3419593552
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.4104801550
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.4040383281
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1266223588
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3470979079
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3266420849
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2018941849
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.890475151
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3611431547
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2723240349
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2148080128
/workspace/coverage/default/9.sysrst_ctrl_alert_test.1288485080
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3959468754
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.175319876
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2545255048
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2575676854
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3861884140
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1452706957
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3773361223
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1568151384
/workspace/coverage/default/9.sysrst_ctrl_smoke.321586343
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2109757605
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.352738871
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2436505390
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2596118727
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3920550514
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1933845421
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1030771714
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.52268039
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.515772772
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1529451705




Total test records in report: 915
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.4116720371 May 14 12:40:07 PM PDT 24 May 14 12:41:31 PM PDT 24 131634488329 ps
T5 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.1151858259 May 14 12:40:49 PM PDT 24 May 14 12:41:01 PM PDT 24 3262298668 ps
T6 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.604206710 May 14 12:40:50 PM PDT 24 May 14 12:40:56 PM PDT 24 2537993770 ps
T1 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1512137488 May 14 12:41:23 PM PDT 24 May 14 12:42:58 PM PDT 24 36152625113 ps
T14 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.4067830053 May 14 12:40:55 PM PDT 24 May 14 12:40:58 PM PDT 24 2693514832 ps
T15 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1155816493 May 14 12:40:56 PM PDT 24 May 14 12:41:05 PM PDT 24 2508290884 ps
T16 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1312380966 May 14 12:39:59 PM PDT 24 May 14 12:40:05 PM PDT 24 3711697710 ps
T17 /workspace/coverage/default/44.sysrst_ctrl_smoke.4035966440 May 14 12:41:18 PM PDT 24 May 14 12:41:22 PM PDT 24 2142899984 ps
T18 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2659921161 May 14 12:40:18 PM PDT 24 May 14 12:40:27 PM PDT 24 2468675794 ps
T19 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1872409976 May 14 12:41:06 PM PDT 24 May 14 12:42:21 PM PDT 24 26081997634 ps
T20 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.232768237 May 14 12:41:01 PM PDT 24 May 14 12:41:11 PM PDT 24 2454980772 ps
T2 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2084952486 May 14 12:40:23 PM PDT 24 May 14 12:42:32 PM PDT 24 55763982745 ps
T21 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1601555316 May 14 12:41:01 PM PDT 24 May 14 12:41:12 PM PDT 24 2451666548 ps
T3 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2545255048 May 14 12:40:37 PM PDT 24 May 14 12:42:43 PM PDT 24 188302525792 ps
T48 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2361399109 May 14 12:40:51 PM PDT 24 May 14 12:41:06 PM PDT 24 52190402739 ps
T7 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.946825082 May 14 12:41:17 PM PDT 24 May 14 12:41:32 PM PDT 24 58856407844 ps
T68 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2896995285 May 14 12:40:08 PM PDT 24 May 14 12:40:16 PM PDT 24 2454843903 ps
T34 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.35371477 May 14 12:40:49 PM PDT 24 May 14 12:40:54 PM PDT 24 4736120249 ps
T60 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.4093909336 May 14 12:40:28 PM PDT 24 May 14 12:40:32 PM PDT 24 2804451238 ps
T65 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1376372309 May 14 12:40:48 PM PDT 24 May 14 12:40:53 PM PDT 24 2116552252 ps
T8 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2621748424 May 14 12:40:32 PM PDT 24 May 14 12:51:22 PM PDT 24 2121760600570 ps
T66 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1285117052 May 14 12:40:45 PM PDT 24 May 14 12:40:54 PM PDT 24 2030259259 ps
T9 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.3084398897 May 14 12:39:51 PM PDT 24 May 14 12:40:06 PM PDT 24 34954119092 ps
T10 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2945770390 May 14 12:41:23 PM PDT 24 May 14 12:45:39 PM PDT 24 102973783861 ps
T11 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.2749438847 May 14 12:41:00 PM PDT 24 May 14 12:43:51 PM PDT 24 67699476281 ps
T67 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.822356131 May 14 12:41:06 PM PDT 24 May 14 12:41:18 PM PDT 24 2615173747 ps
T12 /workspace/coverage/default/10.sysrst_ctrl_stress_all.3815762799 May 14 12:40:45 PM PDT 24 May 14 12:41:03 PM PDT 24 14749814681 ps
T49 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3470979079 May 14 12:41:11 PM PDT 24 May 14 12:41:33 PM PDT 24 26845232448 ps
T13 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3291900860 May 14 12:41:13 PM PDT 24 May 14 12:42:16 PM PDT 24 88686424004 ps
T50 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3881237901 May 14 12:40:33 PM PDT 24 May 14 12:40:55 PM PDT 24 34322961772 ps
T58 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3617675361 May 14 12:40:08 PM PDT 24 May 14 12:40:13 PM PDT 24 2462844793 ps
T59 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3349456086 May 14 12:40:03 PM PDT 24 May 14 12:40:12 PM PDT 24 2155126061 ps
T35 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.769538247 May 14 12:41:26 PM PDT 24 May 14 12:42:19 PM PDT 24 74771369539 ps
T27 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.1603400913 May 14 12:40:53 PM PDT 24 May 14 12:41:08 PM PDT 24 5820113863 ps
T36 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.890475151 May 14 12:41:21 PM PDT 24 May 14 12:43:27 PM PDT 24 98157292439 ps
T26 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.777184141 May 14 12:40:30 PM PDT 24 May 14 12:41:59 PM PDT 24 1118400731528 ps
T71 /workspace/coverage/default/42.sysrst_ctrl_alert_test.933943629 May 14 12:41:07 PM PDT 24 May 14 12:41:11 PM PDT 24 2043455812 ps
T72 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3202982056 May 14 12:40:23 PM PDT 24 May 14 12:40:31 PM PDT 24 2211088250 ps
T28 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.3712462228 May 14 12:40:23 PM PDT 24 May 14 12:40:31 PM PDT 24 3530291073 ps
T51 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3331303327 May 14 12:41:10 PM PDT 24 May 14 12:54:17 PM PDT 24 325434266241 ps
T78 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2354277814 May 14 12:39:40 PM PDT 24 May 14 12:41:29 PM PDT 24 43325318379 ps
T70 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3655806045 May 14 12:40:49 PM PDT 24 May 14 12:40:56 PM PDT 24 2614620521 ps
T39 /workspace/coverage/default/22.sysrst_ctrl_stress_all.523210974 May 14 12:40:57 PM PDT 24 May 14 12:43:55 PM PDT 24 522916092091 ps
T40 /workspace/coverage/default/40.sysrst_ctrl_stress_all.3653223909 May 14 12:40:58 PM PDT 24 May 14 12:41:06 PM PDT 24 10575719053 ps
T52 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.4211214432 May 14 12:40:47 PM PDT 24 May 14 12:40:59 PM PDT 24 3263318834 ps
T159 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.2519891172 May 14 12:40:45 PM PDT 24 May 14 12:42:32 PM PDT 24 56090424107 ps
T160 /workspace/coverage/default/49.sysrst_ctrl_alert_test.807105315 May 14 12:41:25 PM PDT 24 May 14 12:41:29 PM PDT 24 2023381399 ps
T161 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3809922764 May 14 12:40:24 PM PDT 24 May 14 12:40:29 PM PDT 24 2113724421 ps
T73 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3287314470 May 14 12:41:35 PM PDT 24 May 14 12:42:00 PM PDT 24 31509283227 ps
T61 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.378794523 May 14 12:41:17 PM PDT 24 May 14 12:41:26 PM PDT 24 4957988612 ps
T95 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3823553696 May 14 12:41:25 PM PDT 24 May 14 12:42:22 PM PDT 24 24327932392 ps
T162 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3060366447 May 14 12:40:59 PM PDT 24 May 14 12:41:02 PM PDT 24 2561460010 ps
T126 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2282713841 May 14 12:41:28 PM PDT 24 May 14 12:41:44 PM PDT 24 40795463189 ps
T62 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3640137083 May 14 12:41:16 PM PDT 24 May 14 12:42:11 PM PDT 24 1432099419467 ps
T331 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.2419203775 May 14 12:40:49 PM PDT 24 May 14 12:40:58 PM PDT 24 3489936883 ps
T332 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3807917260 May 14 12:40:08 PM PDT 24 May 14 12:40:13 PM PDT 24 2137291089 ps
T333 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1493858727 May 14 12:40:39 PM PDT 24 May 14 12:40:45 PM PDT 24 2133554841 ps
T37 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2756611007 May 14 12:41:21 PM PDT 24 May 14 12:41:36 PM PDT 24 55965528997 ps
T79 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3138281891 May 14 12:40:43 PM PDT 24 May 14 12:41:50 PM PDT 24 94425409042 ps
T69 /workspace/coverage/default/27.sysrst_ctrl_stress_all.44235514 May 14 12:40:41 PM PDT 24 May 14 12:40:50 PM PDT 24 6530164054 ps
T274 /workspace/coverage/default/37.sysrst_ctrl_alert_test.1939728168 May 14 12:41:12 PM PDT 24 May 14 12:41:16 PM PDT 24 2266433093 ps
T53 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.4139429138 May 14 12:40:35 PM PDT 24 May 14 12:41:54 PM PDT 24 29357158383 ps
T54 /workspace/coverage/default/24.sysrst_ctrl_stress_all.140496672 May 14 12:40:54 PM PDT 24 May 14 12:41:04 PM PDT 24 8095834381 ps
T275 /workspace/coverage/default/3.sysrst_ctrl_smoke.3987759145 May 14 12:40:02 PM PDT 24 May 14 12:40:06 PM PDT 24 2214784758 ps
T63 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.470956087 May 14 12:40:57 PM PDT 24 May 14 12:41:07 PM PDT 24 5067708195 ps
T276 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.130051589 May 14 12:41:09 PM PDT 24 May 14 12:41:20 PM PDT 24 2567091525 ps
T55 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2834420143 May 14 12:41:02 PM PDT 24 May 14 12:41:18 PM PDT 24 3674099765 ps
T277 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2799246313 May 14 12:40:28 PM PDT 24 May 14 12:40:37 PM PDT 24 2128232754 ps
T56 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1849452350 May 14 12:39:55 PM PDT 24 May 14 12:40:06 PM PDT 24 3197125803 ps
T402 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2752534380 May 14 12:41:20 PM PDT 24 May 14 12:41:25 PM PDT 24 2531294715 ps
T312 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3708718200 May 14 12:40:33 PM PDT 24 May 14 12:40:41 PM PDT 24 3769178566 ps
T321 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2821364189 May 14 12:40:54 PM PDT 24 May 14 12:41:03 PM PDT 24 2508982562 ps
T313 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1342552320 May 14 12:40:08 PM PDT 24 May 14 12:40:15 PM PDT 24 2874142206 ps
T326 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1331266153 May 14 12:40:43 PM PDT 24 May 14 12:40:49 PM PDT 24 2028693111 ps
T57 /workspace/coverage/default/17.sysrst_ctrl_stress_all.72030805 May 14 12:40:48 PM PDT 24 May 14 12:40:57 PM PDT 24 8022834506 ps
T327 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.836645661 May 14 12:40:28 PM PDT 24 May 14 12:40:32 PM PDT 24 2217782409 ps
T328 /workspace/coverage/default/42.sysrst_ctrl_smoke.4020977922 May 14 12:41:15 PM PDT 24 May 14 12:41:24 PM PDT 24 2110894821 ps
T64 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.897591275 May 14 12:40:46 PM PDT 24 May 14 12:40:51 PM PDT 24 6414968301 ps
T329 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2075727259 May 14 12:40:57 PM PDT 24 May 14 12:41:03 PM PDT 24 2459907155 ps
T330 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.4071799183 May 14 12:40:44 PM PDT 24 May 14 12:40:54 PM PDT 24 2453309748 ps
T127 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3942770337 May 14 12:41:19 PM PDT 24 May 14 12:44:22 PM PDT 24 65088721656 ps
T43 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2172221235 May 14 12:41:08 PM PDT 24 May 14 12:41:17 PM PDT 24 3137347094 ps
T334 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4275674306 May 14 12:41:20 PM PDT 24 May 14 12:41:25 PM PDT 24 3236092867 ps
T38 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2480659315 May 14 12:39:57 PM PDT 24 May 14 12:48:06 PM PDT 24 184150979730 ps
T335 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3583327188 May 14 12:40:58 PM PDT 24 May 14 12:41:03 PM PDT 24 2526742019 ps
T41 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.708020707 May 14 12:40:17 PM PDT 24 May 14 12:40:31 PM PDT 24 481997628551 ps
T135 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.1968688060 May 14 12:41:13 PM PDT 24 May 14 12:41:43 PM PDT 24 59901931323 ps
T136 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.4025090199 May 14 12:41:00 PM PDT 24 May 14 12:41:10 PM PDT 24 5988216943 ps
T137 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.4113114380 May 14 12:40:49 PM PDT 24 May 14 12:41:21 PM PDT 24 42245136780 ps
T138 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1458104736 May 14 12:40:37 PM PDT 24 May 14 12:40:46 PM PDT 24 3357264471 ps
T139 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.226694338 May 14 12:41:08 PM PDT 24 May 14 12:41:18 PM PDT 24 2614864619 ps
T140 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.2543633480 May 14 12:41:08 PM PDT 24 May 14 12:41:18 PM PDT 24 2444492253 ps
T141 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1799403142 May 14 12:40:46 PM PDT 24 May 14 12:41:24 PM PDT 24 169556210883 ps
T142 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.4104677872 May 14 12:40:09 PM PDT 24 May 14 12:40:19 PM PDT 24 2451214331 ps
T143 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3780697704 May 14 12:40:40 PM PDT 24 May 14 12:40:46 PM PDT 24 2530442755 ps
T269 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.4103516223 May 14 12:41:10 PM PDT 24 May 14 12:42:41 PM PDT 24 123509695814 ps
T406 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3018043862 May 14 12:40:01 PM PDT 24 May 14 12:40:06 PM PDT 24 2627141458 ps
T407 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1399701076 May 14 12:40:45 PM PDT 24 May 14 12:40:55 PM PDT 24 2466631499 ps
T408 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3952781849 May 14 12:39:53 PM PDT 24 May 14 12:40:01 PM PDT 24 2220926335 ps
T409 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3010426171 May 14 12:40:40 PM PDT 24 May 14 12:40:47 PM PDT 24 2449576603 ps
T410 /workspace/coverage/default/5.sysrst_ctrl_alert_test.2058025378 May 14 12:40:12 PM PDT 24 May 14 12:40:15 PM PDT 24 2142307213 ps
T411 /workspace/coverage/default/28.sysrst_ctrl_smoke.2788337957 May 14 12:40:55 PM PDT 24 May 14 12:41:06 PM PDT 24 2114430205 ps
T46 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.2331286124 May 14 12:40:00 PM PDT 24 May 14 12:40:06 PM PDT 24 3675638043 ps
T193 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.291988379 May 14 12:40:52 PM PDT 24 May 14 12:40:57 PM PDT 24 2186770224 ps
T194 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2645429393 May 14 12:41:15 PM PDT 24 May 14 12:42:56 PM PDT 24 140679391619 ps
T96 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.2099941956 May 14 12:40:12 PM PDT 24 May 14 12:41:42 PM PDT 24 62159858984 ps
T44 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1951113266 May 14 12:40:42 PM PDT 24 May 14 12:43:38 PM PDT 24 1362953029695 ps
T110 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3193127422 May 14 12:40:37 PM PDT 24 May 14 12:41:13 PM PDT 24 11941321553 ps
T74 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1691406934 May 14 12:40:03 PM PDT 24 May 14 12:40:14 PM PDT 24 3506752978 ps
T111 /workspace/coverage/default/26.sysrst_ctrl_stress_all.903179427 May 14 12:40:42 PM PDT 24 May 14 12:43:57 PM PDT 24 149983423952 ps
T112 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.803589708 May 14 12:39:56 PM PDT 24 May 14 12:39:59 PM PDT 24 2597628887 ps
T113 /workspace/coverage/default/13.sysrst_ctrl_alert_test.627012134 May 14 12:40:08 PM PDT 24 May 14 12:40:16 PM PDT 24 2010799742 ps
T114 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.2194219421 May 14 12:40:30 PM PDT 24 May 14 12:46:15 PM PDT 24 169050236521 ps
T115 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.2396605128 May 14 12:40:18 PM PDT 24 May 14 12:40:28 PM PDT 24 2608860533 ps
T116 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2580775347 May 14 12:40:32 PM PDT 24 May 14 12:40:36 PM PDT 24 2508955492 ps
T152 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3451432528 May 14 12:40:58 PM PDT 24 May 14 12:41:03 PM PDT 24 2126180721 ps
T94 /workspace/coverage/default/5.sysrst_ctrl_stress_all.2333601937 May 14 12:40:18 PM PDT 24 May 14 12:42:31 PM PDT 24 206914948695 ps
T319 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2303557239 May 14 12:41:04 PM PDT 24 May 14 12:41:08 PM PDT 24 2073443117 ps
T300 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1368302707 May 14 12:41:06 PM PDT 24 May 14 12:41:16 PM PDT 24 3020673606 ps
T320 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2556380971 May 14 12:40:46 PM PDT 24 May 14 12:40:51 PM PDT 24 2504702979 ps
T284 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1668567499 May 14 12:40:20 PM PDT 24 May 14 12:42:28 PM PDT 24 48330513182 ps
T412 /workspace/coverage/default/1.sysrst_ctrl_smoke.3377198730 May 14 12:39:49 PM PDT 24 May 14 12:39:59 PM PDT 24 2111698379 ps
T97 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.744628582 May 14 12:40:07 PM PDT 24 May 14 12:41:27 PM PDT 24 30584776826 ps
T413 /workspace/coverage/default/35.sysrst_ctrl_smoke.687808093 May 14 12:41:00 PM PDT 24 May 14 12:41:08 PM PDT 24 2113284614 ps
T270 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.2675968741 May 14 12:40:16 PM PDT 24 May 14 12:40:50 PM PDT 24 59362346042 ps
T98 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3611431547 May 14 12:41:31 PM PDT 24 May 14 12:41:58 PM PDT 24 48055878715 ps
T414 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.1185086400 May 14 12:40:31 PM PDT 24 May 14 12:40:42 PM PDT 24 3225929859 ps
T128 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.2373366303 May 14 12:40:51 PM PDT 24 May 14 12:41:03 PM PDT 24 3416698967 ps
T415 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2182139187 May 14 12:40:11 PM PDT 24 May 14 12:40:16 PM PDT 24 2632555251 ps
T416 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3299685099 May 14 12:40:50 PM PDT 24 May 14 12:40:56 PM PDT 24 2196647807 ps
T417 /workspace/coverage/default/22.sysrst_ctrl_smoke.4214116624 May 14 12:40:37 PM PDT 24 May 14 12:40:43 PM PDT 24 2117530967 ps
T42 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.2521841421 May 14 12:40:47 PM PDT 24 May 14 12:40:51 PM PDT 24 4032363221 ps
T197 /workspace/coverage/default/24.sysrst_ctrl_smoke.317687847 May 14 12:40:40 PM PDT 24 May 14 12:40:47 PM PDT 24 2119639120 ps
T198 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1916681739 May 14 12:40:34 PM PDT 24 May 14 12:40:41 PM PDT 24 2519818422 ps
T199 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.3071659782 May 14 12:40:14 PM PDT 24 May 14 12:42:18 PM PDT 24 49804063004 ps
T200 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.1468343681 May 14 12:40:37 PM PDT 24 May 14 12:40:45 PM PDT 24 2522346493 ps
T201 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1238469508 May 14 12:40:57 PM PDT 24 May 14 12:41:03 PM PDT 24 3787759275 ps
T155 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1474121662 May 14 12:41:08 PM PDT 24 May 14 12:41:18 PM PDT 24 2730577136 ps
T202 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1568151384 May 14 12:40:16 PM PDT 24 May 14 12:40:20 PM PDT 24 2540805079 ps
T203 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.3534896311 May 14 12:41:08 PM PDT 24 May 14 12:41:29 PM PDT 24 119007046990 ps
T204 /workspace/coverage/default/6.sysrst_ctrl_alert_test.1794721197 May 14 12:40:26 PM PDT 24 May 14 12:40:33 PM PDT 24 2010595998 ps
T315 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1452706957 May 14 12:40:26 PM PDT 24 May 14 12:40:35 PM PDT 24 2459127043 ps
T418 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1574153370 May 14 12:40:53 PM PDT 24 May 14 12:40:58 PM PDT 24 2638189709 ps
T419 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.453560226 May 14 12:40:50 PM PDT 24 May 14 12:40:55 PM PDT 24 2634210265 ps
T420 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2729350418 May 14 12:40:34 PM PDT 24 May 14 12:40:42 PM PDT 24 2032618851 ps
T421 /workspace/coverage/default/4.sysrst_ctrl_smoke.3908453863 May 14 12:40:00 PM PDT 24 May 14 12:40:04 PM PDT 24 2134292109 ps
T422 /workspace/coverage/default/28.sysrst_ctrl_alert_test.1365553069 May 14 12:40:27 PM PDT 24 May 14 12:40:31 PM PDT 24 2036193712 ps
T82 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1240962451 May 14 12:41:23 PM PDT 24 May 14 12:43:08 PM PDT 24 38146822085 ps
T404 /workspace/coverage/default/38.sysrst_ctrl_stress_all.618326076 May 14 12:41:11 PM PDT 24 May 14 12:41:51 PM PDT 24 13229351797 ps
T403 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.165896145 May 14 12:39:58 PM PDT 24 May 14 12:40:05 PM PDT 24 2517908738 ps
T265 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.4212471451 May 14 12:40:49 PM PDT 24 May 14 12:41:06 PM PDT 24 29167833488 ps
T75 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1263755363 May 14 12:40:57 PM PDT 24 May 14 12:41:07 PM PDT 24 3748862128 ps
T279 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2596118727 May 14 12:41:37 PM PDT 24 May 14 12:43:05 PM PDT 24 31802767848 ps
T180 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.4267464768 May 14 12:40:51 PM PDT 24 May 14 12:41:03 PM PDT 24 4899955493 ps
T423 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2636432751 May 14 12:40:01 PM PDT 24 May 14 12:40:08 PM PDT 24 2524315232 ps
T424 /workspace/coverage/default/48.sysrst_ctrl_alert_test.1715586671 May 14 12:41:28 PM PDT 24 May 14 12:41:30 PM PDT 24 2094147507 ps
T375 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3347907738 May 14 12:39:45 PM PDT 24 May 14 12:40:21 PM PDT 24 52584797050 ps
T425 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.769851208 May 14 12:41:01 PM PDT 24 May 14 12:41:06 PM PDT 24 2480916580 ps
T426 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2139327264 May 14 12:41:35 PM PDT 24 May 14 12:41:45 PM PDT 24 2613841911 ps
T427 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2298245049 May 14 12:39:50 PM PDT 24 May 14 12:39:59 PM PDT 24 2451630743 ps
T428 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.3425761745 May 14 12:41:04 PM PDT 24 May 14 12:41:13 PM PDT 24 2091205748 ps
T429 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.403170892 May 14 12:41:18 PM PDT 24 May 14 12:41:26 PM PDT 24 3627694420 ps
T430 /workspace/coverage/default/8.sysrst_ctrl_alert_test.842594964 May 14 12:40:18 PM PDT 24 May 14 12:40:24 PM PDT 24 2012089453 ps
T431 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1340540175 May 14 12:41:08 PM PDT 24 May 14 12:41:13 PM PDT 24 2124915386 ps
T432 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1934387007 May 14 12:40:22 PM PDT 24 May 14 12:40:25 PM PDT 24 2647722208 ps
T433 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1871686504 May 14 12:41:21 PM PDT 24 May 14 12:41:30 PM PDT 24 2123675795 ps
T355 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1877519960 May 14 12:40:19 PM PDT 24 May 14 12:42:01 PM PDT 24 158515251010 ps
T434 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1210271561 May 14 12:40:36 PM PDT 24 May 14 12:40:51 PM PDT 24 4028525474 ps
T45 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3592602712 May 14 12:41:00 PM PDT 24 May 14 12:41:13 PM PDT 24 5304412082 ps
T156 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.3161375144 May 14 12:41:21 PM PDT 24 May 14 12:41:32 PM PDT 24 4291598765 ps
T215 /workspace/coverage/default/48.sysrst_ctrl_stress_all.1539455725 May 14 12:41:19 PM PDT 24 May 14 12:41:28 PM PDT 24 12327042779 ps
T216 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2403378613 May 14 12:41:30 PM PDT 24 May 14 12:42:05 PM PDT 24 145240321575 ps
T217 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.981009145 May 14 12:39:55 PM PDT 24 May 14 12:39:59 PM PDT 24 3714273975 ps
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T207 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.15243414 May 14 12:41:06 PM PDT 24 May 14 12:41:16 PM PDT 24 2442362007 ps
T208 /workspace/coverage/default/1.sysrst_ctrl_alert_test.17342239 May 14 12:40:14 PM PDT 24 May 14 12:40:21 PM PDT 24 2011402883 ps
T209 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3640390247 May 14 12:40:42 PM PDT 24 May 14 12:40:49 PM PDT 24 5045565252 ps
T210 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.806131306 May 14 12:40:41 PM PDT 24 May 14 12:40:48 PM PDT 24 2513186719 ps
T211 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.371165750 May 14 12:40:22 PM PDT 24 May 14 12:40:31 PM PDT 24 2455641619 ps
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T213 /workspace/coverage/default/19.sysrst_ctrl_alert_test.4176746578 May 14 12:40:43 PM PDT 24 May 14 12:40:52 PM PDT 24 2011359544 ps
T76 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1210973507 May 14 12:40:37 PM PDT 24 May 14 12:40:43 PM PDT 24 3940215513 ps
T214 /workspace/coverage/default/3.sysrst_ctrl_stress_all.265735921 May 14 12:40:03 PM PDT 24 May 14 12:48:06 PM PDT 24 209174576637 ps
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T77 /workspace/coverage/default/31.sysrst_ctrl_stress_all.2115736291 May 14 12:40:52 PM PDT 24 May 14 12:41:02 PM PDT 24 12784829385 ps
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T322 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.787333657 May 14 12:40:34 PM PDT 24 May 14 12:40:45 PM PDT 24 2512809310 ps
T129 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3844447184 May 14 12:40:50 PM PDT 24 May 14 12:41:02 PM PDT 24 7626199313 ps
T437 /workspace/coverage/default/45.sysrst_ctrl_stress_all.1020935495 May 14 12:41:27 PM PDT 24 May 14 12:43:33 PM PDT 24 303969348005 ps
T438 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1735164226 May 14 12:40:05 PM PDT 24 May 14 12:40:10 PM PDT 24 2551458917 ps
T439 /workspace/coverage/default/49.sysrst_ctrl_smoke.3261939316 May 14 12:41:09 PM PDT 24 May 14 12:41:15 PM PDT 24 2114153538 ps
T440 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.890210463 May 14 12:40:15 PM PDT 24 May 14 12:40:23 PM PDT 24 2045693888 ps
T266 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.3354429529 May 14 12:40:03 PM PDT 24 May 14 12:43:06 PM PDT 24 69644939953 ps
T441 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2544620689 May 14 12:41:27 PM PDT 24 May 14 12:43:19 PM PDT 24 183666515838 ps
T316 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.4273883496 May 14 12:40:33 PM PDT 24 May 14 12:40:42 PM PDT 24 2465996568 ps
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T99 /workspace/coverage/default/18.sysrst_ctrl_stress_all.3571170810 May 14 12:40:33 PM PDT 24 May 14 12:46:31 PM PDT 24 204971744114 ps
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T323 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1488368308 May 14 12:40:50 PM PDT 24 May 14 12:40:57 PM PDT 24 2515639034 ps
T157 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.1466339686 May 14 12:40:20 PM PDT 24 May 14 12:40:23 PM PDT 24 3448250562 ps
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T174 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3857714934 May 14 12:40:57 PM PDT 24 May 14 12:41:01 PM PDT 24 2301511710 ps
T175 /workspace/coverage/default/44.sysrst_ctrl_alert_test.615301681 May 14 12:41:28 PM PDT 24 May 14 12:41:31 PM PDT 24 2045189427 ps
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T177 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3039936911 May 14 12:40:19 PM PDT 24 May 14 12:40:29 PM PDT 24 6472404626 ps
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T206 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1196077753 May 14 12:40:34 PM PDT 24 May 14 12:40:39 PM PDT 24 2774337548 ps
T179 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2850081313 May 14 12:40:06 PM PDT 24 May 14 12:42:22 PM PDT 24 206072609848 ps
T87 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2294802587 May 14 12:40:27 PM PDT 24 May 14 12:43:43 PM PDT 24 300874819533 ps
T307 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3880387852 May 14 12:41:06 PM PDT 24 May 14 12:41:13 PM PDT 24 2462620846 ps
T308 /workspace/coverage/default/16.sysrst_ctrl_alert_test.1235544007 May 14 12:40:46 PM PDT 24 May 14 12:40:51 PM PDT 24 2038998395 ps
T130 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.891537489 May 14 12:40:40 PM PDT 24 May 14 12:42:31 PM PDT 24 261158533499 ps
T309 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1814215768 May 14 12:40:47 PM PDT 24 May 14 12:41:00 PM PDT 24 3231192076 ps
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T310 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3982774839 May 14 12:41:22 PM PDT 24 May 14 12:43:22 PM PDT 24 46030332124 ps
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T299 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3931511529 May 14 12:40:35 PM PDT 24 May 14 12:41:27 PM PDT 24 74334084599 ps
T372 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2868922396 May 14 12:41:18 PM PDT 24 May 14 12:45:36 PM PDT 24 100058166797 ps
T449 /workspace/coverage/default/25.sysrst_ctrl_alert_test.1827989946 May 14 12:40:29 PM PDT 24 May 14 12:40:33 PM PDT 24 2035544378 ps
T267 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3349381630 May 14 12:40:17 PM PDT 24 May 14 12:40:38 PM PDT 24 27591828244 ps
T301 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1739033669 May 14 12:40:06 PM PDT 24 May 14 12:43:10 PM PDT 24 139464608354 ps
T450 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.4036297079 May 14 12:40:56 PM PDT 24 May 14 12:41:06 PM PDT 24 2915184907 ps
T451 /workspace/coverage/default/16.sysrst_ctrl_smoke.1074184246 May 14 12:40:33 PM PDT 24 May 14 12:40:39 PM PDT 24 2114909729 ps
T190 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.1218451884 May 14 12:41:26 PM PDT 24 May 14 12:41:32 PM PDT 24 3789876150 ps
T452 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.509797249 May 14 12:41:26 PM PDT 24 May 14 12:41:35 PM PDT 24 2610209458 ps
T324 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2994241761 May 14 12:40:29 PM PDT 24 May 14 12:40:35 PM PDT 24 2521074888 ps
T453 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3582149292 May 14 12:40:57 PM PDT 24 May 14 12:41:10 PM PDT 24 3611851214 ps
T189 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.738080970 May 14 12:40:42 PM PDT 24 May 14 12:42:55 PM PDT 24 57567456246 ps
T454 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3621738805 May 14 12:40:01 PM PDT 24 May 14 12:40:13 PM PDT 24 2981032771 ps
T401 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.567111266 May 14 12:40:57 PM PDT 24 May 14 12:44:29 PM PDT 24 983994325205 ps
T455 /workspace/coverage/default/35.sysrst_ctrl_alert_test.2452906384 May 14 12:40:54 PM PDT 24 May 14 12:40:59 PM PDT 24 2030163569 ps
T131 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4099087395 May 14 12:39:56 PM PDT 24 May 14 12:40:07 PM PDT 24 7641742365 ps
T456 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1419698758 May 14 12:40:54 PM PDT 24 May 14 12:41:06 PM PDT 24 3605273087 ps
T325 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2926155380 May 14 12:40:38 PM PDT 24 May 14 12:40:47 PM PDT 24 2522130983 ps
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