Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.85 99.42 96.76 100.00 98.08 98.89 99.42 92.41


Total tests in report: 914
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
53.02 53.02 76.10 76.10 62.61 62.61 63.93 63.93 12.82 12.82 77.04 77.04 65.61 65.61 13.02 13.02 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1770087205
68.51 15.49 87.87 11.77 79.12 16.51 92.92 29.00 35.90 23.08 88.50 11.46 78.90 13.29 16.36 3.34 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2270380989
77.59 9.08 92.48 4.61 84.33 5.21 94.29 1.37 55.13 19.23 92.20 3.70 90.08 11.18 34.61 18.25 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2219058689
81.14 3.55 94.92 2.44 87.46 3.13 94.75 0.46 62.82 7.69 94.57 2.37 92.77 2.70 40.69 6.08 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3025519869
83.61 2.47 95.88 0.95 89.16 1.69 96.80 2.05 68.59 5.77 95.64 1.07 94.70 1.93 44.51 3.82 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3658287891
85.91 2.30 96.01 0.13 89.23 0.08 96.80 0.00 71.15 2.56 95.79 0.15 94.99 0.29 57.43 12.92 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1787213191
87.93 2.02 97.05 1.04 90.85 1.62 96.80 0.00 81.41 10.26 96.89 1.11 95.09 0.10 57.43 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.402597812
89.24 1.30 97.13 0.07 92.11 1.26 97.49 0.68 81.41 0.00 97.01 0.11 95.09 0.00 64.42 7.00 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.2217972312
90.28 1.04 97.24 0.11 92.19 0.08 97.95 0.46 82.69 1.28 97.15 0.15 95.28 0.19 69.43 5.01 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1977475081
91.28 1.01 97.78 0.54 92.77 0.58 97.95 0.00 86.54 3.85 97.60 0.44 96.82 1.54 69.54 0.11 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.2566590052
92.13 0.85 97.89 0.11 92.82 0.05 97.95 0.00 89.10 2.56 97.74 0.15 96.92 0.10 72.50 2.96 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.1784083713
92.93 0.80 97.97 0.07 93.15 0.33 97.95 0.00 89.10 0.00 97.82 0.07 97.30 0.39 77.23 4.74 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1010601251
93.50 0.57 98.17 0.21 93.40 0.25 97.95 0.00 91.03 1.92 97.93 0.11 97.30 0.00 78.74 1.51 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1885450606
93.98 0.47 98.32 0.15 93.86 0.46 97.95 0.00 93.59 2.56 98.08 0.15 97.30 0.00 78.74 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.593476208
94.39 0.41 98.62 0.30 94.24 0.38 97.95 0.00 93.59 0.00 98.08 0.00 97.30 0.00 80.95 2.21 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2350832739
94.70 0.31 98.71 0.09 94.29 0.05 97.95 0.00 94.23 0.64 98.11 0.04 97.30 0.00 82.29 1.35 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2590734963
94.98 0.29 98.96 0.24 94.59 0.30 98.17 0.23 94.87 0.64 98.23 0.11 97.40 0.10 82.67 0.38 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3613774219
95.22 0.24 99.01 0.06 94.67 0.08 99.54 1.37 94.87 0.00 98.23 0.00 97.40 0.00 82.83 0.16 /workspace/coverage/default/18.sysrst_ctrl_alert_test.4131627313
95.44 0.21 99.01 0.00 94.72 0.05 99.54 0.00 94.87 0.00 98.23 0.00 97.40 0.00 84.28 1.45 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3888846060
95.65 0.21 99.03 0.02 94.79 0.08 99.54 0.00 94.87 0.00 98.23 0.00 97.40 0.00 85.68 1.40 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1474426478
95.84 0.19 99.07 0.04 94.84 0.05 99.54 0.00 95.51 0.64 98.30 0.07 97.50 0.10 86.11 0.43 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2336649759
96.01 0.17 99.07 0.00 94.84 0.00 99.54 0.00 95.51 0.00 98.30 0.00 97.50 0.00 87.30 1.18 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.3838681688
96.17 0.16 99.07 0.00 95.42 0.58 99.54 0.00 95.51 0.00 98.30 0.00 97.69 0.19 87.67 0.38 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.2006361846
96.33 0.15 99.09 0.02 95.42 0.00 99.54 0.00 96.15 0.64 98.34 0.04 97.69 0.00 88.05 0.38 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.949947
96.48 0.15 99.14 0.06 95.45 0.03 99.54 0.00 96.79 0.64 98.41 0.07 97.78 0.10 88.21 0.16 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2404524013
96.60 0.13 99.14 0.00 95.55 0.10 99.54 0.00 96.79 0.00 98.41 0.00 98.46 0.67 88.32 0.11 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.672217956
96.72 0.12 99.18 0.04 95.58 0.03 99.54 0.00 97.44 0.64 98.45 0.04 98.55 0.10 88.32 0.00 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1231288653
96.84 0.12 99.22 0.04 95.60 0.03 99.54 0.00 98.08 0.64 98.48 0.04 98.65 0.10 88.32 0.00 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2559030492
96.94 0.10 99.22 0.00 95.63 0.03 100.00 0.46 98.08 0.00 98.48 0.00 98.75 0.10 88.43 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1959891197
97.03 0.09 99.22 0.00 95.63 0.00 100.00 0.00 98.08 0.00 98.48 0.00 98.75 0.00 89.07 0.65 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1077142182
97.12 0.08 99.22 0.00 95.73 0.10 100.00 0.00 98.08 0.00 98.48 0.00 99.13 0.39 89.18 0.11 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2634058043
97.19 0.07 99.22 0.00 95.73 0.00 100.00 0.00 98.08 0.00 98.48 0.00 99.13 0.00 89.67 0.48 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.52690030
97.25 0.06 99.23 0.02 95.80 0.08 100.00 0.00 98.08 0.00 98.52 0.04 99.33 0.19 89.77 0.11 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1490123743
97.31 0.06 99.27 0.04 95.96 0.15 100.00 0.00 98.08 0.00 98.60 0.07 99.42 0.10 89.83 0.05 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.4284912588
97.36 0.05 99.27 0.00 96.31 0.35 100.00 0.00 98.08 0.00 98.60 0.00 99.42 0.00 89.83 0.00 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.4094654368
97.40 0.05 99.27 0.00 96.64 0.33 100.00 0.00 98.08 0.00 98.60 0.00 99.42 0.00 89.83 0.00 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1291298198
97.45 0.05 99.27 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.42 0.00 90.15 0.32 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1736020252
97.49 0.04 99.27 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.42 0.00 90.42 0.27 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.66690846
97.52 0.03 99.27 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.60 0.00 99.42 0.00 90.64 0.22 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3918293302
97.54 0.02 99.33 0.06 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.11 99.42 0.00 90.64 0.00 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3473123554
97.57 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 90.80 0.16 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3814788562
97.59 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 90.96 0.16 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.4139125102
97.61 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 91.12 0.16 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3160567825
97.64 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 91.28 0.16 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2323577694
97.65 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 91.39 0.11 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.2187712736
97.67 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 91.50 0.11 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2490959229
97.68 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 91.60 0.11 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.4141591883
97.70 0.02 99.33 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 91.71 0.11 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4264751881
97.71 0.01 99.33 0.00 96.66 0.03 100.00 0.00 98.08 0.00 98.71 0.00 99.42 0.00 91.77 0.05 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3429035261
97.72 0.01 99.35 0.02 96.66 0.00 100.00 0.00 98.08 0.00 98.74 0.04 99.42 0.00 91.77 0.00 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.3525870783
97.72 0.01 99.37 0.02 96.66 0.00 100.00 0.00 98.08 0.00 98.78 0.04 99.42 0.00 91.77 0.00 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1267100620
97.73 0.01 99.38 0.02 96.66 0.00 100.00 0.00 98.08 0.00 98.82 0.04 99.42 0.00 91.77 0.00 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3518350826
97.74 0.01 99.40 0.02 96.66 0.00 100.00 0.00 98.08 0.00 98.85 0.04 99.42 0.00 91.77 0.00 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.1278725752
97.75 0.01 99.42 0.02 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.04 99.42 0.00 91.77 0.00 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1777440913
97.76 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 91.82 0.05 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1992406610
97.76 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 91.87 0.05 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.4182389210
97.77 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 91.93 0.05 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_intg_err.2707537379
97.78 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 91.98 0.05 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1193579740
97.79 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.03 0.05 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.4259104772
97.79 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.09 0.05 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.205554374
97.80 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.14 0.05 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.745327331
97.81 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.20 0.05 /workspace/coverage/default/37.sysrst_ctrl_stress_all.339097887
97.82 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.25 0.05 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1586356588
97.83 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.30 0.05 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.543999055
97.83 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.36 0.05 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2452207970
97.84 0.01 99.42 0.00 96.66 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.41 0.05 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.746433221
97.85 0.01 99.42 0.00 96.71 0.05 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.41 0.00 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3888918971
97.85 0.01 99.42 0.00 96.74 0.03 100.00 0.00 98.08 0.00 98.89 0.00 99.42 0.00 92.41 0.00 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2293000478


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.356364682
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3542449968
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.4194157944
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3262406119
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3658619957
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.4158518093
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.305162797
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3892617972
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3548506057
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1575565687
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.490420987
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2450967430
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1117435791
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2971908071
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3012227428
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.695172281
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3436575808
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2083138685
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1927009149
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1660761684
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3168543103
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.26796077
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3548145413
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3696615362
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2558018242
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1245629276
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2914825
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1483823539
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2174999447
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3865524622
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2532501500
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3971102812
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.673057542
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1599846951
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.51731592
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.564569471
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1203277557
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1054849290
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3216946872
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1089598206
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1925189430
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3441757003
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2889640137
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2906539822
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2525872989
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4118607879
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1465531585
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3155885813
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2415649848
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3001228774
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2065750273
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1991543814
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1484869908
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.948696187
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.4174779863
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1187354548
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2141235442
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3626278887
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1510114575
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2546987135
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.671102037
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.987961002
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2448458310
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1511991991
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.4017004716
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.4283964302
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2345736916
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.2121772556
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2869937739
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3050111318
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2609193527
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.2889420944
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1691343948
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.4154095595
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.4239910077
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.3821558977
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.781320089
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2731713236
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.212554147
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.2225611044
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.3613740611
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/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.502487444
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.911630085
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1701296637
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1233951563
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1668153443
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.890916938
/workspace/coverage/default/41.sysrst_ctrl_smoke.2658501767
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1964596954
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3464250422
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2379959005
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3753983139
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.4168753788
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1871435918
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3244191415
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2486386020
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.848579669
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2012670578
/workspace/coverage/default/42.sysrst_ctrl_smoke.315219373
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3629690519
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3740752679
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4109555227
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2585324891
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.915235872
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3100042013
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.753477046
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1078105036
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2984287799
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1632642598
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2607655874
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.490199882
/workspace/coverage/default/43.sysrst_ctrl_smoke.630808643
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1326389524
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.956612657
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3395260271
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3582384220
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2289601048
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.558430413
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1172440923
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2178798066
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.760616077
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2442549053
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1166634602
/workspace/coverage/default/44.sysrst_ctrl_smoke.2118117466
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2633718520
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.148477236
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1088104252
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.370875037
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3562756811
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.380815574
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2389485095
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2680886728
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3449550853
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3121013603
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.642098081
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2284666887
/workspace/coverage/default/45.sysrst_ctrl_smoke.852345112
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3828118022
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.4227569958
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1699522959
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1081055231
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.4076510390
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1144739659
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2947055559
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3626741121
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1390038382
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3853653699
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.112789597
/workspace/coverage/default/46.sysrst_ctrl_smoke.635211352
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1008435925
/workspace/coverage/default/47.sysrst_ctrl_alert_test.211973996
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2332303095
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.424842625
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2876311295
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3438606544
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2624456271
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3740147717
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1191161820
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.920337634
/workspace/coverage/default/47.sysrst_ctrl_smoke.468318535
/workspace/coverage/default/47.sysrst_ctrl_stress_all.4173854202
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.297668574
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2528216486
/workspace/coverage/default/48.sysrst_ctrl_alert_test.406826900
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.378694559
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1234712094
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2473211940
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1413489011
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2645242137
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1583590609
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1469747030
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2840629204
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1977516026
/workspace/coverage/default/48.sysrst_ctrl_smoke.127009823
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1179242672
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2373655973
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2166092028
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3690023254
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1131940064
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.4053037623
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1285998895
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1010491575
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3166602266
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.4024223492
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2927301907
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.35185213
/workspace/coverage/default/49.sysrst_ctrl_smoke.3495238065
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1311334874
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3853725936
/workspace/coverage/default/5.sysrst_ctrl_alert_test.96550405
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.332901569
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3436023559
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1214459292
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1235930347
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1901409299
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1410325079
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.772036652
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.617766083
/workspace/coverage/default/5.sysrst_ctrl_smoke.1480785160
/workspace/coverage/default/5.sysrst_ctrl_stress_all.824428921
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2338969246
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1074924498
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3928241404
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2479809444
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2160391348
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3282421383
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2617578261
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3524729487
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1303913560
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4052856041
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.197192488
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.597981073
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3712649043
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1611346582
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3302964188
/workspace/coverage/default/6.sysrst_ctrl_smoke.1089877638
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1198325480
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1634011925
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2027585220
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.511791316
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1368062344
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.500267094
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1957537576
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1591259839
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.797639842
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2758907029
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.4081402825
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3712949006
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3795956250
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4099500280
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.655038420
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.760126224
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3276348396
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2295269196
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1159436537
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.125180547
/workspace/coverage/default/7.sysrst_ctrl_smoke.1266076786
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1838604859
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.725450200
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1870899693
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1027037011
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2972011123
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.824067755
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4043503619
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.941810184
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2272101425
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1233745313
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3390839915
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2943268146
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.243348675
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2857101770
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3795093414
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2887178666
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3834216416
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.665211751
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.781593629
/workspace/coverage/default/8.sysrst_ctrl_smoke.75259028
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2918166961
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1849293578
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1355442109
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2448480236
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.164798285
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2703475695
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.5829888
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2226491388
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1938114309
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.571354921
/workspace/coverage/default/9.sysrst_ctrl_alert_test.611096175
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3491922807
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.143734683
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1729701807
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2371100695
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3500501663
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.468142053
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3148702153
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2527485875
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1417454089
/workspace/coverage/default/9.sysrst_ctrl_smoke.1371883036
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3057758271
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.826225523
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2892383639
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.651690884
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3684798760
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2210495634
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2323974119
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.599277473
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.334503885
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1937150553
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2908546776




Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.4245383249 May 19 01:13:38 PM PDT 24 May 19 01:13:41 PM PDT 24 2550581029 ps
T5 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3613774219 May 19 01:14:52 PM PDT 24 May 19 01:15:20 PM PDT 24 15144483264 ps
T6 /workspace/coverage/default/48.sysrst_ctrl_alert_test.406826900 May 19 01:14:48 PM PDT 24 May 19 01:15:00 PM PDT 24 2030602862 ps
T21 /workspace/coverage/default/38.sysrst_ctrl_stress_all.3408398630 May 19 01:14:22 PM PDT 24 May 19 01:14:40 PM PDT 24 6800304240 ps
T22 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1770087205 May 19 01:15:00 PM PDT 24 May 19 01:17:33 PM PDT 24 49561678056 ps
T1 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1695951143 May 19 01:14:02 PM PDT 24 May 19 01:14:10 PM PDT 24 7906829893 ps
T14 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2526734173 May 19 01:13:59 PM PDT 24 May 19 01:14:04 PM PDT 24 2515218691 ps
T15 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3853653699 May 19 01:14:42 PM PDT 24 May 19 01:14:50 PM PDT 24 2078762918 ps
T16 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2634058043 May 19 01:13:19 PM PDT 24 May 19 01:17:00 PM PDT 24 89580529397 ps
T17 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.3131484820 May 19 01:13:33 PM PDT 24 May 19 01:15:04 PM PDT 24 66329914774 ps
T18 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3795956250 May 19 01:13:15 PM PDT 24 May 19 01:13:23 PM PDT 24 3603289443 ps
T19 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.205554374 May 19 01:13:35 PM PDT 24 May 19 01:13:41 PM PDT 24 3691462339 ps
T2 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3429035261 May 19 01:14:02 PM PDT 24 May 19 01:14:37 PM PDT 24 25645384143 ps
T3 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2350832739 May 19 01:14:54 PM PDT 24 May 19 01:22:48 PM PDT 24 178268767659 ps
T20 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.435863832 May 19 01:14:16 PM PDT 24 May 19 01:14:20 PM PDT 24 2638428935 ps
T47 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.4036912114 May 19 01:13:05 PM PDT 24 May 19 01:13:08 PM PDT 24 2557542941 ps
T48 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1180150238 May 19 01:14:38 PM PDT 24 May 19 01:14:47 PM PDT 24 2612699958 ps
T7 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.1122962850 May 19 01:14:13 PM PDT 24 May 19 01:14:40 PM PDT 24 175296300396 ps
T8 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2270380989 May 19 01:13:55 PM PDT 24 May 19 01:14:22 PM PDT 24 10717797794 ps
T9 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.52690030 May 19 01:14:50 PM PDT 24 May 19 01:16:04 PM PDT 24 139679802828 ps
T10 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3025519869 May 19 01:13:30 PM PDT 24 May 19 01:58:21 PM PDT 24 1271836759356 ps
T11 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.1501182499 May 19 01:13:21 PM PDT 24 May 19 01:13:26 PM PDT 24 3483467210 ps
T26 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3121013603 May 19 01:14:45 PM PDT 24 May 19 01:14:54 PM PDT 24 2535654679 ps
T51 /workspace/coverage/default/7.sysrst_ctrl_stress_all.1838604859 May 19 01:13:19 PM PDT 24 May 19 01:13:29 PM PDT 24 10572504355 ps
T55 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3740147717 May 19 01:14:45 PM PDT 24 May 19 01:14:59 PM PDT 24 2472790414 ps
T39 /workspace/coverage/default/47.sysrst_ctrl_stress_all.4173854202 May 19 01:14:46 PM PDT 24 May 19 01:15:21 PM PDT 24 11769723363 ps
T145 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.2972578309 May 19 01:14:15 PM PDT 24 May 19 01:14:19 PM PDT 24 2535590022 ps
T87 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2700740868 May 19 01:14:28 PM PDT 24 May 19 01:14:34 PM PDT 24 2015077975 ps
T50 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.4200352914 May 19 01:14:01 PM PDT 24 May 19 01:14:10 PM PDT 24 4305483801 ps
T162 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3110899661 May 19 01:13:40 PM PDT 24 May 19 01:13:42 PM PDT 24 2181710911 ps
T171 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.724205767 May 19 01:13:32 PM PDT 24 May 19 01:13:37 PM PDT 24 2618434611 ps
T377 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.4108591205 May 19 01:14:21 PM PDT 24 May 19 01:14:30 PM PDT 24 2612360624 ps
T12 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3658287891 May 19 01:13:08 PM PDT 24 May 19 01:17:28 PM PDT 24 101616734565 ps
T315 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1285998895 May 19 01:14:47 PM PDT 24 May 19 01:15:01 PM PDT 24 3151336328 ps
T56 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2985957278 May 19 01:13:34 PM PDT 24 May 19 01:13:40 PM PDT 24 2488111918 ps
T40 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2575671800 May 19 01:13:34 PM PDT 24 May 19 01:14:12 PM PDT 24 53358466885 ps
T41 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.824067755 May 19 01:14:57 PM PDT 24 May 19 01:16:11 PM PDT 24 44034674002 ps
T57 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1410325079 May 19 01:13:12 PM PDT 24 May 19 01:13:17 PM PDT 24 2493522458 ps
T13 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.988668398 May 19 01:14:34 PM PDT 24 May 19 01:14:42 PM PDT 24 6078720834 ps
T42 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3753983139 May 19 01:14:39 PM PDT 24 May 19 01:14:46 PM PDT 24 3799060113 ps
T32 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.197192488 May 19 01:13:14 PM PDT 24 May 19 01:13:21 PM PDT 24 4201828339 ps
T30 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.1800799788 May 19 01:14:20 PM PDT 24 May 19 01:15:14 PM PDT 24 70073544307 ps
T33 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.2566590052 May 19 01:14:41 PM PDT 24 May 19 01:14:49 PM PDT 24 2770209205 ps
T29 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.4099500280 May 19 01:13:15 PM PDT 24 May 19 01:15:04 PM PDT 24 148651475537 ps
T31 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1474426478 May 19 01:13:05 PM PDT 24 May 19 01:16:05 PM PDT 24 130407379452 ps
T60 /workspace/coverage/default/17.sysrst_ctrl_stress_all.514187038 May 19 01:13:37 PM PDT 24 May 19 01:13:51 PM PDT 24 9416809254 ps
T141 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.424842625 May 19 01:14:46 PM PDT 24 May 19 01:19:37 PM PDT 24 146150827192 ps
T52 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2027585220 May 19 01:13:12 PM PDT 24 May 19 01:13:16 PM PDT 24 3331528420 ps
T58 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1233951563 May 19 01:14:30 PM PDT 24 May 19 01:14:39 PM PDT 24 2444665932 ps
T88 /workspace/coverage/default/27.sysrst_ctrl_alert_test.995581928 May 19 01:14:03 PM PDT 24 May 19 01:14:10 PM PDT 24 2012075275 ps
T99 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.418349825 May 19 01:14:34 PM PDT 24 May 19 01:21:06 PM PDT 24 155851293847 ps
T210 /workspace/coverage/default/18.sysrst_ctrl_smoke.2073331795 May 19 01:13:34 PM PDT 24 May 19 01:13:37 PM PDT 24 2134443352 ps
T43 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1845086787 May 19 01:14:18 PM PDT 24 May 19 01:14:29 PM PDT 24 3532945007 ps
T61 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2404524013 May 19 01:14:46 PM PDT 24 May 19 01:15:26 PM PDT 24 12780542080 ps
T44 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3069719843 May 19 01:13:55 PM PDT 24 May 19 01:14:05 PM PDT 24 3339342338 ps
T199 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2328435288 May 19 01:12:57 PM PDT 24 May 19 01:13:04 PM PDT 24 2181832462 ps
T62 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.558430413 May 19 01:14:45 PM PDT 24 May 19 01:15:09 PM PDT 24 28104024936 ps
T34 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1267100620 May 19 01:13:24 PM PDT 24 May 19 01:14:18 PM PDT 24 21581982270 ps
T200 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.318487084 May 19 01:12:58 PM PDT 24 May 19 01:13:12 PM PDT 24 4809837121 ps
T63 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2908546776 May 19 01:15:04 PM PDT 24 May 19 01:15:54 PM PDT 24 33677453435 ps
T201 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.374019403 May 19 01:13:43 PM PDT 24 May 19 01:13:50 PM PDT 24 2803977179 ps
T202 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4052856041 May 19 01:13:12 PM PDT 24 May 19 01:13:17 PM PDT 24 3220288859 ps
T203 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2527485875 May 19 01:13:16 PM PDT 24 May 19 01:13:23 PM PDT 24 2179433096 ps
T312 /workspace/coverage/default/38.sysrst_ctrl_smoke.3086117838 May 19 01:14:21 PM PDT 24 May 19 01:14:25 PM PDT 24 2129801967 ps
T37 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.3538067298 May 19 01:13:06 PM PDT 24 May 19 01:13:10 PM PDT 24 3646392613 ps
T64 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3535785873 May 19 01:13:52 PM PDT 24 May 19 01:15:30 PM PDT 24 38926336659 ps
T304 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.471811738 May 19 01:13:33 PM PDT 24 May 19 01:13:36 PM PDT 24 2570967702 ps
T378 /workspace/coverage/default/30.sysrst_ctrl_alert_test.3975963384 May 19 01:14:11 PM PDT 24 May 19 01:14:15 PM PDT 24 2077618800 ps
T379 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2876311295 May 19 01:14:45 PM PDT 24 May 19 01:14:56 PM PDT 24 3333935600 ps
T299 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2151816265 May 19 01:13:28 PM PDT 24 May 19 01:13:37 PM PDT 24 2835176105 ps
T35 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2219058689 May 19 01:14:39 PM PDT 24 May 19 01:15:49 PM PDT 24 105020337575 ps
T291 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.4241977073 May 19 01:14:02 PM PDT 24 May 19 01:14:10 PM PDT 24 2612947192 ps
T117 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.289822165 May 19 01:14:35 PM PDT 24 May 19 01:15:11 PM PDT 24 27089906252 ps
T292 /workspace/coverage/default/24.sysrst_ctrl_alert_test.3212419906 May 19 01:13:55 PM PDT 24 May 19 01:14:03 PM PDT 24 2012466205 ps
T293 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.4084085452 May 19 01:13:52 PM PDT 24 May 19 01:13:56 PM PDT 24 3941579147 ps
T294 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1319444127 May 19 01:14:09 PM PDT 24 May 19 01:14:12 PM PDT 24 2576393254 ps
T295 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2405585260 May 19 01:13:05 PM PDT 24 May 19 01:13:09 PM PDT 24 2619987838 ps
T296 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.3500501663 May 19 01:13:13 PM PDT 24 May 19 01:13:22 PM PDT 24 2732113003 ps
T297 /workspace/coverage/default/20.sysrst_ctrl_stress_all.372282971 May 19 01:13:45 PM PDT 24 May 19 01:13:50 PM PDT 24 9013302845 ps
T298 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3073248344 May 19 01:14:22 PM PDT 24 May 19 01:14:26 PM PDT 24 2715941934 ps
T59 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3712649043 May 19 01:13:10 PM PDT 24 May 19 01:13:18 PM PDT 24 2491883873 ps
T53 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1008435925 May 19 01:14:43 PM PDT 24 May 19 01:14:53 PM PDT 24 3406868831 ps
T380 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3244191415 May 19 01:14:39 PM PDT 24 May 19 01:14:45 PM PDT 24 2619353860 ps
T381 /workspace/coverage/default/46.sysrst_ctrl_alert_test.1699522959 May 19 01:14:44 PM PDT 24 May 19 01:14:51 PM PDT 24 2037715645 ps
T382 /workspace/coverage/default/12.sysrst_ctrl_smoke.1146575473 May 19 01:13:18 PM PDT 24 May 19 01:13:27 PM PDT 24 2112929205 ps
T383 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.584292219 May 19 01:14:13 PM PDT 24 May 19 01:14:18 PM PDT 24 2170406992 ps
T384 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.4152137978 May 19 01:13:23 PM PDT 24 May 19 01:13:30 PM PDT 24 2619437669 ps
T36 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.1058616565 May 19 01:13:55 PM PDT 24 May 19 01:14:03 PM PDT 24 4593208982 ps
T385 /workspace/coverage/default/44.sysrst_ctrl_smoke.2118117466 May 19 01:14:45 PM PDT 24 May 19 01:14:53 PM PDT 24 2132717383 ps
T254 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3216338492 May 19 01:14:39 PM PDT 24 May 19 01:14:54 PM PDT 24 90102789778 ps
T270 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.2132415717 May 19 01:14:10 PM PDT 24 May 19 01:15:12 PM PDT 24 142385670985 ps
T54 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3561748240 May 19 01:14:07 PM PDT 24 May 19 01:14:11 PM PDT 24 4214011055 ps
T386 /workspace/coverage/default/6.sysrst_ctrl_smoke.1089877638 May 19 01:13:15 PM PDT 24 May 19 01:13:22 PM PDT 24 2119382379 ps
T105 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2272101425 May 19 01:14:52 PM PDT 24 May 19 01:15:42 PM PDT 24 45486577620 ps
T45 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2467794973 May 19 01:14:11 PM PDT 24 May 19 01:15:01 PM PDT 24 63720996962 ps
T305 /workspace/coverage/default/16.sysrst_ctrl_stress_all.3586644055 May 19 01:13:33 PM PDT 24 May 19 01:14:15 PM PDT 24 18974807107 ps
T387 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3013623183 May 19 01:14:03 PM PDT 24 May 19 01:14:06 PM PDT 24 2081112023 ps
T310 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2323133753 May 19 01:13:37 PM PDT 24 May 19 01:13:45 PM PDT 24 5733208288 ps
T255 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1885450606 May 19 01:13:49 PM PDT 24 May 19 01:15:07 PM PDT 24 59745018072 ps
T100 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.3478454388 May 19 01:13:51 PM PDT 24 May 19 01:16:07 PM PDT 24 102748949223 ps
T388 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.679484866 May 19 01:12:56 PM PDT 24 May 19 01:13:00 PM PDT 24 2307897936 ps
T389 /workspace/coverage/default/2.sysrst_ctrl_smoke.3685400779 May 19 01:12:58 PM PDT 24 May 19 01:13:04 PM PDT 24 2110734776 ps
T390 /workspace/coverage/default/49.sysrst_ctrl_smoke.3495238065 May 19 01:14:48 PM PDT 24 May 19 01:15:01 PM PDT 24 2127536753 ps
T46 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3150167269 May 19 01:14:26 PM PDT 24 May 19 01:14:37 PM PDT 24 3505366635 ps
T391 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1632642598 May 19 01:14:39 PM PDT 24 May 19 01:14:44 PM PDT 24 2473525766 ps
T260 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1957537576 May 19 01:14:57 PM PDT 24 May 19 01:17:59 PM PDT 24 129924707470 ps
T392 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.172499215 May 19 01:13:29 PM PDT 24 May 19 01:13:37 PM PDT 24 2456969020 ps
T393 /workspace/coverage/default/49.sysrst_ctrl_alert_test.2166092028 May 19 01:14:52 PM PDT 24 May 19 01:15:10 PM PDT 24 2052238394 ps
T106 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1303913560 May 19 01:13:13 PM PDT 24 May 19 01:13:38 PM PDT 24 41343435409 ps
T116 /workspace/coverage/default/41.sysrst_ctrl_stress_all.1964596954 May 19 01:14:45 PM PDT 24 May 19 01:15:52 PM PDT 24 85038142340 ps
T339 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.3838681688 May 19 01:13:12 PM PDT 24 May 19 01:15:11 PM PDT 24 42688288943 ps
T271 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.252808016 May 19 01:14:22 PM PDT 24 May 19 01:17:01 PM PDT 24 63644002138 ps
T86 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.140524316 May 19 01:14:32 PM PDT 24 May 19 01:15:51 PM PDT 24 30876444725 ps
T311 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2588719894 May 19 01:13:05 PM PDT 24 May 19 01:13:14 PM PDT 24 3833544616 ps
T206 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1446079497 May 19 01:12:59 PM PDT 24 May 19 01:13:02 PM PDT 24 3882884139 ps
T394 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2607530691 May 19 01:14:02 PM PDT 24 May 19 01:14:10 PM PDT 24 2135997865 ps
T65 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1291298198 May 19 01:13:22 PM PDT 24 May 19 01:13:29 PM PDT 24 7910099511 ps
T395 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3591384447 May 19 01:13:39 PM PDT 24 May 19 01:13:48 PM PDT 24 2609181512 ps
T396 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2943268146 May 19 01:13:27 PM PDT 24 May 19 01:13:37 PM PDT 24 3145935283 ps
T287 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.691234868 May 19 01:14:39 PM PDT 24 May 19 01:19:49 PM PDT 24 116212713533 ps
T288 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.68972195 May 19 01:13:48 PM PDT 24 May 19 01:16:44 PM PDT 24 66893489530 ps
T261 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.1784083713 May 19 01:14:37 PM PDT 24 May 19 01:22:45 PM PDT 24 175281338051 ps
T266 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.1798887072 May 19 01:13:23 PM PDT 24 May 19 01:13:55 PM PDT 24 42713009481 ps
T397 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3599624569 May 19 01:12:53 PM PDT 24 May 19 01:12:58 PM PDT 24 2245733062 ps
T398 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.848579669 May 19 01:14:41 PM PDT 24 May 19 01:14:47 PM PDT 24 2264958625 ps
T38 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.3525870783 May 19 01:13:02 PM PDT 24 May 19 01:13:06 PM PDT 24 4209723841 ps
T176 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.1010491575 May 19 01:14:48 PM PDT 24 May 19 01:14:59 PM PDT 24 2854676976 ps
T399 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.920337634 May 19 01:14:52 PM PDT 24 May 19 01:15:10 PM PDT 24 2596810766 ps
T66 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.3557810466 May 19 01:13:08 PM PDT 24 May 19 01:13:29 PM PDT 24 376847858353 ps
T283 /workspace/coverage/default/22.sysrst_ctrl_stress_all.1100922604 May 19 01:13:49 PM PDT 24 May 19 01:17:12 PM PDT 24 289985289833 ps
T400 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.502487444 May 19 01:14:41 PM PDT 24 May 19 01:14:53 PM PDT 24 3900611865 ps
T401 /workspace/coverage/default/15.sysrst_ctrl_smoke.2134886089 May 19 01:13:31 PM PDT 24 May 19 01:13:33 PM PDT 24 2184008790 ps
T402 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3073919930 May 19 01:13:19 PM PDT 24 May 19 01:13:30 PM PDT 24 2636626377 ps
T403 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1901409299 May 19 01:13:08 PM PDT 24 May 19 01:13:17 PM PDT 24 2612540973 ps
T404 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1390621143 May 19 01:13:06 PM PDT 24 May 19 01:13:15 PM PDT 24 2613085615 ps
T405 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3957618772 May 19 01:14:06 PM PDT 24 May 19 01:14:09 PM PDT 24 2523162399 ps
T170 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.3636964653 May 19 01:13:06 PM PDT 24 May 19 01:13:17 PM PDT 24 4441248989 ps
T406 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.800346108 May 19 01:13:41 PM PDT 24 May 19 01:13:53 PM PDT 24 3764060079 ps
T181 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.3322989094 May 19 01:13:43 PM PDT 24 May 19 01:13:49 PM PDT 24 2866510963 ps
T407 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2499372544 May 19 01:13:18 PM PDT 24 May 19 01:13:33 PM PDT 24 4154357097 ps
T118 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.349925483 May 19 01:13:19 PM PDT 24 May 19 01:13:36 PM PDT 24 61565521256 ps
T132 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3287099126 May 19 01:14:05 PM PDT 24 May 19 01:14:10 PM PDT 24 2823825505 ps
T133 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1274171203 May 19 01:14:06 PM PDT 24 May 19 01:14:11 PM PDT 24 4230487078 ps
T134 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2972011123 May 19 01:14:54 PM PDT 24 May 19 01:16:46 PM PDT 24 34058497075 ps
T135 /workspace/coverage/default/2.sysrst_ctrl_stress_all.626741122 May 19 01:13:06 PM PDT 24 May 19 01:13:17 PM PDT 24 13078776680 ps
T136 /workspace/coverage/default/46.sysrst_ctrl_smoke.635211352 May 19 01:14:44 PM PDT 24 May 19 01:14:49 PM PDT 24 2136276745 ps
T137 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.1713937259 May 19 01:14:05 PM PDT 24 May 19 01:14:06 PM PDT 24 2100520080 ps
T138 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.812974622 May 19 01:13:50 PM PDT 24 May 19 01:13:53 PM PDT 24 2658735807 ps
T139 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2785525646 May 19 01:13:11 PM PDT 24 May 19 01:13:18 PM PDT 24 3336585474 ps
T140 /workspace/coverage/default/9.sysrst_ctrl_smoke.1371883036 May 19 01:13:15 PM PDT 24 May 19 01:13:21 PM PDT 24 2134948081 ps
T408 /workspace/coverage/default/10.sysrst_ctrl_smoke.618675346 May 19 01:13:18 PM PDT 24 May 19 01:13:23 PM PDT 24 2123939878 ps
T67 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1433372339 May 19 01:13:50 PM PDT 24 May 19 01:14:22 PM PDT 24 43951119315 ps
T172 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3518350826 May 19 01:13:46 PM PDT 24 May 19 01:14:14 PM PDT 24 18024673217 ps
T68 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.4022124754 May 19 01:13:04 PM PDT 24 May 19 01:13:08 PM PDT 24 7431869395 ps
T69 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2640885363 May 19 01:14:17 PM PDT 24 May 19 01:14:23 PM PDT 24 6651839322 ps
T119 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.2187712736 May 19 01:13:38 PM PDT 24 May 19 01:14:21 PM PDT 24 33033224455 ps
T163 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.956612657 May 19 01:14:40 PM PDT 24 May 19 01:14:46 PM PDT 24 3673823517 ps
T164 /workspace/coverage/default/29.sysrst_ctrl_alert_test.1112106288 May 19 01:14:06 PM PDT 24 May 19 01:14:12 PM PDT 24 2015531568 ps
T120 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.570505043 May 19 01:13:23 PM PDT 24 May 19 01:14:10 PM PDT 24 32691702451 ps
T165 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3148702153 May 19 01:13:12 PM PDT 24 May 19 01:13:16 PM PDT 24 2481082206 ps
T166 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1656591151 May 19 01:14:11 PM PDT 24 May 19 01:14:23 PM PDT 24 3403767722 ps
T167 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3626741121 May 19 01:14:42 PM PDT 24 May 19 01:14:46 PM PDT 24 2632113517 ps
T142 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3228665105 May 19 01:13:18 PM PDT 24 May 19 01:13:29 PM PDT 24 12305140988 ps
T177 /workspace/coverage/default/11.sysrst_ctrl_stress_all.1327190232 May 19 01:13:20 PM PDT 24 May 19 01:13:43 PM PDT 24 8961866929 ps
T409 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3315103755 May 19 01:14:06 PM PDT 24 May 19 01:14:13 PM PDT 24 3806367767 ps
T410 /workspace/coverage/default/45.sysrst_ctrl_alert_test.1088104252 May 19 01:14:42 PM PDT 24 May 19 01:14:50 PM PDT 24 2012330327 ps
T411 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.4227569958 May 19 01:14:41 PM PDT 24 May 19 01:14:45 PM PDT 24 2706738352 ps
T412 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.450894524 May 19 01:14:14 PM PDT 24 May 19 01:14:19 PM PDT 24 3479353334 ps
T413 /workspace/coverage/default/18.sysrst_ctrl_alert_test.4131627313 May 19 01:13:43 PM PDT 24 May 19 01:13:48 PM PDT 24 2014746084 ps
T301 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1848022140 May 19 01:13:01 PM PDT 24 May 19 01:13:09 PM PDT 24 2479614545 ps
T267 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3822599096 May 19 01:13:43 PM PDT 24 May 19 01:14:46 PM PDT 24 46890019548 ps
T414 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.549824021 May 19 01:13:10 PM PDT 24 May 19 01:13:18 PM PDT 24 2118021353 ps
T121 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.2216794406 May 19 01:14:01 PM PDT 24 May 19 01:15:04 PM PDT 24 103201398593 ps
T415 /workspace/coverage/default/40.sysrst_ctrl_stress_all.3026662874 May 19 01:14:29 PM PDT 24 May 19 01:15:08 PM PDT 24 24849907621 ps
T110 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2559030492 May 19 01:13:27 PM PDT 24 May 19 01:13:30 PM PDT 24 4730850249 ps
T232 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2590734963 May 19 01:14:03 PM PDT 24 May 19 01:14:51 PM PDT 24 69187173136 ps
T233 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.1732379280 May 19 01:13:56 PM PDT 24 May 19 01:15:47 PM PDT 24 76451267985 ps
T234 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2473211940 May 19 01:14:50 PM PDT 24 May 19 01:16:03 PM PDT 24 44826169960 ps
T235 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2255934002 May 19 01:14:13 PM PDT 24 May 19 01:14:18 PM PDT 24 2627955946 ps
T122 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.500267094 May 19 01:14:55 PM PDT 24 May 19 01:15:29 PM PDT 24 26608009619 ps
T236 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.745327331 May 19 01:13:05 PM PDT 24 May 19 01:13:58 PM PDT 24 74355974293 ps
T237 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.898000502 May 19 01:13:18 PM PDT 24 May 19 01:13:25 PM PDT 24 2480932955 ps
T238 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1869790857 May 19 01:13:33 PM PDT 24 May 19 01:13:37 PM PDT 24 2628466315 ps
T239 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3659407058 May 19 01:13:07 PM PDT 24 May 19 01:13:11 PM PDT 24 2077627019 ps
T364 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3987227055 May 19 01:13:44 PM PDT 24 May 19 01:13:52 PM PDT 24 11390592946 ps
T302 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1954462410 May 19 01:13:48 PM PDT 24 May 19 01:13:57 PM PDT 24 2441112874 ps
T416 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.385478533 May 19 01:13:49 PM PDT 24 May 19 01:13:59 PM PDT 24 3136286486 ps
T417 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.100700946 May 19 01:14:21 PM PDT 24 May 19 01:14:27 PM PDT 24 2463742208 ps
T231 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1010601251 May 19 01:14:46 PM PDT 24 May 19 01:16:04 PM PDT 24 106755089047 ps
T143 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1870899693 May 19 01:13:17 PM PDT 24 May 19 01:13:25 PM PDT 24 8660164801 ps
T306 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1977516026 May 19 01:14:52 PM PDT 24 May 19 01:15:16 PM PDT 24 2512781592 ps
T282 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1311334874 May 19 01:14:49 PM PDT 24 May 19 01:17:42 PM PDT 24 123364709187 ps
T341 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.66690846 May 19 01:14:55 PM PDT 24 May 19 01:16:45 PM PDT 24 136967375642 ps
T78 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3888846060 May 19 01:14:35 PM PDT 24 May 19 01:16:01 PM PDT 24 31639020430 ps
T418 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1018795277 May 19 01:14:25 PM PDT 24 May 19 01:14:28 PM PDT 24 2501710835 ps
T419 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.1627601039 May 19 01:13:49 PM PDT 24 May 19 01:13:55 PM PDT 24 6789085429 ps
T144 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.534521070 May 19 01:13:50 PM PDT 24 May 19 01:14:01 PM PDT 24 10903574163 ps
T182 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.3795093414 May 19 01:13:16 PM PDT 24 May 19 01:13:24 PM PDT 24 2715999117 ps
T420 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.165614121 May 19 01:13:54 PM PDT 24 May 19 01:14:01 PM PDT 24 2450251447 ps
T284 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.378694559 May 19 01:14:51 PM PDT 24 May 19 01:15:13 PM PDT 24 3152607905 ps
T111 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3464250422 May 19 01:14:41 PM PDT 24 May 19 01:14:48 PM PDT 24 8431404350 ps
T421 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3500888192 May 19 01:14:31 PM PDT 24 May 19 01:14:36 PM PDT 24 5127250543 ps
T422 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3834216416 May 19 01:13:27 PM PDT 24 May 19 01:13:29 PM PDT 24 2560657435 ps
T262 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.458954891 May 19 01:13:01 PM PDT 24 May 19 01:14:10 PM PDT 24 50048793232 ps
T423 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.1126105254 May 19 01:14:17 PM PDT 24 May 19 01:14:23 PM PDT 24 2077931600 ps
T424 /workspace/coverage/default/34.sysrst_ctrl_alert_test.3928211377 May 19 01:14:16 PM PDT 24 May 19 01:14:20 PM PDT 24 2036938064 ps
T425 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.941810184 May 19 01:14:53 PM PDT 24 May 19 01:15:21 PM PDT 24 47578742430 ps
T426 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.79341185 May 19 01:14:18 PM PDT 24 May 19 01:14:26 PM PDT 24 2512214747 ps
T427 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.726480167 May 19 01:14:30 PM PDT 24 May 19 01:14:37 PM PDT 24 2050531576 ps
T428 /workspace/coverage/default/33.sysrst_ctrl_smoke.3929783894 May 19 01:14:13 PM PDT 24 May 19 01:14:18 PM PDT 24 2122706734 ps
T178 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1490123743 May 19 01:13:21 PM PDT 24 May 19 01:16:08 PM PDT 24 124072690152 ps
T223 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1191161820 May 19 01:14:47 PM PDT 24 May 19 01:14:56 PM PDT 24 2096460435 ps
T224 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1222905883 May 19 01:14:09 PM PDT 24 May 19 01:14:12 PM PDT 24 2533500006 ps
T225 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2295269196 May 19 01:13:15 PM PDT 24 May 19 01:13:19 PM PDT 24 2545924420 ps
T226 /workspace/coverage/default/12.sysrst_ctrl_alert_test.74000763 May 19 01:13:24 PM PDT 24 May 19 01:13:29 PM PDT 24 2015290756 ps
T183 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.3559480074 May 19 01:14:28 PM PDT 24 May 19 01:14:33 PM PDT 24 3079593608 ps
T227 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1060125100 May 19 01:14:16 PM PDT 24 May 19 01:14:24 PM PDT 24 2058398697 ps
T228 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1111298688 May 19 01:14:05 PM PDT 24 May 19 01:14:09 PM PDT 24 2573691841 ps
T229 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2284666887 May 19 01:14:41 PM PDT 24 May 19 01:14:51 PM PDT 24 2510093093 ps
T230 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.605184515 May 19 01:14:34 PM PDT 24 May 19 01:14:38 PM PDT 24 2103980854 ps
T179 /workspace/coverage/default/18.sysrst_ctrl_stress_all.1466964402 May 19 01:13:39 PM PDT 24 May 19 01:14:04 PM PDT 24 9554746150 ps
T429 /workspace/coverage/default/3.sysrst_ctrl_smoke.2308543312 May 19 01:13:06 PM PDT 24 May 19 01:13:10 PM PDT 24 2129520973 ps
T430 /workspace/coverage/default/9.sysrst_ctrl_stress_all.3057758271 May 19 01:13:21 PM PDT 24 May 19 01:13:30 PM PDT 24 9834624522 ps
T431 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.3079952272 May 19 01:13:41 PM PDT 24 May 19 01:13:45 PM PDT 24 2156291930 ps
T207 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.1190346769 May 19 01:14:02 PM PDT 24 May 19 01:14:13 PM PDT 24 4580227763 ps
T107 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.40349281 May 19 01:13:28 PM PDT 24 May 19 01:14:34 PM PDT 24 48497133964 ps
T208 /workspace/coverage/default/43.sysrst_ctrl_stress_all.1326389524 May 19 01:14:43 PM PDT 24 May 19 01:15:21 PM PDT 24 14092025786 ps
T303 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.4024223492 May 19 01:14:48 PM PDT 24 May 19 01:15:04 PM PDT 24 2459896655 ps
T314 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1062441315 May 19 01:12:59 PM PDT 24 May 19 01:13:14 PM PDT 24 49977093284 ps
T123 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.380815574 May 19 01:14:44 PM PDT 24 May 19 01:15:23 PM PDT 24 26334987379 ps
T432 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3195964604 May 19 01:13:30 PM PDT 24 May 19 01:13:39 PM PDT 24 2607588814 ps
T433 /workspace/coverage/default/9.sysrst_ctrl_alert_test.611096175 May 19 01:13:21 PM PDT 24 May 19 01:13:25 PM PDT 24 2035042153 ps
T343 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.1319708435 May 19 01:13:05 PM PDT 24 May 19 01:14:34 PM PDT 24 121336536627 ps
T204 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.3438606544 May 19 01:14:46 PM PDT 24 May 19 01:14:57 PM PDT 24 3108780538 ps
T434 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.667733084 May 19 01:14:20 PM PDT 24 May 19 01:14:24 PM PDT 24 2488484803 ps
T435 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1586581314 May 19 01:12:59 PM PDT 24 May 19 01:13:10 PM PDT 24 3759058862 ps
T436 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1830354167 May 19 01:13:03 PM PDT 24 May 19 01:13:07 PM PDT 24 2023500403 ps
T437 /workspace/coverage/default/3.sysrst_ctrl_alert_test.3842385923 May 19 01:13:03 PM PDT 24 May 19 01:13:09 PM PDT 24 2014927299 ps
T438 /workspace/coverage/default/47.sysrst_ctrl_alert_test.211973996 May 19 01:14:46 PM PDT 24 May 19 01:14:59 PM PDT 24 2011989211 ps
T197 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.3848473010 May 19 01:13:19 PM PDT 24 May 19 01:13:29 PM PDT 24 3548244979 ps
T285 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.951143828 May 19 01:13:45 PM PDT 24 May 19 01:13:49 PM PDT 24 3972494538 ps
T338 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1193579740 May 19 01:13:24 PM PDT 24 May 19 01:15:43 PM PDT 24 146888231953 ps
T439 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1262192142 May 19 01:14:30 PM PDT 24 May 19 01:14:33 PM PDT 24 2635177148 ps
T440 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.4126558998 May 19 01:14:12 PM PDT 24 May 19 01:42:07 PM PDT 24 617602523591 ps
T441 /workspace/coverage/default/8.sysrst_ctrl_alert_test.3390839915 May 19 01:13:12 PM PDT 24 May 19 01:13:20 PM PDT 24 2013353981 ps
T442 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2243418375 May 19 01:13:05 PM PDT 24 May 19 01:13:09 PM PDT 24 3280776237 ps
T263 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.985995562 May 19 01:13:29 PM PDT 24 May 19 01:16:51 PM PDT 24 77236726037 ps
T257 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3282421383 May 19 01:14:52 PM PDT 24 May 19 01:16:23 PM PDT 24 98440404547 ps
T443 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1668153443 May 19 01:14:35 PM PDT 24 May 19 01:14:38 PM PDT 24 2176234861 ps
T444 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3411140883 May 19 01:14:22 PM PDT 24 May 19 01:14:27 PM PDT 24 4187913583 ps
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