Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.64 98.79 96.78 100.00 96.15 98.26 99.52 94.00


Total test records in report: 912
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T191 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.3780458751 Jun 04 01:47:48 PM PDT 24 Jun 04 01:50:39 PM PDT 24 276804307656 ps
T436 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4042016222 Jun 04 01:49:20 PM PDT 24 Jun 04 01:49:28 PM PDT 24 2614971503 ps
T437 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3231423735 Jun 04 01:48:25 PM PDT 24 Jun 04 01:48:33 PM PDT 24 2608958421 ps
T438 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2255176335 Jun 04 01:48:36 PM PDT 24 Jun 04 01:48:40 PM PDT 24 3571001890 ps
T107 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3273119994 Jun 04 01:48:06 PM PDT 24 Jun 04 01:51:41 PM PDT 24 83585578276 ps
T439 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3979915952 Jun 04 01:47:55 PM PDT 24 Jun 04 01:48:03 PM PDT 24 3073032517 ps
T108 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.4063159895 Jun 04 01:49:01 PM PDT 24 Jun 04 01:50:07 PM PDT 24 24329934437 ps
T242 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.1229360256 Jun 04 01:49:27 PM PDT 24 Jun 04 01:50:28 PM PDT 24 153878076167 ps
T440 /workspace/coverage/default/3.sysrst_ctrl_smoke.2646770369 Jun 04 01:47:55 PM PDT 24 Jun 04 01:48:02 PM PDT 24 2108525669 ps
T441 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1554969494 Jun 04 01:48:57 PM PDT 24 Jun 04 01:49:01 PM PDT 24 2530940034 ps
T442 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2400746308 Jun 04 01:48:35 PM PDT 24 Jun 04 01:48:45 PM PDT 24 12357915661 ps
T443 /workspace/coverage/default/36.sysrst_ctrl_smoke.1307525119 Jun 04 01:49:09 PM PDT 24 Jun 04 01:49:12 PM PDT 24 2144392737 ps
T444 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2773246275 Jun 04 01:48:26 PM PDT 24 Jun 04 01:48:29 PM PDT 24 2224552047 ps
T109 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1046690085 Jun 04 01:49:48 PM PDT 24 Jun 04 01:50:07 PM PDT 24 28612173048 ps
T355 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.163047714 Jun 04 01:49:52 PM PDT 24 Jun 04 01:50:51 PM PDT 24 105125253716 ps
T445 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2114794924 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:22 PM PDT 24 2475139791 ps
T446 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1304328843 Jun 04 01:47:58 PM PDT 24 Jun 04 01:48:03 PM PDT 24 2856235373 ps
T447 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.659539423 Jun 04 01:48:24 PM PDT 24 Jun 04 01:48:29 PM PDT 24 2471721379 ps
T448 /workspace/coverage/default/43.sysrst_ctrl_alert_test.3050380822 Jun 04 01:49:26 PM PDT 24 Jun 04 01:49:30 PM PDT 24 2051094605 ps
T110 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1447710609 Jun 04 01:47:55 PM PDT 24 Jun 04 01:49:15 PM PDT 24 164677050005 ps
T361 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1149333463 Jun 04 01:49:50 PM PDT 24 Jun 04 01:52:09 PM PDT 24 66449083823 ps
T449 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.852325191 Jun 04 01:48:04 PM PDT 24 Jun 04 01:49:32 PM PDT 24 31297956581 ps
T450 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.3252583625 Jun 04 01:48:48 PM PDT 24 Jun 04 01:48:52 PM PDT 24 2116089055 ps
T365 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1776701374 Jun 04 01:49:51 PM PDT 24 Jun 04 01:50:12 PM PDT 24 45211191864 ps
T451 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.3399428302 Jun 04 01:48:57 PM PDT 24 Jun 04 01:49:49 PM PDT 24 71092131552 ps
T452 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2554752259 Jun 04 01:48:29 PM PDT 24 Jun 04 01:48:34 PM PDT 24 2616720588 ps
T142 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.518604633 Jun 04 01:48:09 PM PDT 24 Jun 04 01:48:15 PM PDT 24 4229974276 ps
T453 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1012227926 Jun 04 01:49:43 PM PDT 24 Jun 04 01:49:46 PM PDT 24 2154224292 ps
T454 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1354395436 Jun 04 01:47:52 PM PDT 24 Jun 04 01:48:00 PM PDT 24 4821239582 ps
T455 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.3572916042 Jun 04 01:49:25 PM PDT 24 Jun 04 01:49:32 PM PDT 24 3158740367 ps
T456 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1077254569 Jun 04 01:48:40 PM PDT 24 Jun 04 01:54:05 PM PDT 24 122590172682 ps
T457 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2267675196 Jun 04 01:47:38 PM PDT 24 Jun 04 01:47:44 PM PDT 24 3515453855 ps
T96 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.257044969 Jun 04 01:49:28 PM PDT 24 Jun 04 01:50:52 PM PDT 24 57914303268 ps
T458 /workspace/coverage/default/30.sysrst_ctrl_alert_test.1816392358 Jun 04 01:48:58 PM PDT 24 Jun 04 01:49:05 PM PDT 24 2011894300 ps
T170 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.4271117109 Jun 04 01:48:21 PM PDT 24 Jun 04 01:48:26 PM PDT 24 3700108162 ps
T459 /workspace/coverage/default/37.sysrst_ctrl_smoke.2677301188 Jun 04 01:49:09 PM PDT 24 Jun 04 01:49:13 PM PDT 24 2115039485 ps
T295 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1604974096 Jun 04 01:49:34 PM PDT 24 Jun 04 01:49:43 PM PDT 24 2511296885 ps
T460 /workspace/coverage/default/27.sysrst_ctrl_stress_all.1502710834 Jun 04 01:48:52 PM PDT 24 Jun 04 01:49:37 PM PDT 24 73759549512 ps
T461 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2514676820 Jun 04 01:49:36 PM PDT 24 Jun 04 01:49:44 PM PDT 24 2116149003 ps
T462 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.582768023 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:07 PM PDT 24 5719242093 ps
T111 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3322405599 Jun 04 01:48:20 PM PDT 24 Jun 04 01:49:21 PM PDT 24 23332065998 ps
T463 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.2066983694 Jun 04 01:48:49 PM PDT 24 Jun 04 01:48:54 PM PDT 24 3526740582 ps
T296 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3322095140 Jun 04 01:49:18 PM PDT 24 Jun 04 01:49:23 PM PDT 24 2515827992 ps
T464 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1934179201 Jun 04 01:48:50 PM PDT 24 Jun 04 01:48:58 PM PDT 24 2199891123 ps
T465 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1845515923 Jun 04 01:48:20 PM PDT 24 Jun 04 01:48:26 PM PDT 24 2616798993 ps
T466 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4067616533 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:04 PM PDT 24 2519998624 ps
T467 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3689618914 Jun 04 01:49:37 PM PDT 24 Jun 04 01:49:42 PM PDT 24 2624431273 ps
T468 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.4162358204 Jun 04 01:49:36 PM PDT 24 Jun 04 01:49:47 PM PDT 24 2924692381 ps
T228 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2058196828 Jun 04 01:48:38 PM PDT 24 Jun 04 01:49:17 PM PDT 24 26342792158 ps
T375 /workspace/coverage/default/45.sysrst_ctrl_stress_all.4121902208 Jun 04 01:49:41 PM PDT 24 Jun 04 01:49:54 PM PDT 24 17199625750 ps
T469 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1431973929 Jun 04 01:48:52 PM PDT 24 Jun 04 01:48:59 PM PDT 24 3643445611 ps
T298 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2962175746 Jun 04 01:49:27 PM PDT 24 Jun 04 01:49:37 PM PDT 24 5902544852 ps
T470 /workspace/coverage/default/15.sysrst_ctrl_alert_test.2061452781 Jun 04 01:48:33 PM PDT 24 Jun 04 01:48:36 PM PDT 24 2043936999 ps
T95 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2675089749 Jun 04 01:49:21 PM PDT 24 Jun 04 01:49:24 PM PDT 24 5532823385 ps
T112 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1684705070 Jun 04 01:48:25 PM PDT 24 Jun 04 01:49:57 PM PDT 24 70502114497 ps
T222 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.2141371333 Jun 04 01:49:46 PM PDT 24 Jun 04 01:49:54 PM PDT 24 4198238259 ps
T471 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.4239919216 Jun 04 01:48:48 PM PDT 24 Jun 04 01:48:53 PM PDT 24 2514351108 ps
T297 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.1165682258 Jun 04 01:48:23 PM PDT 24 Jun 04 01:48:28 PM PDT 24 2518128124 ps
T337 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.291003435 Jun 04 01:47:59 PM PDT 24 Jun 04 01:52:03 PM PDT 24 107000250056 ps
T352 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.701072012 Jun 04 01:49:50 PM PDT 24 Jun 04 01:53:22 PM PDT 24 78402666424 ps
T472 /workspace/coverage/default/46.sysrst_ctrl_smoke.47543742 Jun 04 01:49:33 PM PDT 24 Jun 04 01:49:36 PM PDT 24 2126645944 ps
T473 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2631071063 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:20 PM PDT 24 2507607827 ps
T299 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3609181768 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:21 PM PDT 24 6130132910 ps
T474 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2673013057 Jun 04 01:48:44 PM PDT 24 Jun 04 01:48:50 PM PDT 24 3105988231 ps
T475 /workspace/coverage/default/48.sysrst_ctrl_smoke.4015386857 Jun 04 01:49:44 PM PDT 24 Jun 04 01:49:52 PM PDT 24 2110061818 ps
T356 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.756355667 Jun 04 01:49:07 PM PDT 24 Jun 04 01:53:02 PM PDT 24 87213869079 ps
T476 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1022321224 Jun 04 01:49:05 PM PDT 24 Jun 04 01:49:12 PM PDT 24 2166753965 ps
T233 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.936334649 Jun 04 01:49:52 PM PDT 24 Jun 04 01:50:01 PM PDT 24 27291275759 ps
T477 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1052266540 Jun 04 01:49:51 PM PDT 24 Jun 04 01:51:58 PM PDT 24 50042874134 ps
T232 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3954966944 Jun 04 01:48:24 PM PDT 24 Jun 04 01:49:52 PM PDT 24 41116293097 ps
T478 /workspace/coverage/default/10.sysrst_ctrl_smoke.2735073394 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:10 PM PDT 24 2121884161 ps
T479 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.55944053 Jun 04 01:49:15 PM PDT 24 Jun 04 01:49:23 PM PDT 24 2211277914 ps
T480 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3626737830 Jun 04 01:47:59 PM PDT 24 Jun 04 01:48:04 PM PDT 24 2518364562 ps
T481 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3713776115 Jun 04 01:49:10 PM PDT 24 Jun 04 01:49:16 PM PDT 24 3058401476 ps
T482 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1039761609 Jun 04 01:49:22 PM PDT 24 Jun 04 01:49:26 PM PDT 24 3639567716 ps
T256 /workspace/coverage/default/46.sysrst_ctrl_stress_all.392541185 Jun 04 01:49:36 PM PDT 24 Jun 04 01:53:59 PM PDT 24 217489531627 ps
T483 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1806351667 Jun 04 01:49:15 PM PDT 24 Jun 04 01:49:23 PM PDT 24 5183172846 ps
T289 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.2469661659 Jun 04 01:48:44 PM PDT 24 Jun 04 01:50:04 PM PDT 24 34644034359 ps
T484 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3311586890 Jun 04 01:48:54 PM PDT 24 Jun 04 01:49:03 PM PDT 24 2611100022 ps
T249 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2912305089 Jun 04 01:49:01 PM PDT 24 Jun 04 01:49:27 PM PDT 24 104563318973 ps
T485 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.289993311 Jun 04 01:49:12 PM PDT 24 Jun 04 01:49:15 PM PDT 24 2622380262 ps
T486 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3707327346 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:07 PM PDT 24 2134627239 ps
T487 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.2650411259 Jun 04 01:49:08 PM PDT 24 Jun 04 01:49:17 PM PDT 24 2509802273 ps
T125 /workspace/coverage/default/5.sysrst_ctrl_stress_all.412903066 Jun 04 01:47:53 PM PDT 24 Jun 04 01:48:23 PM PDT 24 12889300201 ps
T488 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.45853859 Jun 04 01:49:09 PM PDT 24 Jun 04 01:49:13 PM PDT 24 3313650055 ps
T489 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3881961225 Jun 04 01:49:07 PM PDT 24 Jun 04 01:52:21 PM PDT 24 151662558644 ps
T490 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3814252815 Jun 04 01:49:43 PM PDT 24 Jun 04 01:49:48 PM PDT 24 2460829257 ps
T491 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3160991416 Jun 04 01:48:36 PM PDT 24 Jun 04 01:48:41 PM PDT 24 2802257491 ps
T492 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.2796535957 Jun 04 01:48:25 PM PDT 24 Jun 04 01:48:33 PM PDT 24 2370702901 ps
T493 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.201761820 Jun 04 01:48:38 PM PDT 24 Jun 04 01:48:47 PM PDT 24 2462054465 ps
T494 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1457522007 Jun 04 01:48:35 PM PDT 24 Jun 04 01:48:43 PM PDT 24 2169651763 ps
T495 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.257970125 Jun 04 01:48:40 PM PDT 24 Jun 04 01:48:47 PM PDT 24 2614009194 ps
T363 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3486307978 Jun 04 01:49:01 PM PDT 24 Jun 04 01:49:24 PM PDT 24 36584397355 ps
T253 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3634853071 Jun 04 01:49:50 PM PDT 24 Jun 04 01:50:24 PM PDT 24 46877949698 ps
T496 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3384648039 Jun 04 01:48:03 PM PDT 24 Jun 04 01:48:49 PM PDT 24 159223743685 ps
T113 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.1097834303 Jun 04 01:48:28 PM PDT 24 Jun 04 01:50:46 PM PDT 24 51138002375 ps
T497 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2186702692 Jun 04 01:49:44 PM PDT 24 Jun 04 01:49:47 PM PDT 24 2643407225 ps
T160 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.366843221 Jun 04 01:49:11 PM PDT 24 Jun 04 01:49:13 PM PDT 24 3162757061 ps
T498 /workspace/coverage/default/5.sysrst_ctrl_smoke.1080100240 Jun 04 01:48:02 PM PDT 24 Jun 04 01:48:09 PM PDT 24 2110865485 ps
T499 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.634435570 Jun 04 01:49:15 PM PDT 24 Jun 04 01:49:23 PM PDT 24 2514100272 ps
T500 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3056063528 Jun 04 01:48:23 PM PDT 24 Jun 04 01:48:26 PM PDT 24 2638467861 ps
T359 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1178430138 Jun 04 01:49:50 PM PDT 24 Jun 04 01:50:39 PM PDT 24 76727991365 ps
T501 /workspace/coverage/default/24.sysrst_ctrl_alert_test.3961892310 Jun 04 01:48:43 PM PDT 24 Jun 04 01:48:46 PM PDT 24 2038481923 ps
T502 /workspace/coverage/default/21.sysrst_ctrl_smoke.588668777 Jun 04 01:48:31 PM PDT 24 Jun 04 01:48:37 PM PDT 24 2112453262 ps
T503 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3305928553 Jun 04 01:48:39 PM PDT 24 Jun 04 01:48:48 PM PDT 24 5650567404 ps
T504 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2405833511 Jun 04 01:48:40 PM PDT 24 Jun 04 01:48:47 PM PDT 24 2461553057 ps
T505 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.916171925 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:40 PM PDT 24 11601198370 ps
T330 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2851596160 Jun 04 01:49:50 PM PDT 24 Jun 04 01:58:59 PM PDT 24 223244494019 ps
T506 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1052620639 Jun 04 01:49:42 PM PDT 24 Jun 04 01:49:47 PM PDT 24 2566690135 ps
T507 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.2039798590 Jun 04 01:48:56 PM PDT 24 Jun 04 01:53:37 PM PDT 24 420938135429 ps
T508 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1877248064 Jun 04 01:48:24 PM PDT 24 Jun 04 01:48:30 PM PDT 24 2488440478 ps
T509 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.354303530 Jun 04 01:49:35 PM PDT 24 Jun 04 01:49:38 PM PDT 24 3846172417 ps
T510 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.854557470 Jun 04 01:48:43 PM PDT 24 Jun 04 01:48:50 PM PDT 24 3428338386 ps
T126 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2596987829 Jun 04 01:47:39 PM PDT 24 Jun 04 01:47:48 PM PDT 24 5838302039 ps
T511 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2211878180 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:11 PM PDT 24 2551187825 ps
T512 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2959826740 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:09 PM PDT 24 2656875834 ps
T513 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2739791161 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:10 PM PDT 24 2487166155 ps
T346 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2003658993 Jun 04 01:49:27 PM PDT 24 Jun 04 01:50:29 PM PDT 24 95887818424 ps
T514 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.480683655 Jun 04 01:48:53 PM PDT 24 Jun 04 01:48:57 PM PDT 24 3011066709 ps
T331 /workspace/coverage/default/30.sysrst_ctrl_stress_all.3498799998 Jun 04 01:48:58 PM PDT 24 Jun 04 01:49:32 PM PDT 24 170888584050 ps
T515 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.246729493 Jun 04 01:47:59 PM PDT 24 Jun 04 01:48:09 PM PDT 24 3382520776 ps
T516 /workspace/coverage/default/12.sysrst_ctrl_alert_test.3211824608 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:09 PM PDT 24 2114252870 ps
T517 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.1460590368 Jun 04 01:48:22 PM PDT 24 Jun 04 01:48:25 PM PDT 24 2600118459 ps
T518 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2378018259 Jun 04 01:47:55 PM PDT 24 Jun 04 01:49:04 PM PDT 24 27331112484 ps
T290 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1712658228 Jun 04 01:48:51 PM PDT 24 Jun 04 01:50:25 PM PDT 24 35600420287 ps
T519 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3661011017 Jun 04 01:48:24 PM PDT 24 Jun 04 01:48:27 PM PDT 24 2236699212 ps
T520 /workspace/coverage/default/48.sysrst_ctrl_alert_test.2621492884 Jun 04 01:49:42 PM PDT 24 Jun 04 01:49:49 PM PDT 24 2013557245 ps
T521 /workspace/coverage/default/13.sysrst_ctrl_smoke.3863776085 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:11 PM PDT 24 2136131773 ps
T522 /workspace/coverage/default/35.sysrst_ctrl_smoke.3511729925 Jun 04 01:49:03 PM PDT 24 Jun 04 01:49:06 PM PDT 24 2130986443 ps
T523 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3008954439 Jun 04 01:49:28 PM PDT 24 Jun 04 01:49:33 PM PDT 24 2461277908 ps
T350 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4272585380 Jun 04 01:49:50 PM PDT 24 Jun 04 01:56:38 PM PDT 24 163650984425 ps
T524 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.178497781 Jun 04 01:49:37 PM PDT 24 Jun 04 01:49:41 PM PDT 24 2657328937 ps
T370 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1779405601 Jun 04 01:49:50 PM PDT 24 Jun 04 01:50:24 PM PDT 24 48317364445 ps
T525 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1718281210 Jun 04 01:48:24 PM PDT 24 Jun 04 01:48:34 PM PDT 24 3228864196 ps
T526 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2825276574 Jun 04 01:49:37 PM PDT 24 Jun 04 01:49:47 PM PDT 24 2511970090 ps
T527 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.408530298 Jun 04 01:49:11 PM PDT 24 Jun 04 01:49:16 PM PDT 24 2467851840 ps
T528 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3150080256 Jun 04 01:47:53 PM PDT 24 Jun 04 01:47:57 PM PDT 24 3419334881 ps
T332 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.1251460764 Jun 04 01:48:01 PM PDT 24 Jun 04 01:56:23 PM PDT 24 190532580667 ps
T529 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1088146421 Jun 04 01:48:40 PM PDT 24 Jun 04 01:48:48 PM PDT 24 3095998072 ps
T89 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.564130100 Jun 04 01:48:59 PM PDT 24 Jun 04 01:51:33 PM PDT 24 58358848420 ps
T143 /workspace/coverage/default/11.sysrst_ctrl_stress_all.1849188847 Jun 04 01:48:07 PM PDT 24 Jun 04 01:48:39 PM PDT 24 13344735979 ps
T147 /workspace/coverage/default/39.sysrst_ctrl_stress_all.3196814477 Jun 04 01:49:17 PM PDT 24 Jun 04 01:49:42 PM PDT 24 10109179103 ps
T530 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1010045987 Jun 04 01:48:35 PM PDT 24 Jun 04 01:48:45 PM PDT 24 2974405586 ps
T339 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.391387050 Jun 04 01:48:40 PM PDT 24 Jun 04 01:51:49 PM PDT 24 138067316967 ps
T340 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3658082148 Jun 04 01:48:19 PM PDT 24 Jun 04 01:51:23 PM PDT 24 271080545629 ps
T531 /workspace/coverage/default/8.sysrst_ctrl_stress_all.3444768703 Jun 04 01:48:01 PM PDT 24 Jun 04 01:48:38 PM PDT 24 13804289897 ps
T532 /workspace/coverage/default/3.sysrst_ctrl_alert_test.954528596 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:10 PM PDT 24 2061143197 ps
T533 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.918512148 Jun 04 01:47:52 PM PDT 24 Jun 04 01:49:41 PM PDT 24 325059738014 ps
T534 /workspace/coverage/default/12.sysrst_ctrl_stress_all.1740431616 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:22 PM PDT 24 7589683912 ps
T371 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1315151349 Jun 04 01:49:48 PM PDT 24 Jun 04 01:50:34 PM PDT 24 67073321177 ps
T535 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.747133960 Jun 04 01:49:27 PM PDT 24 Jun 04 01:49:33 PM PDT 24 4633450767 ps
T536 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1540351984 Jun 04 01:47:44 PM PDT 24 Jun 04 01:47:48 PM PDT 24 2528892664 ps
T177 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.246766344 Jun 04 01:48:26 PM PDT 24 Jun 04 01:48:32 PM PDT 24 4289173977 ps
T181 /workspace/coverage/default/5.sysrst_ctrl_alert_test.3188424686 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:12 PM PDT 24 2018380182 ps
T182 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1624097315 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:14 PM PDT 24 2512519841 ps
T60 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.4143349219 Jun 04 01:47:49 PM PDT 24 Jun 04 01:48:03 PM PDT 24 39945095897 ps
T183 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1878578393 Jun 04 01:49:50 PM PDT 24 Jun 04 01:50:55 PM PDT 24 94107330172 ps
T184 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1941682028 Jun 04 01:47:44 PM PDT 24 Jun 04 01:47:49 PM PDT 24 2247288402 ps
T185 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2648047115 Jun 04 01:48:36 PM PDT 24 Jun 04 01:48:41 PM PDT 24 3192425897 ps
T186 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2771642135 Jun 04 01:49:22 PM PDT 24 Jun 04 01:49:30 PM PDT 24 2607607316 ps
T187 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.4138456526 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:08 PM PDT 24 3342847594 ps
T188 /workspace/coverage/default/14.sysrst_ctrl_alert_test.1731992163 Jun 04 01:48:24 PM PDT 24 Jun 04 01:48:30 PM PDT 24 2012121976 ps
T537 /workspace/coverage/default/36.sysrst_ctrl_alert_test.1339998032 Jun 04 01:49:08 PM PDT 24 Jun 04 01:49:11 PM PDT 24 2036372908 ps
T538 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1715543642 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:12 PM PDT 24 2148885372 ps
T539 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.197894664 Jun 04 01:49:28 PM PDT 24 Jun 04 01:49:34 PM PDT 24 3148069031 ps
T540 /workspace/coverage/default/35.sysrst_ctrl_alert_test.628690518 Jun 04 01:49:08 PM PDT 24 Jun 04 01:49:11 PM PDT 24 2033201794 ps
T541 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.170927833 Jun 04 01:48:01 PM PDT 24 Jun 04 01:48:04 PM PDT 24 3307234961 ps
T341 /workspace/coverage/default/2.sysrst_ctrl_stress_all.2046480893 Jun 04 01:48:03 PM PDT 24 Jun 04 01:50:30 PM PDT 24 112821809353 ps
T360 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1199512823 Jun 04 01:49:50 PM PDT 24 Jun 04 01:51:31 PM PDT 24 64389933317 ps
T542 /workspace/coverage/default/20.sysrst_ctrl_smoke.779824991 Jun 04 01:48:34 PM PDT 24 Jun 04 01:48:38 PM PDT 24 2139174674 ps
T543 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.200356544 Jun 04 01:49:19 PM PDT 24 Jun 04 01:49:25 PM PDT 24 2444439504 ps
T544 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3686431830 Jun 04 01:47:55 PM PDT 24 Jun 04 01:47:59 PM PDT 24 3227690682 ps
T545 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.874823055 Jun 04 01:49:20 PM PDT 24 Jun 04 01:49:26 PM PDT 24 3198887752 ps
T546 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1327449707 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:20 PM PDT 24 2624617127 ps
T547 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2042777827 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:12 PM PDT 24 3526863030 ps
T548 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3248095723 Jun 04 01:49:51 PM PDT 24 Jun 04 01:51:29 PM PDT 24 75039905629 ps
T265 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.3867498398 Jun 04 01:47:57 PM PDT 24 Jun 04 01:48:45 PM PDT 24 42070045788 ps
T549 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3582883831 Jun 04 01:49:26 PM PDT 24 Jun 04 01:49:30 PM PDT 24 4697011719 ps
T334 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.1924999080 Jun 04 01:48:44 PM PDT 24 Jun 04 01:49:15 PM PDT 24 29815330451 ps
T550 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.68496368 Jun 04 01:49:42 PM PDT 24 Jun 04 01:49:51 PM PDT 24 2510353834 ps
T192 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.8499373 Jun 04 01:48:52 PM PDT 24 Jun 04 01:49:05 PM PDT 24 4149969255 ps
T551 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3975007469 Jun 04 01:48:05 PM PDT 24 Jun 04 01:50:35 PM PDT 24 242041966852 ps
T552 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.2975453625 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:17 PM PDT 24 3588618895 ps
T553 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3580767369 Jun 04 01:49:31 PM PDT 24 Jun 04 01:49:35 PM PDT 24 2489774886 ps
T554 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.89804524 Jun 04 01:49:55 PM PDT 24 Jun 04 01:53:15 PM PDT 24 80090438322 ps
T358 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.289312640 Jun 04 01:49:31 PM PDT 24 Jun 04 01:50:40 PM PDT 24 100048535556 ps
T555 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2024268895 Jun 04 01:49:02 PM PDT 24 Jun 04 01:49:38 PM PDT 24 24584630143 ps
T556 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1024036811 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:11 PM PDT 24 2079663416 ps
T243 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.785249807 Jun 04 01:48:21 PM PDT 24 Jun 04 01:52:09 PM PDT 24 163504204356 ps
T557 /workspace/coverage/default/25.sysrst_ctrl_alert_test.4012358392 Jun 04 01:48:43 PM PDT 24 Jun 04 01:48:50 PM PDT 24 2011116855 ps
T558 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1523081928 Jun 04 01:49:36 PM PDT 24 Jun 04 01:49:50 PM PDT 24 3866187771 ps
T559 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.552876325 Jun 04 01:48:30 PM PDT 24 Jun 04 01:48:33 PM PDT 24 2432512067 ps
T560 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.79067429 Jun 04 01:48:49 PM PDT 24 Jun 04 01:48:55 PM PDT 24 2232274767 ps
T114 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.3571762537 Jun 04 01:48:04 PM PDT 24 Jun 04 01:51:00 PM PDT 24 134618062935 ps
T351 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1023724298 Jun 04 01:49:14 PM PDT 24 Jun 04 01:54:09 PM PDT 24 114259547175 ps
T561 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2115460113 Jun 04 01:49:08 PM PDT 24 Jun 04 01:49:49 PM PDT 24 68512252180 ps
T562 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1888818896 Jun 04 01:48:03 PM PDT 24 Jun 04 01:48:06 PM PDT 24 2669453407 ps
T563 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2606191667 Jun 04 01:47:42 PM PDT 24 Jun 04 01:47:52 PM PDT 24 2475550698 ps
T564 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.1244929490 Jun 04 01:49:04 PM PDT 24 Jun 04 01:49:06 PM PDT 24 2540922711 ps
T565 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1224744877 Jun 04 01:49:55 PM PDT 24 Jun 04 01:50:09 PM PDT 24 26603343204 ps
T202 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2382724748 Jun 04 01:48:13 PM PDT 24 Jun 04 01:49:16 PM PDT 24 73306729959 ps
T205 /workspace/coverage/default/38.sysrst_ctrl_smoke.2121615894 Jun 04 01:49:21 PM PDT 24 Jun 04 01:49:28 PM PDT 24 2109402635 ps
T206 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2643131788 Jun 04 01:47:44 PM PDT 24 Jun 04 01:47:48 PM PDT 24 2208807939 ps
T207 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.813143532 Jun 04 01:48:47 PM PDT 24 Jun 04 01:48:50 PM PDT 24 7462795726 ps
T208 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4069257526 Jun 04 01:49:40 PM PDT 24 Jun 04 01:49:48 PM PDT 24 5771360593 ps
T209 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1519919606 Jun 04 01:48:26 PM PDT 24 Jun 04 01:49:29 PM PDT 24 49734292750 ps
T210 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.422608927 Jun 04 01:47:54 PM PDT 24 Jun 04 01:49:08 PM PDT 24 26828142524 ps
T115 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1036241992 Jun 04 01:48:38 PM PDT 24 Jun 04 01:49:04 PM PDT 24 39046964804 ps
T211 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.383225581 Jun 04 01:48:14 PM PDT 24 Jun 04 01:48:22 PM PDT 24 2514229303 ps
T212 /workspace/coverage/default/28.sysrst_ctrl_smoke.3114358804 Jun 04 01:48:50 PM PDT 24 Jun 04 01:48:54 PM PDT 24 2123529525 ps
T566 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1935382539 Jun 04 01:49:29 PM PDT 24 Jun 04 01:49:38 PM PDT 24 2514926574 ps
T567 /workspace/coverage/default/10.sysrst_ctrl_stress_all.458328764 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:25 PM PDT 24 6843984241 ps
T224 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.3543302216 Jun 04 01:49:15 PM PDT 24 Jun 04 01:49:20 PM PDT 24 5302400078 ps
T250 /workspace/coverage/default/9.sysrst_ctrl_stress_all.3219246118 Jun 04 01:48:00 PM PDT 24 Jun 04 01:59:01 PM PDT 24 239648090216 ps
T568 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.3737598593 Jun 04 01:48:22 PM PDT 24 Jun 04 01:48:29 PM PDT 24 4988341337 ps
T569 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.761158916 Jun 04 01:48:44 PM PDT 24 Jun 04 01:48:47 PM PDT 24 2159614861 ps
T570 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.1182347774 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:04 PM PDT 24 2465601333 ps
T373 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4038626352 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:30 PM PDT 24 36723186579 ps
T571 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3623905287 Jun 04 01:49:44 PM PDT 24 Jun 04 01:51:52 PM PDT 24 51044736473 ps
T572 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1221975998 Jun 04 01:48:03 PM PDT 24 Jun 04 01:48:07 PM PDT 24 2453663658 ps
T573 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.4249143170 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:08 PM PDT 24 2413646740 ps
T574 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.1534720828 Jun 04 01:48:16 PM PDT 24 Jun 04 01:48:25 PM PDT 24 2477140573 ps
T575 /workspace/coverage/default/39.sysrst_ctrl_alert_test.2624245687 Jun 04 01:49:19 PM PDT 24 Jun 04 01:49:22 PM PDT 24 2043366578 ps
T335 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3442348686 Jun 04 01:48:41 PM PDT 24 Jun 04 01:49:23 PM PDT 24 107730599432 ps
T576 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2571771021 Jun 04 01:48:16 PM PDT 24 Jun 04 01:48:19 PM PDT 24 2632988843 ps
T577 /workspace/coverage/default/22.sysrst_ctrl_smoke.412373962 Jun 04 01:48:35 PM PDT 24 Jun 04 01:48:38 PM PDT 24 2169891785 ps
T578 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2814489933 Jun 04 01:47:47 PM PDT 24 Jun 04 01:48:16 PM PDT 24 20084438903 ps
T579 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3647502990 Jun 04 01:48:41 PM PDT 24 Jun 04 01:48:50 PM PDT 24 4345340331 ps
T580 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.1205651674 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:10 PM PDT 24 2529118173 ps
T581 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3954037531 Jun 04 01:48:07 PM PDT 24 Jun 04 01:48:15 PM PDT 24 5155155770 ps
T582 /workspace/coverage/default/7.sysrst_ctrl_stress_all.2369143161 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:23 PM PDT 24 18982680004 ps
T583 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.917948273 Jun 04 01:48:52 PM PDT 24 Jun 04 01:48:59 PM PDT 24 2475220358 ps
T369 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.1492067212 Jun 04 01:49:08 PM PDT 24 Jun 04 01:53:35 PM PDT 24 108765058609 ps
T584 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.4216598095 Jun 04 01:48:00 PM PDT 24 Jun 04 02:25:04 PM PDT 24 826722131253 ps
T585 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3444478892 Jun 04 01:49:23 PM PDT 24 Jun 04 01:49:26 PM PDT 24 2534425993 ps
T586 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1848289684 Jun 04 01:49:37 PM PDT 24 Jun 04 01:49:45 PM PDT 24 3532828687 ps
T127 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.3173744360 Jun 04 01:48:23 PM PDT 24 Jun 04 01:48:29 PM PDT 24 8245783278 ps
T587 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1687820898 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:10 PM PDT 24 2035697232 ps
T588 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.558186011 Jun 04 01:49:51 PM PDT 24 Jun 04 01:51:04 PM PDT 24 25330046118 ps
T589 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1321764449 Jun 04 01:48:57 PM PDT 24 Jun 04 01:49:02 PM PDT 24 2515054744 ps
T590 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.21921577 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:10 PM PDT 24 4675183306 ps
T374 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2087377144 Jun 04 01:49:49 PM PDT 24 Jun 04 01:50:13 PM PDT 24 34802559203 ps
T591 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2757980876 Jun 04 01:49:52 PM PDT 24 Jun 04 01:50:11 PM PDT 24 36823901044 ps
T592 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3113658989 Jun 04 01:47:45 PM PDT 24 Jun 04 01:47:48 PM PDT 24 2728256813 ps
T593 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2040765715 Jun 04 01:49:01 PM PDT 24 Jun 04 01:49:28 PM PDT 24 10077687122 ps
T353 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.93989532 Jun 04 01:48:46 PM PDT 24 Jun 04 01:52:33 PM PDT 24 89951744705 ps
T594 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1982159184 Jun 04 01:47:42 PM PDT 24 Jun 04 01:47:44 PM PDT 24 2534972443 ps
T279 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.3379636586 Jun 04 01:48:01 PM PDT 24 Jun 04 01:49:01 PM PDT 24 22013554290 ps
T595 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3138014683 Jun 04 01:49:26 PM PDT 24 Jun 04 01:49:30 PM PDT 24 2533406104 ps
T596 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2951991571 Jun 04 01:48:31 PM PDT 24 Jun 04 01:48:37 PM PDT 24 2995192279 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%