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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.64 98.79 96.78 100.00 96.15 98.26 99.52 94.00


Total test records in report: 912
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T178 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.4122106270 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:03 PM PDT 24 3270453156 ps
T597 /workspace/coverage/default/6.sysrst_ctrl_alert_test.2253605410 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:08 PM PDT 24 2038496679 ps
T598 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3796876025 Jun 04 01:49:35 PM PDT 24 Jun 04 01:52:34 PM PDT 24 64119645145 ps
T599 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1096460839 Jun 04 01:48:44 PM PDT 24 Jun 04 01:48:51 PM PDT 24 2081242577 ps
T600 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2337498121 Jun 04 01:48:40 PM PDT 24 Jun 04 01:48:50 PM PDT 24 2510942464 ps
T601 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2230922633 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:03 PM PDT 24 2045211660 ps
T144 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2757608978 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:12 PM PDT 24 7734742131 ps
T145 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1412200767 Jun 04 01:48:58 PM PDT 24 Jun 04 01:50:36 PM PDT 24 43419659830 ps
T291 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2290877067 Jun 04 01:49:26 PM PDT 24 Jun 04 01:50:17 PM PDT 24 21737780853 ps
T244 /workspace/coverage/default/31.sysrst_ctrl_stress_all.646323120 Jun 04 01:48:55 PM PDT 24 Jun 04 01:54:40 PM PDT 24 131110301522 ps
T336 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2999016624 Jun 04 01:49:20 PM PDT 24 Jun 04 01:52:27 PM PDT 24 70335757052 ps
T131 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2827960157 Jun 04 01:48:28 PM PDT 24 Jun 04 01:48:30 PM PDT 24 5796877210 ps
T602 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2469287064 Jun 04 01:49:38 PM PDT 24 Jun 04 01:49:42 PM PDT 24 2199833027 ps
T603 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.1969391790 Jun 04 01:47:50 PM PDT 24 Jun 04 01:47:53 PM PDT 24 2254099918 ps
T604 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.876392298 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:06 PM PDT 24 2478671984 ps
T605 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2711240348 Jun 04 01:48:07 PM PDT 24 Jun 04 01:49:12 PM PDT 24 25832020286 ps
T606 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.135592284 Jun 04 01:48:21 PM PDT 24 Jun 04 01:48:26 PM PDT 24 2092306393 ps
T161 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.158674342 Jun 04 01:49:42 PM PDT 24 Jun 04 01:50:56 PM PDT 24 28000191275 ps
T607 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1578177941 Jun 04 01:47:44 PM PDT 24 Jun 04 01:47:52 PM PDT 24 2461067209 ps
T245 /workspace/coverage/default/26.sysrst_ctrl_stress_all.2689817802 Jun 04 01:48:39 PM PDT 24 Jun 04 01:53:03 PM PDT 24 216182690277 ps
T608 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.543470177 Jun 04 01:48:32 PM PDT 24 Jun 04 01:48:38 PM PDT 24 2459906868 ps
T609 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3878560492 Jun 04 01:48:39 PM PDT 24 Jun 04 01:48:48 PM PDT 24 2471848212 ps
T610 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2425848040 Jun 04 01:48:33 PM PDT 24 Jun 04 01:48:41 PM PDT 24 2610869198 ps
T611 /workspace/coverage/default/15.sysrst_ctrl_smoke.385599757 Jun 04 01:48:19 PM PDT 24 Jun 04 01:48:26 PM PDT 24 2110252114 ps
T612 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.773631956 Jun 04 01:48:31 PM PDT 24 Jun 04 01:48:38 PM PDT 24 3709597861 ps
T251 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.3654691544 Jun 04 01:49:13 PM PDT 24 Jun 04 01:51:51 PM PDT 24 64449766654 ps
T613 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3190580224 Jun 04 01:49:10 PM PDT 24 Jun 04 01:49:31 PM PDT 24 9308159089 ps
T614 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3810384502 Jun 04 01:49:16 PM PDT 24 Jun 04 01:51:32 PM PDT 24 103469270945 ps
T615 /workspace/coverage/default/32.sysrst_ctrl_alert_test.2597179307 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:04 PM PDT 24 2029126891 ps
T616 /workspace/coverage/default/11.sysrst_ctrl_smoke.1311629286 Jun 04 01:48:08 PM PDT 24 Jun 04 01:48:21 PM PDT 24 2110414148 ps
T617 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2222525067 Jun 04 01:48:47 PM PDT 24 Jun 04 01:48:52 PM PDT 24 2474540070 ps
T227 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3088431848 Jun 04 01:48:38 PM PDT 24 Jun 04 01:49:42 PM PDT 24 21580618187 ps
T618 /workspace/coverage/default/13.sysrst_ctrl_alert_test.831725795 Jun 04 01:48:11 PM PDT 24 Jun 04 01:48:14 PM PDT 24 2071969775 ps
T619 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1338103660 Jun 04 01:49:29 PM PDT 24 Jun 04 01:49:38 PM PDT 24 5698158211 ps
T620 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2154471980 Jun 04 01:48:40 PM PDT 24 Jun 04 01:48:44 PM PDT 24 3783198487 ps
T301 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1343592324 Jun 04 01:48:42 PM PDT 24 Jun 04 01:49:21 PM PDT 24 14358643986 ps
T344 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1088271985 Jun 04 01:49:49 PM PDT 24 Jun 04 01:50:45 PM PDT 24 109360560524 ps
T90 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.693756855 Jun 04 01:49:50 PM PDT 24 Jun 04 01:50:24 PM PDT 24 38728987333 ps
T621 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.737109333 Jun 04 01:48:09 PM PDT 24 Jun 04 01:48:25 PM PDT 24 5135069168 ps
T622 /workspace/coverage/default/21.sysrst_ctrl_alert_test.1596521420 Jun 04 01:48:28 PM PDT 24 Jun 04 01:48:35 PM PDT 24 2013091563 ps
T623 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.1969360222 Jun 04 01:49:21 PM PDT 24 Jun 04 01:50:46 PM PDT 24 66454055500 ps
T624 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.494774901 Jun 04 01:49:31 PM PDT 24 Jun 04 01:56:29 PM PDT 24 161524046968 ps
T625 /workspace/coverage/default/7.sysrst_ctrl_smoke.2128117773 Jun 04 01:48:02 PM PDT 24 Jun 04 01:48:09 PM PDT 24 2111207985 ps
T257 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.84823042 Jun 04 01:48:21 PM PDT 24 Jun 04 01:49:14 PM PDT 24 119018040846 ps
T626 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2497395292 Jun 04 01:49:01 PM PDT 24 Jun 04 01:49:05 PM PDT 24 3476511802 ps
T627 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4188562563 Jun 04 01:49:27 PM PDT 24 Jun 04 01:49:31 PM PDT 24 2674125304 ps
T628 /workspace/coverage/default/14.sysrst_ctrl_stress_all.1611736788 Jun 04 01:48:33 PM PDT 24 Jun 04 01:48:48 PM PDT 24 10658999526 ps
T252 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.1182320338 Jun 04 01:49:04 PM PDT 24 Jun 04 01:50:32 PM PDT 24 70568653552 ps
T377 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2858706659 Jun 04 01:48:28 PM PDT 24 Jun 04 01:55:20 PM PDT 24 2375164798929 ps
T629 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.488209926 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:11 PM PDT 24 2616969802 ps
T630 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3277338927 Jun 04 01:48:50 PM PDT 24 Jun 04 01:49:36 PM PDT 24 114050693560 ps
T631 /workspace/coverage/default/16.sysrst_ctrl_alert_test.570463575 Jun 04 01:48:37 PM PDT 24 Jun 04 01:48:45 PM PDT 24 2015917849 ps
T632 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2128387650 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:13 PM PDT 24 2015819644 ps
T633 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.952273723 Jun 04 01:48:46 PM PDT 24 Jun 04 01:48:49 PM PDT 24 3203113694 ps
T634 /workspace/coverage/default/2.sysrst_ctrl_smoke.1710932653 Jun 04 01:47:50 PM PDT 24 Jun 04 01:47:52 PM PDT 24 2257681053 ps
T180 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2870337163 Jun 04 01:47:55 PM PDT 24 Jun 04 01:49:37 PM PDT 24 65112681978 ps
T292 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2877446870 Jun 04 01:48:20 PM PDT 24 Jun 04 01:49:06 PM PDT 24 71695259306 ps
T635 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3421642863 Jun 04 01:49:29 PM PDT 24 Jun 04 01:49:37 PM PDT 24 3623064795 ps
T636 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2779626245 Jun 04 01:48:01 PM PDT 24 Jun 04 01:49:44 PM PDT 24 213054425931 ps
T637 /workspace/coverage/default/33.sysrst_ctrl_smoke.63421029 Jun 04 01:48:56 PM PDT 24 Jun 04 01:49:00 PM PDT 24 2127592495 ps
T638 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.538825769 Jun 04 01:48:41 PM PDT 24 Jun 04 01:50:21 PM PDT 24 168751515638 ps
T639 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2761606820 Jun 04 01:48:59 PM PDT 24 Jun 04 01:49:07 PM PDT 24 2513061927 ps
T640 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.79513063 Jun 04 01:49:42 PM PDT 24 Jun 04 01:49:58 PM PDT 24 26357073502 ps
T641 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.979324969 Jun 04 01:49:27 PM PDT 24 Jun 04 01:49:32 PM PDT 24 2494953176 ps
T642 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1384725403 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:09 PM PDT 24 2511630128 ps
T643 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1938490335 Jun 04 01:48:18 PM PDT 24 Jun 04 01:48:21 PM PDT 24 3519956351 ps
T644 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.801327920 Jun 04 01:47:50 PM PDT 24 Jun 04 01:47:53 PM PDT 24 4691151904 ps
T645 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3131343590 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:12 PM PDT 24 3695567412 ps
T646 /workspace/coverage/default/35.sysrst_ctrl_stress_all.1955668077 Jun 04 01:49:06 PM PDT 24 Jun 04 01:51:39 PM PDT 24 203965526947 ps
T647 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.542223061 Jun 04 01:48:19 PM PDT 24 Jun 04 01:48:22 PM PDT 24 4479661068 ps
T648 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2863734463 Jun 04 01:48:32 PM PDT 24 Jun 04 01:48:36 PM PDT 24 2497423368 ps
T649 /workspace/coverage/default/44.sysrst_ctrl_stress_all.750298665 Jun 04 01:49:31 PM PDT 24 Jun 04 01:49:39 PM PDT 24 9390294354 ps
T376 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2389872671 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:58 PM PDT 24 88255112924 ps
T650 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.606010173 Jun 04 01:48:48 PM PDT 24 Jun 04 01:48:51 PM PDT 24 2460369682 ps
T651 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3538254191 Jun 04 01:49:41 PM PDT 24 Jun 04 01:51:30 PM PDT 24 44823050367 ps
T652 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.1651017105 Jun 04 01:48:33 PM PDT 24 Jun 04 01:48:41 PM PDT 24 2148494642 ps
T653 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1169980255 Jun 04 01:47:58 PM PDT 24 Jun 04 01:48:00 PM PDT 24 2396615929 ps
T171 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.664317131 Jun 04 01:49:34 PM PDT 24 Jun 04 01:51:00 PM PDT 24 43824178845 ps
T364 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.561684531 Jun 04 01:49:53 PM PDT 24 Jun 04 01:52:25 PM PDT 24 86954555442 ps
T654 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3184496710 Jun 04 01:48:55 PM PDT 24 Jun 04 01:48:58 PM PDT 24 2192951822 ps
T655 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3507342498 Jun 04 01:48:59 PM PDT 24 Jun 04 01:49:03 PM PDT 24 2627384874 ps
T656 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2902955726 Jun 04 01:49:20 PM PDT 24 Jun 04 01:51:06 PM PDT 24 42536484805 ps
T657 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.213736593 Jun 04 01:49:35 PM PDT 24 Jun 04 01:49:39 PM PDT 24 3305425961 ps
T658 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.402560756 Jun 04 01:49:21 PM PDT 24 Jun 04 01:49:25 PM PDT 24 3332982644 ps
T659 /workspace/coverage/default/20.sysrst_ctrl_stress_all.1733686618 Jun 04 01:48:41 PM PDT 24 Jun 04 01:49:21 PM PDT 24 208644504614 ps
T660 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.163903637 Jun 04 01:48:01 PM PDT 24 Jun 04 01:48:10 PM PDT 24 2609944166 ps
T661 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.2629269145 Jun 04 01:48:51 PM PDT 24 Jun 04 01:50:44 PM PDT 24 113603568691 ps
T662 /workspace/coverage/default/23.sysrst_ctrl_stress_all.2699549437 Jun 04 01:48:41 PM PDT 24 Jun 04 01:48:50 PM PDT 24 10211239587 ps
T663 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.4131263889 Jun 04 01:47:46 PM PDT 24 Jun 04 01:47:54 PM PDT 24 2613695596 ps
T146 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3607095562 Jun 04 01:49:21 PM PDT 24 Jun 04 01:51:28 PM PDT 24 49369432147 ps
T664 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.932958340 Jun 04 01:48:27 PM PDT 24 Jun 04 01:48:36 PM PDT 24 2610288824 ps
T665 /workspace/coverage/default/0.sysrst_ctrl_alert_test.1790237075 Jun 04 01:47:55 PM PDT 24 Jun 04 01:47:58 PM PDT 24 2037952313 ps
T258 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.3413129067 Jun 04 01:49:40 PM PDT 24 Jun 04 01:53:55 PM PDT 24 109627232610 ps
T666 /workspace/coverage/default/19.sysrst_ctrl_alert_test.4286889520 Jun 04 01:48:29 PM PDT 24 Jun 04 01:48:36 PM PDT 24 2012915920 ps
T667 /workspace/coverage/default/0.sysrst_ctrl_smoke.2330684409 Jun 04 01:47:42 PM PDT 24 Jun 04 01:47:46 PM PDT 24 2119036471 ps
T248 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.671509330 Jun 04 01:49:51 PM PDT 24 Jun 04 01:51:17 PM PDT 24 63581787594 ps
T668 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3917844927 Jun 04 01:49:39 PM PDT 24 Jun 04 01:49:43 PM PDT 24 2536440726 ps
T669 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.4089826266 Jun 04 01:47:51 PM PDT 24 Jun 04 01:47:55 PM PDT 24 2631823158 ps
T61 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.3737712905 Jun 04 01:47:50 PM PDT 24 Jun 04 01:48:15 PM PDT 24 39266500150 ps
T670 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3763553512 Jun 04 01:48:07 PM PDT 24 Jun 04 01:48:38 PM PDT 24 21119758941 ps
T671 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.4092548278 Jun 04 01:48:18 PM PDT 24 Jun 04 01:48:21 PM PDT 24 2152600407 ps
T672 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3088486781 Jun 04 01:49:31 PM PDT 24 Jun 04 01:49:40 PM PDT 24 2509759672 ps
T673 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3298052029 Jun 04 01:49:53 PM PDT 24 Jun 04 01:54:10 PM PDT 24 102516749275 ps
T674 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.3507092244 Jun 04 01:49:09 PM PDT 24 Jun 04 01:49:16 PM PDT 24 2077857735 ps
T675 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2259225453 Jun 04 01:48:48 PM PDT 24 Jun 04 01:48:56 PM PDT 24 2206764922 ps
T676 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2497830622 Jun 04 01:47:45 PM PDT 24 Jun 04 01:47:49 PM PDT 24 2536895148 ps
T179 /workspace/coverage/default/32.sysrst_ctrl_stress_all.3385646665 Jun 04 01:48:58 PM PDT 24 Jun 04 01:49:14 PM PDT 24 12102348999 ps
T677 /workspace/coverage/default/19.sysrst_ctrl_stress_all.2803476315 Jun 04 01:48:35 PM PDT 24 Jun 04 01:48:41 PM PDT 24 12452195781 ps
T678 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1558538952 Jun 04 01:49:02 PM PDT 24 Jun 04 01:49:06 PM PDT 24 3329464805 ps
T679 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.1542040039 Jun 04 01:49:01 PM PDT 24 Jun 04 01:49:14 PM PDT 24 4684507015 ps
T280 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.3869942593 Jun 04 01:47:59 PM PDT 24 Jun 04 01:48:14 PM PDT 24 42617358183 ps
T680 /workspace/coverage/default/49.sysrst_ctrl_smoke.2679641713 Jun 04 01:49:44 PM PDT 24 Jun 04 01:49:49 PM PDT 24 2118683104 ps
T681 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3033573058 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:06 PM PDT 24 3222037077 ps
T682 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.737800798 Jun 04 01:48:09 PM PDT 24 Jun 04 01:48:15 PM PDT 24 2519362296 ps
T683 /workspace/coverage/default/4.sysrst_ctrl_smoke.1000614267 Jun 04 01:47:54 PM PDT 24 Jun 04 01:47:57 PM PDT 24 2133915162 ps
T684 /workspace/coverage/default/26.sysrst_ctrl_smoke.1723898094 Jun 04 01:48:46 PM PDT 24 Jun 04 01:48:50 PM PDT 24 2118667638 ps
T685 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1663079927 Jun 04 01:49:30 PM PDT 24 Jun 04 01:49:34 PM PDT 24 2641397508 ps
T686 /workspace/coverage/default/9.sysrst_ctrl_smoke.2987821132 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:11 PM PDT 24 2128057809 ps
T687 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.127965301 Jun 04 01:49:39 PM PDT 24 Jun 04 01:51:00 PM PDT 24 131200326260 ps
T688 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2762464967 Jun 04 01:48:01 PM PDT 24 Jun 04 01:48:04 PM PDT 24 2135486549 ps
T689 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.83275011 Jun 04 01:47:55 PM PDT 24 Jun 04 01:48:05 PM PDT 24 34247871097 ps
T690 /workspace/coverage/default/1.sysrst_ctrl_smoke.772305528 Jun 04 01:47:55 PM PDT 24 Jun 04 01:47:59 PM PDT 24 2119635596 ps
T378 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1041352094 Jun 04 01:48:41 PM PDT 24 Jun 04 01:49:23 PM PDT 24 126068298870 ps
T691 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2160707040 Jun 04 01:49:10 PM PDT 24 Jun 04 01:52:07 PM PDT 24 145811943432 ps
T338 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3325116102 Jun 04 01:49:52 PM PDT 24 Jun 04 01:50:48 PM PDT 24 87818964911 ps
T692 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3503057510 Jun 04 01:47:54 PM PDT 24 Jun 04 01:48:02 PM PDT 24 2472369875 ps
T693 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2754488350 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:09 PM PDT 24 4507545926 ps
T694 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.2394576178 Jun 04 01:48:42 PM PDT 24 Jun 04 01:48:48 PM PDT 24 2453656946 ps
T695 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2096102944 Jun 04 01:48:08 PM PDT 24 Jun 04 01:48:21 PM PDT 24 3686171628 ps
T345 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2842615321 Jun 04 01:49:29 PM PDT 24 Jun 04 01:51:29 PM PDT 24 144486955867 ps
T696 /workspace/coverage/default/31.sysrst_ctrl_alert_test.1474257669 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:03 PM PDT 24 2032889062 ps
T697 /workspace/coverage/default/17.sysrst_ctrl_alert_test.788868577 Jun 04 01:48:36 PM PDT 24 Jun 04 01:48:39 PM PDT 24 2136217094 ps
T698 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3958407364 Jun 04 01:48:32 PM PDT 24 Jun 04 01:48:36 PM PDT 24 6829885998 ps
T699 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3200518093 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:12 PM PDT 24 2629558506 ps
T700 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.578501269 Jun 04 01:48:50 PM PDT 24 Jun 04 01:48:54 PM PDT 24 2548970102 ps
T701 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3977962983 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:28 PM PDT 24 3552656982 ps
T702 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1645070506 Jun 04 01:48:32 PM PDT 24 Jun 04 01:48:38 PM PDT 24 2510228136 ps
T703 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.842326617 Jun 04 01:48:40 PM PDT 24 Jun 04 01:48:45 PM PDT 24 3438710707 ps
T704 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4195246322 Jun 04 01:49:23 PM PDT 24 Jun 04 01:49:35 PM PDT 24 3760742508 ps
T203 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3595552366 Jun 04 01:48:39 PM PDT 24 Jun 04 01:49:37 PM PDT 24 25309411654 ps
T705 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.1216212867 Jun 04 01:48:37 PM PDT 24 Jun 04 01:51:27 PM PDT 24 90683013925 ps
T706 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2525283586 Jun 04 01:48:00 PM PDT 24 Jun 04 01:48:08 PM PDT 24 2188395236 ps
T707 /workspace/coverage/default/24.sysrst_ctrl_smoke.1476893900 Jun 04 01:48:44 PM PDT 24 Jun 04 01:48:47 PM PDT 24 2134657825 ps
T708 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2482561814 Jun 04 01:48:59 PM PDT 24 Jun 04 01:49:04 PM PDT 24 4171915494 ps
T709 /workspace/coverage/default/18.sysrst_ctrl_alert_test.2646736377 Jun 04 01:48:20 PM PDT 24 Jun 04 01:48:24 PM PDT 24 2052608945 ps
T710 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.495088521 Jun 04 01:48:08 PM PDT 24 Jun 04 01:48:13 PM PDT 24 2070351406 ps
T711 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.3955565008 Jun 04 01:49:43 PM PDT 24 Jun 04 01:49:47 PM PDT 24 2673856336 ps
T712 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1417720171 Jun 04 01:49:41 PM PDT 24 Jun 04 01:50:43 PM PDT 24 91408730609 ps
T713 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.3048609410 Jun 04 01:48:58 PM PDT 24 Jun 04 01:56:05 PM PDT 24 154854567838 ps
T714 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1324389379 Jun 04 01:48:38 PM PDT 24 Jun 04 01:50:00 PM PDT 24 59549831720 ps
T715 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.50874467 Jun 04 01:49:45 PM PDT 24 Jun 04 01:49:48 PM PDT 24 3409116940 ps
T716 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3670148247 Jun 04 01:48:58 PM PDT 24 Jun 04 01:49:01 PM PDT 24 2470765663 ps
T717 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.4207107226 Jun 04 01:49:20 PM PDT 24 Jun 04 01:49:23 PM PDT 24 2447247774 ps
T718 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2899290746 Jun 04 01:49:28 PM PDT 24 Jun 04 01:49:33 PM PDT 24 2623940097 ps
T719 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3673990922 Jun 04 01:47:59 PM PDT 24 Jun 04 01:50:15 PM PDT 24 50139510924 ps
T720 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3919630331 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:08 PM PDT 24 2168793511 ps
T721 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3303536685 Jun 04 01:48:35 PM PDT 24 Jun 04 01:48:41 PM PDT 24 2512264560 ps
T722 /workspace/coverage/default/42.sysrst_ctrl_alert_test.2944798074 Jun 04 01:49:26 PM PDT 24 Jun 04 01:49:30 PM PDT 24 2026262238 ps
T723 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.4041556883 Jun 04 01:48:02 PM PDT 24 Jun 04 01:48:10 PM PDT 24 5108465333 ps
T128 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.673246649 Jun 04 01:47:59 PM PDT 24 Jun 04 01:49:43 PM PDT 24 164839172213 ps
T724 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1515016827 Jun 04 01:49:28 PM PDT 24 Jun 04 01:49:32 PM PDT 24 10405168117 ps
T148 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.3827804193 Jun 04 01:49:21 PM PDT 24 Jun 04 01:49:27 PM PDT 24 3486280409 ps
T725 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1780343943 Jun 04 01:47:48 PM PDT 24 Jun 04 01:47:56 PM PDT 24 2120967476 ps
T132 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.393181424 Jun 04 01:48:07 PM PDT 24 Jun 04 01:48:26 PM PDT 24 34743754835 ps
T726 /workspace/coverage/default/7.sysrst_ctrl_alert_test.3406670068 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:11 PM PDT 24 2013049286 ps
T302 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3644012016 Jun 04 01:49:30 PM PDT 24 Jun 04 01:49:58 PM PDT 24 10013977039 ps
T727 /workspace/coverage/default/16.sysrst_ctrl_smoke.2810033643 Jun 04 01:48:27 PM PDT 24 Jun 04 01:48:32 PM PDT 24 2113277783 ps
T193 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.1769532469 Jun 04 01:48:28 PM PDT 24 Jun 04 01:48:32 PM PDT 24 4349292403 ps
T728 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3807335368 Jun 04 01:48:57 PM PDT 24 Jun 04 01:49:06 PM PDT 24 2461906140 ps
T729 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1213135502 Jun 04 01:47:45 PM PDT 24 Jun 04 01:47:49 PM PDT 24 6509243770 ps
T730 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1305676281 Jun 04 01:48:41 PM PDT 24 Jun 04 01:48:48 PM PDT 24 4034392704 ps
T731 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2513830436 Jun 04 01:48:45 PM PDT 24 Jun 04 01:48:48 PM PDT 24 2523399224 ps
T732 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.30649486 Jun 04 01:49:29 PM PDT 24 Jun 04 01:49:39 PM PDT 24 2462153022 ps
T204 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3328251250 Jun 04 01:49:16 PM PDT 24 Jun 04 01:51:35 PM PDT 24 125374622726 ps
T372 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.567033408 Jun 04 01:48:02 PM PDT 24 Jun 04 01:51:33 PM PDT 24 114605464732 ps
T733 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.1539792252 Jun 04 01:48:57 PM PDT 24 Jun 04 01:51:53 PM PDT 24 62585506678 ps
T734 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.2798480240 Jun 04 01:48:42 PM PDT 24 Jun 04 01:48:49 PM PDT 24 2512113946 ps
T735 /workspace/coverage/default/42.sysrst_ctrl_smoke.4107852349 Jun 04 01:49:28 PM PDT 24 Jun 04 01:49:36 PM PDT 24 2113082867 ps
T736 /workspace/coverage/default/40.sysrst_ctrl_alert_test.978883231 Jun 04 01:49:22 PM PDT 24 Jun 04 01:49:28 PM PDT 24 2014874212 ps
T737 /workspace/coverage/default/28.sysrst_ctrl_alert_test.2371710881 Jun 04 01:48:50 PM PDT 24 Jun 04 01:48:55 PM PDT 24 2020929246 ps
T738 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3540056361 Jun 04 01:48:58 PM PDT 24 Jun 04 01:49:04 PM PDT 24 2695888593 ps
T129 /workspace/coverage/default/37.sysrst_ctrl_stress_all.3383056439 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:49 PM PDT 24 13805680266 ps
T739 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3513359443 Jun 04 01:49:00 PM PDT 24 Jun 04 01:49:09 PM PDT 24 2436762241 ps
T740 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1565228219 Jun 04 01:47:54 PM PDT 24 Jun 04 01:47:56 PM PDT 24 2055042780 ps
T741 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.4199127078 Jun 04 01:47:52 PM PDT 24 Jun 04 01:48:09 PM PDT 24 24419235921 ps
T742 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3756175589 Jun 04 01:49:38 PM PDT 24 Jun 04 01:49:44 PM PDT 24 2692710352 ps
T254 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.38201849 Jun 04 01:49:49 PM PDT 24 Jun 04 01:57:42 PM PDT 24 176636834003 ps
T743 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3220177062 Jun 04 01:48:04 PM PDT 24 Jun 04 01:48:09 PM PDT 24 2714399750 ps
T744 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.59869910 Jun 04 01:49:22 PM PDT 24 Jun 04 01:49:26 PM PDT 24 2523654930 ps
T745 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.226198111 Jun 04 01:49:50 PM PDT 24 Jun 04 01:50:50 PM PDT 24 83926258781 ps
T746 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.123153051 Jun 04 01:49:29 PM PDT 24 Jun 04 01:49:37 PM PDT 24 2035968138 ps
T747 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.115406849 Jun 04 01:49:21 PM PDT 24 Jun 04 01:50:14 PM PDT 24 1248969927148 ps
T130 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1481402791 Jun 04 01:48:05 PM PDT 24 Jun 04 01:49:32 PM PDT 24 172272039784 ps
T259 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.2443484977 Jun 04 01:49:34 PM PDT 24 Jun 04 01:50:00 PM PDT 24 37734930227 ps
T748 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1765873540 Jun 04 01:49:48 PM PDT 24 Jun 04 01:50:35 PM PDT 24 67308746654 ps
T749 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.629707226 Jun 04 01:48:40 PM PDT 24 Jun 04 01:48:49 PM PDT 24 2461502815 ps
T750 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2957658432 Jun 04 01:49:05 PM PDT 24 Jun 04 01:51:44 PM PDT 24 61709406951 ps
T751 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.390100345 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:26 PM PDT 24 3522748890 ps
T752 /workspace/coverage/default/23.sysrst_ctrl_alert_test.3014605650 Jun 04 01:48:42 PM PDT 24 Jun 04 01:48:46 PM PDT 24 2030604373 ps
T753 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.630042980 Jun 04 01:49:07 PM PDT 24 Jun 04 01:49:10 PM PDT 24 2526230367 ps
T754 /workspace/coverage/default/17.sysrst_ctrl_smoke.1280773464 Jun 04 01:48:31 PM PDT 24 Jun 04 01:48:34 PM PDT 24 2130641334 ps
T755 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3404250419 Jun 04 01:48:21 PM PDT 24 Jun 04 01:48:27 PM PDT 24 2086288019 ps
T756 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.3519835346 Jun 04 01:48:40 PM PDT 24 Jun 04 01:50:02 PM PDT 24 125948802360 ps
T362 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.460296219 Jun 04 01:49:52 PM PDT 24 Jun 04 01:52:05 PM PDT 24 95008567576 ps
T757 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1668460379 Jun 04 01:48:51 PM PDT 24 Jun 04 01:48:59 PM PDT 24 2455280246 ps
T758 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.4007257407 Jun 04 01:48:16 PM PDT 24 Jun 04 01:48:17 PM PDT 24 2799940225 ps
T759 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3251982777 Jun 04 01:49:10 PM PDT 24 Jun 04 01:49:18 PM PDT 24 2615175088 ps
T760 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2144351533 Jun 04 01:49:12 PM PDT 24 Jun 04 01:49:15 PM PDT 24 3510711866 ps
T761 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.55163253 Jun 04 01:49:25 PM PDT 24 Jun 04 01:49:34 PM PDT 24 2613223815 ps
T762 /workspace/coverage/default/9.sysrst_ctrl_alert_test.3488256079 Jun 04 01:48:09 PM PDT 24 Jun 04 01:48:17 PM PDT 24 2026294757 ps
T763 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1755740508 Jun 04 01:48:29 PM PDT 24 Jun 04 01:48:34 PM PDT 24 2519258332 ps
T764 /workspace/coverage/default/39.sysrst_ctrl_smoke.2158856231 Jun 04 01:49:16 PM PDT 24 Jun 04 01:49:21 PM PDT 24 2119513290 ps
T765 /workspace/coverage/default/16.sysrst_ctrl_stress_all.957875920 Jun 04 01:48:30 PM PDT 24 Jun 04 01:50:46 PM PDT 24 54312829066 ps
T766 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.2297369463 Jun 04 01:48:47 PM PDT 24 Jun 04 01:48:50 PM PDT 24 2495782823 ps
T354 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1502884633 Jun 04 01:49:52 PM PDT 24 Jun 04 01:51:08 PM PDT 24 73925852616 ps
T333 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.1936510009 Jun 04 01:48:06 PM PDT 24 Jun 04 01:50:30 PM PDT 24 112962048276 ps
T767 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.3115097232 Jun 04 01:48:04 PM PDT 24 Jun 04 01:50:37 PM PDT 24 61551163091 ps
T768 /workspace/coverage/default/49.sysrst_ctrl_stress_all.106155544 Jun 04 01:49:44 PM PDT 24 Jun 04 01:49:56 PM PDT 24 16629298643 ps
T116 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2283913544 Jun 04 01:48:10 PM PDT 24 Jun 04 01:49:16 PM PDT 24 194747577704 ps
T769 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2472104948 Jun 04 01:48:35 PM PDT 24 Jun 04 01:49:24 PM PDT 24 20111735380 ps
T343 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3923726437 Jun 04 01:49:42 PM PDT 24 Jun 04 01:52:16 PM PDT 24 132471797754 ps
T770 /workspace/coverage/default/47.sysrst_ctrl_alert_test.3612784956 Jun 04 01:49:42 PM PDT 24 Jun 04 01:49:47 PM PDT 24 2022002843 ps
T342 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.1000154500 Jun 04 01:48:00 PM PDT 24 Jun 04 01:52:50 PM PDT 24 109626017253 ps
T771 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3668726832 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:12 PM PDT 24 2531827721 ps
T220 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1375648744 Jun 04 01:48:37 PM PDT 24 Jun 04 01:52:13 PM PDT 24 695168326727 ps
T772 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.1235889070 Jun 04 01:48:24 PM PDT 24 Jun 04 01:48:30 PM PDT 24 2619607523 ps
T773 /workspace/coverage/default/49.sysrst_ctrl_alert_test.3260431680 Jun 04 01:49:40 PM PDT 24 Jun 04 01:49:43 PM PDT 24 2039106639 ps
T774 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.422873088 Jun 04 01:48:03 PM PDT 24 Jun 04 01:48:07 PM PDT 24 2473882601 ps
T775 /workspace/coverage/default/12.sysrst_ctrl_smoke.2399655949 Jun 04 01:48:06 PM PDT 24 Jun 04 01:48:16 PM PDT 24 2109546213 ps
T776 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2343712923 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:13 PM PDT 24 2080362013 ps
T777 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3576643697 Jun 04 01:49:28 PM PDT 24 Jun 04 01:49:37 PM PDT 24 2254832510 ps
T303 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.3046525582 Jun 04 01:49:14 PM PDT 24 Jun 04 01:50:22 PM PDT 24 26060539284 ps
T778 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.4125704490 Jun 04 01:49:08 PM PDT 24 Jun 04 01:49:10 PM PDT 24 3392477263 ps
T779 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1949119365 Jun 04 01:47:57 PM PDT 24 Jun 04 01:48:04 PM PDT 24 2415942020 ps
T780 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.2112711081 Jun 04 01:48:25 PM PDT 24 Jun 04 01:48:36 PM PDT 24 3675143684 ps
T781 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2739167833 Jun 04 01:48:19 PM PDT 24 Jun 04 01:48:25 PM PDT 24 8829608539 ps
T782 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3248548101 Jun 04 01:48:25 PM PDT 24 Jun 04 01:48:33 PM PDT 24 2611346848 ps
T783 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3515007679 Jun 04 01:47:51 PM PDT 24 Jun 04 01:47:56 PM PDT 24 2356630221 ps
T784 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2398580395 Jun 04 01:48:05 PM PDT 24 Jun 04 01:48:52 PM PDT 24 97321599324 ps
T785 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.907583128 Jun 04 01:49:36 PM PDT 24 Jun 04 01:49:42 PM PDT 24 3303797297 ps
T87 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.220590770 Jun 04 01:48:51 PM PDT 24 Jun 04 01:49:11 PM PDT 24 78648519028 ps
T786 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.793130195 Jun 04 01:48:32 PM PDT 24 Jun 04 01:48:45 PM PDT 24 4163881810 ps
T787 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3972932157 Jun 04 01:49:30 PM PDT 24 Jun 04 01:49:37 PM PDT 24 5285633496 ps
T788 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2278232405 Jun 04 01:48:02 PM PDT 24 Jun 04 01:48:06 PM PDT 24 2278727589 ps
T789 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2145781940 Jun 04 01:49:21 PM PDT 24 Jun 04 01:49:24 PM PDT 24 2119726255 ps
T790 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.1987430362 Jun 04 01:49:30 PM PDT 24 Jun 04 01:50:13 PM PDT 24 97598136182 ps
T791 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.521856680 Jun 04 01:47:48 PM PDT 24 Jun 04 01:47:52 PM PDT 24 2627216700 ps
T34 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2798841757 Jun 04 12:59:12 PM PDT 24 Jun 04 12:59:15 PM PDT 24 2155504297 ps
T792 /workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.3863291676 Jun 04 12:59:12 PM PDT 24 Jun 04 12:59:15 PM PDT 24 2037340346 ps
T793 /workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.549369021 Jun 04 12:59:11 PM PDT 24 Jun 04 12:59:14 PM PDT 24 2055511783 ps
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