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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.01 99.38 96.78 100.00 97.44 98.85 99.61 93.98


Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T356 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3481995471 Jun 05 05:54:45 PM PDT 24 Jun 05 05:56:31 PM PDT 24 152514487568 ps
T349 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2496572357 Jun 05 05:54:45 PM PDT 24 Jun 05 05:55:15 PM PDT 24 43502463749 ps
T440 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3263382930 Jun 05 05:54:04 PM PDT 24 Jun 05 05:54:06 PM PDT 24 2486433402 ps
T441 /workspace/coverage/default/23.sysrst_ctrl_alert_test.2700316515 Jun 05 05:53:53 PM PDT 24 Jun 05 05:53:55 PM PDT 24 2106258990 ps
T318 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.887271928 Jun 05 05:53:12 PM PDT 24 Jun 05 05:53:16 PM PDT 24 17152749910 ps
T442 /workspace/coverage/default/19.sysrst_ctrl_alert_test.2369371805 Jun 05 05:53:27 PM PDT 24 Jun 05 05:53:31 PM PDT 24 2017441756 ps
T138 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3789313118 Jun 05 05:53:15 PM PDT 24 Jun 05 05:53:26 PM PDT 24 7914719867 ps
T443 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2588528343 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2013403803 ps
T444 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.4033567932 Jun 05 05:53:22 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2613771412 ps
T445 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1878279436 Jun 05 05:53:16 PM PDT 24 Jun 05 05:53:21 PM PDT 24 2096223435 ps
T446 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2943679762 Jun 05 05:53:08 PM PDT 24 Jun 05 06:02:29 PM PDT 24 212002342045 ps
T447 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.478988008 Jun 05 05:54:01 PM PDT 24 Jun 05 05:54:08 PM PDT 24 3928657281 ps
T448 /workspace/coverage/default/25.sysrst_ctrl_alert_test.4057786172 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:15 PM PDT 24 2014666240 ps
T449 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.841169152 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:27 PM PDT 24 2635022378 ps
T285 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.3604320638 Jun 05 05:53:15 PM PDT 24 Jun 05 05:54:21 PM PDT 24 24580583603 ps
T345 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.1800619818 Jun 05 05:53:13 PM PDT 24 Jun 05 05:55:30 PM PDT 24 201253276067 ps
T317 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3271677839 Jun 05 05:54:18 PM PDT 24 Jun 05 05:54:30 PM PDT 24 2472611328 ps
T110 /workspace/coverage/default/12.sysrst_ctrl_stress_all.51410529 Jun 05 05:53:14 PM PDT 24 Jun 05 05:54:17 PM PDT 24 100314286640 ps
T450 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2069689418 Jun 05 05:53:17 PM PDT 24 Jun 05 05:53:22 PM PDT 24 2645157491 ps
T451 /workspace/coverage/default/5.sysrst_ctrl_alert_test.1788495396 Jun 05 05:53:12 PM PDT 24 Jun 05 05:53:25 PM PDT 24 2014805524 ps
T289 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.3857483650 Jun 05 05:54:05 PM PDT 24 Jun 05 05:54:34 PM PDT 24 131721604982 ps
T362 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1826260972 Jun 05 05:54:40 PM PDT 24 Jun 05 05:57:50 PM PDT 24 146657964105 ps
T452 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.790552222 Jun 05 05:54:23 PM PDT 24 Jun 05 05:54:27 PM PDT 24 3648252771 ps
T453 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1189455282 Jun 05 05:53:20 PM PDT 24 Jun 05 05:53:26 PM PDT 24 2517926470 ps
T454 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1249358684 Jun 05 05:53:19 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2510322003 ps
T455 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1123272851 Jun 05 05:53:58 PM PDT 24 Jun 05 05:54:02 PM PDT 24 2464198007 ps
T456 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1206276919 Jun 05 05:53:22 PM PDT 24 Jun 05 05:53:25 PM PDT 24 3293836584 ps
T315 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2019407615 Jun 05 05:53:16 PM PDT 24 Jun 05 05:53:46 PM PDT 24 20532500863 ps
T457 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.730086851 Jun 05 05:54:23 PM PDT 24 Jun 05 05:54:26 PM PDT 24 2458315196 ps
T458 /workspace/coverage/default/44.sysrst_ctrl_smoke.3496866954 Jun 05 05:54:15 PM PDT 24 Jun 05 05:54:17 PM PDT 24 2179750946 ps
T459 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1845890802 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:29 PM PDT 24 4610655961 ps
T460 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1137760193 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:14 PM PDT 24 3354159957 ps
T461 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.1677363349 Jun 05 05:53:49 PM PDT 24 Jun 05 05:53:56 PM PDT 24 2128665527 ps
T99 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3904773694 Jun 05 05:53:48 PM PDT 24 Jun 05 05:53:51 PM PDT 24 3140314266 ps
T462 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.4215982494 Jun 05 05:53:29 PM PDT 24 Jun 05 05:53:32 PM PDT 24 2537357910 ps
T463 /workspace/coverage/default/13.sysrst_ctrl_stress_all.1479204728 Jun 05 05:53:31 PM PDT 24 Jun 05 05:53:43 PM PDT 24 10101527223 ps
T464 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3102676982 Jun 05 05:53:26 PM PDT 24 Jun 05 05:53:33 PM PDT 24 2611047244 ps
T465 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.213462325 Jun 05 05:54:20 PM PDT 24 Jun 05 05:54:27 PM PDT 24 2462743774 ps
T200 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.1112563339 Jun 05 05:53:28 PM PDT 24 Jun 05 05:53:34 PM PDT 24 3460282264 ps
T346 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1108202980 Jun 05 05:53:41 PM PDT 24 Jun 05 05:56:40 PM PDT 24 137963034599 ps
T232 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.2606094778 Jun 05 05:53:10 PM PDT 24 Jun 05 05:53:19 PM PDT 24 3013703739 ps
T466 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3292060389 Jun 05 05:53:22 PM PDT 24 Jun 05 05:53:36 PM PDT 24 4788872879 ps
T381 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.179653448 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:36 PM PDT 24 439149900937 ps
T90 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2856262243 Jun 05 05:54:41 PM PDT 24 Jun 05 05:54:58 PM PDT 24 31118128497 ps
T467 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.696874642 Jun 05 05:52:58 PM PDT 24 Jun 05 05:53:01 PM PDT 24 2484915371 ps
T278 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1901176969 Jun 05 05:54:44 PM PDT 24 Jun 05 05:56:07 PM PDT 24 122394709807 ps
T468 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2721242083 Jun 05 05:54:45 PM PDT 24 Jun 05 05:56:02 PM PDT 24 27827133557 ps
T347 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2185602365 Jun 05 05:53:20 PM PDT 24 Jun 05 05:53:39 PM PDT 24 127850441324 ps
T469 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1805897872 Jun 05 05:54:12 PM PDT 24 Jun 05 05:54:15 PM PDT 24 2692818494 ps
T183 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.4174450945 Jun 05 05:53:27 PM PDT 24 Jun 05 05:56:03 PM PDT 24 945365023451 ps
T470 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.1180336026 Jun 05 05:52:58 PM PDT 24 Jun 05 05:53:04 PM PDT 24 2072578441 ps
T471 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1495306376 Jun 05 05:53:07 PM PDT 24 Jun 05 05:53:13 PM PDT 24 2291079146 ps
T286 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.3699596938 Jun 05 05:53:47 PM PDT 24 Jun 05 05:54:32 PM PDT 24 82070945519 ps
T472 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2000230376 Jun 05 05:53:49 PM PDT 24 Jun 05 05:53:52 PM PDT 24 2528830311 ps
T279 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.409598473 Jun 05 05:53:48 PM PDT 24 Jun 05 05:57:43 PM PDT 24 92371839133 ps
T473 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2500327270 Jun 05 05:54:09 PM PDT 24 Jun 05 05:58:55 PM PDT 24 108602421737 ps
T474 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2819196485 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:19 PM PDT 24 7629516694 ps
T475 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3857641364 Jun 05 05:54:19 PM PDT 24 Jun 05 05:54:25 PM PDT 24 4596848122 ps
T476 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1473971478 Jun 05 05:53:17 PM PDT 24 Jun 05 05:53:21 PM PDT 24 2637781018 ps
T477 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1051403908 Jun 05 05:54:56 PM PDT 24 Jun 05 05:55:55 PM PDT 24 24082969694 ps
T478 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.4111232070 Jun 05 05:53:50 PM PDT 24 Jun 05 05:53:59 PM PDT 24 3229597152 ps
T139 /workspace/coverage/default/33.sysrst_ctrl_stress_all.1268092401 Jun 05 05:54:09 PM PDT 24 Jun 05 06:02:07 PM PDT 24 714228345833 ps
T479 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.2326947878 Jun 05 05:54:15 PM PDT 24 Jun 05 05:54:17 PM PDT 24 2572781058 ps
T348 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.2034407601 Jun 05 05:54:03 PM PDT 24 Jun 05 05:55:34 PM PDT 24 141823418612 ps
T480 /workspace/coverage/default/39.sysrst_ctrl_alert_test.1450072260 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:18 PM PDT 24 2009154917 ps
T201 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.636311182 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2762867871 ps
T352 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.18283519 Jun 05 05:54:44 PM PDT 24 Jun 05 05:55:36 PM PDT 24 73465822417 ps
T481 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2680579723 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:57 PM PDT 24 34496434796 ps
T482 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2763207366 Jun 05 05:53:47 PM PDT 24 Jun 05 05:53:50 PM PDT 24 6105061421 ps
T483 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3954915240 Jun 05 05:54:14 PM PDT 24 Jun 05 05:54:19 PM PDT 24 2173168972 ps
T484 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3251769459 Jun 05 05:54:23 PM PDT 24 Jun 05 05:54:25 PM PDT 24 3584559283 ps
T485 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.211076792 Jun 05 05:53:36 PM PDT 24 Jun 05 05:53:38 PM PDT 24 2094568946 ps
T486 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.4141421240 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:14 PM PDT 24 3800398745 ps
T487 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.683034917 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:16 PM PDT 24 4351172688 ps
T488 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2038001022 Jun 05 05:53:39 PM PDT 24 Jun 05 05:53:43 PM PDT 24 2022922000 ps
T365 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3392440247 Jun 05 05:54:41 PM PDT 24 Jun 05 05:57:46 PM PDT 24 66372746458 ps
T489 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.4266665503 Jun 05 05:53:28 PM PDT 24 Jun 05 05:53:31 PM PDT 24 2190941562 ps
T490 /workspace/coverage/default/35.sysrst_ctrl_smoke.2463445912 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2132517817 ps
T491 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2844156364 Jun 05 05:54:17 PM PDT 24 Jun 05 05:54:19 PM PDT 24 2593230647 ps
T492 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3103911746 Jun 05 05:53:09 PM PDT 24 Jun 05 05:53:17 PM PDT 24 2525029556 ps
T493 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.4093962939 Jun 05 05:54:03 PM PDT 24 Jun 05 05:54:10 PM PDT 24 2510082052 ps
T494 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3846712940 Jun 05 05:53:17 PM PDT 24 Jun 05 05:53:21 PM PDT 24 2158512740 ps
T495 /workspace/coverage/default/1.sysrst_ctrl_smoke.87290431 Jun 05 05:53:08 PM PDT 24 Jun 05 05:53:11 PM PDT 24 2130953333 ps
T496 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1593284290 Jun 05 05:54:02 PM PDT 24 Jun 05 05:54:10 PM PDT 24 2466598058 ps
T497 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1648398876 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:18 PM PDT 24 2191552299 ps
T140 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1927841553 Jun 05 05:53:32 PM PDT 24 Jun 05 05:54:39 PM PDT 24 48225840977 ps
T287 /workspace/coverage/default/45.sysrst_ctrl_stress_all.4132910107 Jun 05 05:54:28 PM PDT 24 Jun 05 05:55:42 PM PDT 24 119001112136 ps
T498 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.591627275 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:32 PM PDT 24 2610084007 ps
T499 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1868059667 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:25 PM PDT 24 2999892919 ps
T500 /workspace/coverage/default/41.sysrst_ctrl_stress_all.503676648 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:28 PM PDT 24 14358539075 ps
T93 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.672616825 Jun 05 05:53:56 PM PDT 24 Jun 05 05:56:28 PM PDT 24 232652735424 ps
T501 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1441281282 Jun 05 05:54:06 PM PDT 24 Jun 05 05:54:19 PM PDT 24 17525615522 ps
T502 /workspace/coverage/default/8.sysrst_ctrl_smoke.3310006997 Jun 05 05:53:22 PM PDT 24 Jun 05 05:53:27 PM PDT 24 2115857060 ps
T503 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.3897734233 Jun 05 05:53:20 PM PDT 24 Jun 05 05:53:26 PM PDT 24 3379172903 ps
T504 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3766081704 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:26 PM PDT 24 3824846891 ps
T505 /workspace/coverage/default/48.sysrst_ctrl_alert_test.869635752 Jun 05 05:54:33 PM PDT 24 Jun 05 05:54:39 PM PDT 24 2015142506 ps
T351 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2720050174 Jun 05 05:54:39 PM PDT 24 Jun 05 05:59:45 PM PDT 24 115655868799 ps
T506 /workspace/coverage/default/30.sysrst_ctrl_alert_test.2019670164 Jun 05 05:54:00 PM PDT 24 Jun 05 05:54:02 PM PDT 24 2147538405 ps
T297 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2720028183 Jun 05 05:53:10 PM PDT 24 Jun 05 05:53:26 PM PDT 24 22063275488 ps
T94 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2254992518 Jun 05 05:53:25 PM PDT 24 Jun 05 05:57:36 PM PDT 24 90063855780 ps
T212 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.2736533821 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:22 PM PDT 24 5731948750 ps
T507 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.159225005 Jun 05 05:53:07 PM PDT 24 Jun 05 05:53:15 PM PDT 24 2610881464 ps
T508 /workspace/coverage/default/49.sysrst_ctrl_stress_all.3792724407 Jun 05 05:54:40 PM PDT 24 Jun 05 05:55:09 PM PDT 24 9861395429 ps
T509 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3718253275 Jun 05 05:53:27 PM PDT 24 Jun 05 05:53:40 PM PDT 24 3477099555 ps
T510 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.4168030500 Jun 05 05:53:48 PM PDT 24 Jun 05 05:53:52 PM PDT 24 2516423222 ps
T238 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1325784254 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:45 PM PDT 24 56487180314 ps
T511 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4189373040 Jun 05 05:54:19 PM PDT 24 Jun 05 05:54:22 PM PDT 24 2538265775 ps
T91 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2677511850 Jun 05 05:54:47 PM PDT 24 Jun 05 05:55:02 PM PDT 24 38652676886 ps
T512 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.210055673 Jun 05 05:54:37 PM PDT 24 Jun 05 05:54:44 PM PDT 24 2691858887 ps
T353 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1735009636 Jun 05 05:53:21 PM PDT 24 Jun 05 05:58:10 PM PDT 24 118876929531 ps
T513 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.821837200 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2492287892 ps
T514 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2496996152 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:23 PM PDT 24 2223878892 ps
T515 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.891874274 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:15 PM PDT 24 2612490565 ps
T516 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2053302041 Jun 05 05:54:06 PM PDT 24 Jun 05 05:54:11 PM PDT 24 2614016183 ps
T517 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1051677850 Jun 05 05:53:15 PM PDT 24 Jun 05 05:53:57 PM PDT 24 68680199235 ps
T290 /workspace/coverage/default/48.sysrst_ctrl_stress_all.2291206483 Jun 05 05:54:26 PM PDT 24 Jun 05 05:55:08 PM PDT 24 62979459374 ps
T518 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3314647561 Jun 05 05:54:01 PM PDT 24 Jun 05 05:54:03 PM PDT 24 2284385915 ps
T519 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.4047368802 Jun 05 05:54:23 PM PDT 24 Jun 05 05:54:29 PM PDT 24 2625800148 ps
T520 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3860263655 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:16 PM PDT 24 4609731126 ps
T521 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4285481284 Jun 05 05:54:50 PM PDT 24 Jun 05 05:54:53 PM PDT 24 2505579257 ps
T522 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.859441904 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:15 PM PDT 24 6978077398 ps
T523 /workspace/coverage/default/32.sysrst_ctrl_alert_test.1489264810 Jun 05 05:54:05 PM PDT 24 Jun 05 05:54:08 PM PDT 24 2034766665 ps
T524 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.230489621 Jun 05 05:53:20 PM PDT 24 Jun 05 05:54:16 PM PDT 24 39440426512 ps
T525 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3117567453 Jun 05 05:53:37 PM PDT 24 Jun 05 05:53:44 PM PDT 24 2465088341 ps
T526 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1448870302 Jun 05 05:53:20 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2514083034 ps
T527 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1236755752 Jun 05 05:53:49 PM PDT 24 Jun 05 05:55:05 PM PDT 24 455740142606 ps
T528 /workspace/coverage/default/48.sysrst_ctrl_smoke.893253945 Jun 05 05:54:30 PM PDT 24 Jun 05 05:54:34 PM PDT 24 2119364769 ps
T529 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2649644795 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:12 PM PDT 24 2615976989 ps
T530 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.1714285111 Jun 05 05:53:09 PM PDT 24 Jun 05 05:53:15 PM PDT 24 6465481002 ps
T531 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.844301389 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:11 PM PDT 24 2174251390 ps
T532 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1901169756 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:18 PM PDT 24 9640391133 ps
T299 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1476164997 Jun 05 05:54:13 PM PDT 24 Jun 05 05:55:54 PM PDT 24 47172064496 ps
T533 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.579989359 Jun 05 05:53:10 PM PDT 24 Jun 05 05:53:13 PM PDT 24 2678033457 ps
T534 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3168310818 Jun 05 05:54:17 PM PDT 24 Jun 05 05:54:20 PM PDT 24 444892386558 ps
T316 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3990737077 Jun 05 05:53:19 PM PDT 24 Jun 05 05:54:01 PM PDT 24 29622941350 ps
T535 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.808897593 Jun 05 05:53:29 PM PDT 24 Jun 05 05:53:37 PM PDT 24 2457431089 ps
T536 /workspace/coverage/default/6.sysrst_ctrl_smoke.3339331789 Jun 05 05:53:31 PM PDT 24 Jun 05 05:53:37 PM PDT 24 2111952734 ps
T537 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2473486127 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:16 PM PDT 24 8619805487 ps
T538 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.222080147 Jun 05 05:53:31 PM PDT 24 Jun 05 05:53:34 PM PDT 24 3256743241 ps
T539 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.1367304204 Jun 05 05:53:51 PM PDT 24 Jun 05 05:53:53 PM PDT 24 2491259706 ps
T184 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.2685264163 Jun 05 05:53:53 PM PDT 24 Jun 05 05:54:00 PM PDT 24 3956367331 ps
T239 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2967977861 Jun 05 05:53:14 PM PDT 24 Jun 05 06:12:12 PM PDT 24 956432602785 ps
T540 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1312000012 Jun 05 05:54:32 PM PDT 24 Jun 05 05:54:35 PM PDT 24 2961395172 ps
T541 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3135619784 Jun 05 05:54:21 PM PDT 24 Jun 05 05:54:33 PM PDT 24 3988264322 ps
T141 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2015197935 Jun 05 05:53:04 PM PDT 24 Jun 05 05:54:28 PM PDT 24 1578678460760 ps
T92 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2695744420 Jun 05 05:53:19 PM PDT 24 Jun 05 05:53:55 PM PDT 24 103175608268 ps
T542 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1918257395 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:20 PM PDT 24 2535317479 ps
T543 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1893644497 Jun 05 05:54:17 PM PDT 24 Jun 05 05:54:25 PM PDT 24 2476364227 ps
T544 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1449706871 Jun 05 05:53:34 PM PDT 24 Jun 05 05:53:41 PM PDT 24 2511320327 ps
T545 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.697864935 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:32 PM PDT 24 5254214031 ps
T546 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2555399469 Jun 05 05:54:38 PM PDT 24 Jun 05 05:54:41 PM PDT 24 2494840578 ps
T380 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2040829640 Jun 05 05:54:23 PM PDT 24 Jun 05 05:54:48 PM PDT 24 87078859386 ps
T547 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.712545117 Jun 05 05:54:12 PM PDT 24 Jun 05 05:54:19 PM PDT 24 2264059911 ps
T548 /workspace/coverage/default/44.sysrst_ctrl_stress_all.2500808741 Jun 05 05:54:32 PM PDT 24 Jun 05 05:54:52 PM PDT 24 14309154007 ps
T549 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2186141372 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:15 PM PDT 24 2039111945 ps
T96 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.578691097 Jun 05 05:53:33 PM PDT 24 Jun 05 05:53:39 PM PDT 24 9150184165 ps
T350 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3403063651 Jun 05 05:53:39 PM PDT 24 Jun 05 05:54:16 PM PDT 24 183123142796 ps
T550 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.786899214 Jun 05 05:54:00 PM PDT 24 Jun 05 05:55:10 PM PDT 24 27080940649 ps
T551 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.770435948 Jun 05 05:53:37 PM PDT 24 Jun 05 05:53:40 PM PDT 24 2478921047 ps
T368 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.918692849 Jun 05 05:53:21 PM PDT 24 Jun 05 05:54:11 PM PDT 24 81396701805 ps
T552 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.712752051 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:11 PM PDT 24 2038124794 ps
T553 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1227839597 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:41 PM PDT 24 56687148677 ps
T95 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2309972066 Jun 05 05:54:48 PM PDT 24 Jun 05 05:58:46 PM PDT 24 99258844251 ps
T554 /workspace/coverage/default/11.sysrst_ctrl_alert_test.1915832635 Jun 05 05:53:26 PM PDT 24 Jun 05 05:53:29 PM PDT 24 2032844276 ps
T555 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.271291570 Jun 05 05:53:14 PM PDT 24 Jun 05 05:53:35 PM PDT 24 3449249622 ps
T556 /workspace/coverage/default/41.sysrst_ctrl_alert_test.3871943622 Jun 05 05:54:20 PM PDT 24 Jun 05 05:54:22 PM PDT 24 2027516355 ps
T557 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.583889429 Jun 05 05:54:05 PM PDT 24 Jun 05 05:54:13 PM PDT 24 2610483334 ps
T558 /workspace/coverage/default/9.sysrst_ctrl_smoke.2746361738 Jun 05 05:53:14 PM PDT 24 Jun 05 05:53:22 PM PDT 24 2112861272 ps
T559 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.2167489747 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:13 PM PDT 24 2892384642 ps
T111 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.1743292625 Jun 05 05:53:49 PM PDT 24 Jun 05 05:56:47 PM PDT 24 138923237409 ps
T560 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.154017816 Jun 05 05:53:16 PM PDT 24 Jun 05 05:54:35 PM PDT 24 136520447576 ps
T561 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.555470420 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:09 PM PDT 24 2084180259 ps
T366 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3186483730 Jun 05 05:54:51 PM PDT 24 Jun 05 05:55:48 PM PDT 24 203885339129 ps
T562 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1300995208 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:23 PM PDT 24 3449381779 ps
T563 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2201303043 Jun 05 05:54:46 PM PDT 24 Jun 05 05:56:40 PM PDT 24 50287494321 ps
T564 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2563632415 Jun 05 05:54:46 PM PDT 24 Jun 05 05:54:54 PM PDT 24 4219412702 ps
T565 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3206389468 Jun 05 05:53:37 PM PDT 24 Jun 05 05:53:43 PM PDT 24 3418841815 ps
T566 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3438369074 Jun 05 05:53:46 PM PDT 24 Jun 05 05:53:53 PM PDT 24 2074082558 ps
T242 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.1368506450 Jun 05 05:53:46 PM PDT 24 Jun 05 05:53:54 PM PDT 24 3804005175 ps
T112 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.1153552277 Jun 05 05:53:17 PM PDT 24 Jun 05 05:53:29 PM PDT 24 3604517285 ps
T121 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.1781835900 Jun 05 05:54:05 PM PDT 24 Jun 05 05:59:23 PM PDT 24 129007950604 ps
T122 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3162125462 Jun 05 05:53:20 PM PDT 24 Jun 05 05:55:39 PM PDT 24 55182089054 ps
T123 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.1826411088 Jun 05 05:53:26 PM PDT 24 Jun 05 05:57:21 PM PDT 24 199811150759 ps
T89 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2112369035 Jun 05 05:53:05 PM PDT 24 Jun 05 05:53:40 PM PDT 24 37006397299 ps
T124 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.576722936 Jun 05 05:54:21 PM PDT 24 Jun 05 05:54:26 PM PDT 24 7127929118 ps
T125 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.962313813 Jun 05 05:53:45 PM PDT 24 Jun 05 05:53:49 PM PDT 24 2123122559 ps
T126 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.3886739128 Jun 05 05:53:12 PM PDT 24 Jun 05 05:53:15 PM PDT 24 3325350390 ps
T127 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.4263378178 Jun 05 05:54:23 PM PDT 24 Jun 05 05:55:52 PM PDT 24 75694400346 ps
T128 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.1171323830 Jun 05 05:54:05 PM PDT 24 Jun 05 06:01:47 PM PDT 24 172283530023 ps
T567 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.347025250 Jun 05 05:54:30 PM PDT 24 Jun 05 05:54:38 PM PDT 24 2614780198 ps
T568 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2955739571 Jun 05 05:54:42 PM PDT 24 Jun 05 05:55:25 PM PDT 24 25583242158 ps
T569 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.4132238236 Jun 05 05:54:21 PM PDT 24 Jun 05 06:00:06 PM PDT 24 140740398029 ps
T570 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2373705945 Jun 05 05:53:28 PM PDT 24 Jun 05 05:53:34 PM PDT 24 3655959097 ps
T571 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.985679185 Jun 05 05:53:55 PM PDT 24 Jun 05 05:53:59 PM PDT 24 2063929133 ps
T572 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.1701635214 Jun 05 05:53:51 PM PDT 24 Jun 05 05:54:52 PM PDT 24 98029382740 ps
T573 /workspace/coverage/default/10.sysrst_ctrl_alert_test.198661095 Jun 05 05:53:19 PM PDT 24 Jun 05 05:53:27 PM PDT 24 2008895340 ps
T371 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1196381879 Jun 05 05:54:55 PM PDT 24 Jun 05 05:55:20 PM PDT 24 61952139261 ps
T574 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1689429264 Jun 05 05:54:26 PM PDT 24 Jun 05 05:54:28 PM PDT 24 2243490777 ps
T575 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.891523133 Jun 05 05:54:17 PM PDT 24 Jun 05 05:54:25 PM PDT 24 2510726304 ps
T203 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.4439860 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:53 PM PDT 24 53867801180 ps
T213 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.350976396 Jun 05 05:53:11 PM PDT 24 Jun 05 05:53:44 PM PDT 24 47597226915 ps
T576 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.779172206 Jun 05 05:53:17 PM PDT 24 Jun 05 05:59:17 PM PDT 24 149982936497 ps
T311 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.1776879963 Jun 05 05:53:20 PM PDT 24 Jun 05 05:55:18 PM PDT 24 42010871350 ps
T577 /workspace/coverage/default/34.sysrst_ctrl_stress_all.1580010945 Jun 05 05:54:14 PM PDT 24 Jun 05 05:54:33 PM PDT 24 6786024413 ps
T280 /workspace/coverage/default/16.sysrst_ctrl_stress_all.3819713323 Jun 05 05:53:15 PM PDT 24 Jun 05 05:56:08 PM PDT 24 78296542397 ps
T312 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.570727725 Jun 05 05:53:21 PM PDT 24 Jun 05 05:54:29 PM PDT 24 22011977944 ps
T578 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.4106748328 Jun 05 05:54:15 PM PDT 24 Jun 05 05:54:18 PM PDT 24 2636689927 ps
T579 /workspace/coverage/default/20.sysrst_ctrl_alert_test.1389285087 Jun 05 05:53:28 PM PDT 24 Jun 05 05:53:30 PM PDT 24 2023317144 ps
T580 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.4274659698 Jun 05 05:53:01 PM PDT 24 Jun 05 05:53:05 PM PDT 24 2635831860 ps
T581 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1434890339 Jun 05 05:53:14 PM PDT 24 Jun 05 05:53:17 PM PDT 24 2323968851 ps
T582 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1753040882 Jun 05 05:53:44 PM PDT 24 Jun 05 05:54:22 PM PDT 24 55354129665 ps
T583 /workspace/coverage/default/49.sysrst_ctrl_alert_test.3660316200 Jun 05 05:54:45 PM PDT 24 Jun 05 05:54:47 PM PDT 24 2038829191 ps
T584 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1842642160 Jun 05 05:54:06 PM PDT 24 Jun 05 05:54:09 PM PDT 24 2521655621 ps
T585 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1223522601 Jun 05 05:53:16 PM PDT 24 Jun 05 05:53:27 PM PDT 24 3583273354 ps
T586 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2228214819 Jun 05 05:53:15 PM PDT 24 Jun 05 05:53:20 PM PDT 24 2528916821 ps
T587 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.988686018 Jun 05 05:54:33 PM PDT 24 Jun 05 05:54:47 PM PDT 24 12157802584 ps
T588 /workspace/coverage/default/43.sysrst_ctrl_alert_test.712487043 Jun 05 05:54:17 PM PDT 24 Jun 05 05:54:22 PM PDT 24 2017558923 ps
T589 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4093497316 Jun 05 05:54:39 PM PDT 24 Jun 05 05:54:46 PM PDT 24 2220189453 ps
T590 /workspace/coverage/default/27.sysrst_ctrl_smoke.2469310232 Jun 05 05:54:00 PM PDT 24 Jun 05 05:54:03 PM PDT 24 2127556634 ps
T591 /workspace/coverage/default/43.sysrst_ctrl_smoke.492495756 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:12 PM PDT 24 2141304664 ps
T592 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1486962218 Jun 05 05:54:58 PM PDT 24 Jun 05 05:55:57 PM PDT 24 81577329971 ps
T593 /workspace/coverage/default/35.sysrst_ctrl_stress_all.3235072595 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:31 PM PDT 24 12070329340 ps
T594 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.3466054325 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:21 PM PDT 24 2111071079 ps
T595 /workspace/coverage/default/40.sysrst_ctrl_alert_test.2613701357 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:20 PM PDT 24 2027051095 ps
T596 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.3159116350 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:15 PM PDT 24 2611845518 ps
T247 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.2554981209 Jun 05 05:53:17 PM PDT 24 Jun 05 05:53:23 PM PDT 24 4416197016 ps
T597 /workspace/coverage/default/20.sysrst_ctrl_smoke.1509482911 Jun 05 05:53:40 PM PDT 24 Jun 05 05:53:42 PM PDT 24 2128955388 ps
T598 /workspace/coverage/default/17.sysrst_ctrl_alert_test.641272295 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2010603129 ps
T599 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1828044624 Jun 05 05:54:26 PM PDT 24 Jun 05 05:54:35 PM PDT 24 3061093740 ps
T600 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2783235904 Jun 05 05:54:52 PM PDT 24 Jun 05 05:56:25 PM PDT 24 37755984435 ps
T300 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.3594622092 Jun 05 05:53:28 PM PDT 24 Jun 05 05:54:05 PM PDT 24 29957297485 ps
T601 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1883780412 Jun 05 05:54:42 PM PDT 24 Jun 05 05:54:53 PM PDT 24 3931447034 ps
T113 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3461533547 Jun 05 05:53:54 PM PDT 24 Jun 05 05:54:58 PM PDT 24 177308612220 ps
T602 /workspace/coverage/default/10.sysrst_ctrl_stress_all.1404535353 Jun 05 05:53:34 PM PDT 24 Jun 05 05:53:46 PM PDT 24 10945807879 ps
T603 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2582367541 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:29 PM PDT 24 3619314076 ps
T604 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.85222464 Jun 05 05:53:18 PM PDT 24 Jun 05 05:53:25 PM PDT 24 3486339124 ps
T605 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.431947640 Jun 05 05:54:36 PM PDT 24 Jun 05 05:55:29 PM PDT 24 95748482006 ps
T359 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1864348489 Jun 05 05:53:52 PM PDT 24 Jun 05 05:54:22 PM PDT 24 43756523629 ps
T357 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.199321352 Jun 05 05:54:43 PM PDT 24 Jun 05 05:56:30 PM PDT 24 162984041655 ps
T606 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2550927696 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:16 PM PDT 24 2510396120 ps
T607 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.852893556 Jun 05 05:53:14 PM PDT 24 Jun 05 05:54:26 PM PDT 24 28853982780 ps
T608 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.2341179079 Jun 05 05:54:24 PM PDT 24 Jun 05 05:55:54 PM PDT 24 150340179571 ps
T609 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2082754661 Jun 05 05:53:14 PM PDT 24 Jun 05 05:53:24 PM PDT 24 9287435307 ps
T610 /workspace/coverage/default/29.sysrst_ctrl_stress_all.1314526263 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:41 PM PDT 24 11546763080 ps
T611 /workspace/coverage/default/19.sysrst_ctrl_smoke.253728785 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:29 PM PDT 24 2108316723 ps
T612 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.163884309 Jun 05 05:54:10 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2207438038 ps
T613 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.248987925 Jun 05 05:54:18 PM PDT 24 Jun 05 05:54:22 PM PDT 24 2622866915 ps
T614 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2588897856 Jun 05 05:53:53 PM PDT 24 Jun 05 05:54:00 PM PDT 24 2084027402 ps
T284 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1614285790 Jun 05 05:53:48 PM PDT 24 Jun 05 05:54:31 PM PDT 24 34089277750 ps
T63 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.476971255 Jun 05 05:53:06 PM PDT 24 Jun 05 05:53:16 PM PDT 24 42420907767 ps
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