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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.01 99.38 96.78 100.00 97.44 98.85 99.61 93.98


Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T615 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.756866375 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:32 PM PDT 24 2513388270 ps
T616 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.2076661357 Jun 05 05:53:36 PM PDT 24 Jun 05 05:53:51 PM PDT 24 22108167296 ps
T617 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3099319794 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2495997836 ps
T618 /workspace/coverage/default/22.sysrst_ctrl_stress_all.968257114 Jun 05 05:53:48 PM PDT 24 Jun 05 05:53:58 PM PDT 24 12723746475 ps
T619 /workspace/coverage/default/14.sysrst_ctrl_alert_test.1806701469 Jun 05 05:53:26 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2046098544 ps
T620 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.2503545860 Jun 05 05:53:48 PM PDT 24 Jun 05 05:53:53 PM PDT 24 2620220058 ps
T621 /workspace/coverage/default/49.sysrst_ctrl_smoke.2766973007 Jun 05 05:54:47 PM PDT 24 Jun 05 05:54:49 PM PDT 24 2159294242 ps
T622 /workspace/coverage/default/32.sysrst_ctrl_smoke.4241241421 Jun 05 05:53:55 PM PDT 24 Jun 05 05:53:57 PM PDT 24 2136009353 ps
T623 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2804082416 Jun 05 05:53:55 PM PDT 24 Jun 05 05:54:03 PM PDT 24 5169414750 ps
T624 /workspace/coverage/default/31.sysrst_ctrl_stress_all.2851975500 Jun 05 05:54:06 PM PDT 24 Jun 05 05:57:35 PM PDT 24 298494622458 ps
T625 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3268655322 Jun 05 05:53:36 PM PDT 24 Jun 05 05:53:43 PM PDT 24 2374187151 ps
T626 /workspace/coverage/default/11.sysrst_ctrl_stress_all.3777882404 Jun 05 05:53:34 PM PDT 24 Jun 05 05:53:40 PM PDT 24 8390467785 ps
T97 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1866217847 Jun 05 05:54:08 PM PDT 24 Jun 05 05:56:19 PM PDT 24 106215281588 ps
T169 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.778769227 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:15 PM PDT 24 5414719171 ps
T170 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.634079832 Jun 05 05:54:14 PM PDT 24 Jun 05 05:56:10 PM PDT 24 47425637725 ps
T171 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3614800280 Jun 05 05:53:26 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2641384904 ps
T172 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1890101251 Jun 05 05:54:12 PM PDT 24 Jun 05 05:54:20 PM PDT 24 2457106090 ps
T173 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3903508209 Jun 05 05:53:46 PM PDT 24 Jun 05 05:53:55 PM PDT 24 3126807762 ps
T174 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.4007768395 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:31 PM PDT 24 2687730331 ps
T175 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1745358600 Jun 05 05:53:58 PM PDT 24 Jun 05 05:54:01 PM PDT 24 2450161653 ps
T176 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3437561928 Jun 05 05:53:26 PM PDT 24 Jun 05 05:55:23 PM PDT 24 172335919531 ps
T177 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2490994491 Jun 05 05:54:13 PM PDT 24 Jun 05 05:55:02 PM PDT 24 75321100264 ps
T627 /workspace/coverage/default/41.sysrst_ctrl_smoke.1175361824 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2124622398 ps
T628 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.2391466732 Jun 05 05:54:10 PM PDT 24 Jun 05 05:54:12 PM PDT 24 2056638462 ps
T354 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1371897880 Jun 05 05:54:45 PM PDT 24 Jun 05 05:56:45 PM PDT 24 104807271826 ps
T629 /workspace/coverage/default/24.sysrst_ctrl_alert_test.4219443944 Jun 05 05:53:55 PM PDT 24 Jun 05 05:54:01 PM PDT 24 2012541853 ps
T630 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3592105272 Jun 05 05:54:50 PM PDT 24 Jun 05 05:56:30 PM PDT 24 74157623384 ps
T273 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1129905474 Jun 05 05:54:50 PM PDT 24 Jun 05 05:56:10 PM PDT 24 108926532354 ps
T631 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.4194943793 Jun 05 05:53:11 PM PDT 24 Jun 05 05:53:13 PM PDT 24 2348351447 ps
T632 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1556792076 Jun 05 05:54:25 PM PDT 24 Jun 05 05:54:27 PM PDT 24 2530639136 ps
T633 /workspace/coverage/default/0.sysrst_ctrl_smoke.1352186856 Jun 05 05:53:10 PM PDT 24 Jun 05 05:53:17 PM PDT 24 2111682743 ps
T634 /workspace/coverage/default/14.sysrst_ctrl_smoke.1854021087 Jun 05 05:53:15 PM PDT 24 Jun 05 05:53:20 PM PDT 24 2129193459 ps
T635 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.2037278821 Jun 05 05:53:47 PM PDT 24 Jun 05 05:53:55 PM PDT 24 2472435043 ps
T248 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3308089491 Jun 05 05:53:17 PM PDT 24 Jun 05 05:53:46 PM PDT 24 52337268056 ps
T636 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.4250153439 Jun 05 05:54:01 PM PDT 24 Jun 05 05:54:04 PM PDT 24 2488050991 ps
T637 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2877625227 Jun 05 05:54:47 PM PDT 24 Jun 05 05:54:51 PM PDT 24 4809079965 ps
T231 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.521744084 Jun 05 05:53:51 PM PDT 24 Jun 05 05:53:57 PM PDT 24 4613478637 ps
T233 /workspace/coverage/default/36.sysrst_ctrl_stress_all.2442329579 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:31 PM PDT 24 17047118656 ps
T234 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1237584858 Jun 05 05:54:40 PM PDT 24 Jun 05 05:55:10 PM PDT 24 48665442249 ps
T235 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3196414269 Jun 05 05:54:31 PM PDT 24 Jun 05 05:54:36 PM PDT 24 2621382271 ps
T236 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3566268781 Jun 05 05:53:44 PM PDT 24 Jun 05 05:53:50 PM PDT 24 2901871555 ps
T163 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.262376662 Jun 05 05:54:12 PM PDT 24 Jun 05 05:55:42 PM PDT 24 32746538545 ps
T237 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.589764199 Jun 05 05:53:28 PM PDT 24 Jun 05 05:54:19 PM PDT 24 68457266041 ps
T155 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.2423944577 Jun 05 05:53:22 PM PDT 24 Jun 05 05:55:41 PM PDT 24 209003417499 ps
T190 /workspace/coverage/default/46.sysrst_ctrl_stress_all.2737608726 Jun 05 05:54:27 PM PDT 24 Jun 05 05:54:34 PM PDT 24 11219566104 ps
T191 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1105662590 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:29 PM PDT 24 2460579492 ps
T192 /workspace/coverage/default/17.sysrst_ctrl_smoke.4019692915 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:29 PM PDT 24 2117227966 ps
T193 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.4121832537 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:29 PM PDT 24 2531540801 ps
T194 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2797110284 Jun 05 05:54:32 PM PDT 24 Jun 05 05:55:53 PM PDT 24 32126878402 ps
T195 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3915941405 Jun 05 05:53:42 PM PDT 24 Jun 05 05:56:00 PM PDT 24 108149999270 ps
T196 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.676349260 Jun 05 05:53:54 PM PDT 24 Jun 05 05:53:57 PM PDT 24 2101853587 ps
T197 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2143556001 Jun 05 05:54:10 PM PDT 24 Jun 05 05:57:58 PM PDT 24 84618622824 ps
T198 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3655961286 Jun 05 05:54:38 PM PDT 24 Jun 05 05:54:40 PM PDT 24 2537821124 ps
T142 /workspace/coverage/default/8.sysrst_ctrl_stress_all.3858501442 Jun 05 05:53:15 PM PDT 24 Jun 05 05:55:12 PM PDT 24 182994440303 ps
T638 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1621250590 Jun 05 05:54:10 PM PDT 24 Jun 05 05:54:12 PM PDT 24 2563263792 ps
T639 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.1625377214 Jun 05 05:53:49 PM PDT 24 Jun 05 05:53:51 PM PDT 24 2670660415 ps
T640 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.770488322 Jun 05 05:53:43 PM PDT 24 Jun 05 05:54:31 PM PDT 24 114753801204 ps
T301 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2640685645 Jun 05 05:53:58 PM PDT 24 Jun 05 05:55:16 PM PDT 24 111310637554 ps
T641 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2754240641 Jun 05 05:54:09 PM PDT 24 Jun 05 05:55:40 PM PDT 24 34912213238 ps
T320 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2618965899 Jun 05 05:54:09 PM PDT 24 Jun 05 05:54:52 PM PDT 24 56880723538 ps
T642 /workspace/coverage/default/33.sysrst_ctrl_smoke.3242035440 Jun 05 05:54:02 PM PDT 24 Jun 05 05:54:06 PM PDT 24 2117323492 ps
T114 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3953544642 Jun 05 05:53:30 PM PDT 24 Jun 05 05:54:16 PM PDT 24 200967644738 ps
T643 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.3729321632 Jun 05 05:53:50 PM PDT 24 Jun 05 05:53:52 PM PDT 24 3089935224 ps
T644 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.411831751 Jun 05 05:53:20 PM PDT 24 Jun 05 05:53:25 PM PDT 24 2114960326 ps
T115 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.3599914003 Jun 05 05:54:13 PM PDT 24 Jun 05 05:57:58 PM PDT 24 91582075078 ps
T645 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3080405892 Jun 05 05:54:44 PM PDT 24 Jun 05 05:55:34 PM PDT 24 38977212142 ps
T646 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4074255033 Jun 05 05:54:26 PM PDT 24 Jun 05 05:54:36 PM PDT 24 3769553630 ps
T647 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.490893089 Jun 05 05:53:53 PM PDT 24 Jun 05 05:53:55 PM PDT 24 2591556866 ps
T648 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2530381697 Jun 05 05:54:34 PM PDT 24 Jun 05 05:54:44 PM PDT 24 3685907653 ps
T649 /workspace/coverage/default/7.sysrst_ctrl_stress_all.107071853 Jun 05 05:53:45 PM PDT 24 Jun 05 05:54:23 PM PDT 24 19756806683 ps
T650 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1575701171 Jun 05 05:53:51 PM PDT 24 Jun 05 05:54:01 PM PDT 24 3641573591 ps
T363 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2449787747 Jun 05 05:54:38 PM PDT 24 Jun 05 05:56:47 PM PDT 24 93096650009 ps
T361 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3328988909 Jun 05 05:53:43 PM PDT 24 Jun 05 05:54:20 PM PDT 24 79785960036 ps
T651 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.106561217 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:11 PM PDT 24 2438319161 ps
T652 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.1318012420 Jun 05 05:54:19 PM PDT 24 Jun 05 05:56:37 PM PDT 24 104658393098 ps
T653 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3168056863 Jun 05 05:54:10 PM PDT 24 Jun 05 05:57:11 PM PDT 24 138287002234 ps
T654 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3950368839 Jun 05 05:53:40 PM PDT 24 Jun 05 05:53:49 PM PDT 24 2612950020 ps
T360 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2456923285 Jun 05 05:54:39 PM PDT 24 Jun 05 05:55:49 PM PDT 24 89152326082 ps
T655 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2539142032 Jun 05 05:54:18 PM PDT 24 Jun 05 05:55:37 PM PDT 24 29153987359 ps
T656 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2099706687 Jun 05 05:53:26 PM PDT 24 Jun 05 05:53:35 PM PDT 24 2792464756 ps
T657 /workspace/coverage/default/40.sysrst_ctrl_stress_all.2560014908 Jun 05 05:54:10 PM PDT 24 Jun 05 05:54:38 PM PDT 24 10179731661 ps
T658 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3026601288 Jun 05 05:54:06 PM PDT 24 Jun 05 05:54:09 PM PDT 24 2624745040 ps
T659 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.4030102735 Jun 05 05:53:54 PM PDT 24 Jun 05 05:53:58 PM PDT 24 3206029830 ps
T660 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.980345423 Jun 05 05:53:11 PM PDT 24 Jun 05 05:53:16 PM PDT 24 2621938597 ps
T661 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1100415183 Jun 05 05:54:21 PM PDT 24 Jun 05 05:54:29 PM PDT 24 2508828182 ps
T662 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.297858123 Jun 05 05:53:15 PM PDT 24 Jun 05 05:53:21 PM PDT 24 2473174003 ps
T663 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2562872776 Jun 05 05:53:49 PM PDT 24 Jun 05 05:53:57 PM PDT 24 2608105611 ps
T664 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2182378120 Jun 05 05:53:12 PM PDT 24 Jun 05 05:54:32 PM PDT 24 332105144299 ps
T665 /workspace/coverage/default/4.sysrst_ctrl_stress_all.3380203432 Jun 05 05:53:18 PM PDT 24 Jun 05 05:53:34 PM PDT 24 10203235438 ps
T666 /workspace/coverage/default/45.sysrst_ctrl_smoke.829285892 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:22 PM PDT 24 2108624166 ps
T667 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1228659364 Jun 05 05:53:45 PM PDT 24 Jun 05 05:54:07 PM PDT 24 41540225706 ps
T668 /workspace/coverage/default/24.sysrst_ctrl_smoke.2069962730 Jun 05 05:53:44 PM PDT 24 Jun 05 05:53:51 PM PDT 24 2110815916 ps
T669 /workspace/coverage/default/18.sysrst_ctrl_stress_all.1219527557 Jun 05 05:53:43 PM PDT 24 Jun 05 05:55:32 PM PDT 24 86727182261 ps
T670 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.6893822 Jun 05 05:53:33 PM PDT 24 Jun 05 05:53:36 PM PDT 24 2622807062 ps
T671 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2335804675 Jun 05 05:53:43 PM PDT 24 Jun 05 05:53:46 PM PDT 24 2530626316 ps
T672 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.2707950968 Jun 05 05:53:47 PM PDT 24 Jun 05 05:53:50 PM PDT 24 3645084824 ps
T185 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1368761857 Jun 05 05:53:11 PM PDT 24 Jun 05 05:53:41 PM PDT 24 10421156225 ps
T204 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.2176370319 Jun 05 05:53:52 PM PDT 24 Jun 05 05:54:02 PM PDT 24 3420300727 ps
T205 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1381055602 Jun 05 05:53:30 PM PDT 24 Jun 05 05:53:37 PM PDT 24 2486576547 ps
T206 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.3512474613 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:15 PM PDT 24 3905343868 ps
T207 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.4098428690 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:15 PM PDT 24 2618333241 ps
T186 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.2704312702 Jun 05 05:53:40 PM PDT 24 Jun 05 06:08:36 PM PDT 24 343442756218 ps
T208 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3680246811 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:17 PM PDT 24 2472424880 ps
T209 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2466372676 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:33 PM PDT 24 2458009896 ps
T210 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.940613663 Jun 05 05:54:13 PM PDT 24 Jun 05 05:55:10 PM PDT 24 90301403133 ps
T211 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1345104757 Jun 05 05:53:49 PM PDT 24 Jun 05 05:54:08 PM PDT 24 42630681287 ps
T673 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.2866042986 Jun 05 05:54:10 PM PDT 24 Jun 05 05:54:18 PM PDT 24 2463950697 ps
T674 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3670360126 Jun 05 05:53:52 PM PDT 24 Jun 05 05:54:01 PM PDT 24 9309290313 ps
T675 /workspace/coverage/default/21.sysrst_ctrl_smoke.4001364225 Jun 05 05:53:29 PM PDT 24 Jun 05 05:53:40 PM PDT 24 2108905079 ps
T676 /workspace/coverage/default/0.sysrst_ctrl_alert_test.2437505852 Jun 05 05:53:14 PM PDT 24 Jun 05 05:53:17 PM PDT 24 2032206656 ps
T677 /workspace/coverage/default/18.sysrst_ctrl_alert_test.2503868500 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:24 PM PDT 24 2034605133 ps
T678 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1149278922 Jun 05 05:54:15 PM PDT 24 Jun 05 05:54:19 PM PDT 24 4649758265 ps
T679 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.2890675709 Jun 05 05:54:08 PM PDT 24 Jun 05 05:57:33 PM PDT 24 77088634509 ps
T680 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1809395370 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:17 PM PDT 24 2465584419 ps
T681 /workspace/coverage/default/16.sysrst_ctrl_alert_test.567754755 Jun 05 05:53:40 PM PDT 24 Jun 05 05:53:43 PM PDT 24 2025552158 ps
T682 /workspace/coverage/default/42.sysrst_ctrl_alert_test.748700238 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:17 PM PDT 24 2013591172 ps
T683 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.4281916217 Jun 05 05:53:16 PM PDT 24 Jun 05 05:53:21 PM PDT 24 2092992226 ps
T684 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3231215972 Jun 05 05:54:32 PM PDT 24 Jun 05 05:54:39 PM PDT 24 2511394714 ps
T685 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.2684953042 Jun 05 05:53:48 PM PDT 24 Jun 05 05:54:14 PM PDT 24 37273177382 ps
T686 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3544571905 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:27 PM PDT 24 80680836826 ps
T687 /workspace/coverage/default/38.sysrst_ctrl_smoke.1717766904 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2112814283 ps
T688 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.3367910686 Jun 05 05:54:29 PM PDT 24 Jun 05 05:58:40 PM PDT 24 92378106525 ps
T145 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2277992858 Jun 05 05:53:11 PM PDT 24 Jun 05 05:53:20 PM PDT 24 8086895646 ps
T689 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2774419296 Jun 05 05:54:18 PM PDT 24 Jun 05 05:54:23 PM PDT 24 2514246334 ps
T690 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2507805751 Jun 05 05:53:45 PM PDT 24 Jun 05 05:53:53 PM PDT 24 2449161473 ps
T691 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3245022884 Jun 05 05:53:27 PM PDT 24 Jun 05 05:53:39 PM PDT 24 2440904316 ps
T692 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.356191433 Jun 05 05:53:12 PM PDT 24 Jun 05 05:54:29 PM PDT 24 138360794249 ps
T693 /workspace/coverage/default/15.sysrst_ctrl_smoke.675300402 Jun 05 05:53:27 PM PDT 24 Jun 05 05:53:30 PM PDT 24 2137577463 ps
T187 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.4237472952 Jun 05 05:54:31 PM PDT 24 Jun 05 05:54:53 PM PDT 24 17926387278 ps
T694 /workspace/coverage/default/5.sysrst_ctrl_stress_all.1924485590 Jun 05 05:53:18 PM PDT 24 Jun 05 05:53:46 PM PDT 24 9726810741 ps
T695 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2880730406 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:33 PM PDT 24 3772698167 ps
T696 /workspace/coverage/default/47.sysrst_ctrl_stress_all.2332461747 Jun 05 05:54:52 PM PDT 24 Jun 05 05:57:42 PM PDT 24 256111451768 ps
T697 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1330390403 Jun 05 05:54:04 PM PDT 24 Jun 05 05:54:39 PM PDT 24 66274342331 ps
T698 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.651186625 Jun 05 05:53:17 PM PDT 24 Jun 05 05:53:30 PM PDT 24 3701274372 ps
T116 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2716831628 Jun 05 05:53:46 PM PDT 24 Jun 05 05:53:51 PM PDT 24 3232179926 ps
T699 /workspace/coverage/default/45.sysrst_ctrl_alert_test.231576011 Jun 05 05:54:20 PM PDT 24 Jun 05 05:54:26 PM PDT 24 2013093854 ps
T367 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.715931960 Jun 05 05:54:39 PM PDT 24 Jun 05 05:59:10 PM PDT 24 103630135093 ps
T700 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2033146473 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:25 PM PDT 24 2631581876 ps
T701 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1558136653 Jun 05 05:53:51 PM PDT 24 Jun 05 05:54:02 PM PDT 24 3530785795 ps
T281 /workspace/coverage/default/21.sysrst_ctrl_stress_all.994569542 Jun 05 05:53:27 PM PDT 24 Jun 05 05:56:17 PM PDT 24 133268737202 ps
T702 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3691478023 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:17 PM PDT 24 20909505579 ps
T156 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.4071749199 Jun 05 05:53:15 PM PDT 24 Jun 05 05:55:15 PM PDT 24 548998959210 ps
T703 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2746831913 Jun 05 05:53:16 PM PDT 24 Jun 05 05:53:26 PM PDT 24 2608240531 ps
T369 /workspace/coverage/default/14.sysrst_ctrl_stress_all.2184328172 Jun 05 05:53:17 PM PDT 24 Jun 05 05:55:06 PM PDT 24 40640579223 ps
T704 /workspace/coverage/default/36.sysrst_ctrl_alert_test.177844385 Jun 05 05:54:06 PM PDT 24 Jun 05 05:54:12 PM PDT 24 2013301699 ps
T705 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2360233104 Jun 05 05:53:05 PM PDT 24 Jun 05 05:53:08 PM PDT 24 2434369284 ps
T706 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.4131663804 Jun 05 05:54:43 PM PDT 24 Jun 05 05:54:46 PM PDT 24 4121653696 ps
T707 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.3491102915 Jun 05 05:54:08 PM PDT 24 Jun 05 05:55:43 PM PDT 24 147331866750 ps
T708 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.105813068 Jun 05 05:53:11 PM PDT 24 Jun 05 05:54:56 PM PDT 24 47920384474 ps
T709 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4241673448 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:21 PM PDT 24 2519534075 ps
T710 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1236418601 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:17 PM PDT 24 3091677401 ps
T711 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1700266426 Jun 05 05:53:57 PM PDT 24 Jun 05 05:53:59 PM PDT 24 5807547299 ps
T712 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1888943305 Jun 05 05:54:05 PM PDT 24 Jun 05 05:54:13 PM PDT 24 2512880459 ps
T713 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.552653650 Jun 05 05:54:03 PM PDT 24 Jun 05 05:56:35 PM PDT 24 62002303282 ps
T240 /workspace/coverage/default/39.sysrst_ctrl_stress_all.630795042 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:40 PM PDT 24 10722405685 ps
T714 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.850931586 Jun 05 05:53:35 PM PDT 24 Jun 05 05:53:42 PM PDT 24 4409439704 ps
T715 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1929443187 Jun 05 05:54:24 PM PDT 24 Jun 05 05:54:29 PM PDT 24 7812226061 ps
T716 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.513522415 Jun 05 05:53:19 PM PDT 24 Jun 05 05:53:31 PM PDT 24 3460365208 ps
T717 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.1413893142 Jun 05 05:53:13 PM PDT 24 Jun 05 05:56:58 PM PDT 24 184182689659 ps
T718 /workspace/coverage/default/15.sysrst_ctrl_alert_test.780295082 Jun 05 05:53:16 PM PDT 24 Jun 05 05:53:24 PM PDT 24 2009386877 ps
T719 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.749094609 Jun 05 05:54:12 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2576316042 ps
T720 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3313435732 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2154597339 ps
T721 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2877074194 Jun 05 05:53:25 PM PDT 24 Jun 05 06:02:50 PM PDT 24 243691757593 ps
T377 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.4117902406 Jun 05 05:54:48 PM PDT 24 Jun 05 05:55:25 PM PDT 24 77867987458 ps
T722 /workspace/coverage/default/10.sysrst_ctrl_smoke.306390772 Jun 05 05:53:31 PM PDT 24 Jun 05 05:53:33 PM PDT 24 2127644598 ps
T723 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1005724681 Jun 05 05:54:10 PM PDT 24 Jun 05 05:54:21 PM PDT 24 3873616037 ps
T724 /workspace/coverage/default/25.sysrst_ctrl_stress_all.69527237 Jun 05 05:53:49 PM PDT 24 Jun 05 05:54:06 PM PDT 24 13648230475 ps
T725 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.3102479847 Jun 05 05:54:08 PM PDT 24 Jun 05 05:54:11 PM PDT 24 2901985574 ps
T726 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.805489951 Jun 05 05:54:32 PM PDT 24 Jun 05 05:54:41 PM PDT 24 3055259703 ps
T727 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1533443753 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:33 PM PDT 24 2511534281 ps
T728 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3650165352 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:20 PM PDT 24 2521064907 ps
T729 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.135900040 Jun 05 05:54:34 PM PDT 24 Jun 05 05:54:43 PM PDT 24 2610116555 ps
T730 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.1636324583 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:24 PM PDT 24 2693068176 ps
T731 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2333789526 Jun 05 05:54:05 PM PDT 24 Jun 05 05:54:09 PM PDT 24 3223214608 ps
T732 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3774235355 Jun 05 05:53:54 PM PDT 24 Jun 05 05:54:03 PM PDT 24 2440287840 ps
T733 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.4097219493 Jun 05 05:53:35 PM PDT 24 Jun 05 05:53:37 PM PDT 24 2136364525 ps
T734 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3343775433 Jun 05 05:54:06 PM PDT 24 Jun 05 05:56:51 PM PDT 24 60423538887 ps
T735 /workspace/coverage/default/1.sysrst_ctrl_stress_all.3428529364 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:58 PM PDT 24 21044972164 ps
T736 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.2378559229 Jun 05 05:53:14 PM PDT 24 Jun 05 05:55:00 PM PDT 24 148672343599 ps
T737 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1206368386 Jun 05 05:54:10 PM PDT 24 Jun 05 05:54:13 PM PDT 24 2130559906 ps
T738 /workspace/coverage/default/37.sysrst_ctrl_alert_test.4176023931 Jun 05 05:54:24 PM PDT 24 Jun 05 05:54:35 PM PDT 24 2011916593 ps
T739 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1379849349 Jun 05 05:54:15 PM PDT 24 Jun 05 05:57:41 PM PDT 24 110312140927 ps
T740 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2998025811 Jun 05 05:53:26 PM PDT 24 Jun 05 05:53:36 PM PDT 24 2517747455 ps
T741 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.934503466 Jun 05 05:53:53 PM PDT 24 Jun 05 05:54:00 PM PDT 24 2220003974 ps
T742 /workspace/coverage/default/5.sysrst_ctrl_smoke.179989673 Jun 05 05:53:04 PM PDT 24 Jun 05 05:53:10 PM PDT 24 2111577899 ps
T743 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.3909074439 Jun 05 05:54:21 PM PDT 24 Jun 05 05:54:23 PM PDT 24 3907326390 ps
T744 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3364102539 Jun 05 05:54:30 PM PDT 24 Jun 05 05:54:49 PM PDT 24 29255756787 ps
T745 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2601778042 Jun 05 05:53:35 PM PDT 24 Jun 05 05:53:37 PM PDT 24 2545010534 ps
T746 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4263814548 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:52 PM PDT 24 66253148032 ps
T747 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3330974419 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:19 PM PDT 24 3595876880 ps
T748 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.888867169 Jun 05 05:53:15 PM PDT 24 Jun 05 05:58:49 PM PDT 24 138144523499 ps
T749 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.3682356901 Jun 05 05:53:31 PM PDT 24 Jun 05 05:53:38 PM PDT 24 2133263754 ps
T750 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2247580612 Jun 05 05:53:14 PM PDT 24 Jun 05 05:53:23 PM PDT 24 2526685550 ps
T751 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1552222927 Jun 05 05:53:12 PM PDT 24 Jun 05 05:53:20 PM PDT 24 2511914504 ps
T752 /workspace/coverage/default/12.sysrst_ctrl_alert_test.994969268 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2014402971 ps
T753 /workspace/coverage/default/22.sysrst_ctrl_smoke.3864980620 Jun 05 05:53:45 PM PDT 24 Jun 05 05:53:52 PM PDT 24 2110729325 ps
T754 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.3879470497 Jun 05 05:53:16 PM PDT 24 Jun 05 05:54:10 PM PDT 24 1229464296193 ps
T755 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1948565906 Jun 05 05:53:53 PM PDT 24 Jun 05 05:53:59 PM PDT 24 2036160134 ps
T230 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3601013226 Jun 05 05:54:20 PM PDT 24 Jun 05 05:54:59 PM PDT 24 1865252954346 ps
T756 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.444978785 Jun 05 05:53:25 PM PDT 24 Jun 05 05:53:28 PM PDT 24 2592066634 ps
T757 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.802072666 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:21 PM PDT 24 2039320271 ps
T257 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.3890667900 Jun 05 05:54:04 PM PDT 24 Jun 05 05:54:08 PM PDT 24 4112622671 ps
T258 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2841498307 Jun 05 05:53:08 PM PDT 24 Jun 05 05:53:11 PM PDT 24 2623672256 ps
T259 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.402945137 Jun 05 05:54:12 PM PDT 24 Jun 05 05:54:15 PM PDT 24 2096159323 ps
T260 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.65633533 Jun 05 05:54:07 PM PDT 24 Jun 05 05:54:42 PM PDT 24 632743706586 ps
T261 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1149027661 Jun 05 05:53:44 PM PDT 24 Jun 05 05:53:54 PM PDT 24 5102851368 ps
T262 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3404140319 Jun 05 05:53:14 PM PDT 24 Jun 05 05:53:18 PM PDT 24 2464460247 ps
T263 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3981721659 Jun 05 05:54:54 PM PDT 24 Jun 05 05:59:54 PM PDT 24 138807131044 ps
T264 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2876723163 Jun 05 05:53:21 PM PDT 24 Jun 05 05:53:25 PM PDT 24 3381252637 ps
T265 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3157228861 Jun 05 05:54:16 PM PDT 24 Jun 05 05:55:49 PM PDT 24 35926069555 ps
T266 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2801372049 Jun 05 05:54:14 PM PDT 24 Jun 05 05:54:23 PM PDT 24 3130002828 ps
T758 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.2337295668 Jun 05 05:53:10 PM PDT 24 Jun 05 05:56:37 PM PDT 24 78116947590 ps
T759 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.469598549 Jun 05 05:53:47 PM PDT 24 Jun 05 05:53:51 PM PDT 24 2521571306 ps
T760 /workspace/coverage/default/28.sysrst_ctrl_alert_test.1074718711 Jun 05 05:53:56 PM PDT 24 Jun 05 05:54:02 PM PDT 24 2009291879 ps
T761 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2153645099 Jun 05 05:53:49 PM PDT 24 Jun 05 05:53:54 PM PDT 24 2905859839 ps
T762 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2187558657 Jun 05 05:53:53 PM PDT 24 Jun 05 05:55:40 PM PDT 24 84394741342 ps
T763 /workspace/coverage/default/3.sysrst_ctrl_stress_all.1721196480 Jun 05 05:53:15 PM PDT 24 Jun 05 05:53:27 PM PDT 24 51037038307 ps
T764 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.3310849484 Jun 05 05:53:16 PM PDT 24 Jun 05 05:53:21 PM PDT 24 4315428085 ps
T765 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.2737480710 Jun 05 05:53:51 PM PDT 24 Jun 05 05:53:53 PM PDT 24 2585773743 ps
T766 /workspace/coverage/default/29.sysrst_ctrl_alert_test.3386352466 Jun 05 05:54:11 PM PDT 24 Jun 05 05:54:17 PM PDT 24 2010425794 ps
T767 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2163187349 Jun 05 05:54:05 PM PDT 24 Jun 05 05:54:14 PM PDT 24 2609652686 ps
T768 /workspace/coverage/default/47.sysrst_ctrl_alert_test.3238740136 Jun 05 05:54:40 PM PDT 24 Jun 05 05:54:41 PM PDT 24 2152597808 ps
T769 /workspace/coverage/default/31.sysrst_ctrl_alert_test.1957473990 Jun 05 05:54:04 PM PDT 24 Jun 05 05:54:07 PM PDT 24 2023279280 ps
T770 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.332621523 Jun 05 05:54:17 PM PDT 24 Jun 05 05:54:20 PM PDT 24 5893587773 ps
T771 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2778637920 Jun 05 05:54:06 PM PDT 24 Jun 05 05:54:09 PM PDT 24 2639274788 ps
T772 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2158144954 Jun 05 05:53:15 PM PDT 24 Jun 05 05:53:24 PM PDT 24 2466340755 ps
T364 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.363888891 Jun 05 05:54:09 PM PDT 24 Jun 05 05:58:57 PM PDT 24 107767502637 ps
T773 /workspace/coverage/default/3.sysrst_ctrl_alert_test.778464333 Jun 05 05:53:13 PM PDT 24 Jun 05 05:53:20 PM PDT 24 2009874847 ps
T774 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.550004070 Jun 05 05:54:50 PM PDT 24 Jun 05 05:56:05 PM PDT 24 27581808701 ps
T775 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.146281935 Jun 05 05:54:16 PM PDT 24 Jun 05 05:54:52 PM PDT 24 27074210881 ps
T776 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3541931159 Jun 05 05:53:24 PM PDT 24 Jun 05 05:53:26 PM PDT 24 3896232790 ps
T777 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1121017790 Jun 05 05:53:59 PM PDT 24 Jun 05 05:54:01 PM PDT 24 2487616294 ps
T778 /workspace/coverage/default/37.sysrst_ctrl_stress_all.649742331 Jun 05 05:54:14 PM PDT 24 Jun 05 05:54:56 PM PDT 24 13807250394 ps
T779 /workspace/coverage/default/7.sysrst_ctrl_alert_test.2057131682 Jun 05 05:53:28 PM PDT 24 Jun 05 05:53:33 PM PDT 24 2011759694 ps
T780 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1305221245 Jun 05 05:53:29 PM PDT 24 Jun 05 05:53:32 PM PDT 24 2481172721 ps
T781 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.978022534 Jun 05 05:54:01 PM PDT 24 Jun 05 05:54:05 PM PDT 24 3342569838 ps
T782 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2251440643 Jun 05 05:53:29 PM PDT 24 Jun 05 05:53:33 PM PDT 24 2497263945 ps
T783 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.41175724 Jun 05 05:54:38 PM PDT 24 Jun 05 05:54:47 PM PDT 24 5295861987 ps
T784 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1589856084 Jun 05 05:53:29 PM PDT 24 Jun 05 05:53:33 PM PDT 24 3636520944 ps
T267 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.3095769100 Jun 05 05:54:13 PM PDT 24 Jun 05 05:54:18 PM PDT 24 3640525748 ps
T785 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2837678526 Jun 05 05:53:30 PM PDT 24 Jun 05 05:53:36 PM PDT 24 4468848577 ps
T786 /workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.3160132205 Jun 05 05:43:55 PM PDT 24 Jun 05 05:43:58 PM PDT 24 2032032082 ps
T28 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_csr_mem_rw_with_rand_reset.2820273590 Jun 05 05:43:39 PM PDT 24 Jun 05 05:43:41 PM PDT 24 2107839284 ps
T787 /workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.152087147 Jun 05 05:43:57 PM PDT 24 Jun 05 05:44:04 PM PDT 24 2011934720 ps
T788 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3384258590 Jun 05 05:43:54 PM PDT 24 Jun 05 05:43:56 PM PDT 24 2036092433 ps
T18 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.1151926280 Jun 05 05:43:42 PM PDT 24 Jun 05 05:43:50 PM PDT 24 10044282398 ps
T789 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2018163332 Jun 05 05:43:31 PM PDT 24 Jun 05 05:43:35 PM PDT 24 2023028654 ps
T29 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.1728651852 Jun 05 05:43:32 PM PDT 24 Jun 05 05:44:28 PM PDT 24 42633484408 ps
T30 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2981145201 Jun 05 05:43:45 PM PDT 24 Jun 05 05:44:15 PM PDT 24 42797410200 ps
T303 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1138266089 Jun 05 05:43:30 PM PDT 24 Jun 05 05:45:09 PM PDT 24 38475874581 ps
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