Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.25 99.42 96.86 100.00 98.72 98.89 99.81 94.08


Total tests in report: 915
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
61.38 61.38 80.26 80.26 69.74 69.74 91.55 91.55 24.36 24.36 82.33 82.33 69.36 69.36 12.05 12.05 /workspace/coverage/default/3.sysrst_ctrl_stress_all.4128270265
70.48 9.10 86.32 6.06 77.91 8.16 95.21 3.65 35.26 10.90 87.65 5.32 77.36 8.00 33.64 21.60 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.684436747
77.89 7.41 93.38 7.05 87.21 9.30 97.03 1.83 47.44 12.18 93.23 5.58 86.32 8.96 40.60 6.96 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2582191285
85.18 7.29 97.31 3.94 91.89 4.68 97.03 0.00 78.21 30.77 96.64 3.40 93.93 7.61 41.23 0.62 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3629187049
88.04 2.86 97.41 0.09 92.06 0.18 97.49 0.46 78.21 0.00 96.75 0.11 94.32 0.39 60.02 18.80 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.4007369833
89.47 1.44 97.93 0.52 92.11 0.05 97.49 0.00 87.18 8.97 97.26 0.52 94.32 0.00 60.02 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2703734994
90.69 1.22 97.95 0.02 93.17 1.06 98.17 0.68 87.18 0.00 97.30 0.04 94.32 0.00 66.77 6.75 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1656356681
91.83 1.13 98.17 0.22 93.35 0.18 98.17 0.00 88.46 1.28 97.38 0.07 94.32 0.00 72.95 6.18 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.4035651010
92.86 1.03 98.34 0.17 93.93 0.58 98.17 0.00 89.74 1.28 97.63 0.26 96.72 2.41 75.44 2.49 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2463941479
93.33 0.48 98.34 0.00 94.11 0.18 98.17 0.00 89.74 0.00 97.63 0.00 96.72 0.00 78.61 3.17 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1755582416
93.76 0.42 98.38 0.04 94.24 0.13 98.17 0.00 90.38 0.64 97.67 0.04 96.92 0.19 80.53 1.92 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2498721074
94.14 0.38 98.49 0.11 94.36 0.13 98.17 0.00 92.31 1.92 97.78 0.11 97.30 0.39 80.53 0.00 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.3662991656
94.49 0.35 98.51 0.02 94.39 0.03 98.17 0.00 92.31 0.00 97.82 0.04 97.30 0.00 82.92 2.39 /workspace/coverage/default/14.sysrst_ctrl_stress_all.4097454628
94.83 0.35 98.54 0.04 94.46 0.08 98.17 0.00 92.31 0.00 97.86 0.04 97.50 0.19 84.99 2.08 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.2532414278
95.12 0.28 98.62 0.07 94.64 0.18 98.17 0.00 93.59 1.28 97.93 0.07 97.88 0.39 84.99 0.00 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2539967591
95.40 0.28 98.62 0.00 94.67 0.03 99.77 1.60 93.59 0.00 97.93 0.00 97.98 0.10 85.25 0.26 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.2893389988
95.67 0.27 98.66 0.04 94.69 0.03 99.77 0.00 93.59 0.00 97.93 0.00 98.07 0.10 86.97 1.71 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3538800678
95.92 0.25 98.73 0.07 94.74 0.05 99.77 0.00 94.87 1.28 98.00 0.07 98.27 0.19 87.02 0.05 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2041480711
96.10 0.19 98.81 0.07 94.77 0.03 99.77 0.00 95.51 0.64 98.04 0.04 98.27 0.00 87.54 0.52 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3079997988
96.26 0.16 98.84 0.04 94.82 0.05 99.77 0.00 96.15 0.64 98.08 0.04 98.36 0.10 87.80 0.26 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.826983054
96.42 0.15 98.88 0.04 94.84 0.03 99.77 0.00 96.79 0.64 98.15 0.07 98.46 0.10 88.01 0.21 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.293421214
96.56 0.14 98.94 0.06 95.05 0.20 99.77 0.00 96.79 0.00 98.23 0.07 99.04 0.58 88.11 0.10 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1904494845
96.69 0.13 98.94 0.00 95.93 0.88 99.77 0.00 96.79 0.00 98.23 0.00 99.04 0.00 88.16 0.05 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1211448596
96.82 0.13 98.99 0.06 95.96 0.03 99.77 0.00 97.44 0.64 98.30 0.07 99.13 0.10 88.16 0.00 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.3648264789
96.94 0.12 99.03 0.04 96.01 0.05 99.77 0.00 98.08 0.64 98.34 0.04 99.23 0.10 88.16 0.00 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.2871502231
97.06 0.12 99.07 0.04 96.03 0.03 99.77 0.00 98.72 0.64 98.37 0.04 99.33 0.10 88.16 0.00 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.408943846
97.17 0.10 99.09 0.02 96.03 0.00 99.77 0.00 98.72 0.00 98.41 0.04 99.33 0.00 88.84 0.67 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3650822057
97.26 0.10 99.09 0.00 96.03 0.00 99.77 0.00 98.72 0.00 98.41 0.00 99.33 0.00 89.51 0.67 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1121541335
97.34 0.08 99.10 0.02 96.06 0.03 99.77 0.00 98.72 0.00 98.41 0.00 99.52 0.19 89.82 0.31 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3156974715
97.42 0.07 99.10 0.00 96.06 0.00 99.77 0.00 98.72 0.00 98.41 0.00 99.52 0.00 90.34 0.52 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2670804249
97.48 0.07 99.12 0.02 96.06 0.00 99.77 0.00 98.72 0.00 98.45 0.04 99.52 0.00 90.76 0.42 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.640953236
97.54 0.06 99.18 0.06 96.13 0.08 99.77 0.00 98.72 0.00 98.56 0.11 99.61 0.10 90.81 0.05 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3604996941
97.59 0.05 99.18 0.00 96.46 0.33 99.77 0.00 98.72 0.00 98.56 0.00 99.61 0.00 90.86 0.05 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.2713496084
97.65 0.05 99.23 0.06 96.54 0.08 100.00 0.23 98.72 0.00 98.56 0.00 99.61 0.00 90.86 0.00 /workspace/coverage/default/1.sysrst_ctrl_alert_test.689350291
97.70 0.05 99.27 0.04 96.69 0.15 100.00 0.00 98.72 0.00 98.63 0.07 99.71 0.10 90.86 0.00 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3662032608
97.74 0.04 99.27 0.00 96.69 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 91.17 0.31 /workspace/coverage/default/45.sysrst_ctrl_stress_all.2653412730
97.79 0.04 99.27 0.00 96.69 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 91.48 0.31 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.700532294
97.82 0.04 99.27 0.00 96.69 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 91.74 0.26 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3888710483
97.86 0.03 99.29 0.02 96.69 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 91.95 0.21 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2844584413
97.89 0.03 99.29 0.00 96.69 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 92.16 0.21 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.398408892
97.91 0.03 99.29 0.00 96.71 0.03 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 92.32 0.16 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1023823344
97.93 0.02 99.29 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 92.47 0.16 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2548778176
97.96 0.02 99.29 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.71 0.00 92.63 0.16 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2517700905
97.98 0.02 99.29 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.63 0.00 99.81 0.10 92.68 0.05 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1881733109
97.99 0.02 99.33 0.04 96.71 0.00 100.00 0.00 98.72 0.00 98.71 0.07 99.81 0.00 92.68 0.00 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1954490199
98.01 0.02 99.37 0.04 96.71 0.00 100.00 0.00 98.72 0.00 98.78 0.07 99.81 0.00 92.68 0.00 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2571048398
98.02 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.81 0.00 92.78 0.10 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.773535610
98.04 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.81 0.00 92.89 0.10 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.1963448497
98.05 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.81 0.00 92.99 0.10 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.3063227639
98.07 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.81 0.00 93.09 0.10 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2703603798
98.08 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.81 0.00 93.20 0.10 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.3872573401
98.10 0.01 99.37 0.00 96.71 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.81 0.00 93.30 0.10 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2561650592
98.11 0.01 99.37 0.00 96.81 0.10 100.00 0.00 98.72 0.00 98.78 0.00 99.81 0.00 93.30 0.00 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1146741506
98.12 0.01 99.38 0.02 96.81 0.00 100.00 0.00 98.72 0.00 98.82 0.04 99.81 0.00 93.30 0.00 /workspace/coverage/default/11.sysrst_ctrl_stress_all.3154277720
98.13 0.01 99.40 0.02 96.81 0.00 100.00 0.00 98.72 0.00 98.85 0.04 99.81 0.00 93.30 0.00 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.1835014330
98.14 0.01 99.42 0.02 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.04 99.81 0.00 93.30 0.00 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2025285921
98.14 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.35 0.05 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2901311827
98.15 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.41 0.05 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3225820418
98.16 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.46 0.05 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1497654415
98.17 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.51 0.05 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.26658219
98.17 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.56 0.05 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1302399504
98.18 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.61 0.05 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1701094383
98.19 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.67 0.05 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3894074801
98.20 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.72 0.05 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1734102784
98.20 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.77 0.05 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.673368774
98.21 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.82 0.05 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4159448664
98.22 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.87 0.05 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3362177063
98.23 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.93 0.05 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2396346544
98.23 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 93.98 0.05 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1028383721
98.24 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 94.03 0.05 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2096136906
98.25 0.01 99.42 0.00 96.81 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 94.08 0.05 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2228099945
98.25 0.01 99.42 0.00 96.84 0.03 100.00 0.00 98.72 0.00 98.89 0.00 99.81 0.00 94.08 0.00 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.457068714

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2778505835
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1868855886
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2934926444
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.383639588
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1721669253
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2096941277
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3174877924
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.478058444
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3495511871
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2353289874
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2646445768
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3463240301
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1678828551
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1505948658
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.191610407
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2997583695
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2941569669
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3283872526
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.4211120243
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3413070304
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2776802970
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3415213039
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1648557562
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.4125551095
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.33945590
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2076547232
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2998020383
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.4088478309
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1353785110
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1007788378
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3493305666
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1567464361
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3019555829
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1294395040
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1476403799
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2013330610
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3752016674
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2270168304
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2535977428
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2015852437
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.716389663
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3390796072
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.858666344
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1538055171
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.949672410
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.4020453981
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2750911128
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1317126461
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2301821263
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.941771262
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1735646492
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3017563470
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.94014093
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1420512605
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1247266435
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.350177490
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.1784266366
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.334204864
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.204489615
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.103372195
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1983060194
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.2659065985
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.99179571
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.209454291
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.4169143389
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.2274319335
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.1320133854
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2878407366
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.258029365
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1358991063
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3186271439
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/workspace/coverage/default/40.sysrst_ctrl_stress_all.3193215384
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.4103450831
/workspace/coverage/default/41.sysrst_ctrl_alert_test.4035413457
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4107810427
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.764430885
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.535148165
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1704058798
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3434224957
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4143080225
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1106503108
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2576046194
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2364329761
/workspace/coverage/default/41.sysrst_ctrl_smoke.2407815165
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1673153100
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3741770322
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.801356751
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3326817546
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3595991939
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2338459855
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1997187483
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3261191295
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.220811035
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.911247561
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1552095861
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1382493671
/workspace/coverage/default/42.sysrst_ctrl_smoke.1121443363
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1827156571
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2159318849
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3639217529
/workspace/coverage/default/43.sysrst_ctrl_alert_test.170338987
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3553681876
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1594759538
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3259648463
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3773453094
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2941445200
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3730889501
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3505992207
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1938786698
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3114385901
/workspace/coverage/default/43.sysrst_ctrl_smoke.564426707
/workspace/coverage/default/43.sysrst_ctrl_stress_all.210557189
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1844211318
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2342836015
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1668835145
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2445254973
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1837036253
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3061551639
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1118083782
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3418004515
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4269574919
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2096036288
/workspace/coverage/default/44.sysrst_ctrl_smoke.481130545
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1144220298
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1537491168
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1951275162
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1805800572
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1542467702
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1856263922
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3415963734
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3236699824
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1914935582
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3868024123
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2621787574
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.4069000492
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4025207063
/workspace/coverage/default/45.sysrst_ctrl_smoke.3611709695
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2094005830
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2810490091
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1284302589
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2262968416
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.342405989
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2177314576
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.462381747
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2676324975
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2656072160
/workspace/coverage/default/46.sysrst_ctrl_smoke.3460585497
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3332306823
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3249476569
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4053132121
/workspace/coverage/default/47.sysrst_ctrl_alert_test.4189332619
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2491793234
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2879910034
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.4207046105
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3756660595
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2031885888
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3868138041
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1302009996
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.166346800
/workspace/coverage/default/47.sysrst_ctrl_smoke.3630038580
/workspace/coverage/default/47.sysrst_ctrl_stress_all.204445317
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.522516373
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1754148831
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.74805235
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.4134348248
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2236870734
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3585130755
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.4089458345
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1363910748
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3394105886
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.4126472868
/workspace/coverage/default/48.sysrst_ctrl_smoke.2616671238
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2802531360
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.71648694
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1348210047
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.4256651044
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2350548905
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2136490954
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3425295015
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1195630248
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.572603275
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2579460008
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.4137087079
/workspace/coverage/default/49.sysrst_ctrl_smoke.223519696
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2556190460
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2877737153
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2757032037
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2172621694
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.214689762
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2403827627
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.4291166332
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1692064052
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3580169266
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2147444100
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.697489102
/workspace/coverage/default/5.sysrst_ctrl_smoke.3869556937
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3309569441
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3814892832
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2046805742
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4170837412
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1217017765
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2667898783
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4061603389
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4144519896
/workspace/coverage/default/6.sysrst_ctrl_alert_test.189746232
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3291095575
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1642043654
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.804746706
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.741674884
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1144290696
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2050462920
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3409477731
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.372428122
/workspace/coverage/default/6.sysrst_ctrl_smoke.3536742906
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1054088205
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2446152931
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1185894743
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2667358892
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.4054360744
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1083293045
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3441565392
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.186897820
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3388857658
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3873437577
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1499126078
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1592189393
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1312866342
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4209856148
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.714212063
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.4237786704
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3793401065
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1145690322
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.802852670
/workspace/coverage/default/7.sysrst_ctrl_smoke.1554879275
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2391255624
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1436580942
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.221222029
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3821017925
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.84452755
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3989605223
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1494213223
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3747090359
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.202526355
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1570845166
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.742497086
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.828506654
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1400705426
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3024130294
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.4186918606
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2295034024
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1097954527
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.999725793
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.584160526
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1968728681
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2868161224
/workspace/coverage/default/8.sysrst_ctrl_smoke.159575709
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3482476221
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.4012918430
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1174493084
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.552782453
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.286375269
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3593743796
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.863459738
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.254168686
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2917431982
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1805402388
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3716347096
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1505601150
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3955818456
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.753301922
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1495506780
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4080401255
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2998510224
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1293036270
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3178414398
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2601690439
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3736931289
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3893091999
/workspace/coverage/default/9.sysrst_ctrl_smoke.1458314904
/workspace/coverage/default/9.sysrst_ctrl_stress_all.572682082
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1329024586
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.538939973
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2877520418
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.822679114
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3959600766
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1755428181
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3682108886
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.426242418



Total test records in report: 915
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.243952395 Jun 06 02:08:13 PM PDT 24 Jun 06 02:11:27 PM PDT 24 72151358682 ps
T2 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.4035651010 Jun 06 02:07:34 PM PDT 24 Jun 06 02:08:35 PM PDT 24 24280647716 ps
T5 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.2893389988 Jun 06 02:06:09 PM PDT 24 Jun 06 02:06:23 PM PDT 24 22106252735 ps
T12 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1542467702 Jun 06 02:08:55 PM PDT 24 Jun 06 02:09:05 PM PDT 24 3498934701 ps
T3 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2582191285 Jun 06 02:09:02 PM PDT 24 Jun 06 02:12:10 PM PDT 24 71211591473 ps
T4 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3156974715 Jun 06 02:08:49 PM PDT 24 Jun 06 02:09:58 PM PDT 24 27681846678 ps
T13 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.954979771 Jun 06 02:08:23 PM PDT 24 Jun 06 02:08:28 PM PDT 24 2615030447 ps
T6 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.684436747 Jun 06 02:07:24 PM PDT 24 Jun 06 02:08:13 PM PDT 24 80201694951 ps
T7 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.625897721 Jun 06 02:07:06 PM PDT 24 Jun 06 02:07:59 PM PDT 24 79324873309 ps
T8 /workspace/coverage/default/3.sysrst_ctrl_stress_all.4128270265 Jun 06 02:06:00 PM PDT 24 Jun 06 02:08:38 PM PDT 24 126646188737 ps
T20 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4080401255 Jun 06 02:06:32 PM PDT 24 Jun 06 02:06:48 PM PDT 24 68286085985 ps
T19 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.165968486 Jun 06 02:07:24 PM PDT 24 Jun 06 02:09:07 PM PDT 24 160891026912 ps
T44 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3441565392 Jun 06 02:09:12 PM PDT 24 Jun 06 02:09:22 PM PDT 24 25126952046 ps
T53 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1028122245 Jun 06 02:06:03 PM PDT 24 Jun 06 02:07:04 PM PDT 24 24341512556 ps
T9 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3046963579 Jun 06 02:08:37 PM PDT 24 Jun 06 02:08:40 PM PDT 24 6376389550 ps
T54 /workspace/coverage/default/1.sysrst_ctrl_smoke.4085184826 Jun 06 02:05:36 PM PDT 24 Jun 06 02:05:39 PM PDT 24 2136550514 ps
T55 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1337062085 Jun 06 02:06:46 PM PDT 24 Jun 06 02:18:08 PM PDT 24 259910411246 ps
T228 /workspace/coverage/default/11.sysrst_ctrl_alert_test.197790091 Jun 06 02:06:39 PM PDT 24 Jun 06 02:06:43 PM PDT 24 2015869932 ps
T45 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.4258300315 Jun 06 02:06:56 PM PDT 24 Jun 06 02:07:02 PM PDT 24 3637989938 ps
T370 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.340733522 Jun 06 02:07:35 PM PDT 24 Jun 06 02:07:38 PM PDT 24 2036073932 ps
T10 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3108533650 Jun 06 02:05:57 PM PDT 24 Jun 06 02:06:05 PM PDT 24 2416244912 ps
T273 /workspace/coverage/default/1.sysrst_ctrl_alert_test.689350291 Jun 06 02:05:43 PM PDT 24 Jun 06 02:05:49 PM PDT 24 2009352791 ps
T17 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1899402624 Jun 06 02:07:04 PM PDT 24 Jun 06 02:07:08 PM PDT 24 2490477964 ps
T11 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2314503314 Jun 06 02:07:04 PM PDT 24 Jun 06 02:07:12 PM PDT 24 6967623295 ps
T109 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2250472583 Jun 06 02:05:25 PM PDT 24 Jun 06 02:05:29 PM PDT 24 2087084636 ps
T110 /workspace/coverage/default/3.sysrst_ctrl_smoke.1081435985 Jun 06 02:05:55 PM PDT 24 Jun 06 02:05:59 PM PDT 24 2117024054 ps
T46 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3538800678 Jun 06 02:05:35 PM PDT 24 Jun 06 02:11:09 PM PDT 24 131665196860 ps
T18 /workspace/coverage/default/1.sysrst_ctrl_stress_all.626661044 Jun 06 02:05:44 PM PDT 24 Jun 06 02:05:53 PM PDT 24 10339218722 ps
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T47 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1592189393 Jun 06 02:06:21 PM PDT 24 Jun 06 02:06:27 PM PDT 24 3899061228 ps
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T42 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3821017925 Jun 06 02:09:13 PM PDT 24 Jun 06 02:10:07 PM PDT 24 42174644055 ps
T90 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2547449741 Jun 06 02:07:58 PM PDT 24 Jun 06 02:08:02 PM PDT 24 2139007076 ps
T66 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1652161392 Jun 06 02:06:37 PM PDT 24 Jun 06 02:06:39 PM PDT 24 2714165222 ps
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T56 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3079997988 Jun 06 02:09:06 PM PDT 24 Jun 06 02:12:12 PM PDT 24 74361607341 ps
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T43 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.700532294 Jun 06 02:06:20 PM PDT 24 Jun 06 02:08:26 PM PDT 24 76708825109 ps
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T105 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3906443828 Jun 06 02:08:39 PM PDT 24 Jun 06 02:08:50 PM PDT 24 4133308442 ps
T67 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.4237786704 Jun 06 02:06:22 PM PDT 24 Jun 06 02:06:30 PM PDT 24 2609050675 ps
T49 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2159318849 Jun 06 02:08:49 PM PDT 24 Jun 06 02:10:25 PM PDT 24 44334135926 ps
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T68 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1480857163 Jun 06 02:06:03 PM PDT 24 Jun 06 02:06:06 PM PDT 24 2525049858 ps
T57 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.2800472309 Jun 06 02:07:59 PM PDT 24 Jun 06 02:08:10 PM PDT 24 7731266625 ps
T50 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2172621694 Jun 06 02:06:11 PM PDT 24 Jun 06 02:06:20 PM PDT 24 3309877330 ps
T69 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.220811035 Jun 06 02:08:46 PM PDT 24 Jun 06 02:08:50 PM PDT 24 2622583207 ps
T135 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1587803722 Jun 06 02:07:55 PM PDT 24 Jun 06 02:08:02 PM PDT 24 3791525392 ps
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T71 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1525216204 Jun 06 02:06:38 PM PDT 24 Jun 06 02:07:20 PM PDT 24 23836480748 ps
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T72 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3894074801 Jun 06 02:08:29 PM PDT 24 Jun 06 02:12:22 PM PDT 24 194773559501 ps
T223 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2177314576 Jun 06 02:08:58 PM PDT 24 Jun 06 02:09:04 PM PDT 24 2613653447 ps
T58 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1019210584 Jun 06 02:06:55 PM PDT 24 Jun 06 02:07:02 PM PDT 24 4962486962 ps
T224 /workspace/coverage/default/26.sysrst_ctrl_alert_test.261163752 Jun 06 02:07:54 PM PDT 24 Jun 06 02:08:01 PM PDT 24 2009885433 ps
T225 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.313125514 Jun 06 02:07:04 PM PDT 24 Jun 06 02:07:07 PM PDT 24 2057267219 ps
T226 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.194636267 Jun 06 02:05:55 PM PDT 24 Jun 06 02:06:01 PM PDT 24 2140618382 ps
T376 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2353428958 Jun 06 02:07:07 PM PDT 24 Jun 06 02:07:10 PM PDT 24 2554903835 ps
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T252 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.1508571099 Jun 06 02:08:23 PM PDT 24 Jun 06 02:08:35 PM PDT 24 3776718012 ps
T73 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.352041876 Jun 06 02:07:59 PM PDT 24 Jun 06 02:08:21 PM PDT 24 54638454269 ps
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T253 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2031885888 Jun 06 02:08:59 PM PDT 24 Jun 06 02:09:07 PM PDT 24 2611258906 ps
T52 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.635595445 Jun 06 02:07:52 PM PDT 24 Jun 06 02:07:56 PM PDT 24 3871489930 ps
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T59 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.382031162 Jun 06 02:07:55 PM PDT 24 Jun 06 02:08:04 PM PDT 24 7942283553 ps
T111 /workspace/coverage/default/17.sysrst_ctrl_stress_all.1100187949 Jun 06 02:07:06 PM PDT 24 Jun 06 02:07:13 PM PDT 24 9548569560 ps
T92 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.4275440392 Jun 06 02:05:45 PM PDT 24 Jun 06 02:11:09 PM PDT 24 115500211471 ps
T377 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3698462649 Jun 06 02:08:05 PM PDT 24 Jun 06 02:08:08 PM PDT 24 2526016261 ps
T380 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.1209963336 Jun 06 02:08:23 PM PDT 24 Jun 06 02:08:28 PM PDT 24 2613380711 ps
T237 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2695479653 Jun 06 02:07:14 PM PDT 24 Jun 06 02:11:08 PM PDT 24 95910094171 ps
T287 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2804131429 Jun 06 02:08:36 PM PDT 24 Jun 06 02:08:39 PM PDT 24 2529165143 ps
T288 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2433723951 Jun 06 02:08:36 PM PDT 24 Jun 06 02:08:42 PM PDT 24 2515445318 ps
T280 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.74805235 Jun 06 02:09:05 PM PDT 24 Jun 06 02:09:09 PM PDT 24 3699756294 ps
T88 /workspace/coverage/default/45.sysrst_ctrl_stress_all.2653412730 Jun 06 02:08:56 PM PDT 24 Jun 06 02:09:38 PM PDT 24 14425308633 ps
T238 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.286375269 Jun 06 02:09:12 PM PDT 24 Jun 06 02:10:06 PM PDT 24 76734809337 ps
T108 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1990190624 Jun 06 02:08:30 PM PDT 24 Jun 06 02:08:39 PM PDT 24 3347104103 ps
T60 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1068943510 Jun 06 02:08:21 PM PDT 24 Jun 06 02:08:25 PM PDT 24 4384564488 ps
T34 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.1097954527 Jun 06 02:06:20 PM PDT 24 Jun 06 02:06:27 PM PDT 24 4252508661 ps
T61 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.2456734510 Jun 06 02:07:36 PM PDT 24 Jun 06 02:07:40 PM PDT 24 2962263761 ps
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T78 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.798550858 Jun 06 02:07:15 PM PDT 24 Jun 06 02:07:27 PM PDT 24 3432946944 ps
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T63 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.572603275 Jun 06 02:09:02 PM PDT 24 Jun 06 02:09:06 PM PDT 24 2470940826 ps
T62 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2650250162 Jun 06 02:07:06 PM PDT 24 Jun 06 02:07:16 PM PDT 24 9262564356 ps
T122 /workspace/coverage/default/30.sysrst_ctrl_alert_test.803558694 Jun 06 02:07:56 PM PDT 24 Jun 06 02:08:01 PM PDT 24 2021019288 ps
T123 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.958462504 Jun 06 02:06:29 PM PDT 24 Jun 06 02:06:38 PM PDT 24 2934433919 ps
T229 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2090554662 Jun 06 02:08:31 PM PDT 24 Jun 06 02:08:42 PM PDT 24 4207354890 ps
T230 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3394105886 Jun 06 02:09:06 PM PDT 24 Jun 06 02:09:09 PM PDT 24 2248082885 ps
T231 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1400705426 Jun 06 02:06:29 PM PDT 24 Jun 06 02:06:33 PM PDT 24 2020604298 ps
T25 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2844584413 Jun 06 02:07:57 PM PDT 24 Jun 06 02:13:16 PM PDT 24 120061614273 ps
T26 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2608273648 Jun 06 02:08:54 PM PDT 24 Jun 06 02:09:46 PM PDT 24 78280763901 ps
T235 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1311192855 Jun 06 02:07:24 PM PDT 24 Jun 06 02:07:39 PM PDT 24 74429684352 ps
T281 /workspace/coverage/default/16.sysrst_ctrl_stress_all.673048509 Jun 06 02:07:06 PM PDT 24 Jun 06 02:09:40 PM PDT 24 60549406013 ps
T70 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.3163174436 Jun 06 02:08:11 PM PDT 24 Jun 06 02:08:18 PM PDT 24 2976321482 ps
T378 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3605410721 Jun 06 02:06:28 PM PDT 24 Jun 06 02:06:33 PM PDT 24 2521864938 ps
T381 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3008867633 Jun 06 02:06:46 PM PDT 24 Jun 06 02:06:54 PM PDT 24 2175402556 ps
T382 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.714212063 Jun 06 02:06:26 PM PDT 24 Jun 06 02:06:37 PM PDT 24 3290640332 ps
T93 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2513893249 Jun 06 02:07:53 PM PDT 24 Jun 06 02:08:12 PM PDT 24 30918377518 ps
T239 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.3360826181 Jun 06 02:07:22 PM PDT 24 Jun 06 02:13:53 PM PDT 24 138689856921 ps
T379 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.628521819 Jun 06 02:07:58 PM PDT 24 Jun 06 02:08:08 PM PDT 24 2511768146 ps
T383 /workspace/coverage/default/28.sysrst_ctrl_alert_test.3854153159 Jun 06 02:08:00 PM PDT 24 Jun 06 02:08:08 PM PDT 24 2009568970 ps
T282 /workspace/coverage/default/37.sysrst_ctrl_stress_all.3561236865 Jun 06 02:08:21 PM PDT 24 Jun 06 02:08:51 PM PDT 24 11391679022 ps
T77 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2360487601 Jun 06 02:08:03 PM PDT 24 Jun 06 02:09:22 PM PDT 24 32207987597 ps
T384 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.2978125148 Jun 06 02:06:03 PM PDT 24 Jun 06 02:06:07 PM PDT 24 3299988432 ps
T74 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.2713496084 Jun 06 02:06:38 PM PDT 24 Jun 06 02:06:40 PM PDT 24 7615646337 ps
T283 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.753301922 Jun 06 02:06:29 PM PDT 24 Jun 06 02:06:40 PM PDT 24 3775192027 ps
T94 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2843268413 Jun 06 02:06:43 PM PDT 24 Jun 06 02:07:40 PM PDT 24 20578266593 ps
T95 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.2532414278 Jun 06 02:08:56 PM PDT 24 Jun 06 02:10:45 PM PDT 24 86999361760 ps
T385 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2681831816 Jun 06 02:08:03 PM PDT 24 Jun 06 02:08:07 PM PDT 24 2630015197 ps
T386 /workspace/coverage/default/27.sysrst_ctrl_alert_test.522466087 Jun 06 02:07:50 PM PDT 24 Jun 06 02:07:56 PM PDT 24 2015990627 ps
T387 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.2556494123 Jun 06 02:07:08 PM PDT 24 Jun 06 02:07:10 PM PDT 24 3600032297 ps
T64 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.956530315 Jun 06 02:06:47 PM PDT 24 Jun 06 02:06:52 PM PDT 24 2473707622 ps
T388 /workspace/coverage/default/7.sysrst_ctrl_smoke.1554879275 Jun 06 02:06:21 PM PDT 24 Jun 06 02:06:28 PM PDT 24 2113662336 ps
T168 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.1047602264 Jun 06 02:08:10 PM PDT 24 Jun 06 02:08:12 PM PDT 24 3382126208 ps
T389 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3053804061 Jun 06 02:07:38 PM PDT 24 Jun 06 02:07:42 PM PDT 24 3681742190 ps
T28 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2517700905 Jun 06 02:09:04 PM PDT 24 Jun 06 02:10:19 PM PDT 24 56044007270 ps
T245 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2703603798 Jun 06 02:07:38 PM PDT 24 Jun 06 02:08:21 PM PDT 24 82854481931 ps
T390 /workspace/coverage/default/15.sysrst_ctrl_smoke.162701151 Jun 06 02:06:54 PM PDT 24 Jun 06 02:06:59 PM PDT 24 2112928131 ps
T96 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2026797773 Jun 06 02:07:38 PM PDT 24 Jun 06 02:12:12 PM PDT 24 99415820682 ps
T391 /workspace/coverage/default/48.sysrst_ctrl_smoke.2616671238 Jun 06 02:09:03 PM PDT 24 Jun 06 02:09:07 PM PDT 24 2116453085 ps
T41 /workspace/coverage/default/9.sysrst_ctrl_stress_all.572682082 Jun 06 02:06:30 PM PDT 24 Jun 06 02:06:36 PM PDT 24 7428772344 ps
T392 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3720579758 Jun 06 02:06:01 PM PDT 24 Jun 06 02:06:04 PM PDT 24 2404180397 ps
T393 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4269574919 Jun 06 02:08:50 PM PDT 24 Jun 06 02:08:52 PM PDT 24 2208049216 ps
T39 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2074683788 Jun 06 02:08:05 PM PDT 24 Jun 06 02:08:23 PM PDT 24 40075011418 ps
T394 /workspace/coverage/default/40.sysrst_ctrl_smoke.3620278475 Jun 06 02:08:38 PM PDT 24 Jun 06 02:08:41 PM PDT 24 2128161309 ps
T240 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.2516414430 Jun 06 02:07:59 PM PDT 24 Jun 06 02:09:54 PM PDT 24 177658952020 ps
T112 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.4040119444 Jun 06 02:08:23 PM PDT 24 Jun 06 02:08:26 PM PDT 24 3779348826 ps
T289 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3114385901 Jun 06 02:08:49 PM PDT 24 Jun 06 02:08:55 PM PDT 24 2514288522 ps
T395 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.186279782 Jun 06 02:07:37 PM PDT 24 Jun 06 02:07:41 PM PDT 24 5377955667 ps
T396 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.342405989 Jun 06 02:09:00 PM PDT 24 Jun 06 02:09:03 PM PDT 24 4672510321 ps
T97 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3747090359 Jun 06 02:09:15 PM PDT 24 Jun 06 02:10:49 PM PDT 24 38486919688 ps
T236 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3225820418 Jun 06 02:07:13 PM PDT 24 Jun 06 02:09:49 PM PDT 24 61306981785 ps
T397 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3827575022 Jun 06 02:08:14 PM PDT 24 Jun 06 02:08:18 PM PDT 24 2630406756 ps
T398 /workspace/coverage/default/29.sysrst_ctrl_smoke.2940152437 Jun 06 02:08:02 PM PDT 24 Jun 06 02:08:06 PM PDT 24 2122584278 ps
T65 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.1004406653 Jun 06 02:07:05 PM PDT 24 Jun 06 02:07:09 PM PDT 24 2474150117 ps
T40 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2539967591 Jun 06 02:08:20 PM PDT 24 Jun 06 02:08:28 PM PDT 24 4269182233 ps
T208 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.999725793 Jun 06 02:06:19 PM PDT 24 Jun 06 02:06:23 PM PDT 24 2634311005 ps
T209 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.253560272 Jun 06 02:08:19 PM PDT 24 Jun 06 02:08:29 PM PDT 24 3521639635 ps
T210 /workspace/coverage/default/4.sysrst_ctrl_alert_test.446994850 Jun 06 02:06:12 PM PDT 24 Jun 06 02:06:18 PM PDT 24 2015598197 ps
T36 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.4012918430 Jun 06 02:06:30 PM PDT 24 Jun 06 02:08:18 PM PDT 24 46337705534 ps
T37 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1940923159 Jun 06 02:06:39 PM PDT 24 Jun 06 02:08:10 PM PDT 24 53811455682 ps
T30 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3629187049 Jun 06 02:05:38 PM PDT 24 Jun 06 02:06:33 PM PDT 24 41224908810 ps
T159 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.734279525 Jun 06 02:05:43 PM PDT 24 Jun 06 02:05:52 PM PDT 24 3610334101 ps
T160 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2491793234 Jun 06 02:09:03 PM PDT 24 Jun 06 02:09:14 PM PDT 24 3751821583 ps
T161 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1028383721 Jun 06 02:09:08 PM PDT 24 Jun 06 02:10:37 PM PDT 24 124781371178 ps
T162 /workspace/coverage/default/18.sysrst_ctrl_smoke.2844624468 Jun 06 02:07:09 PM PDT 24 Jun 06 02:07:10 PM PDT 24 2150840208 ps
T31 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1329024586 Jun 06 02:06:30 PM PDT 24 Jun 06 02:08:27 PM PDT 24 46282540374 ps
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T87 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.808642903 Jun 06 02:07:22 PM PDT 24 Jun 06 02:07:29 PM PDT 24 4226829378 ps
T85 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1020456729 Jun 06 02:06:10 PM PDT 24 Jun 06 02:06:32 PM PDT 24 49626486600 ps
T138 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2463941479 Jun 06 02:07:46 PM PDT 24 Jun 06 02:08:57 PM PDT 24 117014681500 ps
T144 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.144678277 Jun 06 02:07:07 PM PDT 24 Jun 06 02:07:10 PM PDT 24 2766097517 ps
T142 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.408943846 Jun 06 02:07:36 PM PDT 24 Jun 06 02:07:39 PM PDT 24 2757020709 ps
T113 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.79085091 Jun 06 02:07:58 PM PDT 24 Jun 06 02:08:05 PM PDT 24 9207316765 ps
T145 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1704058798 Jun 06 02:08:46 PM PDT 24 Jun 06 02:19:57 PM PDT 24 496809672863 ps
T146 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.217424617 Jun 06 02:07:03 PM PDT 24 Jun 06 02:08:12 PM PDT 24 26487217019 ps
T147 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1837036253 Jun 06 02:08:58 PM PDT 24 Jun 06 02:09:02 PM PDT 24 3491344130 ps
T148 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.741674884 Jun 06 02:06:24 PM PDT 24 Jun 06 02:06:32 PM PDT 24 2442477343 ps
T149 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1294105759 Jun 06 02:05:48 PM PDT 24 Jun 06 02:05:51 PM PDT 24 2549957520 ps
T150 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.2871502231 Jun 06 02:06:50 PM PDT 24 Jun 06 02:06:59 PM PDT 24 3706641857 ps
T86 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.4053132121 Jun 06 02:09:01 PM PDT 24 Jun 06 02:10:25 PM PDT 24 3063878648277 ps
T199 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.744861224 Jun 06 02:07:54 PM PDT 24 Jun 06 02:07:57 PM PDT 24 2659861535 ps
T198 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.1892574825 Jun 06 02:08:10 PM PDT 24 Jun 06 02:08:17 PM PDT 24 2386007945 ps
T185 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.1835014330 Jun 06 02:08:12 PM PDT 24 Jun 06 02:08:18 PM PDT 24 3476092699 ps
T213 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2667358892 Jun 06 02:09:05 PM PDT 24 Jun 06 02:10:34 PM PDT 24 31459823786 ps
T214 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2700416551 Jun 06 02:07:36 PM PDT 24 Jun 06 02:08:17 PM PDT 24 29718819642 ps
T215 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.426242418 Jun 06 02:09:21 PM PDT 24 Jun 06 02:09:33 PM PDT 24 37162169967 ps
T216 /workspace/coverage/default/43.sysrst_ctrl_stress_all.210557189 Jun 06 02:08:49 PM PDT 24 Jun 06 02:08:58 PM PDT 24 13893763594 ps
T217 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2846856557 Jun 06 02:07:54 PM PDT 24 Jun 06 02:08:02 PM PDT 24 2514529688 ps
T399 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.787340328 Jun 06 02:06:39 PM PDT 24 Jun 06 02:16:46 PM PDT 24 252420477686 ps
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T401 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1510259290 Jun 06 02:06:02 PM PDT 24 Jun 06 02:06:06 PM PDT 24 2555215607 ps
T317 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.4061603389 Jun 06 02:09:06 PM PDT 24 Jun 06 02:09:16 PM PDT 24 61343181937 ps
T402 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2519965388 Jun 06 02:05:45 PM PDT 24 Jun 06 02:05:48 PM PDT 24 2483525387 ps
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T151 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1102947427 Jun 06 02:08:04 PM PDT 24 Jun 06 02:09:07 PM PDT 24 91864939433 ps
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T340 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2670804249 Jun 06 02:09:25 PM PDT 24 Jun 06 02:13:04 PM PDT 24 104403846207 ps
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T115 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1511718409 Jun 06 02:07:35 PM PDT 24 Jun 06 02:07:39 PM PDT 24 3134722060 ps
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T360 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3388857658 Jun 06 02:09:13 PM PDT 24 Jun 06 02:09:49 PM PDT 24 40958284279 ps
T404 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.4147697718 Jun 06 02:08:12 PM PDT 24 Jun 06 02:08:17 PM PDT 24 2519414750 ps
T405 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3202104335 Jun 06 02:08:31 PM PDT 24 Jun 06 02:08:33 PM PDT 24 2561847510 ps
T406 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2877737153 Jun 06 02:09:08 PM PDT 24 Jun 06 02:09:12 PM PDT 24 5575854556 ps
T407 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2987313148 Jun 06 02:07:38 PM PDT 24 Jun 06 02:07:41 PM PDT 24 2493060037 ps
T408 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.4056914940 Jun 06 02:06:04 PM PDT 24 Jun 06 02:06:12 PM PDT 24 2613076175 ps
T409 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.4118875711 Jun 06 02:08:38 PM PDT 24 Jun 06 02:25:51 PM PDT 24 405538670665 ps
T318 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1121541335 Jun 06 02:06:01 PM PDT 24 Jun 06 02:06:47 PM PDT 24 77264082894 ps
T410 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2172492957 Jun 06 02:08:13 PM PDT 24 Jun 06 02:08:24 PM PDT 24 3504470105 ps
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T412 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.4234137464 Jun 06 02:07:53 PM PDT 24 Jun 06 02:07:56 PM PDT 24 2665946806 ps
T413 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2046805742 Jun 06 02:06:11 PM PDT 24 Jun 06 02:06:14 PM PDT 24 2923912523 ps
T414 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3730889501 Jun 06 02:08:49 PM PDT 24 Jun 06 02:08:52 PM PDT 24 2632499202 ps
T356 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2704151294 Jun 06 02:08:38 PM PDT 24 Jun 06 02:10:04 PM PDT 24 134583180397 ps
T415 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3944877466 Jun 06 02:07:38 PM PDT 24 Jun 06 02:07:43 PM PDT 24 2515535207 ps
T416 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.2764184700 Jun 06 02:07:21 PM PDT 24 Jun 06 02:07:26 PM PDT 24 4547568797 ps
T344 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.552782453 Jun 06 02:09:16 PM PDT 24 Jun 06 02:10:17 PM PDT 24 94593303901 ps
T417 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3883639393 Jun 06 02:07:23 PM PDT 24 Jun 06 02:07:25 PM PDT 24 2058211723 ps
T114 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1067158623 Jun 06 02:08:28 PM PDT 24 Jun 06 02:08:31 PM PDT 24 4528749126 ps
T418 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1552095861 Jun 06 02:08:46 PM PDT 24 Jun 06 02:08:51 PM PDT 24 2244699031 ps
T419 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3032315808 Jun 06 02:05:27 PM PDT 24 Jun 06 02:05:34 PM PDT 24 2204307888 ps
T313 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1755582416 Jun 06 02:07:47 PM PDT 24 Jun 06 02:09:48 PM PDT 24 190075183701 ps
T420 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3593648194 Jun 06 02:08:02 PM PDT 24 Jun 06 02:08:07 PM PDT 24 3466901115 ps
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T421 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2521693638 Jun 06 02:08:15 PM PDT 24 Jun 06 02:08:25 PM PDT 24 3309802055 ps
T286 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2154105923 Jun 06 02:07:16 PM PDT 24 Jun 06 02:07:20 PM PDT 24 2476825569 ps
T422 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.4107810427 Jun 06 02:08:46 PM PDT 24 Jun 06 02:08:50 PM PDT 24 3591697062 ps
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T423 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2491628761 Jun 06 02:06:56 PM PDT 24 Jun 06 02:07:05 PM PDT 24 2608507102 ps
T424 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.4232442466 Jun 06 02:08:37 PM PDT 24 Jun 06 02:08:43 PM PDT 24 3593211742 ps
T425 /workspace/coverage/default/29.sysrst_ctrl_alert_test.2409863081 Jun 06 02:07:55 PM PDT 24 Jun 06 02:08:00 PM PDT 24 2014732603 ps
T426 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.462381747 Jun 06 02:08:57 PM PDT 24 Jun 06 02:09:00 PM PDT 24 2486501144 ps
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T232 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.3375193475 Jun 06 02:08:38 PM PDT 24 Jun 06 02:08:41 PM PDT 24 4315664367 ps
T428 /workspace/coverage/default/25.sysrst_ctrl_alert_test.3733876770 Jun 06 02:07:54 PM PDT 24 Jun 06 02:07:57 PM PDT 24 2035461917 ps
T429 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1968728681 Jun 06 02:06:19 PM PDT 24 Jun 06 02:06:23 PM PDT 24 2130549370 ps
T320 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2228099945 Jun 06 02:09:22 PM PDT 24 Jun 06 02:10:03 PM PDT 24 67065805020 ps
T430 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.188017665 Jun 06 02:05:43 PM PDT 24 Jun 06 02:05:45 PM PDT 24 2255143327 ps
T431 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1614976399 Jun 06 02:08:14 PM PDT 24 Jun 06 02:08:24 PM PDT 24 8510682719 ps
T290 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2608979465 Jun 06 02:07:58 PM PDT 24 Jun 06 02:08:05 PM PDT 24 5516750660 ps
T242 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.1861454752 Jun 06 02:07:35 PM PDT 24 Jun 06 02:10:10 PM PDT 24 58321827688 ps
T432 /workspace/coverage/default/18.sysrst_ctrl_alert_test.3363126929 Jun 06 02:07:15 PM PDT 24 Jun 06 02:07:22 PM PDT 24 2008385890 ps
T362 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1805402388 Jun 06 02:09:25 PM PDT 24 Jun 06 02:12:39 PM PDT 24 79572879881 ps
T433 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2403827627 Jun 06 02:06:13 PM PDT 24 Jun 06 02:06:19 PM PDT 24 3109382050 ps
T82 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1951275162 Jun 06 02:08:55 PM PDT 24 Jun 06 02:08:58 PM PDT 24 2872551239 ps
T125 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3558524811 Jun 06 02:07:55 PM PDT 24 Jun 06 02:08:06 PM PDT 24 3466015308 ps
T126 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4209856148 Jun 06 02:06:19 PM PDT 24 Jun 06 02:06:29 PM PDT 24 23622319198 ps
T127 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2184145192 Jun 06 02:06:48 PM PDT 24 Jun 06 02:06:53 PM PDT 24 2492088230 ps
T128 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2136490954 Jun 06 02:09:04 PM PDT 24 Jun 06 02:09:09 PM PDT 24 5251384476 ps
T80 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2041480711 Jun 06 02:06:49 PM PDT 24 Jun 06 02:06:54 PM PDT 24 18308019238 ps
T129 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3868138041 Jun 06 02:09:04 PM PDT 24 Jun 06 02:09:12 PM PDT 24 2471527804 ps
T130 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.3662991656 Jun 06 02:08:58 PM PDT 24 Jun 06 02:09:04 PM PDT 24 4773696391 ps
T131 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3344458970 Jun 06 02:06:03 PM PDT 24 Jun 06 02:06:08 PM PDT 24 2475038296 ps
T132 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2516109114 Jun 06 02:06:10 PM PDT 24 Jun 06 02:06:18 PM PDT 24 15626577647 ps
T178 /workspace/coverage/default/12.sysrst_ctrl_smoke.2779242492 Jun 06 02:06:38 PM PDT 24 Jun 06 02:06:41 PM PDT 24 2136518873 ps
T179 /workspace/coverage/default/20.sysrst_ctrl_smoke.3894620906 Jun 06 02:07:16 PM PDT 24 Jun 06 02:07:20 PM PDT 24 2119682250 ps
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