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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.94 99.42 96.81 100.00 98.08 98.89 99.71 92.65


Total test records in report: 910
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T264 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.584004200 Jun 11 12:32:41 PM PDT 24 Jun 11 12:33:36 PM PDT 24 42038217576 ps
T444 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.91314061 Jun 11 12:34:48 PM PDT 24 Jun 11 12:34:54 PM PDT 24 5034076643 ps
T445 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3542137084 Jun 11 12:33:36 PM PDT 24 Jun 11 12:33:40 PM PDT 24 2620201621 ps
T446 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1711577444 Jun 11 12:32:34 PM PDT 24 Jun 11 12:32:37 PM PDT 24 2485521514 ps
T285 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1272556293 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:19 PM PDT 24 2547171330 ps
T447 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.850929322 Jun 11 12:33:50 PM PDT 24 Jun 11 12:34:40 PM PDT 24 17497520374 ps
T448 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4169798504 Jun 11 12:34:12 PM PDT 24 Jun 11 12:34:21 PM PDT 24 2455660671 ps
T449 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.3194759164 Jun 11 12:33:40 PM PDT 24 Jun 11 12:33:48 PM PDT 24 2193526406 ps
T239 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.1416475361 Jun 11 12:34:26 PM PDT 24 Jun 11 12:40:07 PM PDT 24 135882733565 ps
T450 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2451450153 Jun 11 12:33:11 PM PDT 24 Jun 11 12:33:15 PM PDT 24 2632430543 ps
T451 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.257096348 Jun 11 12:34:12 PM PDT 24 Jun 11 12:34:21 PM PDT 24 2611374429 ps
T270 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.624787427 Jun 11 12:33:11 PM PDT 24 Jun 11 12:35:49 PM PDT 24 363583291433 ps
T82 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.1256881305 Jun 11 12:34:49 PM PDT 24 Jun 11 12:36:11 PM PDT 24 31913819198 ps
T452 /workspace/coverage/default/23.sysrst_ctrl_smoke.4180864415 Jun 11 12:33:45 PM PDT 24 Jun 11 12:33:49 PM PDT 24 2129811640 ps
T453 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3130478341 Jun 11 12:34:47 PM PDT 24 Jun 11 12:34:52 PM PDT 24 2537355411 ps
T139 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.3417436861 Jun 11 12:33:36 PM PDT 24 Jun 11 12:33:40 PM PDT 24 2958670830 ps
T240 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.798282579 Jun 11 12:34:47 PM PDT 24 Jun 11 12:35:53 PM PDT 24 105579969747 ps
T454 /workspace/coverage/default/6.sysrst_ctrl_smoke.1722273346 Jun 11 12:32:57 PM PDT 24 Jun 11 12:33:04 PM PDT 24 2112757516 ps
T455 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1020208247 Jun 11 12:33:29 PM PDT 24 Jun 11 12:33:32 PM PDT 24 2108580589 ps
T337 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1646729100 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:44 PM PDT 24 47092262341 ps
T168 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1642871040 Jun 11 12:34:10 PM PDT 24 Jun 11 12:34:20 PM PDT 24 5131135183 ps
T179 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.2925336125 Jun 11 12:33:46 PM PDT 24 Jun 11 12:33:49 PM PDT 24 9925441845 ps
T180 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1820662800 Jun 11 12:33:13 PM PDT 24 Jun 11 12:33:19 PM PDT 24 2618194060 ps
T135 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1506857613 Jun 11 12:33:47 PM PDT 24 Jun 11 12:33:57 PM PDT 24 3629665036 ps
T181 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2721834699 Jun 11 12:35:05 PM PDT 24 Jun 11 12:35:12 PM PDT 24 3609520534 ps
T182 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.794035041 Jun 11 12:34:01 PM PDT 24 Jun 11 12:34:09 PM PDT 24 6727622096 ps
T183 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.4059431515 Jun 11 12:33:14 PM PDT 24 Jun 11 12:33:17 PM PDT 24 2482549298 ps
T184 /workspace/coverage/default/24.sysrst_ctrl_stress_all.1068520859 Jun 11 12:34:06 PM PDT 24 Jun 11 12:34:15 PM PDT 24 6819356884 ps
T185 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3677064436 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:25 PM PDT 24 2613373167 ps
T186 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3112468443 Jun 11 12:33:59 PM PDT 24 Jun 11 12:34:03 PM PDT 24 3686787681 ps
T456 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.4097517810 Jun 11 12:33:22 PM PDT 24 Jun 11 12:33:54 PM PDT 24 43366371674 ps
T457 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2188604187 Jun 11 12:33:59 PM PDT 24 Jun 11 12:34:06 PM PDT 24 2620873854 ps
T344 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3768095243 Jun 11 12:33:46 PM PDT 24 Jun 11 12:34:12 PM PDT 24 34111697360 ps
T458 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2778976814 Jun 11 12:35:04 PM PDT 24 Jun 11 12:35:54 PM PDT 24 23080322868 ps
T169 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.1106756637 Jun 11 12:33:24 PM PDT 24 Jun 11 12:33:30 PM PDT 24 5917763043 ps
T459 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1823308282 Jun 11 12:33:21 PM PDT 24 Jun 11 12:33:24 PM PDT 24 5874256338 ps
T460 /workspace/coverage/default/43.sysrst_ctrl_smoke.524124885 Jun 11 12:34:49 PM PDT 24 Jun 11 12:34:58 PM PDT 24 2109293759 ps
T83 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.2684354904 Jun 11 12:34:54 PM PDT 24 Jun 11 12:36:15 PM PDT 24 131223043758 ps
T461 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1250930311 Jun 11 12:35:16 PM PDT 24 Jun 11 12:36:25 PM PDT 24 25082684629 ps
T462 /workspace/coverage/default/27.sysrst_ctrl_alert_test.58082610 Jun 11 12:34:05 PM PDT 24 Jun 11 12:34:09 PM PDT 24 2041047506 ps
T463 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.997980115 Jun 11 12:32:31 PM PDT 24 Jun 11 12:32:34 PM PDT 24 3016222519 ps
T464 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.545830871 Jun 11 12:34:40 PM PDT 24 Jun 11 12:34:43 PM PDT 24 2502469338 ps
T123 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.2684172976 Jun 11 12:34:30 PM PDT 24 Jun 11 12:34:43 PM PDT 24 4235329706 ps
T465 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.71141996 Jun 11 12:33:38 PM PDT 24 Jun 11 12:33:44 PM PDT 24 2618679470 ps
T466 /workspace/coverage/default/2.sysrst_ctrl_smoke.2701085482 Jun 11 12:32:30 PM PDT 24 Jun 11 12:32:34 PM PDT 24 2133640876 ps
T467 /workspace/coverage/default/47.sysrst_ctrl_smoke.1096660023 Jun 11 12:34:47 PM PDT 24 Jun 11 12:34:52 PM PDT 24 2131764201 ps
T84 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1243478831 Jun 11 12:34:13 PM PDT 24 Jun 11 12:35:55 PM PDT 24 37985515468 ps
T468 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1409421141 Jun 11 12:33:49 PM PDT 24 Jun 11 12:34:00 PM PDT 24 2725006130 ps
T469 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2007765256 Jun 11 12:32:27 PM PDT 24 Jun 11 12:32:36 PM PDT 24 2395665479 ps
T470 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1120103404 Jun 11 12:34:42 PM PDT 24 Jun 11 12:34:45 PM PDT 24 2258294227 ps
T471 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3818599070 Jun 11 12:34:28 PM PDT 24 Jun 11 12:34:37 PM PDT 24 2512415127 ps
T472 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2720483870 Jun 11 12:34:49 PM PDT 24 Jun 11 12:34:56 PM PDT 24 2267319683 ps
T473 /workspace/coverage/default/5.sysrst_ctrl_alert_test.3026288647 Jun 11 12:32:57 PM PDT 24 Jun 11 12:33:02 PM PDT 24 2016785892 ps
T336 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3518769413 Jun 11 12:35:06 PM PDT 24 Jun 11 12:42:00 PM PDT 24 164919888444 ps
T74 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2501751987 Jun 11 12:34:49 PM PDT 24 Jun 11 12:36:06 PM PDT 24 2241796160182 ps
T474 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1188980929 Jun 11 12:34:38 PM PDT 24 Jun 11 12:35:02 PM PDT 24 27102832253 ps
T85 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.4015765625 Jun 11 12:33:11 PM PDT 24 Jun 11 12:34:31 PM PDT 24 31727384795 ps
T475 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3924289170 Jun 11 12:33:36 PM PDT 24 Jun 11 12:33:39 PM PDT 24 2152122118 ps
T347 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.2376225937 Jun 11 12:33:46 PM PDT 24 Jun 11 12:35:22 PM PDT 24 147916467542 ps
T476 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3664278688 Jun 11 12:35:04 PM PDT 24 Jun 11 12:35:13 PM PDT 24 2608598752 ps
T477 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2169655034 Jun 11 12:35:06 PM PDT 24 Jun 11 12:35:13 PM PDT 24 3845419002 ps
T478 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2022188094 Jun 11 12:33:00 PM PDT 24 Jun 11 12:33:07 PM PDT 24 3709200885 ps
T286 /workspace/coverage/default/30.sysrst_ctrl_stress_all.2093384782 Jun 11 12:34:12 PM PDT 24 Jun 11 12:34:19 PM PDT 24 11926824899 ps
T193 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1884156862 Jun 11 12:34:54 PM PDT 24 Jun 11 12:34:58 PM PDT 24 3768027049 ps
T346 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3345955092 Jun 11 12:35:03 PM PDT 24 Jun 11 12:35:46 PM PDT 24 81798092116 ps
T479 /workspace/coverage/default/9.sysrst_ctrl_alert_test.3916844651 Jun 11 12:33:17 PM PDT 24 Jun 11 12:33:20 PM PDT 24 2036052054 ps
T480 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1332768085 Jun 11 12:32:40 PM PDT 24 Jun 11 12:32:48 PM PDT 24 2611783271 ps
T248 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2290384684 Jun 11 12:33:12 PM PDT 24 Jun 11 12:34:43 PM PDT 24 258060768887 ps
T481 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.1028033998 Jun 11 12:32:34 PM PDT 24 Jun 11 12:32:39 PM PDT 24 2616281220 ps
T482 /workspace/coverage/default/0.sysrst_ctrl_alert_test.2231029110 Jun 11 12:32:29 PM PDT 24 Jun 11 12:32:35 PM PDT 24 2016653827 ps
T483 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1971510234 Jun 11 12:35:06 PM PDT 24 Jun 11 12:35:14 PM PDT 24 3876151445 ps
T484 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.2181221706 Jun 11 12:33:33 PM PDT 24 Jun 11 12:33:43 PM PDT 24 3278528129 ps
T485 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2171432397 Jun 11 12:33:11 PM PDT 24 Jun 11 12:33:14 PM PDT 24 2561840674 ps
T486 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.1894509960 Jun 11 12:34:38 PM PDT 24 Jun 11 12:34:42 PM PDT 24 3358310361 ps
T487 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3256763187 Jun 11 12:34:47 PM PDT 24 Jun 11 12:34:57 PM PDT 24 2513051045 ps
T488 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1175884933 Jun 11 12:34:16 PM PDT 24 Jun 11 12:35:04 PM PDT 24 69566927672 ps
T489 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.396628805 Jun 11 12:34:44 PM PDT 24 Jun 11 12:40:52 PM PDT 24 571802844740 ps
T490 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.4184336034 Jun 11 12:33:22 PM PDT 24 Jun 11 12:33:37 PM PDT 24 4725525113 ps
T86 /workspace/coverage/default/11.sysrst_ctrl_stress_all.1747492625 Jun 11 12:33:23 PM PDT 24 Jun 11 12:34:08 PM PDT 24 61232648620 ps
T322 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2728756747 Jun 11 12:32:29 PM PDT 24 Jun 11 12:37:20 PM PDT 24 108256220431 ps
T491 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2544279403 Jun 11 12:34:13 PM PDT 24 Jun 11 12:34:21 PM PDT 24 2486599889 ps
T492 /workspace/coverage/default/45.sysrst_ctrl_stress_all.1914213331 Jun 11 12:34:47 PM PDT 24 Jun 11 12:35:02 PM PDT 24 9413602909 ps
T493 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2404818306 Jun 11 12:34:42 PM PDT 24 Jun 11 12:34:50 PM PDT 24 2514234864 ps
T494 /workspace/coverage/default/41.sysrst_ctrl_alert_test.1208653141 Jun 11 12:34:37 PM PDT 24 Jun 11 12:34:42 PM PDT 24 2021280038 ps
T271 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.3130893221 Jun 11 12:34:25 PM PDT 24 Jun 11 12:35:54 PM PDT 24 460181791811 ps
T495 /workspace/coverage/default/17.sysrst_ctrl_alert_test.2006598052 Jun 11 12:33:37 PM PDT 24 Jun 11 12:33:43 PM PDT 24 2016966438 ps
T241 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2265423475 Jun 11 12:32:58 PM PDT 24 Jun 11 12:33:46 PM PDT 24 66090863128 ps
T292 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3878826390 Jun 11 12:33:24 PM PDT 24 Jun 11 12:35:48 PM PDT 24 218707814442 ps
T496 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2362169228 Jun 11 12:34:38 PM PDT 24 Jun 11 12:34:44 PM PDT 24 2620013216 ps
T341 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2938784284 Jun 11 12:34:51 PM PDT 24 Jun 11 12:35:54 PM PDT 24 87052947923 ps
T219 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2877308464 Jun 11 12:34:31 PM PDT 24 Jun 11 12:35:13 PM PDT 24 91348799311 ps
T497 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.312098417 Jun 11 12:34:51 PM PDT 24 Jun 11 12:34:58 PM PDT 24 2928997395 ps
T293 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.985805388 Jun 11 12:33:36 PM PDT 24 Jun 11 12:33:48 PM PDT 24 3474398478 ps
T498 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3142243364 Jun 11 12:32:41 PM PDT 24 Jun 11 12:32:52 PM PDT 24 3761412414 ps
T499 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3877947305 Jun 11 12:34:38 PM PDT 24 Jun 11 12:34:47 PM PDT 24 2456029646 ps
T71 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1727443957 Jun 11 12:34:20 PM PDT 24 Jun 11 12:34:56 PM PDT 24 55297983505 ps
T109 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.922723311 Jun 11 12:34:13 PM PDT 24 Jun 11 12:35:09 PM PDT 24 43142198381 ps
T110 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1118750632 Jun 11 12:33:46 PM PDT 24 Jun 11 12:33:54 PM PDT 24 11081851510 ps
T111 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2677173441 Jun 11 12:32:29 PM PDT 24 Jun 11 12:32:33 PM PDT 24 3196479961 ps
T112 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3962375319 Jun 11 12:34:32 PM PDT 24 Jun 11 12:34:40 PM PDT 24 2046194197 ps
T113 /workspace/coverage/default/44.sysrst_ctrl_alert_test.764088960 Jun 11 12:34:37 PM PDT 24 Jun 11 12:34:41 PM PDT 24 2038721866 ps
T114 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.1365663719 Jun 11 12:33:16 PM PDT 24 Jun 11 12:40:12 PM PDT 24 158704099888 ps
T115 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.445074037 Jun 11 12:32:28 PM PDT 24 Jun 11 12:32:32 PM PDT 24 2356373185 ps
T116 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3840447890 Jun 11 12:34:16 PM PDT 24 Jun 11 12:34:23 PM PDT 24 2618620628 ps
T117 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.4236037259 Jun 11 12:33:40 PM PDT 24 Jun 11 12:33:52 PM PDT 24 3764282142 ps
T500 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3031837848 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:20 PM PDT 24 2515715651 ps
T501 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1690807796 Jun 11 12:34:12 PM PDT 24 Jun 11 12:34:21 PM PDT 24 2611213979 ps
T348 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.77817457 Jun 11 12:34:30 PM PDT 24 Jun 11 12:36:13 PM PDT 24 40332725253 ps
T502 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2988398559 Jun 11 12:34:41 PM PDT 24 Jun 11 12:34:43 PM PDT 24 4204578227 ps
T503 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2468958057 Jun 11 12:33:21 PM PDT 24 Jun 11 12:33:25 PM PDT 24 3400779745 ps
T87 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.3208445487 Jun 11 12:33:12 PM PDT 24 Jun 11 12:35:30 PM PDT 24 104599368984 ps
T504 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.414096802 Jun 11 12:33:46 PM PDT 24 Jun 11 12:33:56 PM PDT 24 2509638977 ps
T505 /workspace/coverage/default/8.sysrst_ctrl_smoke.1256198882 Jun 11 12:33:11 PM PDT 24 Jun 11 12:33:17 PM PDT 24 2118953124 ps
T506 /workspace/coverage/default/21.sysrst_ctrl_stress_all.3818358478 Jun 11 12:33:47 PM PDT 24 Jun 11 12:43:57 PM PDT 24 243819806474 ps
T317 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.220167862 Jun 11 12:33:47 PM PDT 24 Jun 11 12:36:00 PM PDT 24 145086412441 ps
T278 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1805334224 Jun 11 12:34:40 PM PDT 24 Jun 11 12:35:08 PM PDT 24 88770862646 ps
T507 /workspace/coverage/default/6.sysrst_ctrl_alert_test.3722446782 Jun 11 12:33:10 PM PDT 24 Jun 11 12:33:14 PM PDT 24 2038379086 ps
T235 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.1069149032 Jun 11 12:34:17 PM PDT 24 Jun 11 12:34:42 PM PDT 24 113454965018 ps
T272 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.584149303 Jun 11 12:34:13 PM PDT 24 Jun 11 12:34:18 PM PDT 24 3939923292 ps
T508 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1135524362 Jun 11 12:33:30 PM PDT 24 Jun 11 12:33:33 PM PDT 24 2523560941 ps
T509 /workspace/coverage/default/28.sysrst_ctrl_stress_all.3664624651 Jun 11 12:34:14 PM PDT 24 Jun 11 12:34:21 PM PDT 24 14758182635 ps
T510 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.2665495553 Jun 11 12:34:00 PM PDT 24 Jun 11 12:34:04 PM PDT 24 2634362646 ps
T511 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.1508744923 Jun 11 12:35:04 PM PDT 24 Jun 11 12:41:13 PM PDT 24 129185142987 ps
T512 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2527164614 Jun 11 12:32:28 PM PDT 24 Jun 11 12:32:37 PM PDT 24 2608006049 ps
T338 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1610908550 Jun 11 12:35:04 PM PDT 24 Jun 11 12:36:05 PM PDT 24 89003768189 ps
T513 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.4121885006 Jun 11 12:32:39 PM PDT 24 Jun 11 12:32:43 PM PDT 24 3620559304 ps
T514 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2741214896 Jun 11 12:34:01 PM PDT 24 Jun 11 12:34:06 PM PDT 24 5716563208 ps
T106 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4094339709 Jun 11 12:34:38 PM PDT 24 Jun 11 12:35:12 PM PDT 24 298459831652 ps
T515 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1483395369 Jun 11 12:34:49 PM PDT 24 Jun 11 12:34:56 PM PDT 24 2626656270 ps
T516 /workspace/coverage/default/21.sysrst_ctrl_smoke.1722606040 Jun 11 12:33:50 PM PDT 24 Jun 11 12:33:54 PM PDT 24 2188069570 ps
T517 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1822576173 Jun 11 12:34:54 PM PDT 24 Jun 11 12:34:58 PM PDT 24 2463429434 ps
T518 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3843972046 Jun 11 12:32:57 PM PDT 24 Jun 11 12:33:05 PM PDT 24 2251569960 ps
T519 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2505399010 Jun 11 12:34:50 PM PDT 24 Jun 11 12:37:10 PM PDT 24 99487601548 ps
T520 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3045295031 Jun 11 12:34:48 PM PDT 24 Jun 11 12:34:54 PM PDT 24 2507831724 ps
T521 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3805325923 Jun 11 12:33:38 PM PDT 24 Jun 11 12:33:47 PM PDT 24 2510242147 ps
T522 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.1914176343 Jun 11 12:34:28 PM PDT 24 Jun 11 12:34:33 PM PDT 24 3228500190 ps
T523 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3868861906 Jun 11 12:34:01 PM PDT 24 Jun 11 12:34:11 PM PDT 24 2607063112 ps
T524 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.3884666146 Jun 11 12:34:07 PM PDT 24 Jun 11 12:34:19 PM PDT 24 5000519659 ps
T525 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.281433674 Jun 11 12:34:48 PM PDT 24 Jun 11 12:34:53 PM PDT 24 2534157675 ps
T526 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.532990807 Jun 11 12:34:42 PM PDT 24 Jun 11 12:34:48 PM PDT 24 2619663180 ps
T527 /workspace/coverage/default/43.sysrst_ctrl_alert_test.2780141413 Jun 11 12:34:45 PM PDT 24 Jun 11 12:34:48 PM PDT 24 2036699377 ps
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