Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.94 99.42 96.81 100.00 98.08 98.89 99.71 92.65


Total tests in report: 910
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.68 69.68 87.12 87.12 78.82 78.82 87.44 87.44 42.31 42.31 88.32 88.32 77.26 77.26 26.46 26.46 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1712930556
77.63 7.95 94.03 6.90 88.07 9.25 96.80 9.36 52.56 10.26 93.79 5.47 85.84 8.57 32.32 5.86 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3607567087
83.24 5.61 95.47 1.44 89.51 1.44 97.03 0.23 63.46 10.90 95.05 1.26 89.69 3.85 52.47 20.15 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3848601397
87.54 4.30 97.29 1.83 91.76 2.25 97.03 0.00 83.97 20.51 96.89 1.85 90.94 1.25 54.88 2.41 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2865741082
89.40 1.86 97.98 0.69 92.49 0.73 97.49 0.46 87.82 3.85 97.38 0.48 92.77 1.83 59.87 4.99 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3912524541
90.70 1.29 98.32 0.34 92.87 0.38 97.49 0.00 89.74 1.92 97.67 0.30 93.45 0.67 65.33 5.45 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.4154040993
91.93 1.23 98.40 0.07 94.01 1.14 98.17 0.68 89.74 0.00 97.78 0.11 93.45 0.00 71.93 6.60 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.3369976224
92.79 0.87 98.41 0.02 94.01 0.00 98.17 0.00 89.74 0.00 97.78 0.00 95.09 1.64 76.35 4.42 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2278478964
93.27 0.48 98.49 0.07 94.06 0.05 98.17 0.00 91.03 1.28 97.86 0.07 95.28 0.19 78.01 1.66 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1581812418
93.62 0.35 98.58 0.09 94.16 0.10 98.17 0.00 91.03 0.00 97.86 0.00 95.57 0.29 79.97 1.95 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3560202678
93.96 0.35 98.66 0.07 94.24 0.08 98.17 0.00 91.03 0.00 98.00 0.15 97.40 1.83 80.25 0.29 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1495097128
94.25 0.29 98.66 0.00 94.26 0.03 99.77 1.60 91.03 0.00 98.00 0.00 97.50 0.10 80.54 0.29 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.3693978563
94.53 0.28 98.68 0.02 94.31 0.05 99.77 0.00 91.03 0.00 98.00 0.00 97.69 0.19 82.20 1.66 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1504858486
94.76 0.24 98.75 0.07 94.36 0.05 99.77 0.00 92.31 1.28 98.08 0.07 97.88 0.19 82.20 0.00 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1315333857
95.00 0.24 98.82 0.07 94.41 0.05 99.77 0.00 93.59 1.28 98.15 0.07 98.07 0.19 82.20 0.00 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1897839232
95.22 0.22 98.82 0.00 94.51 0.10 99.77 0.00 93.59 0.00 98.15 0.00 98.75 0.67 82.95 0.75 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.2714105652
95.43 0.21 98.90 0.07 94.57 0.05 99.77 0.00 94.23 0.64 98.26 0.11 98.94 0.19 83.35 0.40 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.221044145
95.63 0.20 98.94 0.04 94.59 0.03 99.77 0.00 94.87 0.64 98.30 0.04 99.04 0.10 83.93 0.57 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1968238135
95.82 0.19 98.99 0.06 94.59 0.00 99.77 0.00 94.87 0.00 98.34 0.04 99.04 0.00 85.13 1.21 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.101312409
95.99 0.17 98.99 0.00 94.59 0.00 99.77 0.00 94.87 0.00 98.34 0.00 99.04 0.00 86.34 1.21 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3099659019
96.13 0.14 98.99 0.00 94.59 0.00 99.77 0.00 94.87 0.00 98.34 0.00 99.04 0.00 87.31 0.98 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.4278252152
96.26 0.13 98.99 0.00 95.53 0.94 99.77 0.00 94.87 0.00 98.34 0.00 99.04 0.00 87.31 0.00 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.2350599865
96.40 0.13 98.99 0.00 95.53 0.00 99.77 0.00 94.87 0.00 98.34 0.00 99.04 0.00 88.23 0.92 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.3160527410
96.52 0.13 99.05 0.06 95.55 0.03 99.77 0.00 95.51 0.64 98.41 0.07 99.13 0.10 88.23 0.00 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1727443957
96.65 0.12 99.09 0.04 95.58 0.03 99.77 0.00 96.15 0.64 98.48 0.07 99.23 0.10 88.23 0.00 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.3623464020
96.77 0.12 99.12 0.04 95.60 0.03 99.77 0.00 96.79 0.64 98.52 0.04 99.33 0.10 88.23 0.00 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3248916838
96.89 0.12 99.16 0.04 95.63 0.03 99.77 0.00 97.44 0.64 98.56 0.04 99.42 0.10 88.23 0.00 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.1720543316
97.01 0.12 99.20 0.04 95.65 0.03 99.77 0.00 98.08 0.64 98.60 0.04 99.52 0.10 88.23 0.00 /workspace/coverage/default/8.sysrst_ctrl_stress_all.2053353526
97.09 0.08 99.22 0.02 95.65 0.00 99.77 0.00 98.08 0.00 98.60 0.00 99.52 0.00 88.81 0.57 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.536582849
97.16 0.07 99.22 0.00 96.06 0.40 99.77 0.00 98.08 0.00 98.60 0.00 99.61 0.10 88.81 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2874014672
97.23 0.07 99.22 0.00 96.06 0.00 99.77 0.00 98.08 0.00 98.60 0.00 99.61 0.00 89.27 0.46 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2938784284
97.29 0.06 99.22 0.00 96.06 0.00 99.77 0.00 98.08 0.00 98.60 0.00 99.61 0.00 89.67 0.40 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.197709080
97.34 0.06 99.22 0.00 96.39 0.33 99.77 0.00 98.08 0.00 98.60 0.00 99.61 0.00 89.72 0.06 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2866162794
97.39 0.05 99.27 0.06 96.46 0.08 100.00 0.23 98.08 0.00 98.60 0.00 99.61 0.00 89.72 0.00 /workspace/coverage/default/1.sysrst_ctrl_alert_test.1517245616
97.44 0.05 99.31 0.04 96.61 0.15 100.00 0.00 98.08 0.00 98.67 0.07 99.71 0.10 89.72 0.00 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3489395590
97.49 0.05 99.31 0.00 96.61 0.00 100.00 0.00 98.08 0.00 98.67 0.00 99.71 0.00 90.07 0.34 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2501751987
97.53 0.04 99.31 0.00 96.61 0.00 100.00 0.00 98.08 0.00 98.67 0.00 99.71 0.00 90.36 0.29 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2948988
97.57 0.03 99.31 0.00 96.61 0.00 100.00 0.00 98.08 0.00 98.67 0.00 99.71 0.00 90.59 0.23 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1542315137
97.60 0.03 99.38 0.07 96.61 0.00 100.00 0.00 98.08 0.00 98.82 0.15 99.71 0.00 90.59 0.00 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2676777690
97.63 0.03 99.38 0.00 96.64 0.03 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 90.76 0.17 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.624301058
97.65 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 90.93 0.17 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1565875649
97.68 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 91.10 0.17 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.199882521
97.70 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 91.27 0.17 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.2684354904
97.72 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 91.45 0.17 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.4079265995
97.74 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 91.56 0.11 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1855877054
97.76 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 91.68 0.11 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2302045900
97.77 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 91.79 0.11 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.859950460
97.79 0.02 99.38 0.00 96.64 0.00 100.00 0.00 98.08 0.00 98.82 0.00 99.71 0.00 91.91 0.11 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3988526186
97.81 0.02 99.42 0.04 96.64 0.00 100.00 0.00 98.08 0.00 98.89 0.07 99.71 0.00 91.91 0.00 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.1506857613
97.82 0.01 99.42 0.00 96.66 0.03 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 91.96 0.06 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1568691503
97.83 0.01 99.42 0.00 96.69 0.03 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.02 0.06 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2616228350
97.84 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.08 0.06 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.1379816108
97.85 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.14 0.06 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.2988787590
97.85 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.19 0.06 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.1365663719
97.86 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.25 0.06 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.3073065299
97.87 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.31 0.06 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.220167862
97.88 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.37 0.06 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.884810577
97.89 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.42 0.06 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3768095243
97.90 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.48 0.06 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1779098772
97.90 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.54 0.06 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3345955092
97.91 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.59 0.06 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.109316056
97.92 0.01 99.42 0.00 96.69 0.00 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.65 0.06 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1397895369
97.93 0.01 99.42 0.00 96.74 0.05 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.65 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1113201984
97.93 0.01 99.42 0.00 96.76 0.03 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.65 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3256504126
97.93 0.01 99.42 0.00 96.79 0.03 100.00 0.00 98.08 0.00 98.89 0.00 99.71 0.00 92.65 0.00 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.70144515

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1046636583
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.534666708
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2806357722
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3783887839
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1412000286
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2710360498
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3284151225
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3383257125
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1986214739
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2376180598
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2596654054
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2268992652
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3777737180
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2515962834
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.233477429
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1538068531
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2989036350
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3398295216
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2961478126
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4102357933
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.403533197
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2256624010
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3716761364
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.335021727
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2077733750
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3981500949
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1969366236
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2551500939
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2751355550
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2595808719
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1155282784
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2841152377
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.169227133
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.359647548
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2337584829
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1689736973
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3811235948
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2389970961
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3973168181
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.604874265
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2092018796
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.4183560398
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3032311799
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1142740980
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4056152340
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.401982965
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3035968557
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1328040341
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2986792299
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2341134928
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2672964217
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3462932549
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.4218793961
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.884209454
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2093021112
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.475972955
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3514894799
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.1924298123
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2811727215
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.132742236
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.859620523
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.4178006057
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2547282256
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3656054425
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.237337625
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.909487546
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.1945023172
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.1861718008
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.2503992514
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.4024211895
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1697348679
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.962265782
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3556317791
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3488816063
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1572423628
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.4075919074
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.1190292369
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.1980746432
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1437186414
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.28565163
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.2886212390
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.3009391944
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.161292960
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1675708204
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.1258115739
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.1796826129
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.2872106105
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/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1328621293
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.637924893
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.483192512
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2441783815
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2923580507
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.868135467
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3795146115
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2063956879
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2404818306
/workspace/coverage/default/42.sysrst_ctrl_smoke.2416503649
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1805334224
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2780141413
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3002042803
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3576465704
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3573931707
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1305527852
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3160743044
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2362169228
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3961335635
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2720483870
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3130478341
/workspace/coverage/default/43.sysrst_ctrl_smoke.524124885
/workspace/coverage/default/43.sysrst_ctrl_stress_all.4156609412
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1107696677
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1350059228
/workspace/coverage/default/44.sysrst_ctrl_alert_test.764088960
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4171452799
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1990358442
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1188980929
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3558659262
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3271603203
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1774242896
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3067308672
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1120103404
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1586317572
/workspace/coverage/default/44.sysrst_ctrl_smoke.2458356043
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2247536287
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4094339709
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2917605735
/workspace/coverage/default/45.sysrst_ctrl_alert_test.4202266396
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1088821827
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1647284465
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3765779838
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.396628805
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1480424595
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.806011039
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2488712180
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1984358757
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3212197216
/workspace/coverage/default/45.sysrst_ctrl_smoke.2473280714
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1914213331
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1721982574
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2988398559
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1873709830
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2505399010
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.798282579
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2649497746
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.91314061
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1884156862
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1483395369
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1822576173
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3811016914
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.281433674
/workspace/coverage/default/46.sysrst_ctrl_smoke.1693480415
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1873295958
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.766770997
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2008899104
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1896042277
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3588207930
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2773269898
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.537252175
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3045295031
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2488206064
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1443032439
/workspace/coverage/default/47.sysrst_ctrl_smoke.1096660023
/workspace/coverage/default/47.sysrst_ctrl_stress_all.2296611727
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.573001359
/workspace/coverage/default/48.sysrst_ctrl_alert_test.583197697
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2672070706
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1996171959
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1995023385
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.312098417
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2464066153
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1481650173
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1404911550
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2476686871
/workspace/coverage/default/48.sysrst_ctrl_smoke.279493582
/workspace/coverage/default/48.sysrst_ctrl_stress_all.849755421
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.5057822
/workspace/coverage/default/49.sysrst_ctrl_alert_test.4245209702
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2721834699
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1508744923
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1202559723
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2169655034
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1392749269
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3664278688
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.834106432
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3077680002
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3096211732
/workspace/coverage/default/49.sysrst_ctrl_smoke.2893963505
/workspace/coverage/default/49.sysrst_ctrl_stress_all.198111323
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1971510234
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3026288647
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.679071723
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2265423475
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3840984382
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3821484031
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3402105807
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.253694003
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2131947569
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3843972046
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1199459357
/workspace/coverage/default/5.sysrst_ctrl_smoke.1227355784
/workspace/coverage/default/5.sysrst_ctrl_stress_all.455896100
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3821748208
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1973682687
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1484401916
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2786331320
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3819183230
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4004468541
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3722446782
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.135274357
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.4256077642
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1876568950
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4224156983
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.513621580
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3987098438
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2428836036
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.642119611
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.963888056
/workspace/coverage/default/6.sysrst_ctrl_smoke.1722273346
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3654855035
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.476313098
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.378310599
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.113587144
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1712460739
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2164118417
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2138259612
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3731170696
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1445304615
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3159209592
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2963735352
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.544077248
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2840584387
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.306803911
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1820662800
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1519186228
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2068590152
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.676023390
/workspace/coverage/default/7.sysrst_ctrl_smoke.3820516549
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1730016430
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.624787427
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3086082767
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.828471748
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3197254767
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1668699847
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.219378144
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.136705825
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4254647074
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2778976814
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1844997766
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3314370647
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3208445487
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.217271573
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.820107823
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2451450153
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1966873034
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1938583822
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.450546246
/workspace/coverage/default/8.sysrst_ctrl_smoke.1256198882
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2290384684
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2044652090
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.200542026
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2020782619
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3518769413
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3338404982
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1610908550
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1212769020
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.263963708
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3916844651
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2187925118
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4015765625
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.842903718
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.636233917
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.91128947
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1604713173
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.4061791701
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3971420649
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2479589458
/workspace/coverage/default/9.sysrst_ctrl_smoke.3915999064
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1397421603
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3949620481
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1285859390
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1465036068
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1347065554
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.308127364
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3441661745
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2821621300
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1250930311
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3285340424
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3930316706



Total test records in report: 910
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1712930556 Jun 11 12:34:03 PM PDT 24 Jun 11 12:36:35 PM PDT 24 109888048409 ps
T2 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.239722915 Jun 11 12:34:28 PM PDT 24 Jun 11 12:35:25 PM PDT 24 45868610723 ps
T4 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2389813040 Jun 11 12:33:22 PM PDT 24 Jun 11 12:33:31 PM PDT 24 2611953954 ps
T12 /workspace/coverage/default/4.sysrst_ctrl_smoke.2971734849 Jun 11 12:32:58 PM PDT 24 Jun 11 12:33:00 PM PDT 24 2174307613 ps
T13 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1604713173 Jun 11 12:33:13 PM PDT 24 Jun 11 12:33:19 PM PDT 24 2616121129 ps
T14 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1853651478 Jun 11 12:34:01 PM PDT 24 Jun 11 12:34:06 PM PDT 24 2275225054 ps
T15 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3560202678 Jun 11 12:33:25 PM PDT 24 Jun 11 12:34:48 PM PDT 24 120136176623 ps
T3 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.2866162794 Jun 11 12:33:22 PM PDT 24 Jun 11 12:35:53 PM PDT 24 804894710003 ps
T16 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.711786792 Jun 11 12:33:15 PM PDT 24 Jun 11 12:33:27 PM PDT 24 3601553988 ps
T17 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1712460739 Jun 11 12:35:05 PM PDT 24 Jun 11 12:36:23 PM PDT 24 54741282421 ps
T26 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.199882521 Jun 11 12:34:02 PM PDT 24 Jun 11 12:34:07 PM PDT 24 3280265763 ps
T35 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3135914406 Jun 11 12:33:22 PM PDT 24 Jun 11 12:33:28 PM PDT 24 3675637692 ps
T46 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1995023385 Jun 11 12:34:49 PM PDT 24 Jun 11 12:46:10 PM PDT 24 518528929839 ps
T5 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.200542026 Jun 11 12:35:02 PM PDT 24 Jun 11 12:38:59 PM PDT 24 95945732844 ps
T36 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1575774473 Jun 11 12:33:48 PM PDT 24 Jun 11 12:35:04 PM PDT 24 74503859415 ps
T37 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4254647074 Jun 11 12:35:06 PM PDT 24 Jun 11 12:35:25 PM PDT 24 27350520044 ps
T91 /workspace/coverage/default/10.sysrst_ctrl_alert_test.1882118336 Jun 11 12:33:13 PM PDT 24 Jun 11 12:33:16 PM PDT 24 2048141502 ps
T38 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.2948219393 Jun 11 12:32:29 PM PDT 24 Jun 11 12:32:38 PM PDT 24 2169500679 ps
T6 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3120140959 Jun 11 12:33:35 PM PDT 24 Jun 11 12:34:30 PM PDT 24 77714739661 ps
T7 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.3520595419 Jun 11 12:34:37 PM PDT 24 Jun 11 12:34:48 PM PDT 24 3589903866 ps
T39 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.308127364 Jun 11 12:35:17 PM PDT 24 Jun 11 12:36:47 PM PDT 24 35583446461 ps
T8 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.91128947 Jun 11 12:33:12 PM PDT 24 Jun 11 12:33:18 PM PDT 24 5552225837 ps
T9 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.3623464020 Jun 11 12:32:42 PM PDT 24 Jun 11 12:32:51 PM PDT 24 2528645779 ps
T40 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2238911632 Jun 11 12:32:42 PM PDT 24 Jun 11 12:32:49 PM PDT 24 3283223104 ps
T10 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3607567087 Jun 11 12:35:05 PM PDT 24 Jun 11 12:37:35 PM PDT 24 110313741170 ps
T11 /workspace/coverage/default/48.sysrst_ctrl_stress_all.849755421 Jun 11 12:34:48 PM PDT 24 Jun 11 12:35:59 PM PDT 24 315156952856 ps
T25 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1519186228 Jun 11 12:33:12 PM PDT 24 Jun 11 12:33:16 PM PDT 24 2471136876 ps
T30 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.624301058 Jun 11 12:35:03 PM PDT 24 Jun 11 12:39:37 PM PDT 24 105376237641 ps
T77 /workspace/coverage/default/15.sysrst_ctrl_smoke.470766419 Jun 11 12:33:22 PM PDT 24 Jun 11 12:33:30 PM PDT 24 2110071283 ps
T41 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.679071723 Jun 11 12:33:00 PM PDT 24 Jun 11 12:33:11 PM PDT 24 3764318792 ps
T62 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2786331320 Jun 11 12:35:05 PM PDT 24 Jun 11 12:36:12 PM PDT 24 25584150347 ps
T42 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3772645402 Jun 11 12:34:28 PM PDT 24 Jun 11 12:34:33 PM PDT 24 3407133912 ps
T24 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3848601397 Jun 11 12:32:30 PM PDT 24 Jun 11 12:33:28 PM PDT 24 76512336996 ps
T63 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.591068663 Jun 11 12:34:27 PM PDT 24 Jun 11 12:34:52 PM PDT 24 34152076611 ps
T101 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1999625240 Jun 11 12:34:16 PM PDT 24 Jun 11 12:34:25 PM PDT 24 2202696377 ps
T102 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2474640191 Jun 11 12:33:51 PM PDT 24 Jun 11 12:33:56 PM PDT 24 2259640932 ps
T45 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1067013108 Jun 11 12:33:35 PM PDT 24 Jun 11 12:34:22 PM PDT 24 73886108654 ps
T103 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2278478964 Jun 11 12:35:07 PM PDT 24 Jun 11 12:35:40 PM PDT 24 46574970489 ps
T31 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3271603203 Jun 11 12:34:45 PM PDT 24 Jun 11 12:34:52 PM PDT 24 5618035229 ps
T104 /workspace/coverage/default/0.sysrst_ctrl_smoke.1224326111 Jun 11 12:32:27 PM PDT 24 Jun 11 12:32:30 PM PDT 24 2128210761 ps
T52 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2429027070 Jun 11 12:34:16 PM PDT 24 Jun 11 12:34:20 PM PDT 24 2498044151 ps
T105 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3648870561 Jun 11 12:34:14 PM PDT 24 Jun 11 12:34:25 PM PDT 24 3503781668 ps
T57 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3577199684 Jun 11 12:34:34 PM PDT 24 Jun 11 12:34:42 PM PDT 24 2614464585 ps
T76 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.258959678 Jun 11 12:32:40 PM PDT 24 Jun 11 12:32:44 PM PDT 24 2220360784 ps
T53 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2749166378 Jun 11 12:33:23 PM PDT 24 Jun 11 12:33:32 PM PDT 24 2462569840 ps
T58 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1721982574 Jun 11 12:34:48 PM PDT 24 Jun 11 12:35:02 PM PDT 24 19983133200 ps
T59 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2476686871 Jun 11 12:34:48 PM PDT 24 Jun 11 12:34:58 PM PDT 24 2512046667 ps
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T92 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3989743723 Jun 11 12:34:28 PM PDT 24 Jun 11 12:34:31 PM PDT 24 2200563275 ps
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T78 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.70144515 Jun 11 12:33:49 PM PDT 24 Jun 11 12:34:55 PM PDT 24 47984649826 ps
T93 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1404911550 Jun 11 12:34:47 PM PDT 24 Jun 11 12:34:51 PM PDT 24 2182799755 ps
T43 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2865741082 Jun 11 12:32:31 PM PDT 24 Jun 11 12:33:13 PM PDT 24 30458012428 ps
T29 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3912524541 Jun 11 12:34:44 PM PDT 24 Jun 11 12:36:14 PM PDT 24 133883235162 ps
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T170 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2330927063 Jun 11 12:32:40 PM PDT 24 Jun 11 12:32:43 PM PDT 24 2132046274 ps
T171 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3588207930 Jun 11 12:34:49 PM PDT 24 Jun 11 12:35:02 PM PDT 24 3583523783 ps
T172 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.3534843973 Jun 11 12:34:29 PM PDT 24 Jun 11 12:34:35 PM PDT 24 2516309348 ps
T47 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1504858486 Jun 11 12:34:51 PM PDT 24 Jun 11 12:35:44 PM PDT 24 132690841497 ps
T230 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1774242896 Jun 11 12:34:42 PM PDT 24 Jun 11 12:34:45 PM PDT 24 2629776523 ps
T48 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2044652090 Jun 11 12:33:11 PM PDT 24 Jun 11 12:34:51 PM PDT 24 427678316784 ps
T54 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2488712180 Jun 11 12:34:40 PM PDT 24 Jun 11 12:34:48 PM PDT 24 2463775055 ps
T32 /workspace/coverage/default/8.sysrst_ctrl_stress_all.2053353526 Jun 11 12:33:13 PM PDT 24 Jun 11 12:33:22 PM PDT 24 12595747467 ps
T55 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3358687559 Jun 11 12:33:48 PM PDT 24 Jun 11 12:33:58 PM PDT 24 2469692724 ps
T202 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1305527852 Jun 11 12:34:34 PM PDT 24 Jun 11 12:34:38 PM PDT 24 2694105000 ps
T203 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.2426219007 Jun 11 12:33:37 PM PDT 24 Jun 11 12:33:49 PM PDT 24 3599861804 ps
T75 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1284552948 Jun 11 12:34:26 PM PDT 24 Jun 11 12:35:27 PM PDT 24 22334687316 ps
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T204 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2441783815 Jun 11 12:34:35 PM PDT 24 Jun 11 12:34:39 PM PDT 24 3385255035 ps
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T206 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1876568950 Jun 11 12:33:11 PM PDT 24 Jun 11 12:33:24 PM PDT 24 55314286274 ps
T207 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2288430587 Jun 11 12:33:12 PM PDT 24 Jun 11 12:33:22 PM PDT 24 3971454509 ps
T220 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.2470927910 Jun 11 12:33:37 PM PDT 24 Jun 11 12:34:24 PM PDT 24 37278200523 ps
T95 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2662864509 Jun 11 12:32:44 PM PDT 24 Jun 11 12:32:48 PM PDT 24 2553298856 ps
T49 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1772570381 Jun 11 12:33:36 PM PDT 24 Jun 11 12:33:41 PM PDT 24 12064394823 ps
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T140 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.505315677 Jun 11 12:34:00 PM PDT 24 Jun 11 12:34:04 PM PDT 24 3072268712 ps
T266 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1088163354 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:20 PM PDT 24 3097053629 ps
T56 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.893686576 Jun 11 12:33:37 PM PDT 24 Jun 11 12:33:43 PM PDT 24 2476047268 ps
T155 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.1392749269 Jun 11 12:35:06 PM PDT 24 Jun 11 12:35:09 PM PDT 24 3378537005 ps
T255 /workspace/coverage/default/4.sysrst_ctrl_alert_test.3916416810 Jun 11 12:33:00 PM PDT 24 Jun 11 12:33:03 PM PDT 24 2024353815 ps
T361 /workspace/coverage/default/13.sysrst_ctrl_smoke.2272629334 Jun 11 12:33:23 PM PDT 24 Jun 11 12:33:28 PM PDT 24 2122838281 ps
T50 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3184993548 Jun 11 12:33:48 PM PDT 24 Jun 11 12:34:18 PM PDT 24 45147526169 ps
T256 /workspace/coverage/default/42.sysrst_ctrl_alert_test.1043014581 Jun 11 12:34:42 PM PDT 24 Jun 11 12:34:45 PM PDT 24 2056601925 ps
T51 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3099659019 Jun 11 12:34:36 PM PDT 24 Jun 11 12:36:19 PM PDT 24 483767095211 ps
T360 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.538251759 Jun 11 12:33:50 PM PDT 24 Jun 11 12:33:54 PM PDT 24 2565657051 ps
T287 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1488812142 Jun 11 12:34:50 PM PDT 24 Jun 11 12:35:00 PM PDT 24 3956404777 ps
T221 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3573931707 Jun 11 12:34:35 PM PDT 24 Jun 11 12:35:34 PM PDT 24 24084833926 ps
T68 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.374895147 Jun 11 12:33:45 PM PDT 24 Jun 11 12:37:12 PM PDT 24 310848878401 ps
T134 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.229184466 Jun 11 12:32:43 PM PDT 24 Jun 11 12:32:47 PM PDT 24 5047299216 ps
T96 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.101312409 Jun 11 12:35:05 PM PDT 24 Jun 11 12:38:10 PM PDT 24 97798621676 ps
T273 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.176330552 Jun 11 12:34:40 PM PDT 24 Jun 11 12:34:45 PM PDT 24 2853521747 ps
T267 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1896042277 Jun 11 12:34:50 PM PDT 24 Jun 11 12:34:56 PM PDT 24 3411324959 ps
T222 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2020782619 Jun 11 12:35:04 PM PDT 24 Jun 11 12:35:23 PM PDT 24 84178666761 ps
T274 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1966873034 Jun 11 12:33:11 PM PDT 24 Jun 11 12:33:19 PM PDT 24 2468501062 ps
T275 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1797837184 Jun 11 12:34:18 PM PDT 24 Jun 11 12:34:25 PM PDT 24 3463533981 ps
T276 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1686039395 Jun 11 12:34:13 PM PDT 24 Jun 11 12:34:17 PM PDT 24 2224900447 ps
T190 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.4154040993 Jun 11 12:33:16 PM PDT 24 Jun 11 12:33:50 PM PDT 24 121333243532 ps
T281 /workspace/coverage/default/22.sysrst_ctrl_stress_all.3793858627 Jun 11 12:33:46 PM PDT 24 Jun 11 12:34:14 PM PDT 24 9022034905 ps
T362 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.834106432 Jun 11 12:34:49 PM PDT 24 Jun 11 12:34:54 PM PDT 24 2481662052 ps
T363 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2945102545 Jun 11 12:34:31 PM PDT 24 Jun 11 12:34:39 PM PDT 24 3957089495 ps
T364 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2444208391 Jun 11 12:32:34 PM PDT 24 Jun 11 12:32:41 PM PDT 24 2033808998 ps
T64 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1495097128 Jun 11 12:34:03 PM PDT 24 Jun 11 12:35:06 PM PDT 24 100340724933 ps
T365 /workspace/coverage/default/36.sysrst_ctrl_alert_test.1885943984 Jun 11 12:34:26 PM PDT 24 Jun 11 12:34:30 PM PDT 24 2044413109 ps
T65 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3086082767 Jun 11 12:33:10 PM PDT 24 Jun 11 12:39:54 PM PDT 24 2724170083469 ps
T66 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2481969786 Jun 11 12:34:00 PM PDT 24 Jun 11 12:36:09 PM PDT 24 100988846969 ps
T279 /workspace/coverage/default/19.sysrst_ctrl_stress_all.2438929759 Jun 11 12:33:38 PM PDT 24 Jun 11 12:33:47 PM PDT 24 6153085955 ps
T366 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.999278431 Jun 11 12:33:49 PM PDT 24 Jun 11 12:33:56 PM PDT 24 2475857918 ps
T367 /workspace/coverage/default/35.sysrst_ctrl_smoke.1718069072 Jun 11 12:34:26 PM PDT 24 Jun 11 12:34:31 PM PDT 24 2115812006 ps
T368 /workspace/coverage/default/1.sysrst_ctrl_alert_test.1517245616 Jun 11 12:32:27 PM PDT 24 Jun 11 12:32:30 PM PDT 24 2029847836 ps
T369 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2815512756 Jun 11 12:34:01 PM PDT 24 Jun 11 12:34:11 PM PDT 24 2095719605 ps
T282 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3067308672 Jun 11 12:34:45 PM PDT 24 Jun 11 12:34:49 PM PDT 24 2480900580 ps
T370 /workspace/coverage/default/40.sysrst_ctrl_alert_test.659499264 Jun 11 12:34:44 PM PDT 24 Jun 11 12:34:49 PM PDT 24 2015524134 ps
T371 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1574718835 Jun 11 12:33:15 PM PDT 24 Jun 11 12:33:22 PM PDT 24 2038328348 ps
T312 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1427123484 Jun 11 12:33:37 PM PDT 24 Jun 11 12:38:16 PM PDT 24 100964973948 ps
T372 /workspace/coverage/default/3.sysrst_ctrl_smoke.1604027401 Jun 11 12:32:42 PM PDT 24 Jun 11 12:32:46 PM PDT 24 2113097438 ps
T373 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3869312260 Jun 11 12:32:57 PM PDT 24 Jun 11 12:33:00 PM PDT 24 2480925206 ps
T225 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.1990358442 Jun 11 12:34:42 PM PDT 24 Jun 11 12:35:45 PM PDT 24 106304098336 ps
T374 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1678311737 Jun 11 12:33:23 PM PDT 24 Jun 11 12:33:29 PM PDT 24 3242992076 ps
T375 /workspace/coverage/default/32.sysrst_ctrl_smoke.385560248 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:22 PM PDT 24 2112527195 ps
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T223 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3731170696 Jun 11 12:35:04 PM PDT 24 Jun 11 12:38:46 PM PDT 24 80857877778 ps
T377 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1276456675 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:22 PM PDT 24 2120765244 ps
T288 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.5057822 Jun 11 12:34:46 PM PDT 24 Jun 11 12:34:50 PM PDT 24 2498565823 ps
T378 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2904265772 Jun 11 12:33:46 PM PDT 24 Jun 11 12:33:54 PM PDT 24 2010516321 ps
T379 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.146592222 Jun 11 12:34:27 PM PDT 24 Jun 11 12:34:33 PM PDT 24 5451411460 ps
T380 /workspace/coverage/default/39.sysrst_ctrl_smoke.714120757 Jun 11 12:34:27 PM PDT 24 Jun 11 12:34:34 PM PDT 24 2112614614 ps
T381 /workspace/coverage/default/16.sysrst_ctrl_smoke.234327635 Jun 11 12:33:22 PM PDT 24 Jun 11 12:33:31 PM PDT 24 2110580655 ps
T382 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.4061791701 Jun 11 12:33:13 PM PDT 24 Jun 11 12:33:18 PM PDT 24 2463117833 ps
T97 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1301032207 Jun 11 12:33:01 PM PDT 24 Jun 11 12:34:02 PM PDT 24 1540550855628 ps
T383 /workspace/coverage/default/43.sysrst_ctrl_stress_all.4156609412 Jun 11 12:34:38 PM PDT 24 Jun 11 12:34:57 PM PDT 24 6716581820 ps
T268 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2850244907 Jun 11 12:34:38 PM PDT 24 Jun 11 12:34:51 PM PDT 24 3761659613 ps
T283 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.238436433 Jun 11 12:33:46 PM PDT 24 Jun 11 12:33:50 PM PDT 24 2530351390 ps
T150 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3560363246 Jun 11 12:33:14 PM PDT 24 Jun 11 12:33:21 PM PDT 24 3524498518 ps
T98 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.502467364 Jun 11 12:34:03 PM PDT 24 Jun 11 12:34:58 PM PDT 24 45891910730 ps
T384 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2560958607 Jun 11 12:34:15 PM PDT 24 Jun 11 12:34:20 PM PDT 24 2627337495 ps
T385 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3722821989 Jun 11 12:33:37 PM PDT 24 Jun 11 12:33:46 PM PDT 24 2510492959 ps
T386 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2131947569 Jun 11 12:33:01 PM PDT 24 Jun 11 12:33:06 PM PDT 24 2446200824 ps
T387 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4224156983 Jun 11 12:32:59 PM PDT 24 Jun 11 12:40:44 PM PDT 24 1556685436669 ps
T79 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.4278252152 Jun 11 12:33:35 PM PDT 24 Jun 11 12:34:43 PM PDT 24 111872337417 ps
T269 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.4127730144 Jun 11 12:33:25 PM PDT 24 Jun 11 12:33:32 PM PDT 24 3453513390 ps
T388 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1008060695 Jun 11 12:34:03 PM PDT 24 Jun 11 12:34:09 PM PDT 24 3874548687 ps
T389 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1217602047 Jun 11 12:33:47 PM PDT 24 Jun 11 12:33:52 PM PDT 24 2692125211 ps
T390 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2187925118 Jun 11 12:33:13 PM PDT 24 Jun 11 12:33:24 PM PDT 24 3548595109 ps
T391 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.539698225 Jun 11 12:33:40 PM PDT 24 Jun 11 12:33:43 PM PDT 24 2683358653 ps
T392 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1253041418 Jun 11 12:34:37 PM PDT 24 Jun 11 12:34:45 PM PDT 24 7791914917 ps
T166 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.2773269898 Jun 11 12:34:48 PM PDT 24 Jun 11 12:34:52 PM PDT 24 3355448239 ps
T393 /workspace/coverage/default/49.sysrst_ctrl_stress_all.198111323 Jun 11 12:35:03 PM PDT 24 Jun 11 12:35:09 PM PDT 24 7040678111 ps
T394 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.431073983 Jun 11 12:32:28 PM PDT 24 Jun 11 12:32:33 PM PDT 24 5382219312 ps
T277 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2561458205 Jun 11 12:34:02 PM PDT 24 Jun 11 12:40:15 PM PDT 24 148613042635 ps
T232 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.828471748 Jun 11 12:35:05 PM PDT 24 Jun 11 12:37:27 PM PDT 24 55796292599 ps
T395 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.299813480 Jun 11 12:33:35 PM PDT 24 Jun 11 12:33:44 PM PDT 24 3735221318 ps
T396 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.893082153 Jun 11 12:34:01 PM PDT 24 Jun 11 12:34:11 PM PDT 24 2454686107 ps
T397 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1552416886 Jun 11 12:34:37 PM PDT 24 Jun 11 12:34:41 PM PDT 24 3393218006 ps
T138 /workspace/coverage/default/4.sysrst_ctrl_stress_all.352142836 Jun 11 12:32:58 PM PDT 24 Jun 11 12:33:10 PM PDT 24 9326152496 ps
T398 /workspace/coverage/default/24.sysrst_ctrl_smoke.3904276483 Jun 11 12:33:47 PM PDT 24 Jun 11 12:33:53 PM PDT 24 2118130800 ps
T315 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.113587144 Jun 11 12:35:08 PM PDT 24 Jun 11 12:35:56 PM PDT 24 37400096357 ps
T399 /workspace/coverage/default/0.sysrst_ctrl_stress_all.2559588236 Jun 11 12:32:30 PM PDT 24 Jun 11 12:32:34 PM PDT 24 8731835689 ps
T400 /workspace/coverage/default/38.sysrst_ctrl_alert_test.422629187 Jun 11 12:34:31 PM PDT 24 Jun 11 12:34:34 PM PDT 24 2032115733 ps
T401 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3762912650 Jun 11 12:33:49 PM PDT 24 Jun 11 12:34:01 PM PDT 24 3604755290 ps
T402 /workspace/coverage/default/42.sysrst_ctrl_smoke.2416503649 Jun 11 12:34:37 PM PDT 24 Jun 11 12:34:45 PM PDT 24 2109802612 ps
T403 /workspace/coverage/default/22.sysrst_ctrl_smoke.973101169 Jun 11 12:33:45 PM PDT 24 Jun 11 12:33:50 PM PDT 24 2117623078 ps
T99 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.4033746395 Jun 11 12:33:23 PM PDT 24 Jun 11 12:33:33 PM PDT 24 25367803838 ps
T323 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1855877054 Jun 11 12:34:17 PM PDT 24 Jun 11 12:35:20 PM PDT 24 97215728294 ps
T314 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2302045900 Jun 11 12:34:16 PM PDT 24 Jun 11 12:41:03 PM PDT 24 150148473967 ps
T404 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1493069761 Jun 11 12:32:26 PM PDT 24 Jun 11 12:32:29 PM PDT 24 2335484317 ps
T405 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.1263780245 Jun 11 12:34:03 PM PDT 24 Jun 11 12:34:13 PM PDT 24 2613926947 ps
T406 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1420168677 Jun 11 12:32:27 PM PDT 24 Jun 11 12:32:35 PM PDT 24 2477099550 ps
T407 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3020233565 Jun 11 12:33:50 PM PDT 24 Jun 11 12:33:57 PM PDT 24 2523562058 ps
T408 /workspace/coverage/default/20.sysrst_ctrl_alert_test.502256629 Jun 11 12:33:45 PM PDT 24 Jun 11 12:33:50 PM PDT 24 2024817326 ps
T313 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.3160527410 Jun 11 12:34:51 PM PDT 24 Jun 11 12:42:29 PM PDT 24 186586951393 ps
T409 /workspace/coverage/default/6.sysrst_ctrl_stress_all.3654855035 Jun 11 12:33:10 PM PDT 24 Jun 11 12:33:32 PM PDT 24 7004151177 ps
T334 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.536582849 Jun 11 12:35:03 PM PDT 24 Jun 11 12:36:26 PM PDT 24 129758546984 ps
T410 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.4025706479 Jun 11 12:34:07 PM PDT 24 Jun 11 12:34:13 PM PDT 24 2460062190 ps
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T151 /workspace/coverage/default/46.sysrst_ctrl_stress_all.1873295958 Jun 11 12:34:50 PM PDT 24 Jun 11 12:34:59 PM PDT 24 10676071591 ps
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T159 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2081351732 Jun 11 12:32:39 PM PDT 24 Jun 11 12:32:44 PM PDT 24 2618440920 ps
T160 /workspace/coverage/default/40.sysrst_ctrl_smoke.1201215961 Jun 11 12:34:47 PM PDT 24 Jun 11 12:34:52 PM PDT 24 2132221281 ps
T161 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.2726603560 Jun 11 12:33:38 PM PDT 24 Jun 11 12:35:11 PM PDT 24 148361983846 ps
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T163 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.636233917 Jun 11 12:33:15 PM PDT 24 Jun 11 12:33:20 PM PDT 24 5393972904 ps
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T200 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1797917078 Jun 11 12:34:32 PM PDT 24 Jun 11 12:34:35 PM PDT 24 3243047936 ps
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T432 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1984358757 Jun 11 12:34:41 PM PDT 24 Jun 11 12:34:48 PM PDT 24 2171209181 ps
T433 /workspace/coverage/default/34.sysrst_ctrl_smoke.172331478 Jun 11 12:34:26 PM PDT 24 Jun 11 12:34:30 PM PDT 24 2132902396 ps
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T435 /workspace/coverage/default/46.sysrst_ctrl_smoke.1693480415 Jun 11 12:34:49 PM PDT 24 Jun 11 12:34:59 PM PDT 24 2109882877 ps
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T436 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1202559723 Jun 11 12:35:02 PM PDT 24 Jun 11 12:37:18 PM PDT 24 51548132039 ps
T437 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2253300505 Jun 11 12:33:12 PM PDT 24 Jun 11 12:33:21 PM PDT 24 2458334202 ps
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T438 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3114077351 Jun 11 12:33:36 PM PDT 24 Jun 11 12:33:42 PM PDT 24 2616787983 ps
T233 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2940083586 Jun 11 12:34:18 PM PDT 24 Jun 11 12:34:25 PM PDT 24 21647928928 ps
T439 /workspace/coverage/default/32.sysrst_ctrl_stress_all.3787450976 Jun 11 12:34:20 PM PDT 24 Jun 11 12:34:50 PM PDT 24 12714084817 ps
T440 /workspace/coverage/default/5.sysrst_ctrl_smoke.1227355784 Jun 11 12:33:00 PM PDT 24 Jun 11 12:33:08 PM PDT 24 2112749960 ps
T441 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.4171753306 Jun 11 12:34:30 PM PDT 24 Jun 11 12:34:33 PM PDT 24 2087993304 ps
T442 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1337492081 Jun 11 12:32:59 PM PDT 24 Jun 11 12:33:10 PM PDT 24 3564601844 ps
T443 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2456976482 Jun 11 12:33:37 PM PDT 24 Jun 11 12:33:43 PM PDT 24 2056270913 ps
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