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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.83 99.31 96.68 100.00 96.79 98.74 99.42 93.87


Total test records in report: 908
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T611 /workspace/coverage/default/4.sysrst_ctrl_stress_all.3001984305 Jun 25 05:10:17 PM PDT 24 Jun 25 05:10:54 PM PDT 24 15204659107 ps
T612 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1811509596 Jun 25 05:10:58 PM PDT 24 Jun 25 05:11:44 PM PDT 24 175721977441 ps
T613 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3608938815 Jun 25 05:10:47 PM PDT 24 Jun 25 05:11:02 PM PDT 24 4463376797 ps
T279 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2266021561 Jun 25 05:11:59 PM PDT 24 Jun 25 05:12:30 PM PDT 24 72067294375 ps
T222 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.1717577830 Jun 25 05:11:11 PM PDT 24 Jun 25 05:11:17 PM PDT 24 5843056675 ps
T614 /workspace/coverage/default/12.sysrst_ctrl_alert_test.532727734 Jun 25 05:10:39 PM PDT 24 Jun 25 05:10:46 PM PDT 24 2012255844 ps
T102 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.3514221897 Jun 25 05:11:57 PM PDT 24 Jun 25 05:13:50 PM PDT 24 93594055860 ps
T615 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1048095049 Jun 25 05:11:38 PM PDT 24 Jun 25 05:11:40 PM PDT 24 2688497666 ps
T616 /workspace/coverage/default/18.sysrst_ctrl_alert_test.135724523 Jun 25 05:10:52 PM PDT 24 Jun 25 05:10:56 PM PDT 24 2019215793 ps
T617 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3077754772 Jun 25 05:12:10 PM PDT 24 Jun 25 05:12:19 PM PDT 24 2610781987 ps
T378 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.474467322 Jun 25 05:10:29 PM PDT 24 Jun 25 05:16:08 PM PDT 24 138283276058 ps
T389 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.4083985745 Jun 25 05:10:55 PM PDT 24 Jun 25 05:15:52 PM PDT 24 120946004963 ps
T618 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3979575587 Jun 25 05:10:59 PM PDT 24 Jun 25 05:11:08 PM PDT 24 2967491273 ps
T619 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.279695255 Jun 25 05:12:13 PM PDT 24 Jun 25 05:12:25 PM PDT 24 3753676569 ps
T620 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.414629688 Jun 25 05:12:09 PM PDT 24 Jun 25 05:12:47 PM PDT 24 28586507583 ps
T621 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2743217532 Jun 25 05:11:44 PM PDT 24 Jun 25 05:11:53 PM PDT 24 2612184390 ps
T622 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.756293323 Jun 25 05:11:29 PM PDT 24 Jun 25 05:11:34 PM PDT 24 2453497216 ps
T347 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.1683124750 Jun 25 05:11:41 PM PDT 24 Jun 25 05:13:34 PM PDT 24 86652788485 ps
T623 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.651961846 Jun 25 05:10:56 PM PDT 24 Jun 25 05:11:03 PM PDT 24 3804944383 ps
T624 /workspace/coverage/default/43.sysrst_ctrl_smoke.171238634 Jun 25 05:11:58 PM PDT 24 Jun 25 05:12:02 PM PDT 24 2124356427 ps
T625 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.432877115 Jun 25 05:10:47 PM PDT 24 Jun 25 05:10:52 PM PDT 24 3369328544 ps
T626 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.949664453 Jun 25 05:11:55 PM PDT 24 Jun 25 05:11:58 PM PDT 24 3505817439 ps
T627 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.4290977036 Jun 25 05:11:43 PM PDT 24 Jun 25 05:11:51 PM PDT 24 2054420563 ps
T628 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1740792214 Jun 25 05:12:12 PM PDT 24 Jun 25 05:12:24 PM PDT 24 3512156157 ps
T629 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.2487265873 Jun 25 05:11:00 PM PDT 24 Jun 25 05:12:41 PM PDT 24 157739714001 ps
T103 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1941238095 Jun 25 05:10:39 PM PDT 24 Jun 25 05:12:33 PM PDT 24 158204229425 ps
T630 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3879970386 Jun 25 05:12:23 PM PDT 24 Jun 25 05:13:31 PM PDT 24 26579855702 ps
T631 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3880836631 Jun 25 05:11:29 PM PDT 24 Jun 25 05:11:35 PM PDT 24 2521203909 ps
T632 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3987676072 Jun 25 05:12:09 PM PDT 24 Jun 25 05:12:18 PM PDT 24 2448725184 ps
T319 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.83857079 Jun 25 05:09:56 PM PDT 24 Jun 25 05:10:16 PM PDT 24 371224716377 ps
T633 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3544250037 Jun 25 05:11:10 PM PDT 24 Jun 25 05:11:13 PM PDT 24 2532656939 ps
T634 /workspace/coverage/default/13.sysrst_ctrl_alert_test.2956632514 Jun 25 05:10:37 PM PDT 24 Jun 25 05:10:44 PM PDT 24 2010343607 ps
T126 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.4186600561 Jun 25 05:11:43 PM PDT 24 Jun 25 05:11:47 PM PDT 24 3134651467 ps
T635 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.3354259512 Jun 25 05:11:11 PM PDT 24 Jun 25 05:11:15 PM PDT 24 2629909588 ps
T191 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.1216538950 Jun 25 05:12:09 PM PDT 24 Jun 25 05:12:14 PM PDT 24 2791414333 ps
T193 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.239277101 Jun 25 05:10:21 PM PDT 24 Jun 25 05:10:27 PM PDT 24 2476718363 ps
T194 /workspace/coverage/default/43.sysrst_ctrl_alert_test.4196884650 Jun 25 05:11:59 PM PDT 24 Jun 25 05:12:08 PM PDT 24 2011914588 ps
T195 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2277004342 Jun 25 05:10:36 PM PDT 24 Jun 25 05:10:39 PM PDT 24 9269865749 ps
T196 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1150659726 Jun 25 05:10:26 PM PDT 24 Jun 25 05:10:30 PM PDT 24 2908254782 ps
T197 /workspace/coverage/default/28.sysrst_ctrl_stress_all.209611330 Jun 25 05:11:11 PM PDT 24 Jun 25 05:17:52 PM PDT 24 162801019861 ps
T198 /workspace/coverage/default/1.sysrst_ctrl_stress_all.913586548 Jun 25 05:10:13 PM PDT 24 Jun 25 05:10:17 PM PDT 24 11146110541 ps
T199 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.3554495134 Jun 25 05:12:03 PM PDT 24 Jun 25 05:14:07 PM PDT 24 51772701072 ps
T200 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.2330676667 Jun 25 05:11:10 PM PDT 24 Jun 25 05:12:05 PM PDT 24 77026973185 ps
T201 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.345352134 Jun 25 05:11:13 PM PDT 24 Jun 25 05:11:43 PM PDT 24 580623956042 ps
T636 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.3444901932 Jun 25 05:11:12 PM PDT 24 Jun 25 05:11:22 PM PDT 24 2612466175 ps
T637 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1691898935 Jun 25 05:11:58 PM PDT 24 Jun 25 05:12:10 PM PDT 24 3682944791 ps
T638 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.51358101 Jun 25 05:10:19 PM PDT 24 Jun 25 05:10:24 PM PDT 24 2620642904 ps
T639 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3138269706 Jun 25 05:10:37 PM PDT 24 Jun 25 05:10:43 PM PDT 24 2564395109 ps
T172 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.551975027 Jun 25 05:10:27 PM PDT 24 Jun 25 05:14:04 PM PDT 24 333750738114 ps
T104 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.642925324 Jun 25 05:10:20 PM PDT 24 Jun 25 05:12:30 PM PDT 24 647102817952 ps
T231 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.430294954 Jun 25 05:11:20 PM PDT 24 Jun 25 05:11:23 PM PDT 24 2632836227 ps
T232 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3410557820 Jun 25 05:10:43 PM PDT 24 Jun 25 05:10:47 PM PDT 24 2525787576 ps
T233 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1700959725 Jun 25 05:11:10 PM PDT 24 Jun 25 05:14:24 PM PDT 24 77610270247 ps
T234 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2394719455 Jun 25 05:10:44 PM PDT 24 Jun 25 05:10:49 PM PDT 24 3166277020 ps
T235 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.66429459 Jun 25 05:10:30 PM PDT 24 Jun 25 05:10:41 PM PDT 24 2447704278 ps
T236 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.208817490 Jun 25 05:11:29 PM PDT 24 Jun 25 05:11:32 PM PDT 24 2040467895 ps
T237 /workspace/coverage/default/21.sysrst_ctrl_stress_all.3701722538 Jun 25 05:10:58 PM PDT 24 Jun 25 05:15:57 PM PDT 24 114182497271 ps
T238 /workspace/coverage/default/14.sysrst_ctrl_alert_test.462414278 Jun 25 05:10:36 PM PDT 24 Jun 25 05:10:41 PM PDT 24 2018455363 ps
T640 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.315972168 Jun 25 05:10:30 PM PDT 24 Jun 25 05:10:35 PM PDT 24 2625058302 ps
T641 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1475242069 Jun 25 05:12:11 PM PDT 24 Jun 25 05:12:19 PM PDT 24 2165483855 ps
T642 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3337116514 Jun 25 05:11:38 PM PDT 24 Jun 25 05:11:41 PM PDT 24 3790568700 ps
T643 /workspace/coverage/default/49.sysrst_ctrl_smoke.2302621985 Jun 25 05:12:13 PM PDT 24 Jun 25 05:12:17 PM PDT 24 2121967029 ps
T644 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1775098793 Jun 25 05:10:43 PM PDT 24 Jun 25 05:10:46 PM PDT 24 2259525347 ps
T645 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.399193719 Jun 25 05:11:58 PM PDT 24 Jun 25 05:12:02 PM PDT 24 2625925440 ps
T646 /workspace/coverage/default/29.sysrst_ctrl_stress_all.1985740537 Jun 25 05:11:22 PM PDT 24 Jun 25 05:11:32 PM PDT 24 11153835216 ps
T267 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.653338874 Jun 25 05:11:40 PM PDT 24 Jun 25 05:12:48 PM PDT 24 95075635730 ps
T647 /workspace/coverage/default/33.sysrst_ctrl_smoke.2670382610 Jun 25 05:11:20 PM PDT 24 Jun 25 05:11:28 PM PDT 24 2114522669 ps
T648 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.4252216678 Jun 25 05:12:13 PM PDT 24 Jun 25 05:12:55 PM PDT 24 58410301279 ps
T649 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1231964452 Jun 25 05:09:59 PM PDT 24 Jun 25 05:10:06 PM PDT 24 9691555124 ps
T650 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2460275846 Jun 25 05:11:56 PM PDT 24 Jun 25 05:12:00 PM PDT 24 2497965050 ps
T651 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4209925903 Jun 25 05:11:58 PM PDT 24 Jun 25 05:12:07 PM PDT 24 2449059819 ps
T652 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1727952045 Jun 25 05:10:08 PM PDT 24 Jun 25 05:10:13 PM PDT 24 2688930801 ps
T653 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.445918942 Jun 25 05:11:11 PM PDT 24 Jun 25 05:11:20 PM PDT 24 2766704556 ps
T654 /workspace/coverage/default/42.sysrst_ctrl_smoke.1466993275 Jun 25 05:11:58 PM PDT 24 Jun 25 05:12:03 PM PDT 24 2117271721 ps
T655 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2921196335 Jun 25 05:11:34 PM PDT 24 Jun 25 05:11:41 PM PDT 24 2514474430 ps
T656 /workspace/coverage/default/47.sysrst_ctrl_smoke.1394160682 Jun 25 05:12:02 PM PDT 24 Jun 25 05:12:08 PM PDT 24 2116656840 ps
T657 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1735585471 Jun 25 05:12:13 PM PDT 24 Jun 25 05:12:19 PM PDT 24 4559716692 ps
T143 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1228718807 Jun 25 05:11:39 PM PDT 24 Jun 25 05:12:29 PM PDT 24 81509624620 ps
T373 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3671154124 Jun 25 05:12:22 PM PDT 24 Jun 25 05:13:34 PM PDT 24 99687345281 ps
T658 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3727750089 Jun 25 05:12:15 PM PDT 24 Jun 25 05:12:41 PM PDT 24 33653503380 ps
T659 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3828676436 Jun 25 05:11:38 PM PDT 24 Jun 25 05:12:21 PM PDT 24 65293522822 ps
T660 /workspace/coverage/default/43.sysrst_ctrl_stress_all.3149384075 Jun 25 05:11:58 PM PDT 24 Jun 25 05:12:16 PM PDT 24 6372445446 ps
T661 /workspace/coverage/default/21.sysrst_ctrl_smoke.3973531770 Jun 25 05:10:49 PM PDT 24 Jun 25 05:10:52 PM PDT 24 2123119602 ps
T662 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4043934711 Jun 25 05:12:10 PM PDT 24 Jun 25 05:12:16 PM PDT 24 2617436591 ps
T663 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.727212088 Jun 25 05:10:37 PM PDT 24 Jun 25 05:10:46 PM PDT 24 2466629747 ps
T664 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1793560021 Jun 25 05:10:37 PM PDT 24 Jun 25 05:10:44 PM PDT 24 2510912597 ps
T665 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.1759451186 Jun 25 05:10:35 PM PDT 24 Jun 25 05:10:40 PM PDT 24 2245004201 ps
T666 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3029628574 Jun 25 05:09:56 PM PDT 24 Jun 25 05:10:08 PM PDT 24 6525838157 ps
T667 /workspace/coverage/default/5.sysrst_ctrl_alert_test.2775899462 Jun 25 05:10:18 PM PDT 24 Jun 25 05:10:22 PM PDT 24 2039690748 ps
T668 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.257879301 Jun 25 05:10:15 PM PDT 24 Jun 25 05:10:26 PM PDT 24 3027305604 ps
T669 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.298837939 Jun 25 05:11:10 PM PDT 24 Jun 25 05:11:13 PM PDT 24 3434551301 ps
T192 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3347357926 Jun 25 05:11:41 PM PDT 24 Jun 25 05:13:44 PM PDT 24 94656547805 ps
T670 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2107321521 Jun 25 05:10:20 PM PDT 24 Jun 25 05:10:25 PM PDT 24 2629164290 ps
T671 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1721833238 Jun 25 05:11:15 PM PDT 24 Jun 25 05:11:21 PM PDT 24 2520656124 ps
T268 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3982337641 Jun 25 05:12:01 PM PDT 24 Jun 25 05:12:35 PM PDT 24 47716201438 ps
T672 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1098558171 Jun 25 05:10:48 PM PDT 24 Jun 25 05:11:55 PM PDT 24 25332915199 ps
T673 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.518806385 Jun 25 05:10:50 PM PDT 24 Jun 25 05:10:57 PM PDT 24 3615484911 ps
T674 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.120161025 Jun 25 05:10:43 PM PDT 24 Jun 25 05:10:46 PM PDT 24 2624843458 ps
T675 /workspace/coverage/default/36.sysrst_ctrl_alert_test.3222701648 Jun 25 05:11:37 PM PDT 24 Jun 25 05:11:42 PM PDT 24 2023068662 ps
T676 /workspace/coverage/default/24.sysrst_ctrl_smoke.2762244205 Jun 25 05:10:59 PM PDT 24 Jun 25 05:11:03 PM PDT 24 2117235023 ps
T677 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2731595076 Jun 25 05:11:32 PM PDT 24 Jun 25 05:11:39 PM PDT 24 2012447509 ps
T678 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3285105239 Jun 25 05:10:19 PM PDT 24 Jun 25 05:10:24 PM PDT 24 2810056048 ps
T679 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2566947649 Jun 25 05:10:29 PM PDT 24 Jun 25 05:11:33 PM PDT 24 94846972694 ps
T680 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3860347874 Jun 25 05:11:32 PM PDT 24 Jun 25 05:11:37 PM PDT 24 2484944751 ps
T681 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2042582618 Jun 25 05:10:55 PM PDT 24 Jun 25 05:10:59 PM PDT 24 2689757346 ps
T682 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1201671545 Jun 25 05:12:10 PM PDT 24 Jun 25 05:13:34 PM PDT 24 32841192569 ps
T683 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2619104064 Jun 25 05:11:21 PM PDT 24 Jun 25 05:11:30 PM PDT 24 2475434723 ps
T684 /workspace/coverage/default/23.sysrst_ctrl_stress_all.2380536712 Jun 25 05:11:11 PM PDT 24 Jun 25 05:11:21 PM PDT 24 6651021491 ps
T685 /workspace/coverage/default/44.sysrst_ctrl_stress_all.2848883617 Jun 25 05:11:59 PM PDT 24 Jun 25 05:12:24 PM PDT 24 11176807861 ps
T686 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.92111536 Jun 25 05:10:25 PM PDT 24 Jun 25 05:10:33 PM PDT 24 2457642067 ps
T687 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1921460075 Jun 25 05:12:10 PM PDT 24 Jun 25 05:12:15 PM PDT 24 2461368090 ps
T368 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1323998977 Jun 25 05:10:36 PM PDT 24 Jun 25 05:10:56 PM PDT 24 90895920243 ps
T688 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3857204292 Jun 25 05:11:01 PM PDT 24 Jun 25 05:11:05 PM PDT 24 2031483665 ps
T105 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.120620482 Jun 25 05:10:27 PM PDT 24 Jun 25 05:11:28 PM PDT 24 83610512765 ps
T689 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1782663611 Jun 25 05:11:39 PM PDT 24 Jun 25 05:11:48 PM PDT 24 2611151079 ps
T690 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1269369551 Jun 25 05:10:15 PM PDT 24 Jun 25 05:10:20 PM PDT 24 3754333316 ps
T691 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.70741271 Jun 25 05:11:20 PM PDT 24 Jun 25 05:11:24 PM PDT 24 2203572040 ps
T692 /workspace/coverage/default/9.sysrst_ctrl_alert_test.144023496 Jun 25 05:10:29 PM PDT 24 Jun 25 05:10:34 PM PDT 24 2037720624 ps
T693 /workspace/coverage/default/3.sysrst_ctrl_smoke.307010202 Jun 25 05:10:07 PM PDT 24 Jun 25 05:10:15 PM PDT 24 2113168165 ps
T359 /workspace/coverage/default/16.sysrst_ctrl_stress_all.4255936938 Jun 25 05:10:45 PM PDT 24 Jun 25 05:11:34 PM PDT 24 95079306748 ps
T694 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.977637672 Jun 25 05:11:01 PM PDT 24 Jun 25 05:11:05 PM PDT 24 2539635445 ps
T695 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1331930783 Jun 25 05:11:39 PM PDT 24 Jun 25 05:11:43 PM PDT 24 2243039548 ps
T696 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1343063824 Jun 25 05:10:06 PM PDT 24 Jun 25 05:10:15 PM PDT 24 2521113154 ps
T697 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2157718956 Jun 25 05:12:00 PM PDT 24 Jun 25 05:12:47 PM PDT 24 34373913419 ps
T121 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3998877967 Jun 25 05:11:39 PM PDT 24 Jun 25 05:11:43 PM PDT 24 5874083517 ps
T698 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.2178243875 Jun 25 05:11:14 PM PDT 24 Jun 25 05:11:17 PM PDT 24 2528234870 ps
T699 /workspace/coverage/default/38.sysrst_ctrl_alert_test.947686048 Jun 25 05:11:40 PM PDT 24 Jun 25 05:11:43 PM PDT 24 2050892255 ps
T700 /workspace/coverage/default/25.sysrst_ctrl_alert_test.1477784264 Jun 25 05:11:15 PM PDT 24 Jun 25 05:11:20 PM PDT 24 2019103618 ps
T701 /workspace/coverage/default/22.sysrst_ctrl_smoke.3837244271 Jun 25 05:10:58 PM PDT 24 Jun 25 05:11:03 PM PDT 24 2109938919 ps
T702 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.268531597 Jun 25 05:11:56 PM PDT 24 Jun 25 05:12:06 PM PDT 24 2613671821 ps
T703 /workspace/coverage/default/2.sysrst_ctrl_alert_test.1974137750 Jun 25 05:10:07 PM PDT 24 Jun 25 05:10:10 PM PDT 24 2058316267 ps
T704 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3329378749 Jun 25 05:10:29 PM PDT 24 Jun 25 05:10:35 PM PDT 24 2452042668 ps
T705 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1898895460 Jun 25 05:10:12 PM PDT 24 Jun 25 05:11:27 PM PDT 24 29581713045 ps
T706 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.2882263707 Jun 25 05:10:09 PM PDT 24 Jun 25 05:14:07 PM PDT 24 94802491728 ps
T707 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2938384010 Jun 25 05:10:09 PM PDT 24 Jun 25 05:10:16 PM PDT 24 2515898300 ps
T708 /workspace/coverage/default/21.sysrst_ctrl_alert_test.3453893714 Jun 25 05:10:54 PM PDT 24 Jun 25 05:11:01 PM PDT 24 2017432165 ps
T709 /workspace/coverage/default/31.sysrst_ctrl_smoke.1233959720 Jun 25 05:11:19 PM PDT 24 Jun 25 05:11:25 PM PDT 24 2108280116 ps
T379 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3870290100 Jun 25 05:10:53 PM PDT 24 Jun 25 05:11:32 PM PDT 24 106830705319 ps
T710 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.871871863 Jun 25 05:11:39 PM PDT 24 Jun 25 05:11:48 PM PDT 24 2462419225 ps
T711 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.2969910152 Jun 25 05:10:46 PM PDT 24 Jun 25 05:10:56 PM PDT 24 2771148608 ps
T712 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3333499429 Jun 25 05:11:21 PM PDT 24 Jun 25 05:11:26 PM PDT 24 2631069888 ps
T391 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.464455358 Jun 25 05:12:09 PM PDT 24 Jun 25 05:14:33 PM PDT 24 54127657224 ps
T713 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.471999741 Jun 25 05:11:30 PM PDT 24 Jun 25 05:11:37 PM PDT 24 2478021225 ps
T714 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3857332409 Jun 25 05:11:12 PM PDT 24 Jun 25 05:11:18 PM PDT 24 3754369174 ps
T715 /workspace/coverage/default/30.sysrst_ctrl_smoke.2051971098 Jun 25 05:11:20 PM PDT 24 Jun 25 05:11:25 PM PDT 24 2113204072 ps
T371 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1692409560 Jun 25 05:12:21 PM PDT 24 Jun 25 05:13:55 PM PDT 24 69252136630 ps
T716 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3184825885 Jun 25 05:12:10 PM PDT 24 Jun 25 05:13:33 PM PDT 24 133558965921 ps
T717 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.643212541 Jun 25 05:11:40 PM PDT 24 Jun 25 05:11:44 PM PDT 24 4530293309 ps
T718 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.2113223293 Jun 25 05:10:47 PM PDT 24 Jun 25 05:10:51 PM PDT 24 9976868885 ps
T719 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2208933746 Jun 25 05:10:45 PM PDT 24 Jun 25 05:10:51 PM PDT 24 2150216236 ps
T720 /workspace/coverage/default/30.sysrst_ctrl_alert_test.3178946 Jun 25 05:11:26 PM PDT 24 Jun 25 05:11:29 PM PDT 24 2038708631 ps
T721 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3371070933 Jun 25 05:12:01 PM PDT 24 Jun 25 05:12:05 PM PDT 24 2461132165 ps
T186 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3003300016 Jun 25 05:10:51 PM PDT 24 Jun 25 05:34:39 PM PDT 24 1516647055060 ps
T271 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.1405107552 Jun 25 05:10:20 PM PDT 24 Jun 25 05:11:31 PM PDT 24 56728854440 ps
T122 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2230031440 Jun 25 05:11:59 PM PDT 24 Jun 25 05:12:06 PM PDT 24 6861508933 ps
T722 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3873999877 Jun 25 05:12:15 PM PDT 24 Jun 25 05:12:23 PM PDT 24 4329774165 ps
T723 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1911199087 Jun 25 05:10:19 PM PDT 24 Jun 25 05:10:32 PM PDT 24 15170446028 ps
T106 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.2972560736 Jun 25 05:12:14 PM PDT 24 Jun 25 05:12:47 PM PDT 24 47631267225 ps
T724 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.383920820 Jun 25 05:12:21 PM PDT 24 Jun 25 05:12:46 PM PDT 24 33643276712 ps
T211 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.2701511768 Jun 25 05:10:08 PM PDT 24 Jun 25 05:10:12 PM PDT 24 5163592701 ps
T213 /workspace/coverage/default/46.sysrst_ctrl_stress_all.2517863174 Jun 25 05:12:01 PM PDT 24 Jun 25 05:13:41 PM PDT 24 141249867134 ps
T214 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3975680545 Jun 25 05:12:03 PM PDT 24 Jun 25 05:12:08 PM PDT 24 2629632508 ps
T215 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3384497080 Jun 25 05:12:21 PM PDT 24 Jun 25 05:13:37 PM PDT 24 27581336616 ps
T216 /workspace/coverage/default/28.sysrst_ctrl_smoke.786850857 Jun 25 05:11:10 PM PDT 24 Jun 25 05:11:17 PM PDT 24 2113354497 ps
T217 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.883929614 Jun 25 05:10:09 PM PDT 24 Jun 25 05:10:13 PM PDT 24 10044027295 ps
T218 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2344101961 Jun 25 05:11:12 PM PDT 24 Jun 25 05:11:26 PM PDT 24 4503640228 ps
T219 /workspace/coverage/default/32.sysrst_ctrl_alert_test.704812056 Jun 25 05:11:18 PM PDT 24 Jun 25 05:11:20 PM PDT 24 2084068949 ps
T220 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1074663942 Jun 25 05:12:01 PM PDT 24 Jun 25 05:12:10 PM PDT 24 2464418795 ps
T221 /workspace/coverage/default/46.sysrst_ctrl_alert_test.1221380960 Jun 25 05:12:01 PM PDT 24 Jun 25 05:12:06 PM PDT 24 2035354396 ps
T725 /workspace/coverage/default/47.sysrst_ctrl_stress_all.902025508 Jun 25 05:12:11 PM PDT 24 Jun 25 05:12:16 PM PDT 24 12959127103 ps
T726 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1121089699 Jun 25 05:10:27 PM PDT 24 Jun 25 05:12:26 PM PDT 24 90108061345 ps
T727 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2736921671 Jun 25 05:12:02 PM PDT 24 Jun 25 05:12:07 PM PDT 24 2630448384 ps
T728 /workspace/coverage/default/2.sysrst_ctrl_smoke.1400177293 Jun 25 05:10:07 PM PDT 24 Jun 25 05:10:12 PM PDT 24 2118116778 ps
T729 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.915903986 Jun 25 05:10:36 PM PDT 24 Jun 25 05:10:45 PM PDT 24 2511441099 ps
T730 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.2432802984 Jun 25 05:10:26 PM PDT 24 Jun 25 05:10:31 PM PDT 24 4189855475 ps
T212 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.444575678 Jun 25 05:12:10 PM PDT 24 Jun 25 05:12:53 PM PDT 24 66021939729 ps
T731 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2077453503 Jun 25 05:09:57 PM PDT 24 Jun 25 05:10:07 PM PDT 24 4054276609 ps
T732 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2166191205 Jun 25 05:11:20 PM PDT 24 Jun 25 05:11:25 PM PDT 24 3782332471 ps
T733 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2188699627 Jun 25 05:11:43 PM PDT 24 Jun 25 05:11:47 PM PDT 24 9139736043 ps
T734 /workspace/coverage/default/13.sysrst_ctrl_stress_all.3410716791 Jun 25 05:10:38 PM PDT 24 Jun 25 05:11:00 PM PDT 24 16444197346 ps
T320 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.376790423 Jun 25 05:11:39 PM PDT 24 Jun 25 05:12:26 PM PDT 24 17721241421 ps
T735 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3027245450 Jun 25 05:11:11 PM PDT 24 Jun 25 05:11:20 PM PDT 24 2477028429 ps
T736 /workspace/coverage/default/41.sysrst_ctrl_smoke.4137860571 Jun 25 05:11:59 PM PDT 24 Jun 25 05:12:08 PM PDT 24 2110289467 ps
T123 /workspace/coverage/default/31.sysrst_ctrl_stress_all.1680108599 Jun 25 05:11:21 PM PDT 24 Jun 25 05:11:40 PM PDT 24 14705367395 ps
T737 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3170660837 Jun 25 05:10:13 PM PDT 24 Jun 25 05:10:21 PM PDT 24 2512194283 ps
T738 /workspace/coverage/default/15.sysrst_ctrl_smoke.3281996784 Jun 25 05:10:36 PM PDT 24 Jun 25 05:10:39 PM PDT 24 2128764940 ps
T739 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3198450813 Jun 25 05:10:15 PM PDT 24 Jun 25 05:11:38 PM PDT 24 32648335144 ps
T358 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.2938367433 Jun 25 05:10:29 PM PDT 24 Jun 25 05:11:14 PM PDT 24 64444232380 ps
T740 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3069867606 Jun 25 05:11:40 PM PDT 24 Jun 25 05:11:48 PM PDT 24 2012307186 ps
T741 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1463527463 Jun 25 05:10:58 PM PDT 24 Jun 25 05:11:02 PM PDT 24 3197490663 ps
T742 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.377362987 Jun 25 05:11:11 PM PDT 24 Jun 25 05:11:15 PM PDT 24 2076934787 ps
T743 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.110914179 Jun 25 05:10:52 PM PDT 24 Jun 25 05:10:57 PM PDT 24 2194533143 ps
T744 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.1016006324 Jun 25 05:10:30 PM PDT 24 Jun 25 05:10:36 PM PDT 24 4733419634 ps
T745 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3360658651 Jun 25 05:10:37 PM PDT 24 Jun 25 05:10:46 PM PDT 24 2612093449 ps
T746 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2056718150 Jun 25 05:10:43 PM PDT 24 Jun 25 05:10:49 PM PDT 24 2461220868 ps
T747 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.34193241 Jun 25 05:11:33 PM PDT 24 Jun 25 05:11:36 PM PDT 24 4076571753 ps
T80 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1166631951 Jun 25 05:09:57 PM PDT 24 Jun 25 05:10:07 PM PDT 24 31724594492 ps
T748 /workspace/coverage/default/48.sysrst_ctrl_smoke.878144048 Jun 25 05:12:15 PM PDT 24 Jun 25 05:12:18 PM PDT 24 2133070817 ps
T749 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2252792276 Jun 25 05:12:22 PM PDT 24 Jun 25 05:12:42 PM PDT 24 23853044201 ps
T181 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.710917914 Jun 25 05:11:09 PM PDT 24 Jun 25 05:11:48 PM PDT 24 316505940141 ps
T750 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3601893331 Jun 25 05:10:10 PM PDT 24 Jun 25 05:10:14 PM PDT 24 2589579366 ps
T751 /workspace/coverage/default/38.sysrst_ctrl_stress_all.2524739741 Jun 25 05:11:44 PM PDT 24 Jun 25 05:12:16 PM PDT 24 11636939260 ps
T752 /workspace/coverage/default/36.sysrst_ctrl_stress_all.1673061350 Jun 25 05:11:42 PM PDT 24 Jun 25 05:11:55 PM PDT 24 7577572956 ps
T753 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.2519907434 Jun 25 05:10:52 PM PDT 24 Jun 25 05:10:54 PM PDT 24 2512645876 ps
T754 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2602285378 Jun 25 05:11:31 PM PDT 24 Jun 25 05:11:37 PM PDT 24 4748930409 ps
T755 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3550559209 Jun 25 05:09:57 PM PDT 24 Jun 25 05:10:04 PM PDT 24 3670845444 ps
T128 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1713044007 Jun 25 05:10:49 PM PDT 24 Jun 25 05:10:52 PM PDT 24 9893263606 ps
T756 /workspace/coverage/default/49.sysrst_ctrl_stress_all.562258004 Jun 25 05:12:14 PM PDT 24 Jun 25 05:12:50 PM PDT 24 12764246591 ps
T757 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1027100596 Jun 25 05:12:00 PM PDT 24 Jun 25 05:12:05 PM PDT 24 2898086442 ps
T758 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2452836258 Jun 25 05:11:39 PM PDT 24 Jun 25 05:18:46 PM PDT 24 322549274498 ps
T759 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2873701574 Jun 25 05:10:30 PM PDT 24 Jun 25 05:10:40 PM PDT 24 2511553953 ps
T760 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.173509695 Jun 25 05:11:20 PM PDT 24 Jun 25 05:11:53 PM PDT 24 56818281559 ps
T361 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2624314231 Jun 25 05:12:22 PM PDT 24 Jun 25 05:13:37 PM PDT 24 134214333673 ps
T761 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2553355666 Jun 25 05:11:11 PM PDT 24 Jun 25 05:11:17 PM PDT 24 12131378169 ps
T762 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2012734910 Jun 25 05:10:45 PM PDT 24 Jun 25 05:10:51 PM PDT 24 2619088332 ps
T763 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.2984930390 Jun 25 05:10:44 PM PDT 24 Jun 25 05:13:07 PM PDT 24 211868552905 ps
T764 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2371865642 Jun 25 05:10:53 PM PDT 24 Jun 25 05:10:57 PM PDT 24 3519230369 ps
T765 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.2274847919 Jun 25 05:10:44 PM PDT 24 Jun 25 05:10:53 PM PDT 24 4791370289 ps
T766 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.337154287 Jun 25 05:10:30 PM PDT 24 Jun 25 05:10:39 PM PDT 24 2513147452 ps
T272 /workspace/coverage/default/24.sysrst_ctrl_stress_all.2177353769 Jun 25 05:11:01 PM PDT 24 Jun 25 05:13:56 PM PDT 24 67260570300 ps
T767 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.3432882261 Jun 25 05:10:30 PM PDT 24 Jun 25 05:10:35 PM PDT 24 2627241431 ps
T768 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3767825088 Jun 25 05:10:54 PM PDT 24 Jun 25 05:10:59 PM PDT 24 2615553961 ps
T769 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2458966921 Jun 25 05:12:02 PM PDT 24 Jun 25 05:12:12 PM PDT 24 2513961358 ps
T770 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4096038027 Jun 25 05:10:24 PM PDT 24 Jun 25 05:10:31 PM PDT 24 3671478081 ps
T289 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.358605604 Jun 25 05:11:21 PM PDT 24 Jun 25 05:12:43 PM PDT 24 63377152946 ps
T771 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3879738903 Jun 25 05:11:20 PM PDT 24 Jun 25 05:11:26 PM PDT 24 2513566463 ps
T390 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3153805988 Jun 25 05:10:09 PM PDT 24 Jun 25 05:14:27 PM PDT 24 128510768813 ps
T772 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.997669312 Jun 25 05:11:00 PM PDT 24 Jun 25 05:12:47 PM PDT 24 41812764860 ps
T321 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2214813803 Jun 25 05:10:28 PM PDT 24 Jun 25 05:11:52 PM PDT 24 35593754291 ps
T773 /workspace/coverage/default/35.sysrst_ctrl_smoke.3847840198 Jun 25 05:11:33 PM PDT 24 Jun 25 05:11:36 PM PDT 24 2126249109 ps
T774 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.1384123026 Jun 25 05:10:15 PM PDT 24 Jun 25 05:16:48 PM PDT 24 151862455229 ps
T775 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2529493255 Jun 25 05:10:26 PM PDT 24 Jun 25 05:10:32 PM PDT 24 3090944794 ps
T776 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.4021237940 Jun 25 05:10:51 PM PDT 24 Jun 25 05:10:59 PM PDT 24 2215366157 ps
T777 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2554363319 Jun 25 05:11:41 PM PDT 24 Jun 25 05:11:53 PM PDT 24 3696839261 ps
T778 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2360872256 Jun 25 05:11:40 PM PDT 24 Jun 25 05:11:54 PM PDT 24 4144491040 ps
T779 /workspace/coverage/default/28.sysrst_ctrl_alert_test.3335535873 Jun 25 05:11:08 PM PDT 24 Jun 25 05:11:12 PM PDT 24 2021733045 ps
T230 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.4131027574 Jun 25 05:10:09 PM PDT 24 Jun 25 05:11:46 PM PDT 24 44245429724 ps
T780 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2187182758 Jun 25 05:11:02 PM PDT 24 Jun 25 05:11:10 PM PDT 24 2610859771 ps
T781 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.1351046552 Jun 25 05:11:25 PM PDT 24 Jun 25 05:11:27 PM PDT 24 2619134780 ps
T782 /workspace/coverage/default/8.sysrst_ctrl_stress_all.4025191350 Jun 25 05:10:25 PM PDT 24 Jun 25 05:10:52 PM PDT 24 9643365709 ps
T783 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.672511881 Jun 25 05:10:10 PM PDT 24 Jun 25 05:10:16 PM PDT 24 5721917624 ps
T784 /workspace/coverage/default/46.sysrst_ctrl_smoke.137858356 Jun 25 05:12:01 PM PDT 24 Jun 25 05:12:10 PM PDT 24 2109960659 ps
T785 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.235426093 Jun 25 05:11:30 PM PDT 24 Jun 25 05:12:11 PM PDT 24 29043194171 ps
T786 /workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.1643355074 Jun 25 04:55:43 PM PDT 24 Jun 25 04:55:46 PM PDT 24 2033636908 ps
T787 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1144465822 Jun 25 04:55:33 PM PDT 24 Jun 25 04:55:39 PM PDT 24 2015916423 ps
T31 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2479907155 Jun 25 04:55:34 PM PDT 24 Jun 25 04:55:37 PM PDT 24 2255250569 ps
T788 /workspace/coverage/cover_reg_top/40.sysrst_ctrl_intr_test.1316026464 Jun 25 04:55:45 PM PDT 24 Jun 25 04:55:47 PM PDT 24 2054679588 ps
T32 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.428360134 Jun 25 04:55:07 PM PDT 24 Jun 25 04:55:16 PM PDT 24 2683093476 ps
T33 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1188774925 Jun 25 04:55:09 PM PDT 24 Jun 25 05:01:22 PM PDT 24 76755687716 ps
T789 /workspace/coverage/cover_reg_top/42.sysrst_ctrl_intr_test.373244814 Jun 25 04:55:41 PM PDT 24 Jun 25 04:55:47 PM PDT 24 2012781071 ps
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