Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.83	99.31	96.68	100.00	96.79	98.74	99.42	93.87

Total tests in report: 908

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
52.65	52.65	76.41	76.41	62.71	62.71	61.87	61.87	14.74	14.74	77.15	77.15	67.44	67.44	8.21	8.21	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2643171197
65.52	12.87	87.65	11.23	77.98	15.27	65.75	3.88	34.62	19.87	87.80	10.65	79.09	11.66	25.73	17.53	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.915892657
72.30	6.78	90.88	3.23	83.90	5.92	87.10	21.35	34.62	0.00	91.05	3.25	82.66	3.56	35.92	10.18	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1978754561
76.98	4.68	92.76	1.88	86.17	2.28	90.98	3.88	46.79	12.18	92.90	1.85	86.90	4.24	42.35	6.43	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.853813327
80.88	3.90	94.92	2.16	88.20	2.02	90.98	0.00	62.18	15.38	94.86	1.96	92.68	5.78	42.35	0.00	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.390956339
83.19	2.30	95.58	0.65	88.95	0.76	95.09	4.11	66.67	4.49	95.27	0.41	93.93	1.25	46.81	4.46	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4124520757
85.42	2.24	96.62	1.04	90.98	2.02	95.09	0.00	78.21	11.54	96.34	1.07	93.93	0.00	46.81	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3221994763
87.61	2.18	96.62	0.00	91.00	0.03	95.09	0.00	78.21	0.00	96.34	0.00	93.93	0.00	62.06	15.25	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.358605604
89.22	1.61	97.37	0.75	91.81	0.81	97.49	2.40	83.33	5.13	96.86	0.52	95.47	1.54	62.21	0.15	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1262040406
90.44	1.22	97.41	0.04	93.02	1.21	98.17	0.68	83.33	0.00	96.97	0.11	95.47	0.00	68.69	6.48	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2546020140
91.49	1.05	97.85	0.45	93.10	0.08	98.17	0.00	89.74	6.41	97.41	0.44	95.47	0.00	68.69	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1166631951
92.46	0.97	98.32	0.47	93.71	0.61	98.17	0.00	92.95	3.21	97.86	0.44	96.44	0.96	69.81	1.11	/workspace/coverage/default/19.sysrst_ctrl_stress_all.1635225049
93.13	0.67	98.43	0.11	94.24	0.53	98.17	0.00	92.95	0.00	97.93	0.07	96.63	0.19	73.56	3.75	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1301839436
93.60	0.47	98.51	0.07	94.41	0.18	98.17	0.00	92.95	0.00	97.93	0.00	96.63	0.00	76.60	3.04	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3987943189
94.06	0.46	98.51	0.00	94.41	0.00	98.17	0.00	92.95	0.00	97.93	0.00	96.63	0.00	79.84	3.24	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.345352134
94.46	0.39	98.54	0.04	94.44	0.03	98.17	0.00	93.59	0.64	97.97	0.04	96.72	0.10	81.76	1.93	/workspace/coverage/default/33.sysrst_ctrl_stress_all.324977757
94.83	0.37	98.64	0.09	94.49	0.05	98.17	0.00	94.87	1.28	98.04	0.07	96.92	0.19	82.67	0.91	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.704027129
95.11	0.28	98.86	0.22	94.69	0.20	98.17	0.00	95.51	0.64	98.23	0.18	97.30	0.39	82.98	0.30	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.561483564
95.38	0.27	98.86	0.00	94.74	0.05	98.17	0.00	95.51	0.00	98.23	0.00	97.59	0.29	84.55	1.57	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1533688812
95.62	0.24	98.92	0.06	94.82	0.08	99.54	1.37	95.51	0.00	98.23	0.00	97.59	0.00	84.70	0.15	/workspace/coverage/default/19.sysrst_ctrl_alert_test.4078379168
95.83	0.21	98.92	0.00	94.94	0.13	99.54	0.00	95.51	0.00	98.23	0.00	97.59	0.00	86.07	1.37	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2809555442
96.01	0.18	98.92	0.00	94.97	0.03	99.54	0.00	95.51	0.00	98.23	0.00	97.69	0.10	87.23	1.17	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.922199956
96.18	0.16	98.92	0.00	95.75	0.78	99.54	0.00	95.51	0.00	98.23	0.00	97.69	0.00	87.59	0.35	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_tl_errors.4083992664
96.33	0.16	98.97	0.06	95.78	0.03	99.54	0.00	96.15	0.64	98.26	0.04	97.78	0.10	87.84	0.25	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2938212958
96.47	0.14	99.01	0.04	95.88	0.10	99.54	0.00	96.15	0.00	98.26	0.00	98.46	0.67	87.99	0.15	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3443528491
96.59	0.12	99.03	0.02	95.93	0.05	99.54	0.00	96.15	0.00	98.30	0.04	98.65	0.19	88.55	0.56	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.551975027
96.71	0.12	99.07	0.04	95.96	0.03	99.54	0.00	96.79	0.64	98.34	0.04	98.75	0.10	88.55	0.00	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.2701511768
96.81	0.10	99.09	0.02	95.98	0.03	99.54	0.00	96.79	0.00	98.37	0.04	98.84	0.10	89.06	0.51	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.3347357926
96.91	0.10	99.09	0.00	96.01	0.03	100.00	0.46	96.79	0.00	98.37	0.00	98.94	0.10	89.16	0.10	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.938317363
96.99	0.08	99.09	0.00	96.11	0.10	100.00	0.00	96.79	0.00	98.41	0.04	98.94	0.00	89.56	0.41	/workspace/coverage/default/7.sysrst_ctrl_stress_all.512592137
97.04	0.06	99.09	0.00	96.11	0.00	100.00	0.00	96.79	0.00	98.41	0.00	98.94	0.00	89.97	0.41	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.532210485
97.10	0.05	99.10	0.02	96.11	0.00	100.00	0.00	96.79	0.00	98.41	0.00	98.94	0.00	90.32	0.35	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.4126982772
97.15	0.05	99.14	0.04	96.26	0.15	100.00	0.00	96.79	0.00	98.48	0.07	99.04	0.10	90.32	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3462726967
97.20	0.05	99.14	0.00	96.26	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.04	0.00	90.68	0.35	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.3177891419
97.25	0.05	99.16	0.02	96.33	0.08	100.00	0.00	96.79	0.00	98.48	0.00	99.04	0.00	90.93	0.25	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2132186251
97.29	0.04	99.16	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.04	0.00	91.24	0.30	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1683124750
97.34	0.04	99.16	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.04	0.00	91.54	0.30	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3978328088
97.38	0.04	99.16	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.04	0.00	91.84	0.30	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1583180781
97.42	0.04	99.16	0.00	96.36	0.03	100.00	0.00	96.79	0.00	98.48	0.00	99.13	0.10	92.00	0.15	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.642925324
97.45	0.03	99.18	0.02	96.36	0.00	100.00	0.00	96.79	0.00	98.52	0.04	99.13	0.00	92.15	0.15	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.444575678
97.48	0.03	99.18	0.00	96.36	0.00	100.00	0.00	96.79	0.00	98.52	0.00	99.13	0.00	92.35	0.20	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.188019493
97.50	0.03	99.20	0.02	96.39	0.03	100.00	0.00	96.79	0.00	98.56	0.04	99.23	0.10	92.35	0.00	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1907298062
97.52	0.02	99.20	0.00	96.41	0.03	100.00	0.00	96.79	0.00	98.56	0.00	99.23	0.00	92.45	0.10	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.589502422
97.54	0.02	99.20	0.00	96.44	0.03	100.00	0.00	96.79	0.00	98.56	0.00	99.23	0.00	92.55	0.10	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.181226013
97.56	0.02	99.20	0.00	96.46	0.03	100.00	0.00	96.79	0.00	98.56	0.00	99.33	0.10	92.55	0.00	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1529718546
97.57	0.02	99.20	0.00	96.49	0.03	100.00	0.00	96.79	0.00	98.56	0.00	99.42	0.10	92.55	0.00	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.3929628544
97.59	0.02	99.23	0.04	96.49	0.00	100.00	0.00	96.79	0.00	98.63	0.07	99.42	0.00	92.55	0.00	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.710917914
97.60	0.02	99.27	0.04	96.49	0.00	100.00	0.00	96.79	0.00	98.71	0.07	99.42	0.00	92.55	0.00	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.4131027574
97.62	0.01	99.27	0.00	96.49	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.42	0.00	92.65	0.10	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.474467322
97.63	0.01	99.27	0.00	96.49	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.42	0.00	92.76	0.10	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1323998977
97.65	0.01	99.27	0.00	96.49	0.00	100.00	0.00	96.79	0.00	98.71	0.00	99.42	0.00	92.86	0.10	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1657061562
97.66	0.01	99.27	0.00	96.59	0.10	100.00	0.00	96.79	0.00	98.71	0.00	99.42	0.00	92.86	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3547087985
97.67	0.01	99.27	0.00	96.61	0.03	100.00	0.00	96.79	0.00	98.71	0.00	99.42	0.00	92.91	0.05	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1943945649
97.68	0.01	99.29	0.02	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.04	99.42	0.00	92.91	0.00	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.1209312677
97.69	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	92.96	0.05	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.1949931762
97.70	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.01	0.05	/workspace/coverage/default/11.sysrst_ctrl_stress_all.1713418108
97.70	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.06	0.05	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1056653294
97.71	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.11	0.05	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1941238095
97.72	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.16	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1891578491
97.73	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.21	0.05	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3153805988
97.73	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.26	0.05	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3870290100
97.74	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.31	0.05	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2523008182
97.75	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.36	0.05	/workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3860072794
97.75	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.41	0.05	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.2330676667
97.76	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.47	0.05	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3855011912
97.77	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.52	0.05	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.653338874
97.78	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.57	0.05	/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2658966532
97.78	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.62	0.05	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1843405098
97.79	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.67	0.05	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.521668528
97.80	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.72	0.05	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1022653100
97.80	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.77	0.05	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2624314231
97.81	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.82	0.05	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3828862172
97.82	0.01	99.29	0.00	96.61	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.87	0.05	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1132401129
97.83	0.01	99.31	0.02	96.64	0.03	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.87	0.00	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2555826572
97.83	0.01	99.31	0.00	96.66	0.03	100.00	0.00	96.79	0.00	98.74	0.00	99.42	0.00	93.87	0.00	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3982337641

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3549598574
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3248174060
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.286350492
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.330061846
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2473131184
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2337207081
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.428360134
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2743095428
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2360141874
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.691778923
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.397776443
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2021141777
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1390939273
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2163467992
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.590990023
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2973760757
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.119223350
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1477738627
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1876373018
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3460181560
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3267751522
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3729906123
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3743823655
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1168330187
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1013478262
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.4280174716
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/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.871871863
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.4290977036
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2568126236
/workspace/coverage/default/38.sysrst_ctrl_smoke.1566087120
/workspace/coverage/default/38.sysrst_ctrl_stress_all.2524739741
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3998877967
/workspace/coverage/default/39.sysrst_ctrl_alert_test.3069867606
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3309322819
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.1282223728
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3828676436
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.3794847132
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2178143193
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1782663611
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1508613518
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1066680229
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3611503872
/workspace/coverage/default/39.sysrst_ctrl_smoke.1885048493
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.643212541
/workspace/coverage/default/4.sysrst_ctrl_alert_test.2719339995
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1882174590
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1384123026
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.391772792
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2078135992
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.257879301
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.3809379516
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1509090690
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3602559066
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.3906706613
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1079403040
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3104703274
/workspace/coverage/default/4.sysrst_ctrl_smoke.1893290522
/workspace/coverage/default/4.sysrst_ctrl_stress_all.3001984305
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1186631839
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1911199087
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2109316530
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3623883095
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3199581851
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.949185767
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2743217532
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2862747923
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.699205417
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1518364811
/workspace/coverage/default/40.sysrst_ctrl_smoke.3340459207
/workspace/coverage/default/40.sysrst_ctrl_stress_all.1695646916
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2157718956
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.4186600561
/workspace/coverage/default/41.sysrst_ctrl_alert_test.2150061408
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.710072849
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4176487461
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3011489375
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1691898935
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2199693195
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1685562106
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2200464362
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1514739181
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1402452698
/workspace/coverage/default/41.sysrst_ctrl_smoke.4137860571
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3471483316
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2230031440
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2086832190
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3617397655
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3891778201
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1962012913
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1495832817
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4058640677
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.399193719
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.4209925903
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2105960758
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4002999318
/workspace/coverage/default/42.sysrst_ctrl_smoke.1466993275
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1881761656
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2247349347
/workspace/coverage/default/43.sysrst_ctrl_alert_test.4196884650
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.949664453
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3514221897
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3080413782
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3012864038
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.268531597
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2460275846
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1510647717
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1899523207
/workspace/coverage/default/43.sysrst_ctrl_smoke.171238634
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3149384075
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2266021561
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3388867400
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.39811031
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3554495134
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1615096883
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1355288857
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2736921671
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.4103592779
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2474063949
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2458966921
/workspace/coverage/default/44.sysrst_ctrl_smoke.661493829
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2848883617
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1076451012
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2812708052
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3164505154
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3354224848
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3229771367
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.367401067
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.437483233
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1467200025
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1074663942
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.505423793
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3154305637
/workspace/coverage/default/45.sysrst_ctrl_smoke.2623833587
/workspace/coverage/default/45.sysrst_ctrl_stress_all.223630722
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.495174769
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1221380960
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.943810081
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1272009597
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.760931536
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1040100570
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3652544390
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3160339342
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3371070933
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1709655341
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3714181672
/workspace/coverage/default/46.sysrst_ctrl_smoke.137858356
/workspace/coverage/default/46.sysrst_ctrl_stress_all.2517863174
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3274865425
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3511221582
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2073684555
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.4218248449
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1278136127
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.414629688
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1027100596
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1216538950
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3975680545
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1339483183
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2532862009
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.463198481
/workspace/coverage/default/47.sysrst_ctrl_smoke.1394160682
/workspace/coverage/default/47.sysrst_ctrl_stress_all.902025508
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.614784527
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3605458697
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.279695255
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2852908911
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.450591895
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3077754772
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3987676072
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1475242069
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2481863868
/workspace/coverage/default/48.sysrst_ctrl_smoke.878144048
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2035616760
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3502182208
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1735585471
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3004239146
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1164806079
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2972560736
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.4260419127
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1740792214
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1806471360
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4043934711
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1921460075
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1217787059
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2184027747
/workspace/coverage/default/49.sysrst_ctrl_smoke.2302621985
/workspace/coverage/default/49.sysrst_ctrl_stress_all.562258004
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2148558293
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3873999877
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2775899462
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2686540338
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2571250876
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4143334254
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1269369551
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1116889879
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3520379235
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2679747798
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2907220688
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3610242059
/workspace/coverage/default/5.sysrst_ctrl_smoke.2900487852
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2052132484
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3198450813
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3973410874
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3184825885
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.129178497
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1637650963
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2361276085
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1201671545
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2458453512
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1890639722
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2383529956
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2274786532
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3285105239
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.159932014
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2107321521
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2334119492
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.4293369376
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1041442673
/workspace/coverage/default/6.sysrst_ctrl_smoke.3327726258
/workspace/coverage/default/6.sysrst_ctrl_stress_all.829820803
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2627760639
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.294076391
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3370365113
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.721875609
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3855960953
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.529249879
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.4252216678
/workspace/coverage/default/7.sysrst_ctrl_alert_test.605939189
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.1405107552
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4056289092
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4001675879
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1208536417
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3291579469
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1676084308
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1463534392
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1044688333
/workspace/coverage/default/7.sysrst_ctrl_smoke.3705106803
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2551341343
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1530094026
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.464455358
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3727750089
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.217744336
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2491302402
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3879970386
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2869604630
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1775803831
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3376150468
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2529493255
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.554317000
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1121089699
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.795929251
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.723252168
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.51358101
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.239277101
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.725409305
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3071059963
/workspace/coverage/default/8.sysrst_ctrl_smoke.1365706130
/workspace/coverage/default/8.sysrst_ctrl_stress_all.4025191350
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2214813803
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3801467691
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3658900022
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.584679815
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.600731891
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3447045809
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.4228476976
/workspace/coverage/default/9.sysrst_ctrl_alert_test.144023496
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.4096038027
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.962048339
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.4081429888
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.672484122
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1252319932
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.315972168
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2964324524
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2346419390
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1610603061
/workspace/coverage/default/9.sysrst_ctrl_smoke.3107369334
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3855952914
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2785842157
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3671154124
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3384497080
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.383920820
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3761449291
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1692409560
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2252792276
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2389485876

Total test records in report: 908

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2643171197	Jun 25 05:11:10 PM PDT 24	Jun 25 05:11:48 PM PDT 24	58516735328 ps
T5	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.1110791067	Jun 25 05:11:19 PM PDT 24	Jun 25 05:16:36 PM PDT 24	126368939932 ps
T6	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2334119492	Jun 25 05:10:16 PM PDT 24	Jun 25 05:10:22 PM PDT 24	2487206127 ps
T1	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1262040406	Jun 25 05:11:59 PM PDT 24	Jun 25 05:13:04 PM PDT 24	1374803502735 ps
T2	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3133688691	Jun 25 05:10:28 PM PDT 24	Jun 25 05:10:31 PM PDT 24	3249248050 ps
T14	/workspace/coverage/default/20.sysrst_ctrl_alert_test.1992516587	Jun 25 05:10:52 PM PDT 24	Jun 25 05:10:55 PM PDT 24	2039870489 ps
T15	/workspace/coverage/default/7.sysrst_ctrl_alert_test.605939189	Jun 25 05:10:21 PM PDT 24	Jun 25 05:10:25 PM PDT 24	2049812946 ps
T16	/workspace/coverage/default/19.sysrst_ctrl_smoke.411036906	Jun 25 05:10:48 PM PDT 24	Jun 25 05:10:52 PM PDT 24	2129913282 ps
T17	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.2132186251	Jun 25 05:10:54 PM PDT 24	Jun 25 05:14:36 PM PDT 24	189581471667 ps
T18	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1709655341	Jun 25 05:12:01 PM PDT 24	Jun 25 05:12:07 PM PDT 24	2137199451 ps
T19	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.1882174590	Jun 25 05:10:17 PM PDT 24	Jun 25 05:10:22 PM PDT 24	3476251635 ps
T20	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.516266915	Jun 25 05:10:43 PM PDT 24	Jun 25 05:10:55 PM PDT 24	3648841047 ps
T3	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.3929628544	Jun 25 05:10:12 PM PDT 24	Jun 25 05:10:18 PM PDT 24	3907269012 ps
T24	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2750825259	Jun 25 05:11:40 PM PDT 24	Jun 25 05:11:44 PM PDT 24	2484406340 ps
T7	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3511221582	Jun 25 05:12:01 PM PDT 24	Jun 25 05:12:06 PM PDT 24	4098109464 ps
T51	/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.4218248449	Jun 25 05:12:09 PM PDT 24	Jun 25 05:12:20 PM PDT 24	3347650918 ps
T52	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2937642973	Jun 25 05:10:09 PM PDT 24	Jun 25 05:10:14 PM PDT 24	3605848400 ps
T53	/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3309322819	Jun 25 05:11:41 PM PDT 24	Jun 25 05:11:46 PM PDT 24	3416921085 ps
T25	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3602559066	Jun 25 05:10:18 PM PDT 24	Jun 25 05:10:28 PM PDT 24	2487755902 ps
T8	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1657061562	Jun 25 05:11:11 PM PDT 24	Jun 25 05:13:08 PM PDT 24	43688802849 ps
T107	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1463534392	Jun 25 05:10:20 PM PDT 24	Jun 25 05:10:25 PM PDT 24	2139659912 ps
T115	/workspace/coverage/default/37.sysrst_ctrl_alert_test.642547628	Jun 25 05:11:41 PM PDT 24	Jun 25 05:11:49 PM PDT 24	2011537839 ps
T26	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.1978754561	Jun 25 05:10:37 PM PDT 24	Jun 25 05:11:09 PM PDT 24	22306518276 ps
T60	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.4293369376	Jun 25 05:10:18 PM PDT 24	Jun 25 05:10:21 PM PDT 24	2072116379 ps
T29	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.342755965	Jun 25 05:10:58 PM PDT 24	Jun 25 05:11:17 PM PDT 24	24609631524 ps
T27	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3881536445	Jun 25 05:10:59 PM PDT 24	Jun 25 05:11:03 PM PDT 24	2543255944 ps
T9	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1301839436	Jun 25 05:11:32 PM PDT 24	Jun 25 05:16:50 PM PDT 24	130610348081 ps
T54	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3550312270	Jun 25 05:11:03 PM PDT 24	Jun 25 05:11:07 PM PDT 24	3667238469 ps
T55	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1590769084	Jun 25 05:11:23 PM PDT 24	Jun 25 05:11:26 PM PDT 24	3400095541 ps
T56	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3296295350	Jun 25 05:11:15 PM PDT 24	Jun 25 05:11:47 PM PDT 24	30244410918 ps
T30	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3370365113	Jun 25 05:12:09 PM PDT 24	Jun 25 05:12:28 PM PDT 24	25603884731 ps
T57	/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2869604630	Jun 25 05:12:23 PM PDT 24	Jun 25 05:12:46 PM PDT 24	25597514065 ps
T58	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1136654360	Jun 25 05:11:28 PM PDT 24	Jun 25 05:12:42 PM PDT 24	28583186511 ps
T28	/workspace/coverage/default/19.sysrst_ctrl_stress_all.1635225049	Jun 25 05:10:54 PM PDT 24	Jun 25 05:11:02 PM PDT 24	8115439825 ps
T108	/workspace/coverage/default/48.sysrst_ctrl_alert_test.3605458697	Jun 25 05:12:13 PM PDT 24	Jun 25 05:12:21 PM PDT 24	2010207006 ps
T109	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1217787059	Jun 25 05:12:09 PM PDT 24	Jun 25 05:12:18 PM PDT 24	2123025320 ps
T50	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4124520757	Jun 25 05:12:09 PM PDT 24	Jun 25 05:12:59 PM PDT 24	106979231728 ps
T110	/workspace/coverage/default/23.sysrst_ctrl_alert_test.1657322782	Jun 25 05:10:59 PM PDT 24	Jun 25 05:11:01 PM PDT 24	2137441861 ps
T10	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.217744336	Jun 25 05:12:21 PM PDT 24	Jun 25 05:12:51 PM PDT 24	43904519631 ps
T11	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.853813327	Jun 25 05:11:19 PM PDT 24	Jun 25 05:13:49 PM PDT 24	61330534585 ps
T111	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.367401067	Jun 25 05:11:57 PM PDT 24	Jun 25 05:12:08 PM PDT 24	3572260495 ps
T72	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2184027747	Jun 25 05:12:11 PM PDT 24	Jun 25 05:12:17 PM PDT 24	2517330232 ps
T59	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2555826572	Jun 25 05:10:30 PM PDT 24	Jun 25 05:11:32 PM PDT 24	123263850893 ps
T76	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.129178497	Jun 25 05:12:10 PM PDT 24	Jun 25 05:13:09 PM PDT 24	20831686776 ps
T68	/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3825642556	Jun 25 05:10:54 PM PDT 24	Jun 25 05:10:57 PM PDT 24	2468520424 ps
T69	/workspace/coverage/default/3.sysrst_ctrl_stress_all.2939048574	Jun 25 05:10:10 PM PDT 24	Jun 25 05:10:21 PM PDT 24	6480206175 ps
T35	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1056653294	Jun 25 05:10:27 PM PDT 24	Jun 25 05:10:35 PM PDT 24	6081368423 ps
T112	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2907220688	Jun 25 05:10:16 PM PDT 24	Jun 25 05:10:21 PM PDT 24	2102499286 ps
T12	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.915892657	Jun 25 05:10:18 PM PDT 24	Jun 25 05:13:34 PM PDT 24	1357192241010 ps
T91	/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.39811031	Jun 25 05:12:00 PM PDT 24	Jun 25 05:12:13 PM PDT 24	3615021278 ps
T13	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3351537127	Jun 25 05:11:12 PM PDT 24	Jun 25 05:15:00 PM PDT 24	90972307718 ps
T95	/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3855960953	Jun 25 05:12:15 PM PDT 24	Jun 25 05:12:30 PM PDT 24	24616151102 ps
T62	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3973410874	Jun 25 05:10:21 PM PDT 24	Jun 25 05:10:31 PM PDT 24	10065951463 ps
T73	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.621718093	Jun 25 05:11:21 PM PDT 24	Jun 25 05:11:26 PM PDT 24	2538240197 ps
T39	/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2658966532	Jun 25 05:11:58 PM PDT 24	Jun 25 05:12:47 PM PDT 24	75058510573 ps
T45	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.3656935394	Jun 25 05:11:28 PM PDT 24	Jun 25 05:11:35 PM PDT 24	4293548404 ps
T93	/workspace/coverage/default/47.sysrst_ctrl_alert_test.2073684555	Jun 25 05:12:09 PM PDT 24	Jun 25 05:12:17 PM PDT 24	2013292312 ps
T94	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.52635676	Jun 25 05:10:27 PM PDT 24	Jun 25 05:10:30 PM PDT 24	2061519949 ps
T63	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3908863070	Jun 25 05:11:12 PM PDT 24	Jun 25 05:11:21 PM PDT 24	8511314551 ps
T96	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4143334254	Jun 25 05:10:16 PM PDT 24	Jun 25 05:11:15 PM PDT 24	22080926630 ps
T70	/workspace/coverage/default/40.sysrst_ctrl_stress_all.1695646916	Jun 25 05:11:59 PM PDT 24	Jun 25 05:15:51 PM PDT 24	335035988572 ps
T138	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3578013714	Jun 25 05:11:29 PM PDT 24	Jun 25 05:11:37 PM PDT 24	2114354629 ps
T139	/workspace/coverage/default/8.sysrst_ctrl_alert_test.3376150468	Jun 25 05:10:25 PM PDT 24	Jun 25 05:10:32 PM PDT 24	2012545468 ps
T36	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2938212958	Jun 25 05:12:21 PM PDT 24	Jun 25 05:15:11 PM PDT 24	62270886810 ps
T47	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.1487688539	Jun 25 05:11:38 PM PDT 24	Jun 25 05:11:43 PM PDT 24	2631330539 ps
T74	/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.608453310	Jun 25 05:11:13 PM PDT 24	Jun 25 05:11:16 PM PDT 24	2646967724 ps
T64	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1943945649	Jun 25 05:10:46 PM PDT 24	Jun 25 05:11:18 PM PDT 24	26485297262 ps
T146	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.409570885	Jun 25 05:11:12 PM PDT 24	Jun 25 05:11:20 PM PDT 24	2214781464 ps
T97	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2006649983	Jun 25 05:09:56 PM PDT 24	Jun 25 05:11:10 PM PDT 24	109969222990 ps
T147	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3611503872	Jun 25 05:11:40 PM PDT 24	Jun 25 05:11:44 PM PDT 24	2561110916 ps
T71	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3484123257	Jun 25 05:10:24 PM PDT 24	Jun 25 05:10:43 PM PDT 24	6477291976 ps
T148	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3486297315	Jun 25 05:10:37 PM PDT 24	Jun 25 05:10:43 PM PDT 24	2517790500 ps
T149	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2919834705	Jun 25 05:11:00 PM PDT 24	Jun 25 05:11:04 PM PDT 24	2482376830 ps
T92	/workspace/coverage/default/7.sysrst_ctrl_stress_all.512592137	Jun 25 05:10:14 PM PDT 24	Jun 25 05:12:00 PM PDT 24	177182387596 ps
T43	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.561483564	Jun 25 05:11:40 PM PDT 24	Jun 25 05:11:51 PM PDT 24	3547929788 ps
T153	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4001675879	Jun 25 05:10:17 PM PDT 24	Jun 25 05:10:30 PM PDT 24	4426964735 ps
T154	/workspace/coverage/default/34.sysrst_ctrl_alert_test.2993858509	Jun 25 05:11:31 PM PDT 24	Jun 25 05:11:33 PM PDT 24	2079520436 ps
T113	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2078135992	Jun 25 05:10:18 PM PDT 24	Jun 25 05:10:23 PM PDT 24	2339427216 ps
T114	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.4126982772	Jun 25 05:11:21 PM PDT 24	Jun 25 05:13:02 PM PDT 24	70070081812 ps
T44	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1208536417	Jun 25 05:10:20 PM PDT 24	Jun 25 05:10:25 PM PDT 24	3879100735 ps
T75	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2749245848	Jun 25 05:11:10 PM PDT 24	Jun 25 05:12:32 PM PDT 24	34243644204 ps
T155	/workspace/coverage/default/35.sysrst_ctrl_alert_test.2732078815	Jun 25 05:11:30 PM PDT 24	Jun 25 05:11:34 PM PDT 24	2025912417 ps
T156	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2556000050	Jun 25 05:11:04 PM PDT 24	Jun 25 05:11:08 PM PDT 24	2623487414 ps
T79	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.1282223728	Jun 25 05:11:39 PM PDT 24	Jun 25 05:12:26 PM PDT 24	106798866470 ps
T187	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2458453512	Jun 25 05:12:12 PM PDT 24	Jun 25 05:12:49 PM PDT 24	50437644349 ps
T188	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2455274180	Jun 25 05:10:43 PM PDT 24	Jun 25 05:10:47 PM PDT 24	3584847810 ps
T189	/workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.2551614331	Jun 25 05:10:35 PM PDT 24	Jun 25 05:10:39 PM PDT 24	3451284747 ps
T37	/workspace/coverage/default/26.sysrst_ctrl_combo_detect.3979827380	Jun 25 05:11:12 PM PDT 24	Jun 25 05:16:34 PM PDT 24	129596911226 ps
T190	/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2928418526	Jun 25 05:10:45 PM PDT 24	Jun 25 05:10:52 PM PDT 24	3148424555 ps
T263	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2852908911	Jun 25 05:12:15 PM PDT 24	Jun 25 05:13:04 PM PDT 24	135383548569 ps
T395	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.2349428119	Jun 25 05:10:53 PM PDT 24	Jun 25 05:10:59 PM PDT 24	3774449282 ps
T41	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.3869831791	Jun 25 05:11:35 PM PDT 24	Jun 25 05:11:42 PM PDT 24	3450714271 ps
T223	/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.1144302448	Jun 25 05:10:55 PM PDT 24	Jun 25 05:11:03 PM PDT 24	2611563323 ps
T224	/workspace/coverage/default/19.sysrst_ctrl_alert_test.4078379168	Jun 25 05:10:55 PM PDT 24	Jun 25 05:10:57 PM PDT 24	2066925374 ps
T225	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.4283261788	Jun 25 05:10:37 PM PDT 24	Jun 25 05:10:45 PM PDT 24	2171870970 ps
T226	/workspace/coverage/default/17.sysrst_ctrl_alert_test.3616815396	Jun 25 05:10:51 PM PDT 24	Jun 25 05:10:59 PM PDT 24	2011196967 ps
T38	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.3209723082	Jun 25 05:10:05 PM PDT 24	Jun 25 05:12:33 PM PDT 24	55563325170 ps
T227	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3080413782	Jun 25 05:11:58 PM PDT 24	Jun 25 05:12:05 PM PDT 24	3468066669 ps
T49	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.437483233	Jun 25 05:12:04 PM PDT 24	Jun 25 05:12:08 PM PDT 24	2972641027 ps
T228	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1066680229	Jun 25 05:11:41 PM PDT 24	Jun 25 05:11:46 PM PDT 24	2097708356 ps
T229	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.20896139	Jun 25 05:11:14 PM PDT 24	Jun 25 05:11:23 PM PDT 24	2480632445 ps
T396	/workspace/coverage/default/0.sysrst_ctrl_alert_test.3408908107	Jun 25 05:10:22 PM PDT 24	Jun 25 05:10:26 PM PDT 24	2030746106 ps
T65	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.195376714	Jun 25 05:11:00 PM PDT 24	Jun 25 05:11:05 PM PDT 24	11061589067 ps
T254	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.704027129	Jun 25 05:12:10 PM PDT 24	Jun 25 05:12:49 PM PDT 24	55581913851 ps
T305	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2568126236	Jun 25 05:11:37 PM PDT 24	Jun 25 05:11:46 PM PDT 24	2513466205 ps
T303	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3348291868	Jun 25 05:10:48 PM PDT 24	Jun 25 05:10:52 PM PDT 24	2473788250 ps
T46	/workspace/coverage/default/11.sysrst_ctrl_stress_all.1713418108	Jun 25 05:10:30 PM PDT 24	Jun 25 05:10:43 PM PDT 24	14487442848 ps
T162	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2035747241	Jun 25 05:11:19 PM PDT 24	Jun 25 05:11:22 PM PDT 24	2656157850 ps
T48	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1529718546	Jun 25 05:11:14 PM PDT 24	Jun 25 05:11:19 PM PDT 24	4776379261 ps
T163	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.759453360	Jun 25 05:11:11 PM PDT 24	Jun 25 05:11:14 PM PDT 24	2557933131 ps
T164	/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3130535441	Jun 25 05:10:11 PM PDT 24	Jun 25 05:10:16 PM PDT 24	3461038572 ps
T40	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3012864038	Jun 25 05:11:57 PM PDT 24	Jun 25 05:12:01 PM PDT 24	5000431664 ps
T165	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1089716300	Jun 25 05:11:28 PM PDT 24	Jun 25 05:11:32 PM PDT 24	2528769040 ps
T166	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2532862009	Jun 25 05:12:01 PM PDT 24	Jun 25 05:12:07 PM PDT 24	2251398194 ps
T167	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3617397655	Jun 25 05:11:57 PM PDT 24	Jun 25 05:12:02 PM PDT 24	3219685480 ps
T66	/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.614784527	Jun 25 05:12:09 PM PDT 24	Jun 25 05:12:14 PM PDT 24	6590743663 ps
T397	/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1637110721	Jun 25 05:11:21 PM PDT 24	Jun 25 05:11:27 PM PDT 24	3590621750 ps
T274	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.368806305	Jun 25 05:10:08 PM PDT 24	Jun 25 05:10:37 PM PDT 24	42135318810 ps
T292	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2335018172	Jun 25 05:10:37 PM PDT 24	Jun 25 05:10:48 PM PDT 24	3018896346 ps
T293	/workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.1319131595	Jun 25 05:11:21 PM PDT 24	Jun 25 05:11:27 PM PDT 24	2490349313 ps
T294	/workspace/coverage/default/45.sysrst_ctrl_stress_all.223630722	Jun 25 05:12:04 PM PDT 24	Jun 25 05:12:12 PM PDT 24	14172765788 ps
T295	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1615096883	Jun 25 05:11:58 PM PDT 24	Jun 25 05:12:03 PM PDT 24	3371284442 ps
T157	/workspace/coverage/default/22.sysrst_ctrl_edge_detect.795051977	Jun 25 05:11:01 PM PDT 24	Jun 25 05:11:06 PM PDT 24	4160731145 ps
T67	/workspace/coverage/default/6.sysrst_ctrl_stress_all.829820803	Jun 25 05:10:17 PM PDT 24	Jun 25 05:10:22 PM PDT 24	19365003807 ps
T42	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.3917561853	Jun 25 05:11:28 PM PDT 24	Jun 25 05:11:38 PM PDT 24	4824356813 ps
T246	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.943810081	Jun 25 05:12:03 PM PDT 24	Jun 25 05:12:14 PM PDT 24	3142835832 ps
T247	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1775803831	Jun 25 05:12:20 PM PDT 24	Jun 25 05:14:44 PM PDT 24	53547627999 ps
T248	/workspace/coverage/default/9.sysrst_ctrl_smoke.3107369334	Jun 25 05:10:29 PM PDT 24	Jun 25 05:10:38 PM PDT 24	2108785272 ps
T249	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.701125003	Jun 25 05:11:01 PM PDT 24	Jun 25 05:11:09 PM PDT 24	2215561167 ps
T250	/workspace/coverage/default/11.sysrst_ctrl_smoke.1595449790	Jun 25 05:10:29 PM PDT 24	Jun 25 05:10:33 PM PDT 24	2121480664 ps
T251	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3520379235	Jun 25 05:10:22 PM PDT 24	Jun 25 05:10:27 PM PDT 24	2630396461 ps
T252	/workspace/coverage/default/49.sysrst_ctrl_alert_test.3004239146	Jun 25 05:12:12 PM PDT 24	Jun 25 05:12:16 PM PDT 24	2024676090 ps
T183	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.3620299776	Jun 25 05:10:44 PM PDT 24	Jun 25 05:10:46 PM PDT 24	3019105974 ps
T398	/workspace/coverage/default/45.sysrst_ctrl_smoke.2623833587	Jun 25 05:12:02 PM PDT 24	Jun 25 05:12:11 PM PDT 24	2107035447 ps
T184	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.4201241862	Jun 25 05:11:45 PM PDT 24	Jun 25 05:11:50 PM PDT 24	4797422890 ps
T255	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3987943189	Jun 25 05:12:11 PM PDT 24	Jun 25 05:13:27 PM PDT 24	109553471273 ps
T158	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.532210485	Jun 25 05:11:09 PM PDT 24	Jun 25 05:13:07 PM PDT 24	1321469496508 ps
T275	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2808063286	Jun 25 05:10:08 PM PDT 24	Jun 25 05:10:25 PM PDT 24	22077168890 ps
T77	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.2016969322	Jun 25 05:10:26 PM PDT 24	Jun 25 05:10:30 PM PDT 24	4522800268 ps
T78	/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3801467691	Jun 25 05:10:28 PM PDT 24	Jun 25 05:10:37 PM PDT 24	5610218779 ps
T87	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1001072173	Jun 25 05:11:03 PM PDT 24	Jun 25 05:11:11 PM PDT 24	2763901495 ps
T256	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1962012913	Jun 25 05:11:58 PM PDT 24	Jun 25 05:12:52 PM PDT 24	75608170501 ps
T182	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2199693195	Jun 25 05:11:56 PM PDT 24	Jun 25 05:11:59 PM PDT 24	5132568932 ps
T399	/workspace/coverage/default/1.sysrst_ctrl_smoke.3313936313	Jun 25 05:10:10 PM PDT 24	Jun 25 05:10:13 PM PDT 24	2242672306 ps
T82	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.188019493	Jun 25 05:12:11 PM PDT 24	Jun 25 05:15:26 PM PDT 24	70830822881 ps
T400	/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2686540338	Jun 25 05:10:19 PM PDT 24	Jun 25 05:10:31 PM PDT 24	3266248932 ps
T401	/workspace/coverage/default/39.sysrst_ctrl_smoke.1885048493	Jun 25 05:11:40 PM PDT 24	Jun 25 05:11:44 PM PDT 24	2131648213 ps
T257	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.529249879	Jun 25 05:12:12 PM PDT 24	Jun 25 05:12:58 PM PDT 24	63176971682 ps
T402	/workspace/coverage/default/44.sysrst_ctrl_smoke.661493829	Jun 25 05:12:00 PM PDT 24	Jun 25 05:12:05 PM PDT 24	2131900090 ps
T403	/workspace/coverage/default/3.sysrst_ctrl_alert_test.4190102212	Jun 25 05:10:09 PM PDT 24	Jun 25 05:10:13 PM PDT 24	2032810833 ps
T404	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2004474211	Jun 25 05:10:38 PM PDT 24	Jun 25 05:10:41 PM PDT 24	2793523850 ps
T405	/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3714181672	Jun 25 05:12:09 PM PDT 24	Jun 25 05:12:12 PM PDT 24	2527408674 ps
T169	/workspace/coverage/default/14.sysrst_ctrl_stress_all.3371339468	Jun 25 05:10:37 PM PDT 24	Jun 25 05:16:16 PM PDT 24	266453776635 ps
T406	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.463198481	Jun 25 05:12:01 PM PDT 24	Jun 25 05:12:07 PM PDT 24	2529404749 ps
T304	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2862747923	Jun 25 05:11:42 PM PDT 24	Jun 25 05:11:47 PM PDT 24	2469340583 ps
T407	/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1514739181	Jun 25 05:11:56 PM PDT 24	Jun 25 05:11:59 PM PDT 24	2256441104 ps
T408	/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2077160218	Jun 25 05:11:01 PM PDT 24	Jun 25 05:11:16 PM PDT 24	4928438714 ps
T409	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3100182196	Jun 25 05:10:28 PM PDT 24	Jun 25 05:10:30 PM PDT 24	2133997789 ps
T410	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3104891567	Jun 25 05:10:52 PM PDT 24	Jun 25 05:10:56 PM PDT 24	3704609160 ps
T411	/workspace/coverage/default/11.sysrst_ctrl_alert_test.1276189359	Jun 25 05:10:29 PM PDT 24	Jun 25 05:10:38 PM PDT 24	2012622730 ps
T412	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.1508509219	Jun 25 05:10:55 PM PDT 24	Jun 25 05:10:59 PM PDT 24	2481678443 ps
T296	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3619954011	Jun 25 05:10:06 PM PDT 24	Jun 25 05:12:03 PM PDT 24	54825591477 ps
T413	/workspace/coverage/default/36.sysrst_ctrl_smoke.854373575	Jun 25 05:11:28 PM PDT 24	Jun 25 05:11:31 PM PDT 24	2138848011 ps
T414	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2964324524	Jun 25 05:10:26 PM PDT 24	Jun 25 05:10:34 PM PDT 24	2473984648 ps
T415	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.2525690956	Jun 25 05:10:30 PM PDT 24	Jun 25 05:10:36 PM PDT 24	2712385640 ps
T203	/workspace/coverage/default/48.sysrst_ctrl_stress_all.2035616760	Jun 25 05:12:10 PM PDT 24	Jun 25 05:12:23 PM PDT 24	15583849854 ps
T416	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2022574539	Jun 25 05:09:55 PM PDT 24	Jun 25 05:10:01 PM PDT 24	2505503045 ps
T417	/workspace/coverage/default/12.sysrst_ctrl_smoke.1662040624	Jun 25 05:10:32 PM PDT 24	Jun 25 05:10:36 PM PDT 24	2129905140 ps
T418	/workspace/coverage/default/40.sysrst_ctrl_alert_test.2109316530	Jun 25 05:11:59 PM PDT 24	Jun 25 05:12:04 PM PDT 24	2020938346 ps
T145	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.1586199063	Jun 25 05:10:11 PM PDT 24	Jun 25 05:10:15 PM PDT 24	3465645213 ps
T419	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.1876747013	Jun 25 05:10:44 PM PDT 24	Jun 25 05:10:47 PM PDT 24	2528946814 ps
T420	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2470213449	Jun 25 05:11:19 PM PDT 24	Jun 25 05:11:23 PM PDT 24	2323759819 ps
T421	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1467200025	Jun 25 05:11:59 PM PDT 24	Jun 25 05:12:05 PM PDT 24	2622887106 ps
T98	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.584679815	Jun 25 05:12:25 PM PDT 24	Jun 25 05:13:41 PM PDT 24	28081036800 ps
T264	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.294076391	Jun 25 05:12:10 PM PDT 24	Jun 25 05:13:16 PM PDT 24	24831928069 ps
T422	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1402452698	Jun 25 05:11:55 PM PDT 24	Jun 25 05:12:03 PM PDT 24	2514441705 ps
T423	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.343333175	Jun 25 05:11:38 PM PDT 24	Jun 25 05:11:46 PM PDT 24	2511822851 ps
T116	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2380735494	Jun 25 05:11:21 PM PDT 24	Jun 25 05:11:28 PM PDT 24	10807617617 ps
T424	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3852025664	Jun 25 05:11:15 PM PDT 24	Jun 25 05:11:19 PM PDT 24	2198981312 ps
T258	/workspace/coverage/default/26.sysrst_ctrl_stress_all.1958078973	Jun 25 05:11:11 PM PDT 24	Jun 25 05:11:37 PM PDT 24	116715469499 ps
T276	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3678714131	Jun 25 05:10:06 PM PDT 24	Jun 25 05:11:02 PM PDT 24	22011613120 ps
T308	/workspace/coverage/default/5.sysrst_ctrl_stress_all.2052132484	Jun 25 05:10:14 PM PDT 24	Jun 25 05:10:20 PM PDT 24	9084182157 ps
T425	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.710072849	Jun 25 05:11:58 PM PDT 24	Jun 25 05:12:51 PM PDT 24	165882459406 ps
T159	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1533688812	Jun 25 05:11:37 PM PDT 24	Jun 25 05:12:44 PM PDT 24	96564209656 ps
T311	/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.450591895	Jun 25 05:12:11 PM PDT 24	Jun 25 06:01:45 PM PDT 24	1111758100228 ps
T312	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2490005139	Jun 25 05:10:30 PM PDT 24	Jun 25 05:11:09 PM PDT 24	81286720294 ps
T313	/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1272009597	Jun 25 05:12:00 PM PDT 24	Jun 25 05:13:57 PM PDT 24	44932045504 ps
T314	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.3794847132	Jun 25 05:11:39 PM PDT 24	Jun 25 05:11:44 PM PDT 24	2673336756 ps
T306	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3972710012	Jun 25 05:10:51 PM PDT 24	Jun 25 05:10:55 PM PDT 24	2532327165 ps
T315	/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.505423793	Jun 25 05:12:02 PM PDT 24	Jun 25 05:12:11 PM PDT 24	2259768923 ps
T316	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1508613518	Jun 25 05:11:40 PM PDT 24	Jun 25 05:11:48 PM PDT 24	2458219796 ps
T317	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1270495556	Jun 25 05:10:08 PM PDT 24	Jun 25 05:10:12 PM PDT 24	2495473767 ps
T318	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.2113318584	Jun 25 05:10:36 PM PDT 24	Jun 25 05:30:34 PM PDT 24	452453141371 ps
T117	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.847242426	Jun 25 05:10:15 PM PDT 24	Jun 25 05:10:21 PM PDT 24	6767582484 ps
T259	/workspace/coverage/default/25.sysrst_ctrl_stress_all.860723106	Jun 25 05:11:10 PM PDT 24	Jun 25 05:12:34 PM PDT 24	162743427058 ps
T426	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.3210135541	Jun 25 05:11:18 PM PDT 24	Jun 25 05:11:25 PM PDT 24	3863377264 ps
T427	/workspace/coverage/default/45.sysrst_ctrl_alert_test.3164505154	Jun 25 05:12:01 PM PDT 24	Jun 25 05:12:05 PM PDT 24	2036453311 ps
T428	/workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.2164122762	Jun 25 05:11:15 PM PDT 24	Jun 25 05:11:24 PM PDT 24	2629682585 ps
T342	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2389485876	Jun 25 05:12:22 PM PDT 24	Jun 25 05:16:58 PM PDT 24	113534696450 ps
T429	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2993936457	Jun 25 05:10:10 PM PDT 24	Jun 25 05:10:14 PM PDT 24	2624732350 ps
T430	/workspace/coverage/default/6.sysrst_ctrl_alert_test.1890639722	Jun 25 05:10:16 PM PDT 24	Jun 25 05:10:20 PM PDT 24	2032652075 ps
T431	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.897870283	Jun 25 05:11:34 PM PDT 24	Jun 25 05:11:37 PM PDT 24	2345674888 ps
T386	/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.600731891	Jun 25 05:12:22 PM PDT 24	Jun 25 05:13:54 PM PDT 24	31977747035 ps
T99	/workspace/coverage/default/34.sysrst_ctrl_stress_all.346253880	Jun 25 05:11:31 PM PDT 24	Jun 25 05:13:11 PM PDT 24	74222311478 ps
T269	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.554317000	Jun 25 05:10:24 PM PDT 24	Jun 25 05:14:26 PM PDT 24	102693188825 ps
T118	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1098038314	Jun 25 05:11:10 PM PDT 24	Jun 25 05:11:15 PM PDT 24	8099241717 ps
T432	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.3107819044	Jun 25 05:11:02 PM PDT 24	Jun 25 05:11:05 PM PDT 24	2139730151 ps
T433	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1495832817	Jun 25 05:11:57 PM PDT 24	Jun 25 05:12:12 PM PDT 24	4582542922 ps
T434	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.389339739	Jun 25 05:11:19 PM PDT 24	Jun 25 05:11:24 PM PDT 24	2629999449 ps
T83	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2812708052	Jun 25 05:12:03 PM PDT 24	Jun 25 05:12:09 PM PDT 24	4708221861 ps
T129	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.682766366	Jun 25 05:11:21 PM PDT 24	Jun 25 05:11:30 PM PDT 24	2455615225 ps
T130	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3427885498	Jun 25 05:11:28 PM PDT 24	Jun 25 05:17:42 PM PDT 24	624436373065 ps
T131	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.721875609	Jun 25 05:12:14 PM PDT 24	Jun 25 05:15:58 PM PDT 24	84429019713 ps
T132	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1510647717	Jun 25 05:12:00 PM PDT 24	Jun 25 05:12:05 PM PDT 24	2059555812 ps
T133	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.4108395882	Jun 25 05:10:13 PM PDT 24	Jun 25 05:14:18 PM PDT 24	147236405714 ps
T86	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.390956339	Jun 25 05:10:49 PM PDT 24	Jun 25 05:10:53 PM PDT 24	5424506729 ps
T134	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2481863868	Jun 25 05:12:11 PM PDT 24	Jun 25 05:12:15 PM PDT 24	2556329172 ps
T88	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3609187550	Jun 25 05:11:36 PM PDT 24	Jun 25 05:11:39 PM PDT 24	5676853739 ps
T135	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4058640677	Jun 25 05:11:59 PM PDT 24	Jun 25 05:12:09 PM PDT 24	3932730214 ps
T355	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3199581851	Jun 25 05:11:57 PM PDT 24	Jun 25 05:16:15 PM PDT 24	107888281357 ps
T435	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2658939126	Jun 25 05:10:38 PM PDT 24	Jun 25 05:11:30 PM PDT 24	20969927897 ps
T436	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2215301703	Jun 25 05:10:51 PM PDT 24	Jun 25 05:10:55 PM PDT 24	2528459796 ps
T437	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3820516049	Jun 25 05:10:46 PM PDT 24	Jun 25 05:11:04 PM PDT 24	21600213079 ps
T124	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2247349347	Jun 25 05:11:58 PM PDT 24	Jun 25 05:14:14 PM PDT 24	57608032966 ps
T438	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.3610242059	Jun 25 05:10:18 PM PDT 24	Jun 25 05:10:24 PM PDT 24	2518113886 ps
T439	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3154305637	Jun 25 05:12:01 PM PDT 24	Jun 25 05:12:08 PM PDT 24	2512675521 ps
T150	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.860645605	Jun 25 05:10:37 PM PDT 24	Jun 25 05:11:37 PM PDT 24	29931115257 ps
T440	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1523806449	Jun 25 05:09:57 PM PDT 24	Jun 25 05:10:05 PM PDT 24	2521724642 ps
T441	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2856871350	Jun 25 05:10:09 PM PDT 24	Jun 25 05:10:14 PM PDT 24	3242988089 ps
T89	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3274865425	Jun 25 05:12:00 PM PDT 24	Jun 25 05:13:45 PM PDT 24	48717517610 ps
T369	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2523008182	Jun 25 05:10:51 PM PDT 24	Jun 25 05:14:57 PM PDT 24	98478170576 ps
T442	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.3870334418	Jun 25 05:11:43 PM PDT 24	Jun 25 05:11:47 PM PDT 24	3391267720 ps
T443	/workspace/coverage/default/10.sysrst_ctrl_stress_all.990101007	Jun 25 05:10:26 PM PDT 24	Jun 25 05:10:39 PM PDT 24	14595159498 ps
T444	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1079403040	Jun 25 05:10:16 PM PDT 24	Jun 25 05:10:25 PM PDT 24	2513025813 ps
T445	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1041442673	Jun 25 05:10:17 PM PDT 24	Jun 25 05:10:23 PM PDT 24	2518388365 ps
T446	/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3636379861	Jun 25 05:10:38 PM PDT 24	Jun 25 05:10:49 PM PDT 24	3098337917 ps
T447	/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.378858165	Jun 25 05:11:21 PM PDT 24	Jun 25 05:11:29 PM PDT 24	2040614355 ps
T448	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3217610838	Jun 25 05:10:29 PM PDT 24	Jun 25 05:12:33 PM PDT 24	181753313527 ps
T449	/workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2316812813	Jun 25 05:11:01 PM PDT 24	Jun 25 05:11:10 PM PDT 24	2512661191 ps
T340	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.181226013	Jun 25 05:10:39 PM PDT 24	Jun 25 05:11:34 PM PDT 24	139373861006 ps
T450	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2160306946	Jun 25 05:11:25 PM PDT 24	Jun 25 05:11:29 PM PDT 24	5791117179 ps
T151	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.306131313	Jun 25 05:10:08 PM PDT 24	Jun 25 05:13:06 PM PDT 24	255770539626 ps
T381	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.717923069	Jun 25 05:11:38 PM PDT 24	Jun 25 05:12:31 PM PDT 24	121774925015 ps
T451	/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1040100570	Jun 25 05:12:03 PM PDT 24	Jun 25 05:16:51 PM PDT 24	210585946548 ps
T452	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3656992274	Jun 25 05:11:11 PM PDT 24	Jun 25 05:11:16 PM PDT 24	2542061368 ps
T61	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3221994763	Jun 25 05:10:08 PM PDT 24	Jun 25 05:10:23 PM PDT 24	39827488796 ps
T453	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.708582177	Jun 25 05:11:13 PM PDT 24	Jun 25 05:21:54 PM PDT 24	254049389204 ps
T454	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.2001400877	Jun 25 05:11:11 PM PDT 24	Jun 25 05:11:17 PM PDT 24	2581395260 ps
T455	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.795929251	Jun 25 05:10:15 PM PDT 24	Jun 25 05:10:23 PM PDT 24	5464951944 ps
T456	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.1210547229	Jun 25 05:10:06 PM PDT 24	Jun 25 05:10:14 PM PDT 24	2457675021 ps