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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.08 99.37 96.78 100.00 97.44 98.82 99.61 94.56


Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T603 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2327224827 Jun 29 06:31:19 PM PDT 24 Jun 29 06:31:27 PM PDT 24 2431587081 ps
T604 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3258975273 Jun 29 06:32:42 PM PDT 24 Jun 29 06:32:46 PM PDT 24 2682338559 ps
T605 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.276877321 Jun 29 06:33:26 PM PDT 24 Jun 29 06:34:45 PM PDT 24 124524952273 ps
T606 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2503062009 Jun 29 06:32:10 PM PDT 24 Jun 29 06:32:12 PM PDT 24 2137872444 ps
T607 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2125875329 Jun 29 06:33:11 PM PDT 24 Jun 29 06:33:14 PM PDT 24 4490002591 ps
T608 /workspace/coverage/default/13.sysrst_ctrl_stress_all.391999103 Jun 29 06:31:59 PM PDT 24 Jun 29 06:32:08 PM PDT 24 12650811623 ps
T609 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.854587589 Jun 29 06:33:03 PM PDT 24 Jun 29 06:33:13 PM PDT 24 26169598429 ps
T610 /workspace/coverage/default/22.sysrst_ctrl_alert_test.667459579 Jun 29 06:32:11 PM PDT 24 Jun 29 06:32:16 PM PDT 24 2015390323 ps
T611 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1965462382 Jun 29 06:33:10 PM PDT 24 Jun 29 06:33:13 PM PDT 24 2624936742 ps
T612 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1841557799 Jun 29 06:33:18 PM PDT 24 Jun 29 06:33:21 PM PDT 24 2627276498 ps
T297 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.2553804629 Jun 29 06:32:26 PM PDT 24 Jun 29 06:33:14 PM PDT 24 35035293755 ps
T392 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.39864191 Jun 29 06:32:09 PM PDT 24 Jun 29 06:33:23 PM PDT 24 107115561688 ps
T613 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.4074657641 Jun 29 06:32:41 PM PDT 24 Jun 29 06:32:48 PM PDT 24 2514227010 ps
T180 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.4244389905 Jun 29 06:32:27 PM PDT 24 Jun 29 06:32:36 PM PDT 24 3098295321 ps
T614 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1284759553 Jun 29 06:32:55 PM PDT 24 Jun 29 06:33:03 PM PDT 24 2611586201 ps
T615 /workspace/coverage/default/17.sysrst_ctrl_stress_all.2715024437 Jun 29 06:32:05 PM PDT 24 Jun 29 06:32:40 PM PDT 24 12305570572 ps
T616 /workspace/coverage/default/44.sysrst_ctrl_alert_test.2890071658 Jun 29 06:33:13 PM PDT 24 Jun 29 06:33:15 PM PDT 24 2039983342 ps
T617 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.277304134 Jun 29 06:33:03 PM PDT 24 Jun 29 06:33:06 PM PDT 24 3955931283 ps
T618 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1506243930 Jun 29 06:32:57 PM PDT 24 Jun 29 06:33:03 PM PDT 24 2615612392 ps
T619 /workspace/coverage/default/31.sysrst_ctrl_alert_test.3998186224 Jun 29 06:32:32 PM PDT 24 Jun 29 06:32:35 PM PDT 24 2032662046 ps
T620 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.1154677439 Jun 29 06:31:52 PM PDT 24 Jun 29 06:36:57 PM PDT 24 248864734134 ps
T621 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.4213870444 Jun 29 06:33:25 PM PDT 24 Jun 29 06:34:27 PM PDT 24 23830671792 ps
T622 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.4086418584 Jun 29 06:32:15 PM PDT 24 Jun 29 06:32:53 PM PDT 24 67849103378 ps
T623 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1383661489 Jun 29 06:31:29 PM PDT 24 Jun 29 06:31:31 PM PDT 24 2533935460 ps
T393 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.489241626 Jun 29 06:33:31 PM PDT 24 Jun 29 06:34:05 PM PDT 24 110301451177 ps
T624 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.733919362 Jun 29 06:32:46 PM PDT 24 Jun 29 06:32:55 PM PDT 24 2449473707 ps
T625 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.982079874 Jun 29 06:33:10 PM PDT 24 Jun 29 06:33:18 PM PDT 24 2609251725 ps
T147 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3611278693 Jun 29 06:33:11 PM PDT 24 Jun 29 06:33:15 PM PDT 24 2729680447 ps
T101 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1705757511 Jun 29 06:33:15 PM PDT 24 Jun 29 06:34:55 PM PDT 24 522987132763 ps
T626 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1704878949 Jun 29 06:32:50 PM PDT 24 Jun 29 06:32:53 PM PDT 24 2066861923 ps
T396 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2816361874 Jun 29 06:31:47 PM PDT 24 Jun 29 06:32:45 PM PDT 24 87574941741 ps
T627 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.760414207 Jun 29 06:32:48 PM PDT 24 Jun 29 06:32:53 PM PDT 24 5226485668 ps
T628 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3204037116 Jun 29 06:31:33 PM PDT 24 Jun 29 06:31:37 PM PDT 24 2186310204 ps
T629 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.576589661 Jun 29 06:32:08 PM PDT 24 Jun 29 06:33:17 PM PDT 24 51016745532 ps
T630 /workspace/coverage/default/43.sysrst_ctrl_alert_test.1718070324 Jun 29 06:33:01 PM PDT 24 Jun 29 06:33:04 PM PDT 24 2017761294 ps
T151 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2295682413 Jun 29 06:33:10 PM PDT 24 Jun 29 06:33:17 PM PDT 24 5846961385 ps
T631 /workspace/coverage/default/42.sysrst_ctrl_alert_test.1359944664 Jun 29 06:33:13 PM PDT 24 Jun 29 06:33:17 PM PDT 24 2017754405 ps
T632 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.1949977920 Jun 29 06:32:38 PM PDT 24 Jun 29 06:32:40 PM PDT 24 4025481030 ps
T633 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3793154406 Jun 29 06:31:36 PM PDT 24 Jun 29 06:31:38 PM PDT 24 2340429494 ps
T412 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1444811631 Jun 29 06:32:00 PM PDT 24 Jun 29 06:32:55 PM PDT 24 86934328941 ps
T634 /workspace/coverage/default/14.sysrst_ctrl_stress_all.1466595652 Jun 29 06:31:55 PM PDT 24 Jun 29 06:32:02 PM PDT 24 6885415422 ps
T635 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3778672979 Jun 29 06:32:40 PM PDT 24 Jun 29 06:32:41 PM PDT 24 2172763994 ps
T636 /workspace/coverage/default/20.sysrst_ctrl_smoke.1891737608 Jun 29 06:32:09 PM PDT 24 Jun 29 06:32:13 PM PDT 24 2112861131 ps
T637 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3261998174 Jun 29 06:31:25 PM PDT 24 Jun 29 06:31:34 PM PDT 24 3152495961 ps
T168 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.4197315947 Jun 29 06:31:49 PM PDT 24 Jun 29 06:32:01 PM PDT 24 4413541533 ps
T394 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.2516180906 Jun 29 06:32:27 PM PDT 24 Jun 29 06:35:08 PM PDT 24 58480646210 ps
T299 /workspace/coverage/default/28.sysrst_ctrl_stress_all.573294917 Jun 29 06:32:26 PM PDT 24 Jun 29 06:33:47 PM PDT 24 139132962146 ps
T300 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.2229609364 Jun 29 06:32:18 PM PDT 24 Jun 29 06:33:04 PM PDT 24 76956902139 ps
T398 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1013670465 Jun 29 06:33:05 PM PDT 24 Jun 29 06:33:30 PM PDT 24 186119320414 ps
T638 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.2303672516 Jun 29 06:31:26 PM PDT 24 Jun 29 06:31:35 PM PDT 24 2437441650 ps
T639 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3191793830 Jun 29 06:32:12 PM PDT 24 Jun 29 06:32:20 PM PDT 24 5726653194 ps
T640 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.518997000 Jun 29 06:32:26 PM PDT 24 Jun 29 06:32:28 PM PDT 24 3992219169 ps
T641 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.588200544 Jun 29 06:31:33 PM PDT 24 Jun 29 06:31:36 PM PDT 24 3110945452 ps
T642 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1157819287 Jun 29 06:31:49 PM PDT 24 Jun 29 06:31:52 PM PDT 24 2214985678 ps
T643 /workspace/coverage/default/43.sysrst_ctrl_smoke.1812975764 Jun 29 06:33:07 PM PDT 24 Jun 29 06:33:09 PM PDT 24 2133181409 ps
T644 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.17542589 Jun 29 06:33:22 PM PDT 24 Jun 29 06:36:20 PM PDT 24 67088997367 ps
T384 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.3741860422 Jun 29 06:31:32 PM PDT 24 Jun 29 06:33:43 PM PDT 24 51852890711 ps
T169 /workspace/coverage/default/26.sysrst_ctrl_stress_all.3156881702 Jun 29 06:32:26 PM PDT 24 Jun 29 06:32:55 PM PDT 24 13890107448 ps
T389 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1029814759 Jun 29 06:31:35 PM PDT 24 Jun 29 06:33:38 PM PDT 24 96905849613 ps
T206 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3256604191 Jun 29 06:33:10 PM PDT 24 Jun 29 06:34:56 PM PDT 24 49023248350 ps
T645 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.4248878603 Jun 29 06:32:10 PM PDT 24 Jun 29 06:32:18 PM PDT 24 2466813917 ps
T646 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2089617479 Jun 29 06:32:39 PM PDT 24 Jun 29 06:32:41 PM PDT 24 2633822241 ps
T383 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3508652237 Jun 29 06:31:24 PM PDT 24 Jun 29 06:35:10 PM PDT 24 89493732959 ps
T647 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2435178865 Jun 29 06:31:46 PM PDT 24 Jun 29 06:31:54 PM PDT 24 2426337433 ps
T648 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.957292741 Jun 29 06:33:04 PM PDT 24 Jun 29 06:33:13 PM PDT 24 2463246930 ps
T649 /workspace/coverage/default/19.sysrst_ctrl_stress_all.676276818 Jun 29 06:32:01 PM PDT 24 Jun 29 06:34:18 PM PDT 24 234347567081 ps
T650 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1109988087 Jun 29 06:32:58 PM PDT 24 Jun 29 06:33:07 PM PDT 24 5030336090 ps
T651 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1008712563 Jun 29 06:31:44 PM PDT 24 Jun 29 06:32:29 PM PDT 24 129794892905 ps
T652 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.627784898 Jun 29 06:31:47 PM PDT 24 Jun 29 06:33:22 PM PDT 24 140036723360 ps
T653 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1093176670 Jun 29 06:31:47 PM PDT 24 Jun 29 06:31:51 PM PDT 24 9920699684 ps
T654 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.1187305407 Jun 29 06:33:05 PM PDT 24 Jun 29 06:34:43 PM PDT 24 141768779729 ps
T307 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.396176156 Jun 29 06:32:58 PM PDT 24 Jun 29 06:34:45 PM PDT 24 164837740176 ps
T655 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2667634488 Jun 29 06:33:28 PM PDT 24 Jun 29 06:34:01 PM PDT 24 24839090229 ps
T656 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.844463593 Jun 29 06:32:38 PM PDT 24 Jun 29 06:32:45 PM PDT 24 2612259382 ps
T657 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1253422966 Jun 29 06:31:47 PM PDT 24 Jun 29 06:31:51 PM PDT 24 3230395982 ps
T658 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3111962605 Jun 29 06:31:56 PM PDT 24 Jun 29 06:32:05 PM PDT 24 2609588244 ps
T413 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3463134343 Jun 29 06:31:48 PM PDT 24 Jun 29 06:32:03 PM PDT 24 94247188039 ps
T356 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.4013924610 Jun 29 06:32:03 PM PDT 24 Jun 29 06:32:56 PM PDT 24 117450964269 ps
T659 /workspace/coverage/default/2.sysrst_ctrl_alert_test.2996848565 Jun 29 06:31:36 PM PDT 24 Jun 29 06:31:42 PM PDT 24 2016781886 ps
T660 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2873465070 Jun 29 06:32:18 PM PDT 24 Jun 29 06:32:22 PM PDT 24 2238173588 ps
T661 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2333113902 Jun 29 06:31:53 PM PDT 24 Jun 29 06:31:55 PM PDT 24 2583753676 ps
T662 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2188314081 Jun 29 06:32:45 PM PDT 24 Jun 29 06:33:28 PM PDT 24 74945934076 ps
T663 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.4209885714 Jun 29 06:32:39 PM PDT 24 Jun 29 06:32:47 PM PDT 24 2509710920 ps
T664 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.2847120536 Jun 29 06:31:48 PM PDT 24 Jun 29 06:31:52 PM PDT 24 3078404205 ps
T665 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1536332750 Jun 29 06:33:31 PM PDT 24 Jun 29 06:34:00 PM PDT 24 34324883781 ps
T666 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.1218227944 Jun 29 06:32:18 PM PDT 24 Jun 29 06:32:20 PM PDT 24 2627844988 ps
T667 /workspace/coverage/default/30.sysrst_ctrl_alert_test.2887144859 Jun 29 06:32:38 PM PDT 24 Jun 29 06:32:41 PM PDT 24 2030153421 ps
T668 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.281946025 Jun 29 06:32:31 PM PDT 24 Jun 29 06:32:34 PM PDT 24 2487612523 ps
T669 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2634821147 Jun 29 06:32:44 PM PDT 24 Jun 29 06:32:53 PM PDT 24 3522640564 ps
T670 /workspace/coverage/default/33.sysrst_ctrl_smoke.4195751294 Jun 29 06:32:33 PM PDT 24 Jun 29 06:32:35 PM PDT 24 2130230937 ps
T283 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.2822202978 Jun 29 06:33:04 PM PDT 24 Jun 29 06:33:13 PM PDT 24 4686047226 ps
T308 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.4201655583 Jun 29 06:32:27 PM PDT 24 Jun 29 06:33:06 PM PDT 24 55803819813 ps
T387 /workspace/coverage/default/40.sysrst_ctrl_stress_all.2049772347 Jun 29 06:32:59 PM PDT 24 Jun 29 06:37:19 PM PDT 24 433723156175 ps
T671 /workspace/coverage/default/17.sysrst_ctrl_alert_test.2355502106 Jun 29 06:32:03 PM PDT 24 Jun 29 06:32:07 PM PDT 24 2013066245 ps
T672 /workspace/coverage/default/45.sysrst_ctrl_stress_all.2071764023 Jun 29 06:33:07 PM PDT 24 Jun 29 06:33:15 PM PDT 24 12459612399 ps
T673 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3685713556 Jun 29 06:33:16 PM PDT 24 Jun 29 06:33:20 PM PDT 24 3792209526 ps
T674 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2137870974 Jun 29 06:32:55 PM PDT 24 Jun 29 06:32:57 PM PDT 24 2523399272 ps
T675 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1272314990 Jun 29 06:31:39 PM PDT 24 Jun 29 06:31:51 PM PDT 24 5312758591 ps
T399 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2588071186 Jun 29 06:33:17 PM PDT 24 Jun 29 06:36:15 PM PDT 24 73331277827 ps
T676 /workspace/coverage/default/39.sysrst_ctrl_smoke.1138371695 Jun 29 06:32:50 PM PDT 24 Jun 29 06:32:57 PM PDT 24 2113277199 ps
T125 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3488234739 Jun 29 06:33:13 PM PDT 24 Jun 29 06:33:42 PM PDT 24 1787159495152 ps
T677 /workspace/coverage/default/41.sysrst_ctrl_smoke.3321848197 Jun 29 06:32:58 PM PDT 24 Jun 29 06:33:00 PM PDT 24 2131807921 ps
T678 /workspace/coverage/default/25.sysrst_ctrl_smoke.298891784 Jun 29 06:32:20 PM PDT 24 Jun 29 06:32:23 PM PDT 24 2137768598 ps
T679 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3281644588 Jun 29 06:32:47 PM PDT 24 Jun 29 06:32:51 PM PDT 24 3606136457 ps
T680 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3754414520 Jun 29 06:33:01 PM PDT 24 Jun 29 06:33:08 PM PDT 24 3778374630 ps
T681 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.4230538241 Jun 29 06:31:48 PM PDT 24 Jun 29 06:31:57 PM PDT 24 9982166992 ps
T682 /workspace/coverage/default/47.sysrst_ctrl_stress_all.2855576457 Jun 29 06:33:11 PM PDT 24 Jun 29 06:35:11 PM PDT 24 360794893030 ps
T683 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1679944206 Jun 29 06:33:12 PM PDT 24 Jun 29 06:33:20 PM PDT 24 2613135648 ps
T684 /workspace/coverage/default/25.sysrst_ctrl_stress_all.3289891840 Jun 29 06:32:21 PM PDT 24 Jun 29 06:32:44 PM PDT 24 8151368240 ps
T685 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1615764944 Jun 29 06:33:02 PM PDT 24 Jun 29 06:33:12 PM PDT 24 3743159227 ps
T149 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.398345909 Jun 29 06:32:39 PM PDT 24 Jun 29 06:33:03 PM PDT 24 38924282917 ps
T158 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2358524184 Jun 29 06:32:19 PM PDT 24 Jun 29 06:32:25 PM PDT 24 3446352516 ps
T159 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2148834708 Jun 29 06:33:19 PM PDT 24 Jun 29 06:36:09 PM PDT 24 63916502875 ps
T160 /workspace/coverage/default/23.sysrst_ctrl_stress_all.3050668962 Jun 29 06:32:19 PM PDT 24 Jun 29 06:32:36 PM PDT 24 6291721001 ps
T161 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.801686134 Jun 29 06:33:12 PM PDT 24 Jun 29 06:33:16 PM PDT 24 2475186045 ps
T162 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.561612796 Jun 29 06:32:48 PM PDT 24 Jun 29 06:32:56 PM PDT 24 2510924985 ps
T163 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1911532591 Jun 29 06:32:33 PM PDT 24 Jun 29 06:32:36 PM PDT 24 3316522808 ps
T164 /workspace/coverage/default/7.sysrst_ctrl_smoke.3141770142 Jun 29 06:31:42 PM PDT 24 Jun 29 06:31:45 PM PDT 24 2128958149 ps
T165 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2157867560 Jun 29 06:32:57 PM PDT 24 Jun 29 06:33:00 PM PDT 24 2094758888 ps
T166 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.71914718 Jun 29 06:31:59 PM PDT 24 Jun 29 06:34:01 PM PDT 24 93431628856 ps
T686 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1726993885 Jun 29 06:31:37 PM PDT 24 Jun 29 06:34:49 PM PDT 24 71581297436 ps
T687 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3714352451 Jun 29 06:31:40 PM PDT 24 Jun 29 06:31:48 PM PDT 24 2479222165 ps
T688 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.935340006 Jun 29 06:33:15 PM PDT 24 Jun 29 06:33:21 PM PDT 24 2191495980 ps
T689 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.4081482907 Jun 29 06:32:20 PM PDT 24 Jun 29 06:32:26 PM PDT 24 2048216486 ps
T690 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.107600696 Jun 29 06:32:00 PM PDT 24 Jun 29 06:32:09 PM PDT 24 3636053021 ps
T691 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3397638230 Jun 29 06:32:03 PM PDT 24 Jun 29 06:33:01 PM PDT 24 83958511704 ps
T692 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.816186953 Jun 29 06:33:18 PM PDT 24 Jun 29 06:33:21 PM PDT 24 2668859896 ps
T693 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1610677788 Jun 29 06:32:00 PM PDT 24 Jun 29 06:32:02 PM PDT 24 4488369690 ps
T694 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.2061045929 Jun 29 06:32:05 PM PDT 24 Jun 29 06:32:07 PM PDT 24 2277041024 ps
T695 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1600869819 Jun 29 06:32:05 PM PDT 24 Jun 29 06:32:13 PM PDT 24 2184722274 ps
T696 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3180998989 Jun 29 06:33:02 PM PDT 24 Jun 29 06:38:55 PM PDT 24 136829766438 ps
T397 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1824499780 Jun 29 06:33:20 PM PDT 24 Jun 29 06:39:06 PM PDT 24 145636636328 ps
T133 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.2750192324 Jun 29 06:32:19 PM PDT 24 Jun 29 06:32:24 PM PDT 24 5908383789 ps
T697 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.2254801809 Jun 29 06:32:38 PM PDT 24 Jun 29 06:32:43 PM PDT 24 3880163014 ps
T698 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1482040570 Jun 29 06:32:42 PM PDT 24 Jun 29 06:32:50 PM PDT 24 2611613854 ps
T699 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.1253091242 Jun 29 06:32:00 PM PDT 24 Jun 29 06:32:03 PM PDT 24 2535500437 ps
T700 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1527126574 Jun 29 06:32:52 PM PDT 24 Jun 29 06:32:55 PM PDT 24 2484231288 ps
T701 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.3022120669 Jun 29 06:32:35 PM PDT 24 Jun 29 06:32:38 PM PDT 24 2594184532 ps
T702 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3607667081 Jun 29 06:31:33 PM PDT 24 Jun 29 06:31:38 PM PDT 24 2611425306 ps
T703 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.2845848002 Jun 29 06:32:31 PM PDT 24 Jun 29 06:32:40 PM PDT 24 3371048889 ps
T704 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.2442971790 Jun 29 06:32:05 PM PDT 24 Jun 29 06:36:28 PM PDT 24 97965436066 ps
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T706 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3506569086 Jun 29 06:31:55 PM PDT 24 Jun 29 06:31:59 PM PDT 24 3412766047 ps
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T284 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3533760404 Jun 29 06:33:26 PM PDT 24 Jun 29 06:34:18 PM PDT 24 18829999667 ps
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T712 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2269622811 Jun 29 06:31:55 PM PDT 24 Jun 29 06:41:13 PM PDT 24 230569921849 ps
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T716 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.4292036359 Jun 29 06:31:29 PM PDT 24 Jun 29 06:31:35 PM PDT 24 3058298000 ps
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T723 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.3425557016 Jun 29 06:32:19 PM PDT 24 Jun 29 06:32:24 PM PDT 24 2612781859 ps
T724 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1999731789 Jun 29 06:31:25 PM PDT 24 Jun 29 06:31:31 PM PDT 24 2057031434 ps
T725 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3808015215 Jun 29 06:32:46 PM PDT 24 Jun 29 06:32:49 PM PDT 24 2621638169 ps
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T726 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2104300806 Jun 29 06:33:08 PM PDT 24 Jun 29 06:33:10 PM PDT 24 2679201891 ps
T401 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.866582898 Jun 29 06:33:18 PM PDT 24 Jun 29 06:33:56 PM PDT 24 57533759866 ps
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T730 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3942914807 Jun 29 06:31:36 PM PDT 24 Jun 29 06:31:43 PM PDT 24 2170683179 ps
T731 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3881994638 Jun 29 06:32:59 PM PDT 24 Jun 29 06:33:06 PM PDT 24 2454839197 ps
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T733 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.3475848186 Jun 29 06:31:54 PM PDT 24 Jun 29 06:32:04 PM PDT 24 3320754112 ps
T734 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1835598032 Jun 29 06:31:40 PM PDT 24 Jun 29 06:31:43 PM PDT 24 11900495239 ps
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T736 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3124230255 Jun 29 06:32:57 PM PDT 24 Jun 29 06:33:00 PM PDT 24 2486992895 ps
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T739 /workspace/coverage/default/26.sysrst_ctrl_alert_test.1846159786 Jun 29 06:32:31 PM PDT 24 Jun 29 06:32:37 PM PDT 24 2010089639 ps
T740 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3363020678 Jun 29 06:32:07 PM PDT 24 Jun 29 06:37:06 PM PDT 24 115686772415 ps
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T741 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3297858713 Jun 29 06:33:26 PM PDT 24 Jun 29 06:34:16 PM PDT 24 69946172467 ps
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T418 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3854347513 Jun 29 06:33:03 PM PDT 24 Jun 29 06:33:48 PM PDT 24 83032719229 ps
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T744 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3905664963 Jun 29 06:31:53 PM PDT 24 Jun 29 06:32:00 PM PDT 24 2609882016 ps
T745 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1399527081 Jun 29 06:31:53 PM PDT 24 Jun 29 06:31:56 PM PDT 24 4824970666 ps
T746 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2040703141 Jun 29 06:31:47 PM PDT 24 Jun 29 06:31:55 PM PDT 24 2508120417 ps
T747 /workspace/coverage/default/21.sysrst_ctrl_alert_test.3120846546 Jun 29 06:32:13 PM PDT 24 Jun 29 06:32:16 PM PDT 24 2015872926 ps
T748 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.772490224 Jun 29 06:31:35 PM PDT 24 Jun 29 06:31:43 PM PDT 24 2510142831 ps
T749 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.4241247208 Jun 29 06:32:08 PM PDT 24 Jun 29 06:32:18 PM PDT 24 3467315538 ps
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T134 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.90584714 Jun 29 06:32:26 PM PDT 24 Jun 29 06:34:28 PM PDT 24 50946020080 ps
T752 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2438896389 Jun 29 06:32:52 PM PDT 24 Jun 29 06:33:02 PM PDT 24 4008807839 ps
T753 /workspace/coverage/default/32.sysrst_ctrl_stress_all.664991434 Jun 29 06:32:37 PM PDT 24 Jun 29 06:32:44 PM PDT 24 11942984176 ps
T102 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.4089036618 Jun 29 06:32:24 PM PDT 24 Jun 29 06:32:34 PM PDT 24 3724773599 ps
T754 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1159640880 Jun 29 06:31:35 PM PDT 24 Jun 29 06:31:40 PM PDT 24 2458330632 ps
T755 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.335799480 Jun 29 06:32:06 PM PDT 24 Jun 29 06:37:34 PM PDT 24 121427473026 ps
T756 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3200992480 Jun 29 06:32:41 PM PDT 24 Jun 29 06:32:50 PM PDT 24 3387852972 ps
T757 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2289009732 Jun 29 06:31:25 PM PDT 24 Jun 29 06:31:30 PM PDT 24 2616857967 ps
T310 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.204281254 Jun 29 06:31:50 PM PDT 24 Jun 29 06:33:42 PM PDT 24 164499276829 ps
T335 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.448284215 Jun 29 06:32:43 PM PDT 24 Jun 29 06:33:14 PM PDT 24 67450708884 ps
T758 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.283377977 Jun 29 06:31:38 PM PDT 24 Jun 29 06:31:45 PM PDT 24 4093767759 ps
T759 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.3335469761 Jun 29 06:32:07 PM PDT 24 Jun 29 06:32:11 PM PDT 24 4352181693 ps
T390 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.4175594055 Jun 29 06:32:26 PM PDT 24 Jun 29 06:34:09 PM PDT 24 75520776591 ps
T760 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1404347076 Jun 29 06:31:38 PM PDT 24 Jun 29 06:31:45 PM PDT 24 4414837341 ps
T761 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.892608703 Jun 29 06:33:19 PM PDT 24 Jun 29 06:34:07 PM PDT 24 69941934198 ps
T762 /workspace/coverage/default/49.sysrst_ctrl_alert_test.3277776794 Jun 29 06:33:20 PM PDT 24 Jun 29 06:33:26 PM PDT 24 2010922365 ps
T135 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2269582670 Jun 29 06:31:50 PM PDT 24 Jun 29 06:32:53 PM PDT 24 95983566402 ps
T763 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.1257628939 Jun 29 06:32:25 PM PDT 24 Jun 29 06:32:27 PM PDT 24 2044482511 ps
T764 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2058704501 Jun 29 06:32:36 PM PDT 24 Jun 29 06:32:43 PM PDT 24 2067273491 ps
T765 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1497867036 Jun 29 06:32:28 PM PDT 24 Jun 29 06:32:43 PM PDT 24 26096691753 ps
T766 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.3099325503 Jun 29 06:32:09 PM PDT 24 Jun 29 06:32:12 PM PDT 24 2677327930 ps
T767 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1404602745 Jun 29 06:32:08 PM PDT 24 Jun 29 06:32:20 PM PDT 24 27856547672 ps
T282 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.3136953171 Jun 29 06:31:38 PM PDT 24 Jun 29 06:31:47 PM PDT 24 2651690952 ps
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T769 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2038467008 Jun 29 06:33:20 PM PDT 24 Jun 29 06:33:57 PM PDT 24 53572539357 ps
T770 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.951034903 Jun 29 06:31:26 PM PDT 24 Jun 29 06:31:32 PM PDT 24 2935408267 ps
T771 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1646519297 Jun 29 06:33:04 PM PDT 24 Jun 29 06:33:24 PM PDT 24 26108083782 ps
T772 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.4127095077 Jun 29 06:32:48 PM PDT 24 Jun 29 06:32:54 PM PDT 24 2056572238 ps
T773 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3897641896 Jun 29 06:31:49 PM PDT 24 Jun 29 06:32:11 PM PDT 24 10250238188 ps
T136 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3872382425 Jun 29 06:32:38 PM PDT 24 Jun 29 06:33:06 PM PDT 24 2530918117267 ps
T774 /workspace/coverage/default/23.sysrst_ctrl_alert_test.1014705721 Jun 29 06:32:17 PM PDT 24 Jun 29 06:32:20 PM PDT 24 2035001877 ps
T148 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3163996262 Jun 29 06:32:20 PM PDT 24 Jun 29 06:33:14 PM PDT 24 2092644750234 ps
T126 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.902164469 Jun 29 06:32:45 PM PDT 24 Jun 29 06:32:50 PM PDT 24 7766370434 ps
T775 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3014453567 Jun 29 06:32:44 PM PDT 24 Jun 29 06:32:52 PM PDT 24 2514577330 ps
T103 /workspace/coverage/default/27.sysrst_ctrl_stress_all.4048484324 Jun 29 06:32:25 PM PDT 24 Jun 29 06:33:09 PM PDT 24 18483732271 ps
T776 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.550585804 Jun 29 06:32:43 PM PDT 24 Jun 29 06:34:51 PM PDT 24 198298097138 ps
T777 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2886648650 Jun 29 06:32:38 PM PDT 24 Jun 29 06:32:46 PM PDT 24 2457372951 ps
T778 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1548302450 Jun 29 06:33:18 PM PDT 24 Jun 29 06:33:46 PM PDT 24 45249674247 ps
T779 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2655925438 Jun 29 06:31:47 PM PDT 24 Jun 29 06:31:56 PM PDT 24 2510749726 ps
T780 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2308265688 Jun 29 06:32:01 PM PDT 24 Jun 29 06:34:56 PM PDT 24 466138778501 ps
T781 /workspace/coverage/default/35.sysrst_ctrl_smoke.555752363 Jun 29 06:32:39 PM PDT 24 Jun 29 06:32:42 PM PDT 24 2130354088 ps
T782 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1250775018 Jun 29 06:33:01 PM PDT 24 Jun 29 06:33:08 PM PDT 24 2095999074 ps
T22 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.4260947604 Jun 29 06:27:20 PM PDT 24 Jun 29 06:27:45 PM PDT 24 9727865937 ps
T30 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.793695591 Jun 29 06:27:07 PM PDT 24 Jun 29 06:27:27 PM PDT 24 22269246925 ps
T23 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2140908546 Jun 29 06:27:21 PM PDT 24 Jun 29 06:27:25 PM PDT 24 4852856711 ps
T373 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1035449418 Jun 29 06:27:10 PM PDT 24 Jun 29 06:27:22 PM PDT 24 3341389446 ps
T317 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1445415147 Jun 29 06:27:20 PM PDT 24 Jun 29 06:27:27 PM PDT 24 2063360927 ps
T324 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.177767563 Jun 29 06:27:24 PM PDT 24 Jun 29 06:27:27 PM PDT 24 2103545021 ps
T24 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1363168987 Jun 29 06:27:13 PM PDT 24 Jun 29 06:27:21 PM PDT 24 2050809422 ps
T783 /workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.891271890 Jun 29 06:27:30 PM PDT 24 Jun 29 06:27:31 PM PDT 24 2140021084 ps
T784 /workspace/coverage/cover_reg_top/37.sysrst_ctrl_intr_test.2133987490 Jun 29 06:27:30 PM PDT 24 Jun 29 06:27:36 PM PDT 24 2009723668 ps
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