Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.76	99.33	96.46	100.00	96.79	98.78	99.52	93.41

Total tests in report: 910

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
63.61	63.61	82.44	82.44	73.71	73.71	87.67	87.67	20.51	20.51	84.25	84.25	71.48	71.48	25.19	25.19	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3792990234
73.17	9.56	89.89	7.45	83.19	9.48	92.69	5.02	34.62	14.10	90.31	6.06	80.83	9.34	40.65	15.46	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4196871228
81.48	8.32	94.66	4.78	88.20	5.01	93.15	0.46	59.62	25.00	94.57	4.25	90.46	9.63	49.73	9.09	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1900411532
85.23	3.74	96.51	1.85	90.60	2.40	93.15	0.00	77.56	17.95	96.41	1.85	92.29	1.83	50.05	0.32	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2816996901
87.30	2.08	97.03	0.52	91.13	0.53	93.15	0.00	81.41	3.85	96.78	0.37	93.74	1.45	57.86	7.81	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.230049422
88.88	1.57	97.65	0.62	91.86	0.73	93.38	0.23	85.26	3.85	97.19	0.41	94.89	1.16	61.90	4.04	/workspace/coverage/default/26.sysrst_ctrl_stress_all.2452152921
90.18	1.31	97.67	0.02	93.05	1.19	94.06	0.68	85.26	0.00	97.23	0.04	94.89	0.00	69.13	7.23	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.303753309
91.29	1.11	97.89	0.22	93.53	0.48	98.17	4.11	87.18	1.92	97.41	0.18	95.66	0.77	69.18	0.05	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.4285856498
91.99	0.70	98.15	0.26	93.96	0.43	98.17	0.00	87.82	0.64	97.49	0.07	96.15	0.48	72.21	3.03	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2597620626
92.68	0.69	98.15	0.00	93.96	0.00	98.17	0.00	87.82	0.00	97.49	0.00	96.15	0.00	77.05	4.84	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.190964613
93.14	0.46	98.17	0.02	93.96	0.00	98.17	0.00	87.82	0.00	97.52	0.04	96.15	0.00	80.18	3.13	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.3973584075
93.51	0.37	98.21	0.04	94.06	0.10	98.17	0.00	87.82	0.00	97.52	0.00	96.24	0.10	82.52	2.34	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.255800382
93.85	0.34	98.30	0.09	94.14	0.08	98.17	0.00	89.10	1.28	97.63	0.11	96.53	0.29	83.05	0.53	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1659491541
94.16	0.31	98.40	0.09	94.24	0.10	98.17	0.00	90.38	1.28	97.74	0.11	96.82	0.29	83.37	0.32	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2987948427
94.44	0.28	98.45	0.06	94.31	0.08	99.54	1.37	90.38	0.00	97.74	0.00	97.11	0.29	83.53	0.16	/workspace/coverage/default/13.sysrst_ctrl_alert_test.1820685928
94.71	0.27	98.51	0.06	94.41	0.10	99.54	0.00	90.38	0.00	97.74	0.00	97.11	0.00	85.28	1.75	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2878219350
94.97	0.26	98.60	0.09	94.59	0.18	99.54	0.00	91.03	0.64	97.89	0.15	97.50	0.39	85.65	0.37	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.4050590159
95.21	0.24	98.64	0.04	95.37	0.78	99.54	0.00	91.03	0.00	97.93	0.04	97.59	0.10	86.40	0.74	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3439447186
95.41	0.20	98.69	0.06	95.37	0.00	99.54	0.00	91.67	0.64	97.97	0.04	97.59	0.00	87.04	0.64	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2828767735
95.59	0.18	98.73	0.04	95.40	0.03	99.54	0.00	92.31	0.64	98.00	0.04	97.69	0.10	87.46	0.43	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3810093270
95.76	0.17	98.79	0.06	95.50	0.10	99.54	0.00	92.95	0.64	98.08	0.07	97.98	0.29	87.46	0.00	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1496321702
95.91	0.16	98.81	0.02	95.55	0.05	99.54	0.00	92.95	0.00	98.11	0.04	98.07	0.10	88.36	0.90	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.748164052
96.05	0.14	98.88	0.07	95.58	0.03	99.54	0.00	93.59	0.64	98.23	0.11	98.17	0.10	88.36	0.00	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.235332236
96.18	0.13	98.92	0.04	95.60	0.03	99.54	0.00	94.23	0.64	98.26	0.04	98.27	0.10	88.47	0.11	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3964971058
96.31	0.13	98.96	0.04	95.63	0.03	99.54	0.00	94.23	0.00	98.26	0.00	98.27	0.00	89.32	0.85	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3933347369
96.44	0.13	98.99	0.04	95.65	0.03	99.54	0.00	94.87	0.64	98.30	0.04	98.36	0.10	89.37	0.05	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2354466745
96.57	0.12	99.01	0.02	95.75	0.10	99.54	0.00	94.87	0.00	98.37	0.07	99.04	0.67	89.37	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.780029080
96.69	0.12	99.05	0.04	95.78	0.03	99.54	0.00	95.51	0.64	98.41	0.04	99.13	0.10	89.37	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3821463761
96.81	0.12	99.09	0.04	95.80	0.03	99.54	0.00	96.15	0.64	98.45	0.04	99.23	0.10	89.37	0.00	/workspace/coverage/default/20.sysrst_ctrl_stress_all.1574013545
96.92	0.12	99.12	0.04	95.83	0.03	99.54	0.00	96.79	0.64	98.48	0.04	99.33	0.10	89.37	0.00	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.3424509751
97.02	0.10	99.12	0.00	95.83	0.00	99.54	0.00	96.79	0.00	98.48	0.00	99.33	0.00	90.06	0.69	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3261029947
97.12	0.10	99.12	0.00	95.85	0.03	100.00	0.46	96.79	0.00	98.48	0.00	99.42	0.10	90.17	0.11	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1644576443
97.21	0.09	99.18	0.06	95.85	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.42	0.00	90.75	0.58	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3549774080
97.28	0.07	99.18	0.00	95.85	0.00	100.00	0.00	96.79	0.00	98.48	0.00	99.42	0.00	91.23	0.48	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.610593239
97.35	0.07	99.22	0.04	96.11	0.25	100.00	0.00	96.79	0.00	98.56	0.07	99.52	0.10	91.23	0.00	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1830420121
97.39	0.05	99.22	0.00	96.11	0.00	100.00	0.00	96.79	0.00	98.56	0.00	99.52	0.00	91.55	0.32	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.321406630
97.43	0.04	99.22	0.00	96.11	0.00	100.00	0.00	96.79	0.00	98.56	0.00	99.52	0.00	91.82	0.27	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2354378669
97.46	0.03	99.22	0.00	96.11	0.00	100.00	0.00	96.79	0.00	98.56	0.00	99.52	0.00	92.03	0.21	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3816306289
97.49	0.03	99.22	0.00	96.11	0.00	100.00	0.00	96.79	0.00	98.56	0.00	99.52	0.00	92.24	0.21	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.724019279
97.52	0.03	99.22	0.00	96.31	0.20	100.00	0.00	96.79	0.00	98.56	0.00	99.52	0.00	92.24	0.00	/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3096297234
97.54	0.02	99.27	0.06	96.31	0.00	100.00	0.00	96.79	0.00	98.67	0.11	99.52	0.00	92.24	0.00	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.2846235467
97.56	0.02	99.27	0.00	96.33	0.03	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	92.35	0.11	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2766949186
97.58	0.02	99.31	0.04	96.33	0.00	100.00	0.00	96.79	0.00	98.74	0.07	99.52	0.00	92.35	0.00	/workspace/coverage/default/13.sysrst_ctrl_stress_all.3714814719
97.59	0.02	99.31	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.45	0.11	/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1767593178
97.61	0.02	99.31	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.56	0.11	/workspace/coverage/default/19.sysrst_ctrl_stress_all.1448894076
97.62	0.02	99.31	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.67	0.11	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3292278484
97.64	0.02	99.31	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.77	0.11	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.658425958
97.65	0.02	99.31	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.88	0.11	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.43994476
97.67	0.02	99.31	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.74	0.00	99.52	0.00	92.99	0.11	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1615438508
97.68	0.01	99.33	0.02	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.04	99.52	0.00	92.99	0.00	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2105206206
97.69	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.04	0.05	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2424977097
97.69	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.09	0.05	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3832574620
97.70	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.15	0.05	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3377824608
97.71	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.20	0.05	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.457551647
97.72	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.25	0.05	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1156344137
97.72	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.30	0.05	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3052904929
97.73	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.36	0.05	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.722301447
97.74	0.01	99.33	0.00	96.33	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.41	0.05	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3162530283
97.74	0.01	99.33	0.00	96.36	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.41	0.00	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1338399859
97.75	0.01	99.33	0.00	96.39	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.41	0.00	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2182294532
97.75	0.01	99.33	0.00	96.41	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.41	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.1742542241
97.75	0.01	99.33	0.00	96.44	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	93.41	0.00	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.421462784

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.79426799
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1368006802
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2774054919
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1386413364
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.812291562
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1913992498
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3210725944
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.68899316
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1148225315
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1986258241
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2809365289
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.466391773
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2362829948
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2651455346
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2536058768
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2190729332
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3473576276
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3208399705
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.3740660783
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1468555228
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.232898276
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1972287638
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1928657155
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1485600589
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.4000966180
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.4123550538
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1909938967
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2713791529
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.466919371
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.46521469
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1050806671
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1730172863
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.624671063
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.4001225909
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.618385948
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.66371981
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.673757976
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.4115240983
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2490129831
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3194033214
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2619389665
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2753193637
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.79875247
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.360016991
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.3924813361
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.156921009
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.313405155
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.347855806
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2407439074
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3693670060
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.866130191
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.84751385
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1556686644
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2601496662
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2668796794
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.69514906
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3972151862
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.3690524504
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1614428979
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.495386201
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.677926473
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.4036859321
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3198480831
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.1481902013
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/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3393978388
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.337118395
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2515112555
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.25724314
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1313457215
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1887290011
/workspace/coverage/default/40.sysrst_ctrl_smoke.3698595484
/workspace/coverage/default/40.sysrst_ctrl_stress_all.1435929081
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.259272951
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1791966587
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1106327877
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.2286115719
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3753457656
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1626548359
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3815211500
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1006901310
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1009458961
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1502696015
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2119527716
/workspace/coverage/default/41.sysrst_ctrl_smoke.3706138600
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2000096481
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1283037373
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.367033698
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3354662904
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2798493048
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1557614027
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2662654728
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.955813753
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2497120850
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.35566419
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1664452509
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.147924473
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3667419875
/workspace/coverage/default/42.sysrst_ctrl_smoke.185021970
/workspace/coverage/default/42.sysrst_ctrl_stress_all.3471045590
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.909239063
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3263964600
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2033729486
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2901624425
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1010294386
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.316143187
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3330091893
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2205779963
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3267595983
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.11077639
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2761057430
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2953122166
/workspace/coverage/default/43.sysrst_ctrl_smoke.1862997666
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3109260666
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.956788947
/workspace/coverage/default/44.sysrst_ctrl_alert_test.787676630
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2046721733
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.4099665316
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1940718494
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3310515749
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2748138243
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.338988830
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4074788236
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3348966675
/workspace/coverage/default/44.sysrst_ctrl_smoke.2318507233
/workspace/coverage/default/44.sysrst_ctrl_stress_all.3537273294
/workspace/coverage/default/45.sysrst_ctrl_alert_test.3090375555
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2817677307
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2809338038
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3913017751
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1445774591
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.946768486
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3688599025
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2367354127
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1418320804
/workspace/coverage/default/45.sysrst_ctrl_smoke.3543879681
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3326531482
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1915149058
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3372142930
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.268256196
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.4129343780
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2401109607
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.466553718
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1202890343
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2476152000
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3795380770
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.4229919434
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2497997671
/workspace/coverage/default/46.sysrst_ctrl_smoke.288009232
/workspace/coverage/default/46.sysrst_ctrl_stress_all.4157148569
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3120261794
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2510047321
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1566580838
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2882381251
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3646279110
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3428604750
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.669148710
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3470365028
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3553330064
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.391599874
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2856333470
/workspace/coverage/default/47.sysrst_ctrl_smoke.157725690
/workspace/coverage/default/47.sysrst_ctrl_stress_all.84470631
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.875906087
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1560635424
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3205983062
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2835097284
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1342438873
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2835768462
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2548742962
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.316369735
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.803561543
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2763310585
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.534237490
/workspace/coverage/default/48.sysrst_ctrl_smoke.3668168127
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3947098834
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3793713002
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2858481543
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1406031101
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3271717276
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3645965919
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3139534192
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1157192909
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2751729712
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.790410134
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3972700142
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2978091853
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3761052691
/workspace/coverage/default/49.sysrst_ctrl_smoke.129646695
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3796185761
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2549177439
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1006645469
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3044683787
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3301247736
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1347697669
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.675965564
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2647592375
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1464400392
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.712925864
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3168115473
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1727527645
/workspace/coverage/default/5.sysrst_ctrl_smoke.1482079300
/workspace/coverage/default/5.sysrst_ctrl_stress_all.290156804
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.160324868
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.255741862
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.583460498
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2490250133
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2182182126
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3569146678
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2324668948
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2834559712
/workspace/coverage/default/6.sysrst_ctrl_alert_test.4160134883
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2789416955
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.28936377
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.397211446
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3119671533
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.842893359
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1367996643
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3642008455
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.955168052
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3682756709
/workspace/coverage/default/6.sysrst_ctrl_smoke.3778177597
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2696212952
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3091827713
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3846678777
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1627085273
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.350613742
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1553264183
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3422212291
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3337796386
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2312626514
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.29337049
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2204370387
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2639633630
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3971945251
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.302300779
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3859896458
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.1426077341
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1112363115
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.875189872
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1469199138
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2140272900
/workspace/coverage/default/7.sysrst_ctrl_smoke.2564654099
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1252891309
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.567411855
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.553764240
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.290924932
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.426214354
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2354551062
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1515924417
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4162695015
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2765759949
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3606865607
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2951277470
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2578083219
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2558602418
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.721452472
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2811874837
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.509912882
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3527023714
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2918752513
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1006456356
/workspace/coverage/default/8.sysrst_ctrl_smoke.938620412
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3061895744
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.4253708278
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1823884107
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.3763625157
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1335341708
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3320309530
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.4033524573
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2364340435
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3138248952
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1771263199
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2775481285
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2221629957
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2223562055
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2844398977
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2305987439
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1395140840
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.900869320
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2949031987
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1994898541
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1310233019
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.4215237559
/workspace/coverage/default/9.sysrst_ctrl_smoke.2678937971
/workspace/coverage/default/9.sysrst_ctrl_stress_all.401727852
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4113949975
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4162485138
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2912534491
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1415401735
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.531701584
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.130859558
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3074730152
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2321325317

Total test records in report: 910

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.4215448563	Jun 30 06:42:29 PM PDT 24	Jun 30 06:42:32 PM PDT 24	6029693046 ps
T4	/workspace/coverage/default/13.sysrst_ctrl_alert_test.1820685928	Jun 30 06:43:00 PM PDT 24	Jun 30 06:43:06 PM PDT 24	2012407551 ps
T5	/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3279578471	Jun 30 06:43:44 PM PDT 24	Jun 30 06:43:47 PM PDT 24	2637135696 ps
T2	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.3579280415	Jun 30 06:44:32 PM PDT 24	Jun 30 06:45:08 PM PDT 24	111420536565 ps
T13	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2926722571	Jun 30 06:42:34 PM PDT 24	Jun 30 06:42:40 PM PDT 24	2280024412 ps
T3	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3792990234	Jun 30 06:42:56 PM PDT 24	Jun 30 06:44:09 PM PDT 24	62656544105 ps
T6	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1521347090	Jun 30 06:44:06 PM PDT 24	Jun 30 06:44:12 PM PDT 24	7437196865 ps
T14	/workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.4047897917	Jun 30 06:43:04 PM PDT 24	Jun 30 06:43:08 PM PDT 24	2469539181 ps
T15	/workspace/coverage/default/26.sysrst_ctrl_smoke.389216423	Jun 30 06:43:44 PM PDT 24	Jun 30 06:43:46 PM PDT 24	2179480945 ps
T16	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4074788236	Jun 30 06:44:52 PM PDT 24	Jun 30 06:44:54 PM PDT 24	2055288989 ps
T21	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.578287631	Jun 30 06:43:06 PM PDT 24	Jun 30 06:43:12 PM PDT 24	2513608614 ps
T26	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2401109607	Jun 30 06:44:53 PM PDT 24	Jun 30 06:45:30 PM PDT 24	26338828708 ps
T52	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.630499482	Jun 30 06:43:06 PM PDT 24	Jun 30 06:43:10 PM PDT 24	2239469102 ps
T7	/workspace/coverage/default/6.sysrst_ctrl_stress_all.2696212952	Jun 30 06:42:41 PM PDT 24	Jun 30 06:48:29 PM PDT 24	129445428711 ps
T8	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1666050960	Jun 30 06:43:26 PM PDT 24	Jun 30 06:44:13 PM PDT 24	313312356603 ps
T9	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.4285856498	Jun 30 06:42:24 PM PDT 24	Jun 30 06:42:32 PM PDT 24	7623991168 ps
T10	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.634970902	Jun 30 06:44:00 PM PDT 24	Jun 30 06:44:09 PM PDT 24	3795660843 ps
T59	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1395140840	Jun 30 06:42:51 PM PDT 24	Jun 30 06:42:54 PM PDT 24	3479894922 ps
T27	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3074730152	Jun 30 06:45:10 PM PDT 24	Jun 30 06:46:13 PM PDT 24	23582973675 ps
T11	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2765759949	Jun 30 06:45:11 PM PDT 24	Jun 30 06:46:38 PM PDT 24	60348348602 ps
T12	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.1721435332	Jun 30 06:43:18 PM PDT 24	Jun 30 06:43:26 PM PDT 24	6067146907 ps
T22	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.1988279288	Jun 30 06:43:25 PM PDT 24	Jun 30 06:43:27 PM PDT 24	2808960716 ps
T99	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.714807071	Jun 30 06:43:45 PM PDT 24	Jun 30 06:43:48 PM PDT 24	2267867586 ps
T64	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2612538601	Jun 30 06:44:20 PM PDT 24	Jun 30 06:44:24 PM PDT 24	2615547882 ps
T20	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.25724314	Jun 30 06:44:36 PM PDT 24	Jun 30 06:44:45 PM PDT 24	2438215482 ps
T65	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3470365028	Jun 30 06:44:57 PM PDT 24	Jun 30 06:44:59 PM PDT 24	2632940915 ps
T23	/workspace/coverage/default/38.sysrst_ctrl_stress_all.4092991226	Jun 30 06:44:32 PM PDT 24	Jun 30 06:44:44 PM PDT 24	16487708724 ps
T38	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3301466633	Jun 30 06:43:06 PM PDT 24	Jun 30 06:43:15 PM PDT 24	3020544751 ps
T31	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1557614027	Jun 30 06:44:42 PM PDT 24	Jun 30 06:51:05 PM PDT 24	153094816281 ps
T53	/workspace/coverage/default/47.sysrst_ctrl_smoke.157725690	Jun 30 06:44:58 PM PDT 24	Jun 30 06:45:00 PM PDT 24	2138843378 ps
T54	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1994898541	Jun 30 06:42:50 PM PDT 24	Jun 30 06:42:57 PM PDT 24	2446750000 ps
T55	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.165895823	Jun 30 06:42:16 PM PDT 24	Jun 30 06:42:22 PM PDT 24	2077775343 ps
T56	/workspace/coverage/default/0.sysrst_ctrl_smoke.1606383473	Jun 30 06:42:15 PM PDT 24	Jun 30 06:42:17 PM PDT 24	2138701602 ps
T57	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.3611651850	Jun 30 06:43:18 PM PDT 24	Jun 30 06:43:20 PM PDT 24	2496706401 ps
T40	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.125681743	Jun 30 06:42:29 PM PDT 24	Jun 30 06:42:35 PM PDT 24	2256932349 ps
T58	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2613407988	Jun 30 06:42:29 PM PDT 24	Jun 30 06:42:37 PM PDT 24	2610344013 ps
T256	/workspace/coverage/default/12.sysrst_ctrl_smoke.893022374	Jun 30 06:42:54 PM PDT 24	Jun 30 06:42:56 PM PDT 24	2131808642 ps
T32	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3261029947	Jun 30 06:43:07 PM PDT 24	Jun 30 06:45:33 PM PDT 24	117110509866 ps
T33	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.2878219350	Jun 30 06:43:46 PM PDT 24	Jun 30 06:44:48 PM PDT 24	78846161243 ps
T24	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1182514459	Jun 30 06:44:29 PM PDT 24	Jun 30 06:44:38 PM PDT 24	3305400379 ps
T100	/workspace/coverage/default/46.sysrst_ctrl_alert_test.3372142930	Jun 30 06:44:58 PM PDT 24	Jun 30 06:45:01 PM PDT 24	2022834669 ps
T61	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3387675461	Jun 30 06:43:47 PM PDT 24	Jun 30 06:43:52 PM PDT 24	2477897675 ps
T101	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1442841198	Jun 30 06:44:33 PM PDT 24	Jun 30 06:44:43 PM PDT 24	3306345900 ps
T102	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3119671533	Jun 30 06:42:42 PM PDT 24	Jun 30 06:42:46 PM PDT 24	3477064271 ps
T66	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.928240126	Jun 30 06:43:51 PM PDT 24	Jun 30 06:44:00 PM PDT 24	2510401497 ps
T103	/workspace/coverage/default/30.sysrst_ctrl_smoke.1676924650	Jun 30 06:44:01 PM PDT 24	Jun 30 06:44:04 PM PDT 24	2124035730 ps
T25	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2639633630	Jun 30 06:42:41 PM PDT 24	Jun 30 06:42:45 PM PDT 24	2824398364 ps
T104	/workspace/coverage/default/23.sysrst_ctrl_alert_test.2779529535	Jun 30 06:43:46 PM PDT 24	Jun 30 06:43:53 PM PDT 24	2011566059 ps
T43	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4196871228	Jun 30 06:45:08 PM PDT 24	Jun 30 06:51:22 PM PDT 24	149352081534 ps
T45	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.3832574620	Jun 30 06:42:17 PM PDT 24	Jun 30 06:42:21 PM PDT 24	3421257560 ps
T46	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3734282246	Jun 30 06:42:52 PM PDT 24	Jun 30 06:43:02 PM PDT 24	3559641963 ps
T389	/workspace/coverage/default/13.sysrst_ctrl_smoke.849594222	Jun 30 06:42:59 PM PDT 24	Jun 30 06:43:01 PM PDT 24	2125608960 ps
T390	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.4138095930	Jun 30 06:43:11 PM PDT 24	Jun 30 06:43:16 PM PDT 24	3124928703 ps
T67	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2949031987	Jun 30 06:42:51 PM PDT 24	Jun 30 06:42:58 PM PDT 24	2611353847 ps
T39	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.1228564346	Jun 30 06:43:00 PM PDT 24	Jun 30 06:43:03 PM PDT 24	2797992897 ps
T287	/workspace/coverage/default/11.sysrst_ctrl_alert_test.2860616364	Jun 30 06:42:55 PM PDT 24	Jun 30 06:43:01 PM PDT 24	2010959406 ps
T60	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.986316620	Jun 30 06:43:53 PM PDT 24	Jun 30 06:43:57 PM PDT 24	8983985956 ps
T44	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3345335438	Jun 30 06:42:24 PM PDT 24	Jun 30 06:42:47 PM PDT 24	32980453309 ps
T34	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.230049422	Jun 30 06:44:36 PM PDT 24	Jun 30 06:45:10 PM PDT 24	56030906379 ps
T37	/workspace/coverage/default/26.sysrst_ctrl_stress_all.2452152921	Jun 30 06:43:50 PM PDT 24	Jun 30 06:47:14 PM PDT 24	155311336354 ps
T206	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2980898283	Jun 30 06:43:36 PM PDT 24	Jun 30 06:43:39 PM PDT 24	2536494261 ps
T105	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.3707657089	Jun 30 06:43:22 PM PDT 24	Jun 30 06:45:59 PM PDT 24	59712836768 ps
T207	/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.4220161489	Jun 30 06:43:33 PM PDT 24	Jun 30 06:43:40 PM PDT 24	2219510323 ps
T208	/workspace/coverage/default/24.sysrst_ctrl_alert_test.1580526031	Jun 30 06:43:44 PM PDT 24	Jun 30 06:43:48 PM PDT 24	2027178475 ps
T209	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.3077778360	Jun 30 06:43:11 PM PDT 24	Jun 30 06:43:12 PM PDT 24	2721187647 ps
T35	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2857959787	Jun 30 06:43:50 PM PDT 24	Jun 30 06:45:33 PM PDT 24	76470120676 ps
T174	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.218576659	Jun 30 06:42:53 PM PDT 24	Jun 30 06:43:00 PM PDT 24	4504453350 ps
T175	/workspace/coverage/default/35.sysrst_ctrl_alert_test.3482224446	Jun 30 06:44:30 PM PDT 24	Jun 30 06:44:33 PM PDT 24	2048853370 ps
T176	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.4229919434	Jun 30 06:44:53 PM PDT 24	Jun 30 06:44:57 PM PDT 24	2077822426 ps
T177	/workspace/coverage/default/46.sysrst_ctrl_smoke.288009232	Jun 30 06:44:52 PM PDT 24	Jun 30 06:44:56 PM PDT 24	2120264981 ps
T87	/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3645965919	Jun 30 06:45:06 PM PDT 24	Jun 30 06:48:20 PM PDT 24	77122633082 ps
T178	/workspace/coverage/default/3.sysrst_ctrl_smoke.4252054975	Jun 30 06:42:29 PM PDT 24	Jun 30 06:42:31 PM PDT 24	2135388182 ps
T36	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.7944979	Jun 30 06:42:51 PM PDT 24	Jun 30 06:42:59 PM PDT 24	3124362441 ps
T106	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.581772627	Jun 30 06:42:30 PM PDT 24	Jun 30 06:42:35 PM PDT 24	2399521010 ps
T179	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.790410134	Jun 30 06:45:05 PM PDT 24	Jun 30 06:45:13 PM PDT 24	2615225347 ps
T107	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3301247736	Jun 30 06:42:41 PM PDT 24	Jun 30 06:48:38 PM PDT 24	138937431465 ps
T391	/workspace/coverage/default/42.sysrst_ctrl_smoke.185021970	Jun 30 06:44:34 PM PDT 24	Jun 30 06:44:38 PM PDT 24	2130957276 ps
T392	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.2845419118	Jun 30 06:43:21 PM PDT 24	Jun 30 06:43:30 PM PDT 24	2591205902 ps
T108	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.681682433	Jun 30 06:44:29 PM PDT 24	Jun 30 06:45:52 PM PDT 24	31538738454 ps
T393	/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.2651557832	Jun 30 06:44:04 PM PDT 24	Jun 30 06:44:09 PM PDT 24	2592449111 ps
T110	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.1328159980	Jun 30 06:44:30 PM PDT 24	Jun 30 06:49:37 PM PDT 24	114282307424 ps
T386	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1749620186	Jun 30 06:44:01 PM PDT 24	Jun 30 06:44:07 PM PDT 24	2512915300 ps
T394	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.4021677335	Jun 30 06:42:36 PM PDT 24	Jun 30 06:42:38 PM PDT 24	2648116411 ps
T395	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2337961272	Jun 30 06:43:18 PM PDT 24	Jun 30 06:43:26 PM PDT 24	4490763507 ps
T47	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3764874755	Jun 30 06:43:24 PM PDT 24	Jun 30 06:43:32 PM PDT 24	2967970327 ps
T396	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1286696086	Jun 30 06:43:10 PM PDT 24	Jun 30 06:43:14 PM PDT 24	2086254075 ps
T181	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2647592375	Jun 30 06:42:42 PM PDT 24	Jun 30 06:42:46 PM PDT 24	2809757834 ps
T62	/workspace/coverage/default/24.sysrst_ctrl_stress_all.2903563121	Jun 30 06:43:47 PM PDT 24	Jun 30 06:43:58 PM PDT 24	12061722285 ps
T397	/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1288823333	Jun 30 06:44:14 PM PDT 24	Jun 30 06:44:20 PM PDT 24	3470350689 ps
T63	/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.3221192213	Jun 30 06:43:45 PM PDT 24	Jun 30 06:43:49 PM PDT 24	2467438977 ps
T398	/workspace/coverage/default/18.sysrst_ctrl_alert_test.1475734473	Jun 30 06:43:33 PM PDT 24	Jun 30 06:43:37 PM PDT 24	2019027610 ps
T399	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2600692744	Jun 30 06:42:20 PM PDT 24	Jun 30 06:42:27 PM PDT 24	2611027208 ps
T400	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3330091893	Jun 30 06:44:41 PM PDT 24	Jun 30 06:44:53 PM PDT 24	4194742870 ps
T68	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2775481285	Jun 30 06:45:09 PM PDT 24	Jun 30 06:45:55 PM PDT 24	33657910582 ps
T69	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1259850132	Jun 30 06:44:30 PM PDT 24	Jun 30 06:47:17 PM PDT 24	61852955399 ps
T77	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.337118395	Jun 30 06:44:38 PM PDT 24	Jun 30 06:44:52 PM PDT 24	5366640933 ps
T183	/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2476152000	Jun 30 06:44:53 PM PDT 24	Jun 30 06:44:55 PM PDT 24	2638655110 ps
T41	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3648203815	Jun 30 06:43:09 PM PDT 24	Jun 30 06:46:08 PM PDT 24	68545163057 ps
T184	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.1626548359	Jun 30 06:44:37 PM PDT 24	Jun 30 06:44:51 PM PDT 24	5164754862 ps
T185	/workspace/coverage/default/34.sysrst_ctrl_smoke.3504648325	Jun 30 06:44:25 PM PDT 24	Jun 30 06:44:32 PM PDT 24	2110814080 ps
T186	/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.35566419	Jun 30 06:44:41 PM PDT 24	Jun 30 06:44:42 PM PDT 24	2777715490 ps
T135	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.2772221527	Jun 30 06:43:56 PM PDT 24	Jun 30 07:09:45 PM PDT 24	1447865896481 ps
T187	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3887661445	Jun 30 06:42:48 PM PDT 24	Jun 30 06:42:53 PM PDT 24	2262217041 ps
T42	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2597620626	Jun 30 06:45:09 PM PDT 24	Jun 30 06:47:01 PM PDT 24	143450175578 ps
T188	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3642008455	Jun 30 06:42:39 PM PDT 24	Jun 30 06:42:47 PM PDT 24	2449354471 ps
T70	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.583460498	Jun 30 06:45:07 PM PDT 24	Jun 30 06:46:49 PM PDT 24	37825423151 ps
T401	/workspace/coverage/default/8.sysrst_ctrl_smoke.938620412	Jun 30 06:42:41 PM PDT 24	Jun 30 06:42:48 PM PDT 24	2113002231 ps
T402	/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2333749656	Jun 30 06:43:48 PM PDT 24	Jun 30 06:43:56 PM PDT 24	2139996233 ps
T403	/workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2428409090	Jun 30 06:43:22 PM PDT 24	Jun 30 06:43:25 PM PDT 24	2638005453 ps
T48	/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1566580838	Jun 30 06:44:57 PM PDT 24	Jun 30 06:45:00 PM PDT 24	3361734244 ps
T404	/workspace/coverage/default/47.sysrst_ctrl_alert_test.2510047321	Jun 30 06:45:00 PM PDT 24	Jun 30 06:45:02 PM PDT 24	2037057813 ps
T405	/workspace/coverage/default/26.sysrst_ctrl_alert_test.3226515986	Jun 30 06:43:47 PM PDT 24	Jun 30 06:43:51 PM PDT 24	2033479763 ps
T246	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.3549774080	Jun 30 06:45:06 PM PDT 24	Jun 30 06:46:46 PM PDT 24	141370946797 ps
T406	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.159747823	Jun 30 06:42:17 PM PDT 24	Jun 30 06:42:24 PM PDT 24	2462278911 ps
T407	/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2763310585	Jun 30 06:45:02 PM PDT 24	Jun 30 06:45:06 PM PDT 24	2224778620 ps
T300	/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3017166117	Jun 30 06:44:34 PM PDT 24	Jun 30 06:44:40 PM PDT 24	2450883111 ps
T408	/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1322425243	Jun 30 06:43:59 PM PDT 24	Jun 30 06:44:03 PM PDT 24	3208051644 ps
T409	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.531092424	Jun 30 06:42:19 PM PDT 24	Jun 30 06:42:24 PM PDT 24	2464014756 ps
T241	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2912534491	Jun 30 06:45:08 PM PDT 24	Jun 30 06:47:13 PM PDT 24	99064877269 ps
T242	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.321406630	Jun 30 06:43:54 PM PDT 24	Jun 30 06:45:57 PM PDT 24	111520613882 ps
T237	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2558602418	Jun 30 06:42:49 PM PDT 24	Jun 30 06:43:09 PM PDT 24	32601807990 ps
T410	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1084266273	Jun 30 06:43:16 PM PDT 24	Jun 30 06:43:25 PM PDT 24	3092636322 ps
T49	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1900411532	Jun 30 06:44:58 PM PDT 24	Jun 30 06:46:00 PM PDT 24	241498750752 ps
T316	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2289883772	Jun 30 06:43:53 PM PDT 24	Jun 30 06:43:57 PM PDT 24	2183469849 ps
T317	/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1972083819	Jun 30 06:43:08 PM PDT 24	Jun 30 06:43:11 PM PDT 24	2635698446 ps
T71	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3120261794	Jun 30 06:44:54 PM PDT 24	Jun 30 06:44:55 PM PDT 24	3539529603 ps
T318	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1640528561	Jun 30 06:42:40 PM PDT 24	Jun 30 06:42:48 PM PDT 24	2512948834 ps
T50	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.748164052	Jun 30 06:43:46 PM PDT 24	Jun 30 06:47:28 PM PDT 24	87407804866 ps
T319	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2844398977	Jun 30 06:42:47 PM PDT 24	Jun 30 06:43:46 PM PDT 24	108954846664 ps
T320	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.610593239	Jun 30 06:44:08 PM PDT 24	Jun 30 06:44:34 PM PDT 24	153978079278 ps
T321	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3435707278	Jun 30 06:43:56 PM PDT 24	Jun 30 06:44:05 PM PDT 24	2455210535 ps
T322	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.509912882	Jun 30 06:42:48 PM PDT 24	Jun 30 06:42:52 PM PDT 24	2635461437 ps
T72	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.567411855	Jun 30 06:42:42 PM PDT 24	Jun 30 06:42:51 PM PDT 24	4689172610 ps
T388	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.4215237559	Jun 30 06:42:47 PM PDT 24	Jun 30 06:42:55 PM PDT 24	2511062783 ps
T411	/workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2309281570	Jun 30 06:42:19 PM PDT 24	Jun 30 06:42:28 PM PDT 24	2608983379 ps
T88	/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2662654728	Jun 30 06:44:44 PM PDT 24	Jun 30 06:45:01 PM PDT 24	22352336064 ps
T159	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1013599199	Jun 30 06:43:16 PM PDT 24	Jun 30 06:44:27 PM PDT 24	29756458081 ps
T85	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2987524036	Jun 30 06:42:54 PM PDT 24	Jun 30 06:43:02 PM PDT 24	4129032913 ps
T243	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1415401735	Jun 30 06:45:09 PM PDT 24	Jun 30 06:48:44 PM PDT 24	79458722016 ps
T253	/workspace/coverage/default/26.sysrst_ctrl_combo_detect.4022640836	Jun 30 06:43:47 PM PDT 24	Jun 30 06:44:48 PM PDT 24	97660044717 ps
T301	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2842075646	Jun 30 06:44:16 PM PDT 24	Jun 30 06:44:24 PM PDT 24	2468231444 ps
T89	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1906624320	Jun 30 06:43:46 PM PDT 24	Jun 30 06:44:07 PM PDT 24	26353665536 ps
T412	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.896723090	Jun 30 06:43:47 PM PDT 24	Jun 30 06:43:53 PM PDT 24	5594524665 ps
T51	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3268244388	Jun 30 06:42:37 PM PDT 24	Jun 30 06:42:44 PM PDT 24	3387733188 ps
T303	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.462708378	Jun 30 06:43:16 PM PDT 24	Jun 30 06:43:23 PM PDT 24	2512337854 ps
T413	/workspace/coverage/default/12.sysrst_ctrl_stress_all.533157639	Jun 30 06:43:00 PM PDT 24	Jun 30 06:43:35 PM PDT 24	13580682920 ps
T258	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2693382064	Jun 30 06:42:48 PM PDT 24	Jun 30 06:43:54 PM PDT 24	105681848270 ps
T262	/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.540821203	Jun 30 06:42:54 PM PDT 24	Jun 30 06:42:57 PM PDT 24	2627600277 ps
T263	/workspace/coverage/default/21.sysrst_ctrl_alert_test.1648255686	Jun 30 06:43:44 PM PDT 24	Jun 30 06:43:48 PM PDT 24	2017041912 ps
T264	/workspace/coverage/default/40.sysrst_ctrl_alert_test.2983382007	Jun 30 06:44:34 PM PDT 24	Jun 30 06:44:37 PM PDT 24	2034715470 ps
T265	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.299722929	Jun 30 06:42:22 PM PDT 24	Jun 30 06:44:11 PM PDT 24	42007410661 ps
T266	/workspace/coverage/default/0.sysrst_ctrl_alert_test.4169715719	Jun 30 06:42:18 PM PDT 24	Jun 30 06:42:22 PM PDT 24	2021038420 ps
T244	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2828767735	Jun 30 06:44:53 PM PDT 24	Jun 30 06:48:07 PM PDT 24	78841878620 ps
T73	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2816996901	Jun 30 06:42:21 PM PDT 24	Jun 30 06:42:33 PM PDT 24	32165178088 ps
T267	/workspace/coverage/default/22.sysrst_ctrl_smoke.3962477547	Jun 30 06:43:47 PM PDT 24	Jun 30 06:43:55 PM PDT 24	2114637918 ps
T268	/workspace/coverage/default/42.sysrst_ctrl_alert_test.3354662904	Jun 30 06:44:43 PM PDT 24	Jun 30 06:44:49 PM PDT 24	2013304790 ps
T239	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2354551062	Jun 30 06:45:13 PM PDT 24	Jun 30 06:45:27 PM PDT 24	47518712011 ps
T290	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.58902959	Jun 30 06:43:32 PM PDT 24	Jun 30 06:43:40 PM PDT 24	2612979899 ps
T109	/workspace/coverage/default/49.sysrst_ctrl_stress_all.3796185761	Jun 30 06:45:03 PM PDT 24	Jun 30 06:45:20 PM PDT 24	7664694156 ps
T137	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.222075322	Jun 30 06:43:17 PM PDT 24	Jun 30 06:43:20 PM PDT 24	3315503477 ps
T414	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1602775337	Jun 30 06:43:20 PM PDT 24	Jun 30 06:43:28 PM PDT 24	6760889535 ps
T247	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.3933347369	Jun 30 06:45:16 PM PDT 24	Jun 30 06:49:00 PM PDT 24	80148392621 ps
T415	/workspace/coverage/default/16.sysrst_ctrl_alert_test.3122089804	Jun 30 06:43:15 PM PDT 24	Jun 30 06:43:21 PM PDT 24	2012625133 ps
T114	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.767151831	Jun 30 06:43:47 PM PDT 24	Jun 30 06:43:56 PM PDT 24	3767288528 ps
T416	/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3218535008	Jun 30 06:42:48 PM PDT 24	Jun 30 06:42:53 PM PDT 24	2615602974 ps
T417	/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3688599025	Jun 30 06:44:54 PM PDT 24	Jun 30 06:45:01 PM PDT 24	2480126662 ps
T257	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2766949186	Jun 30 06:44:29 PM PDT 24	Jun 30 06:49:18 PM PDT 24	173528659117 ps
T146	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.2739059855	Jun 30 06:44:33 PM PDT 24	Jun 30 06:44:38 PM PDT 24	2939696349 ps
T387	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.4081844233	Jun 30 06:43:00 PM PDT 24	Jun 30 06:43:05 PM PDT 24	2515828767 ps
T418	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.675965564	Jun 30 06:42:37 PM PDT 24	Jun 30 06:42:47 PM PDT 24	3753659305 ps
T254	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.255800382	Jun 30 06:44:33 PM PDT 24	Jun 30 06:45:04 PM PDT 24	78565637743 ps
T419	/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.326452735	Jun 30 06:44:35 PM PDT 24	Jun 30 06:44:44 PM PDT 24	3055442306 ps
T420	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.4127281218	Jun 30 06:42:29 PM PDT 24	Jun 30 06:42:40 PM PDT 24	3785828780 ps
T259	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3377824608	Jun 30 06:42:23 PM PDT 24	Jun 30 06:46:01 PM PDT 24	133845211998 ps
T361	/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.426214354	Jun 30 06:45:10 PM PDT 24	Jun 30 06:48:24 PM PDT 24	75804572831 ps
T75	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2324668948	Jun 30 06:45:11 PM PDT 24	Jun 30 06:48:25 PM PDT 24	77923807637 ps
T342	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3089724188	Jun 30 06:44:32 PM PDT 24	Jun 30 06:46:15 PM PDT 24	57753709474 ps
T111	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.939082605	Jun 30 06:42:48 PM PDT 24	Jun 30 06:42:56 PM PDT 24	7271881444 ps
T421	/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.18646911	Jun 30 06:43:51 PM PDT 24	Jun 30 06:44:00 PM PDT 24	2610898459 ps
T352	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.302300779	Jun 30 06:42:42 PM PDT 24	Jun 30 06:43:14 PM PDT 24	91791264494 ps
T422	/workspace/coverage/default/1.sysrst_ctrl_smoke.3501959442	Jun 30 06:42:19 PM PDT 24	Jun 30 06:42:23 PM PDT 24	2115811810 ps
T423	/workspace/coverage/default/19.sysrst_ctrl_smoke.2728545285	Jun 30 06:43:34 PM PDT 24	Jun 30 06:43:38 PM PDT 24	2115516180 ps
T424	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3267595983	Jun 30 06:44:44 PM PDT 24	Jun 30 06:44:46 PM PDT 24	2642872623 ps
T425	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.946768486	Jun 30 06:44:54 PM PDT 24	Jun 30 06:44:56 PM PDT 24	2657788831 ps
T426	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.316369735	Jun 30 06:45:08 PM PDT 24	Jun 30 06:45:10 PM PDT 24	2661879951 ps
T90	/workspace/coverage/default/17.sysrst_ctrl_stress_all.3426210191	Jun 30 06:43:25 PM PDT 24	Jun 30 06:47:03 PM PDT 24	178507736037 ps
T427	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3673704977	Jun 30 06:43:49 PM PDT 24	Jun 30 06:43:55 PM PDT 24	3348626826 ps
T147	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.1887953756	Jun 30 06:44:14 PM PDT 24	Jun 30 06:44:19 PM PDT 24	2590802623 ps
T112	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.4161088664	Jun 30 06:42:37 PM PDT 24	Jun 30 06:42:39 PM PDT 24	2861672537 ps
T428	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.735307136	Jun 30 06:44:16 PM PDT 24	Jun 30 06:44:23 PM PDT 24	2613794971 ps
T429	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.955168052	Jun 30 06:42:40 PM PDT 24	Jun 30 06:42:44 PM PDT 24	2043752603 ps
T240	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2182182126	Jun 30 06:45:14 PM PDT 24	Jun 30 06:46:14 PM PDT 24	43999140802 ps
T248	/workspace/coverage/default/25.sysrst_ctrl_stress_all.2028252390	Jun 30 06:43:44 PM PDT 24	Jun 30 06:44:06 PM PDT 24	72883533385 ps
T245	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.290924932	Jun 30 06:45:14 PM PDT 24	Jun 30 06:46:47 PM PDT 24	76061542812 ps
T138	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.2863483366	Jun 30 06:42:29 PM PDT 24	Jun 30 06:42:32 PM PDT 24	3975624979 ps
T223	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.1000220520	Jun 30 06:44:23 PM PDT 24	Jun 30 06:44:30 PM PDT 24	3150729883 ps
T430	/workspace/coverage/default/34.sysrst_ctrl_alert_test.4152480523	Jun 30 06:44:27 PM PDT 24	Jun 30 06:44:29 PM PDT 24	2020933439 ps
T431	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1009458961	Jun 30 06:44:34 PM PDT 24	Jun 30 06:44:44 PM PDT 24	2478642760 ps
T432	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3527023714	Jun 30 06:42:47 PM PDT 24	Jun 30 06:42:52 PM PDT 24	2464008337 ps
T81	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3821463761	Jun 30 06:42:51 PM PDT 24	Jun 30 06:42:56 PM PDT 24	4261362062 ps
T78	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.1659491541	Jun 30 06:43:06 PM PDT 24	Jun 30 06:43:53 PM PDT 24	66270107709 ps
T123	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1418320804	Jun 30 06:45:00 PM PDT 24	Jun 30 06:45:04 PM PDT 24	2516909969 ps
T124	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1551234628	Jun 30 06:44:33 PM PDT 24	Jun 30 06:44:36 PM PDT 24	2489343993 ps
T125	/workspace/coverage/default/22.sysrst_ctrl_alert_test.3719373324	Jun 30 06:43:49 PM PDT 24	Jun 30 06:43:53 PM PDT 24	2039827707 ps
T126	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1727527645	Jun 30 06:42:37 PM PDT 24	Jun 30 06:42:45 PM PDT 24	2512472194 ps
T127	/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2046721733	Jun 30 06:44:46 PM PDT 24	Jun 30 06:44:50 PM PDT 24	3507049354 ps
T128	/workspace/coverage/default/4.sysrst_ctrl_smoke.695482898	Jun 30 06:42:35 PM PDT 24	Jun 30 06:42:41 PM PDT 24	2114011593 ps
T129	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2209536139	Jun 30 06:42:21 PM PDT 24	Jun 30 06:42:25 PM PDT 24	2423159360 ps
T130	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3831465105	Jun 30 06:43:25 PM PDT 24	Jun 30 06:44:03 PM PDT 24	26585401877 ps
T113	/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2960525999	Jun 30 06:43:48 PM PDT 24	Jun 30 06:43:51 PM PDT 24	5992702569 ps
T433	/workspace/coverage/default/7.sysrst_ctrl_alert_test.2204370387	Jun 30 06:42:43 PM PDT 24	Jun 30 06:42:49 PM PDT 24	2013891001 ps
T238	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1363111590	Jun 30 06:44:13 PM PDT 24	Jun 30 06:44:27 PM PDT 24	22103959976 ps
T434	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2405888818	Jun 30 06:43:00 PM PDT 24	Jun 30 06:43:05 PM PDT 24	2463841013 ps
T379	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1342438873	Jun 30 06:45:03 PM PDT 24	Jun 30 06:49:50 PM PDT 24	110882178814 ps
T435	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1998443752	Jun 30 06:43:50 PM PDT 24	Jun 30 06:43:56 PM PDT 24	2616073528 ps
T436	/workspace/coverage/default/39.sysrst_ctrl_alert_test.2531772655	Jun 30 06:44:31 PM PDT 24	Jun 30 06:44:39 PM PDT 24	2011509496 ps
T156	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2105206206	Jun 30 06:44:33 PM PDT 24	Jun 30 06:44:39 PM PDT 24	3710563697 ps
T255	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.1508864311	Jun 30 06:43:21 PM PDT 24	Jun 30 06:48:10 PM PDT 24	145637998505 ps
T437	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2918752513	Jun 30 06:42:46 PM PDT 24	Jun 30 06:42:51 PM PDT 24	2198329093 ps
T355	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.457551647	Jun 30 06:42:53 PM PDT 24	Jun 30 06:44:34 PM PDT 24	78618573465 ps
T438	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.964924282	Jun 30 06:43:24 PM PDT 24	Jun 30 06:43:33 PM PDT 24	3755970730 ps
T439	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.130640150	Jun 30 06:42:19 PM PDT 24	Jun 30 06:42:26 PM PDT 24	2292279921 ps
T440	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.66472185	Jun 30 06:42:36 PM PDT 24	Jun 30 06:42:44 PM PDT 24	27647026507 ps
T441	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3096143023	Jun 30 06:44:32 PM PDT 24	Jun 30 06:48:11 PM PDT 24	156848125335 ps
T131	/workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1018283748	Jun 30 06:42:53 PM PDT 24	Jun 30 06:43:03 PM PDT 24	11535311994 ps
T442	/workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.259323340	Jun 30 06:43:17 PM PDT 24	Jun 30 06:43:25 PM PDT 24	2465218802 ps
T443	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.192495967	Jun 30 06:43:47 PM PDT 24	Jun 30 06:43:58 PM PDT 24	3518733821 ps
T444	/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.350613742	Jun 30 06:45:13 PM PDT 24	Jun 30 06:47:36 PM PDT 24	60329993504 ps
T445	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2761057430	Jun 30 06:44:40 PM PDT 24	Jun 30 06:44:43 PM PDT 24	2150076227 ps
T446	/workspace/coverage/default/43.sysrst_ctrl_stress_all.3109260666	Jun 30 06:44:47 PM PDT 24	Jun 30 06:45:06 PM PDT 24	14395149904 ps
T302	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1664452509	Jun 30 06:44:36 PM PDT 24	Jun 30 06:44:40 PM PDT 24	2482341550 ps
T304	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.1443831682	Jun 30 06:43:21 PM PDT 24	Jun 30 06:43:27 PM PDT 24	2512493352 ps
T447	/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.4014254753	Jun 30 06:42:37 PM PDT 24	Jun 30 06:42:39 PM PDT 24	2211762023 ps
T448	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3913017751	Jun 30 06:44:58 PM PDT 24	Jun 30 07:02:40 PM PDT 24	1656106277764 ps
T449	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2748138243	Jun 30 06:44:45 PM PDT 24	Jun 30 06:44:48 PM PDT 24	2629001521 ps
T450	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.241871471	Jun 30 06:43:55 PM PDT 24	Jun 30 06:45:15 PM PDT 24	40126440270 ps
T82	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2205779963	Jun 30 06:44:46 PM PDT 24	Jun 30 06:44:54 PM PDT 24	2361838743 ps
T451	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3440590240	Jun 30 06:44:32 PM PDT 24	Jun 30 06:44:35 PM PDT 24	3429566206 ps
T452	/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3271717276	Jun 30 06:45:04 PM PDT 24	Jun 30 06:45:14 PM PDT 24	3535038359 ps
T453	/workspace/coverage/default/24.sysrst_ctrl_smoke.3835467902	Jun 30 06:43:45 PM PDT 24	Jun 30 06:43:52 PM PDT 24	2112985919 ps
T144	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.4251032704	Jun 30 06:43:21 PM PDT 24	Jun 30 06:43:25 PM PDT 24	3397603604 ps
T454	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1664975042	Jun 30 06:44:01 PM PDT 24	Jun 30 06:44:10 PM PDT 24	2465070489 ps
T455	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.739452804	Jun 30 06:42:20 PM PDT 24	Jun 30 06:42:24 PM PDT 24	2518431601 ps
T456	/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.14776276	Jun 30 06:44:32 PM PDT 24	Jun 30 06:44:36 PM PDT 24	2253753608 ps
T83	/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4162485138	Jun 30 06:42:49 PM PDT 24	Jun 30 06:43:00 PM PDT 24	10851031251 ps
T457	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2012639048	Jun 30 06:44:29 PM PDT 24	Jun 30 06:44:35 PM PDT 24	2199465401 ps
T458	/workspace/coverage/default/32.sysrst_ctrl_smoke.3722291825	Jun 30 06:44:06 PM PDT 24	Jun 30 06:44:12 PM PDT 24	2111351323 ps
T294	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.4152714398	Jun 30 06:42:24 PM PDT 24	Jun 30 06:42:30 PM PDT 24	3575416787 ps
T459	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2038406298	Jun 30 06:43:22 PM PDT 24	Jun 30 06:43:24 PM PDT 24	3646295500 ps
T139	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1202890343	Jun 30 06:44:54 PM PDT 24	Jun 30 06:45:05 PM PDT 24	3780818483 ps