Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.86 99.31 96.48 100.00 97.44 98.74 99.61 93.46


Total tests in report: 916
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
55.25 55.25 78.20 78.20 64.91 64.91 65.75 65.75 14.10 14.10 78.82 78.82 68.02 68.02 16.96 16.96 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3278292347
74.34 19.09 90.11 11.91 83.65 18.73 96.35 30.59 35.90 21.79 90.50 11.68 81.89 13.87 41.98 25.03 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3334271943
81.32 6.98 92.93 2.82 86.43 2.78 96.35 0.00 54.49 18.59 92.72 2.22 88.34 6.45 57.96 15.98 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.204830553
84.60 3.28 95.30 2.37 89.16 2.73 96.80 0.46 60.26 5.77 94.79 2.07 91.71 3.37 64.18 6.22 /workspace/coverage/default/30.sysrst_ctrl_stress_all.2710999078
87.31 2.71 96.62 1.32 90.24 1.09 97.03 0.23 71.15 10.90 95.97 1.18 95.18 3.47 64.94 0.76 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1899186248
89.79 2.48 97.78 1.16 91.84 1.59 97.03 0.00 84.62 13.46 97.15 1.18 95.18 0.00 64.94 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2653626078
91.07 1.27 97.85 0.07 93.07 1.24 97.72 0.68 84.62 0.00 97.26 0.11 95.18 0.00 71.76 6.82 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.4246048362
92.13 1.07 98.23 0.37 93.50 0.43 97.72 0.00 88.46 3.85 97.52 0.26 96.34 1.16 73.17 1.42 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.4173570090
92.87 0.73 98.30 0.07 93.68 0.18 98.17 0.46 89.74 1.28 97.67 0.15 96.53 0.19 75.95 2.78 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2000706065
93.35 0.49 98.36 0.06 93.88 0.20 98.17 0.00 89.74 0.00 97.74 0.07 96.63 0.10 78.95 3.00 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2450406715
93.80 0.44 98.41 0.06 93.93 0.05 98.17 0.00 90.38 0.64 97.82 0.07 96.72 0.10 81.13 2.18 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.830737977
94.21 0.41 98.49 0.07 94.01 0.08 98.17 0.00 91.67 1.28 97.89 0.07 97.01 0.29 82.22 1.09 /workspace/coverage/default/34.sysrst_ctrl_stress_all.4254397696
94.62 0.41 98.68 0.19 94.24 0.23 98.17 0.00 92.95 1.28 98.08 0.18 97.40 0.39 82.82 0.60 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2393122969
94.90 0.28 98.68 0.00 94.26 0.03 99.77 1.60 92.95 0.00 98.08 0.00 97.50 0.10 83.10 0.27 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2034991029
95.18 0.28 98.77 0.09 94.39 0.13 99.77 0.00 92.95 0.00 98.11 0.04 97.78 0.29 84.51 1.42 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1133268555
95.42 0.24 98.84 0.07 94.44 0.05 99.77 0.00 94.23 1.28 98.19 0.07 97.98 0.19 84.51 0.00 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3759019202
95.66 0.24 98.92 0.07 94.49 0.05 99.77 0.00 95.51 1.28 98.26 0.07 98.17 0.19 84.51 0.00 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1601584733
95.89 0.23 98.94 0.02 94.59 0.10 99.77 0.00 95.51 0.00 98.26 0.00 98.17 0.00 85.99 1.47 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2573129007
96.09 0.20 98.97 0.04 94.62 0.03 99.77 0.00 96.15 0.64 98.34 0.07 98.36 0.19 86.42 0.44 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2178970711
96.26 0.17 99.01 0.04 94.82 0.20 99.77 0.00 96.15 0.00 98.41 0.07 99.13 0.77 86.53 0.11 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_csr_rw.466655122
96.40 0.14 99.05 0.04 94.84 0.03 99.77 0.00 96.79 0.64 98.45 0.04 99.23 0.10 86.70 0.16 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.3048032733
96.54 0.14 99.10 0.06 94.84 0.00 99.77 0.00 96.79 0.00 98.45 0.00 99.23 0.00 87.62 0.93 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.331185661
96.68 0.13 99.10 0.00 95.70 0.86 99.77 0.00 96.79 0.00 98.45 0.00 99.23 0.00 87.68 0.05 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.887965671
96.80 0.13 99.16 0.06 95.73 0.03 99.77 0.00 97.44 0.64 98.52 0.07 99.33 0.10 87.68 0.00 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.4106385615
96.93 0.12 99.16 0.00 95.73 0.00 99.77 0.00 97.44 0.00 98.52 0.00 99.33 0.00 88.55 0.87 /workspace/coverage/default/39.sysrst_ctrl_stress_all.1769462685
97.03 0.10 99.16 0.00 95.73 0.00 99.77 0.00 97.44 0.00 98.52 0.00 99.33 0.00 89.26 0.71 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2259408485
97.12 0.09 99.16 0.00 95.75 0.03 99.77 0.00 97.44 0.00 98.52 0.00 99.52 0.19 89.69 0.44 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3951425083
97.21 0.09 99.16 0.00 95.75 0.00 99.77 0.00 97.44 0.00 98.52 0.00 99.52 0.00 90.29 0.60 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.752787574
97.26 0.05 99.16 0.00 95.75 0.00 99.77 0.00 97.44 0.00 98.52 0.00 99.52 0.00 90.68 0.38 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3532749577
97.31 0.05 99.16 0.00 96.06 0.30 99.77 0.00 97.44 0.00 98.52 0.00 99.52 0.00 90.73 0.05 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2353400872
97.36 0.05 99.16 0.00 96.06 0.00 99.77 0.00 97.44 0.00 98.52 0.00 99.52 0.00 91.06 0.33 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.3293600895
97.41 0.05 99.16 0.00 96.06 0.00 99.77 0.00 97.44 0.00 98.52 0.00 99.52 0.00 91.38 0.33 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1346408295
97.45 0.04 99.16 0.00 96.13 0.08 100.00 0.23 97.44 0.00 98.52 0.00 99.52 0.00 91.38 0.00 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2064606108
97.49 0.04 99.16 0.00 96.13 0.00 100.00 0.00 97.44 0.00 98.52 0.00 99.52 0.00 91.66 0.27 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2025260902
97.52 0.03 99.16 0.00 96.13 0.00 100.00 0.00 97.44 0.00 98.52 0.00 99.52 0.00 91.88 0.22 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.255418779
97.55 0.03 99.18 0.02 96.16 0.03 100.00 0.00 97.44 0.00 98.52 0.00 99.61 0.10 91.93 0.05 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.4237582905
97.57 0.02 99.20 0.02 96.16 0.00 100.00 0.00 97.44 0.00 98.56 0.04 99.61 0.00 92.04 0.11 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.750164824
97.60 0.02 99.20 0.00 96.16 0.00 100.00 0.00 97.44 0.00 98.56 0.00 99.61 0.00 92.20 0.16 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.356157244
97.62 0.02 99.20 0.00 96.16 0.00 100.00 0.00 97.44 0.00 98.56 0.00 99.61 0.00 92.37 0.16 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.1807105490
97.63 0.02 99.23 0.04 96.16 0.00 100.00 0.00 97.44 0.00 98.63 0.07 99.61 0.00 92.37 0.00 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2171427729
97.65 0.02 99.23 0.00 96.16 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.48 0.11 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3676320752
97.67 0.02 99.23 0.00 96.16 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.58 0.11 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3230661498
97.68 0.02 99.23 0.00 96.16 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.69 0.11 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3172372107
97.70 0.02 99.23 0.00 96.16 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.80 0.11 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1627059351
97.71 0.01 99.23 0.00 96.26 0.10 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.80 0.00 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.394433915
97.73 0.01 99.23 0.00 96.36 0.10 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.80 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2959026077
97.74 0.01 99.23 0.00 96.39 0.03 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.86 0.05 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.994200600
97.75 0.01 99.25 0.02 96.39 0.00 100.00 0.00 97.44 0.00 98.63 0.00 99.61 0.00 92.91 0.05 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2503474034
97.76 0.01 99.27 0.02 96.39 0.00 100.00 0.00 97.44 0.00 98.67 0.04 99.61 0.00 92.91 0.00 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.289030416
97.76 0.01 99.29 0.02 96.39 0.00 100.00 0.00 97.44 0.00 98.71 0.04 99.61 0.00 92.91 0.00 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.2654899567
97.77 0.01 99.31 0.02 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.04 99.61 0.00 92.91 0.00 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.1187122730
97.78 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 92.97 0.05 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3976812590
97.79 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.02 0.05 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.472676617
97.79 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.08 0.05 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2088587165
97.80 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.13 0.05 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3711951241
97.81 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.18 0.05 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3832721662
97.82 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.24 0.05 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.2953188037
97.83 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.29 0.05 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.602551092
97.83 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.35 0.05 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1979322632
97.84 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.40 0.05 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2440099896
97.85 0.01 99.31 0.00 96.39 0.00 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.46 0.05 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3026350539
97.86 0.01 99.31 0.00 96.44 0.05 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.46 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3355011686
97.86 0.01 99.31 0.00 96.46 0.03 100.00 0.00 97.44 0.00 98.74 0.00 99.61 0.00 93.46 0.00 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2413113920


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.3813206970
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1052038704
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1329023415
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2454666774
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.3140361048
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2940025492
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.971693379
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2993170048
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3019455413
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2219277282
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3348320875
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2321260323
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.570944506
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2550532529
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3045565423
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3587799267
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3926981818
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1597742127
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2437539357
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1626080422
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1113793876
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3575275052
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3882337967
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2698806066
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2351603994
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2798038459
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2617995700
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3578505614
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.263704592
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1133502003
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2672197258
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4216652701
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.285941218
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1445809540
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.3322105419
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.984660461
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3874870297
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1807291599
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.354375968
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.191785536
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1038481005
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3363114008
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3486240765
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1827620812
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.3044876211
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.323527990
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.311198087
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2827251779
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2191570188
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.312183522
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2672761987
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.548842609
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1817665085
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2858173194
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1229302414
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.3583197972
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.1548050714
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.4215679768
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3156757722
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.1765299482
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3101358054
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.117305849
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.403942080
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.1461524928
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.1732162607
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.687082833
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.2052856076
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3029855211
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.535770164
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2601611410
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.186018497
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1418748107
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1441534084
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3281375905
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.1113857177
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.2344634990
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.2798137281
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.4192566888
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.4173386339
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.976734602
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.904386484
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1794724565
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.2625429142
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.89544548
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.653805735
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.1108141550
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.3680936022
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.925742607
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.1962581799
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.221530003
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.3274656687
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.3445670740
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/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.138294446
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.409119398
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2888493983
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1595017593
/workspace/coverage/default/42.sysrst_ctrl_smoke.685393486
/workspace/coverage/default/42.sysrst_ctrl_stress_all.4122592385
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2563129132
/workspace/coverage/default/43.sysrst_ctrl_alert_test.4204066585
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.390047457
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1995181218
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3799676503
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.826934531
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4067302191
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.974763852
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.8498136
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3432487826
/workspace/coverage/default/43.sysrst_ctrl_smoke.4164020793
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3230799664
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4044351176
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3804882087
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2333685741
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1331696488
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1701297676
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3742567493
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.512209692
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3962439165
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1887942104
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.4043228555
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.902076175
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1171841718
/workspace/coverage/default/44.sysrst_ctrl_smoke.456586160
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2959613024
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.483319849
/workspace/coverage/default/45.sysrst_ctrl_alert_test.4184065378
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.943972555
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2458732533
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.229127037
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.865435225
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.480185739
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2518941325
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2182895623
/workspace/coverage/default/45.sysrst_ctrl_smoke.3386636247
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1963111388
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1184693846
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2169286102
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3392418795
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1493775109
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2819512575
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2390640602
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3835511833
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.683365288
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1420736655
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2735059061
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1446956965
/workspace/coverage/default/46.sysrst_ctrl_smoke.924455338
/workspace/coverage/default/46.sysrst_ctrl_stress_all.337112567
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3583871863
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1404317987
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3604897505
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1745680759
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2851065915
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1963720706
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.833248385
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3044789571
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3380235863
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2979447621
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1496837391
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.701498060
/workspace/coverage/default/47.sysrst_ctrl_smoke.2238010807
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3268042695
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2059096627
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1523958624
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.451507840
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.88108206
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2714534365
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4167289213
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1045278973
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3970897786
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1750653551
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3542581501
/workspace/coverage/default/48.sysrst_ctrl_smoke.170667019
/workspace/coverage/default/48.sysrst_ctrl_stress_all.959068177
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.4274882998
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1882232183
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1587540830
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.220654009
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3232111135
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1410641665
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4040869543
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2466935773
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3107766610
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2670444563
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1149532716
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.651939126
/workspace/coverage/default/49.sysrst_ctrl_smoke.1256495639
/workspace/coverage/default/49.sysrst_ctrl_stress_all.4095452375
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.629574575
/workspace/coverage/default/5.sysrst_ctrl_alert_test.4098432504
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3080509029
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.4129795007
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3417339131
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2020164157
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3813213649
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1299092488
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2843093885
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.395603864
/workspace/coverage/default/5.sysrst_ctrl_smoke.769233203
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2738206689
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2865418684
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3475844968
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2552999506
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2476407508
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3986057912
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2644045435
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3814006669
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.3479992015
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3564804834
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1059352023
/workspace/coverage/default/6.sysrst_ctrl_alert_test.973599659
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1758979578
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.4025768406
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.978485954
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3462980715
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1357468674
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2090587858
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.677611782
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2047406410
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3912336885
/workspace/coverage/default/6.sysrst_ctrl_smoke.2917460687
/workspace/coverage/default/6.sysrst_ctrl_stress_all.583880119
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2864097316
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1943728056
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.4267853013
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.203814580
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3452203170
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1780655114
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.374268330
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1054047390
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3656558354
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3145591346
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.358106388
/workspace/coverage/default/7.sysrst_ctrl_alert_test.511897130
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3426550381
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3060731474
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3519858731
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.160309039
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.349956410
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1959072838
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1913221198
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3099852721
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1855094994
/workspace/coverage/default/7.sysrst_ctrl_smoke.1810064077
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3931693290
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3940566561
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3942898106
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2740422916
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2783198939
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1409661282
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3967120329
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4217958441
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1158325719
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.967694999
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1355758232
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.102779365
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1694381249
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.362471621
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.638685942
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1728179370
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1351736824
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.208717634
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3290239173
/workspace/coverage/default/8.sysrst_ctrl_smoke.3197168812
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3179479095
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1149204419
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1937953635
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2809463999
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2054797580
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1421203255
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.48888747
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3298525038
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3620560074
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.525914659
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2067447618
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3960647212
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1018126892
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2804091130
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3784896270
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1631432603
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1173856922
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3132228229
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.4146662831
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2208665690
/workspace/coverage/default/9.sysrst_ctrl_smoke.4066932345
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3957565047
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.2925448360
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2837471069
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3408458319
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.807924732
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3490569063
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3479752487
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3965975728
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2935175377
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.3132837651




Total test records in report: 916
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3278292347 Jul 01 04:51:52 PM PDT 24 Jul 01 04:53:32 PM PDT 24 76978485352 ps
T4 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2596715747 Jul 01 04:51:27 PM PDT 24 Jul 01 04:51:37 PM PDT 24 2423241119 ps
T5 /workspace/coverage/default/46.sysrst_ctrl_smoke.924455338 Jul 01 04:52:39 PM PDT 24 Jul 01 04:52:47 PM PDT 24 2108031938 ps
T13 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.3253970577 Jul 01 04:52:24 PM PDT 24 Jul 01 04:52:29 PM PDT 24 3480516083 ps
T2 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.4087910943 Jul 01 04:51:45 PM PDT 24 Jul 01 04:52:48 PM PDT 24 67390849821 ps
T3 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.2573129007 Jul 01 04:52:26 PM PDT 24 Jul 01 04:53:27 PM PDT 24 88662118239 ps
T14 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.2092673199 Jul 01 04:51:43 PM PDT 24 Jul 01 04:51:48 PM PDT 24 2461879328 ps
T6 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2143366841 Jul 01 04:50:23 PM PDT 24 Jul 01 04:50:52 PM PDT 24 12710771291 ps
T7 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.1913983670 Jul 01 04:51:50 PM PDT 24 Jul 01 04:53:11 PM PDT 24 32901875625 ps
T15 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.2012276648 Jul 01 04:51:29 PM PDT 24 Jul 01 04:51:38 PM PDT 24 23069737069 ps
T22 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2450406715 Jul 01 04:51:26 PM PDT 24 Jul 01 04:51:59 PM PDT 24 180980992507 ps
T47 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.833248385 Jul 01 04:52:50 PM PDT 24 Jul 01 04:52:58 PM PDT 24 2860427292 ps
T8 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3334271943 Jul 01 04:50:40 PM PDT 24 Jul 01 04:53:47 PM PDT 24 77748901518 ps
T9 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.314146449 Jul 01 04:51:54 PM PDT 24 Jul 01 04:52:37 PM PDT 24 59960972676 ps
T48 /workspace/coverage/default/32.sysrst_ctrl_alert_test.754164110 Jul 01 04:51:58 PM PDT 24 Jul 01 04:52:08 PM PDT 24 2012980900 ps
T49 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2302972652 Jul 01 04:52:00 PM PDT 24 Jul 01 04:52:08 PM PDT 24 2249735362 ps
T24 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.912814594 Jul 01 04:52:01 PM PDT 24 Jul 01 04:52:13 PM PDT 24 25399862521 ps
T50 /workspace/coverage/default/4.sysrst_ctrl_smoke.202012463 Jul 01 04:50:32 PM PDT 24 Jul 01 04:50:35 PM PDT 24 2132699736 ps
T10 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2547102109 Jul 01 04:50:23 PM PDT 24 Jul 01 04:50:27 PM PDT 24 2451721527 ps
T11 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.3835511833 Jul 01 04:52:39 PM PDT 24 Jul 01 04:52:48 PM PDT 24 3025582437 ps
T51 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.4174902127 Jul 01 04:50:16 PM PDT 24 Jul 01 04:50:25 PM PDT 24 2157234915 ps
T73 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2064606108 Jul 01 04:50:55 PM PDT 24 Jul 01 04:50:59 PM PDT 24 2042907369 ps
T101 /workspace/coverage/default/30.sysrst_ctrl_alert_test.447708357 Jul 01 04:51:54 PM PDT 24 Jul 01 04:51:59 PM PDT 24 2045498498 ps
T102 /workspace/coverage/default/0.sysrst_ctrl_smoke.3812091489 Jul 01 04:50:17 PM PDT 24 Jul 01 04:50:23 PM PDT 24 2115818931 ps
T103 /workspace/coverage/default/45.sysrst_ctrl_alert_test.4184065378 Jul 01 04:52:36 PM PDT 24 Jul 01 04:52:39 PM PDT 24 2027910602 ps
T12 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3814006669 Jul 01 04:52:58 PM PDT 24 Jul 01 04:56:36 PM PDT 24 80513396008 ps
T20 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2502456250 Jul 01 04:50:53 PM PDT 24 Jul 01 04:51:03 PM PDT 24 8797232037 ps
T39 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.4269931261 Jul 01 04:51:38 PM PDT 24 Jul 01 04:53:46 PM PDT 24 204115885242 ps
T34 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1292818499 Jul 01 04:50:22 PM PDT 24 Jul 01 04:50:25 PM PDT 24 3104382941 ps
T23 /workspace/coverage/default/30.sysrst_ctrl_stress_all.2710999078 Jul 01 04:51:58 PM PDT 24 Jul 01 05:05:41 PM PDT 24 315001494453 ps
T21 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2745905984 Jul 01 04:51:03 PM PDT 24 Jul 01 04:51:10 PM PDT 24 9369679820 ps
T57 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2936723627 Jul 01 04:51:39 PM PDT 24 Jul 01 04:52:51 PM PDT 24 29937268575 ps
T107 /workspace/coverage/default/14.sysrst_ctrl_smoke.3971589278 Jul 01 04:50:58 PM PDT 24 Jul 01 04:51:06 PM PDT 24 2115194038 ps
T30 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2393122969 Jul 01 04:50:24 PM PDT 24 Jul 01 04:50:58 PM PDT 24 23266653869 ps
T108 /workspace/coverage/default/11.sysrst_ctrl_smoke.2708843051 Jul 01 04:50:46 PM PDT 24 Jul 01 04:50:53 PM PDT 24 2114162251 ps
T40 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2935175377 Jul 01 04:52:55 PM PDT 24 Jul 01 04:53:59 PM PDT 24 25080020251 ps
T41 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4044351176 Jul 01 04:52:27 PM PDT 24 Jul 01 04:53:22 PM PDT 24 72747770993 ps
T58 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.4252060372 Jul 01 04:51:29 PM PDT 24 Jul 01 04:51:36 PM PDT 24 2462026053 ps
T181 /workspace/coverage/default/6.sysrst_ctrl_smoke.2917460687 Jul 01 04:50:37 PM PDT 24 Jul 01 04:50:44 PM PDT 24 2109388654 ps
T42 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.686400508 Jul 01 04:51:14 PM PDT 24 Jul 01 04:51:21 PM PDT 24 3552719972 ps
T182 /workspace/coverage/default/5.sysrst_ctrl_smoke.769233203 Jul 01 04:50:34 PM PDT 24 Jul 01 04:50:41 PM PDT 24 2110939077 ps
T183 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2056399864 Jul 01 04:52:02 PM PDT 24 Jul 01 04:52:09 PM PDT 24 2018920142 ps
T59 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3132228229 Jul 01 04:50:48 PM PDT 24 Jul 01 04:50:58 PM PDT 24 2467247947 ps
T52 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1882232183 Jul 01 04:52:48 PM PDT 24 Jul 01 04:52:57 PM PDT 24 3579975026 ps
T61 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2288464143 Jul 01 04:50:24 PM PDT 24 Jul 01 04:50:29 PM PDT 24 2538157908 ps
T353 /workspace/coverage/default/44.sysrst_ctrl_alert_test.2333685741 Jul 01 04:52:39 PM PDT 24 Jul 01 04:52:45 PM PDT 24 2022329483 ps
T36 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3502085854 Jul 01 04:50:25 PM PDT 24 Jul 01 04:51:37 PM PDT 24 105500134065 ps
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T354 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.1283576589 Jul 01 04:52:09 PM PDT 24 Jul 01 04:52:23 PM PDT 24 3995310756 ps
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T356 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.842581230 Jul 01 04:52:26 PM PDT 24 Jul 01 04:52:33 PM PDT 24 2105401463 ps
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T53 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1027061724 Jul 01 04:52:10 PM PDT 24 Jul 01 04:52:56 PM PDT 24 61581464658 ps
T62 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.2509191857 Jul 01 04:50:49 PM PDT 24 Jul 01 04:50:54 PM PDT 24 2626388104 ps
T54 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3308010951 Jul 01 04:51:01 PM PDT 24 Jul 01 04:51:06 PM PDT 24 6803189391 ps
T43 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.262123373 Jul 01 04:51:29 PM PDT 24 Jul 01 04:51:33 PM PDT 24 3341495541 ps
T64 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.3571708383 Jul 01 04:51:45 PM PDT 24 Jul 01 04:51:50 PM PDT 24 3366155279 ps
T294 /workspace/coverage/default/37.sysrst_ctrl_alert_test.97744964 Jul 01 04:52:09 PM PDT 24 Jul 01 04:52:17 PM PDT 24 2014306119 ps
T67 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.4237582905 Jul 01 04:51:39 PM PDT 24 Jul 01 04:51:59 PM PDT 24 25853570213 ps
T55 /workspace/coverage/default/39.sysrst_ctrl_stress_all.1769462685 Jul 01 04:52:18 PM PDT 24 Jul 01 04:54:19 PM PDT 24 1023020504227 ps
T32 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.4106385615 Jul 01 04:50:54 PM PDT 24 Jul 01 04:51:04 PM PDT 24 4179769485 ps
T168 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.972076115 Jul 01 04:50:23 PM PDT 24 Jul 01 04:50:28 PM PDT 24 2269826336 ps
T74 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.1995181218 Jul 01 04:52:27 PM PDT 24 Jul 01 04:54:50 PM PDT 24 114412325936 ps
T60 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2670444563 Jul 01 04:52:49 PM PDT 24 Jul 01 04:52:59 PM PDT 24 2467480090 ps
T169 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3397832265 Jul 01 04:51:32 PM PDT 24 Jul 01 04:51:36 PM PDT 24 3773189435 ps
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T56 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1541731270 Jul 01 04:50:54 PM PDT 24 Jul 01 04:51:05 PM PDT 24 8080400564 ps
T63 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.1339573005 Jul 01 04:51:27 PM PDT 24 Jul 01 04:51:33 PM PDT 24 2530545604 ps
T44 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2554558403 Jul 01 04:52:20 PM PDT 24 Jul 01 04:52:30 PM PDT 24 3519346632 ps
T138 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.241836448 Jul 01 04:50:34 PM PDT 24 Jul 01 04:50:46 PM PDT 24 3770450012 ps
T139 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1098235242 Jul 01 04:51:35 PM PDT 24 Jul 01 04:51:38 PM PDT 24 2149676773 ps
T68 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1133268555 Jul 01 04:52:26 PM PDT 24 Jul 01 04:54:41 PM PDT 24 78171431479 ps
T140 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3462980715 Jul 01 04:50:39 PM PDT 24 Jul 01 04:50:43 PM PDT 24 3524636311 ps
T35 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.204830553 Jul 01 04:51:50 PM PDT 24 Jul 01 04:52:36 PM PDT 24 83540323461 ps
T69 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2552999506 Jul 01 04:52:58 PM PDT 24 Jul 01 04:54:04 PM PDT 24 24332894394 ps
T141 /workspace/coverage/default/40.sysrst_ctrl_alert_test.2606419932 Jul 01 04:52:20 PM PDT 24 Jul 01 04:52:27 PM PDT 24 2020372113 ps
T176 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1018126892 Jul 01 04:50:46 PM PDT 24 Jul 01 04:52:30 PM PDT 24 81171541139 ps
T177 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.3052408000 Jul 01 04:50:57 PM PDT 24 Jul 01 04:52:20 PM PDT 24 61193097108 ps
T178 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.3742848488 Jul 01 04:51:13 PM PDT 24 Jul 01 04:51:31 PM PDT 24 84856556478 ps
T33 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2752690269 Jul 01 04:51:17 PM PDT 24 Jul 01 04:51:42 PM PDT 24 39257493814 ps
T45 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.1524507377 Jul 01 04:52:10 PM PDT 24 Jul 01 04:52:36 PM PDT 24 121337125716 ps
T142 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.2466935773 Jul 01 04:52:49 PM PDT 24 Jul 01 04:52:56 PM PDT 24 3056987282 ps
T31 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.1675939801 Jul 01 04:51:36 PM PDT 24 Jul 01 04:51:43 PM PDT 24 3801968924 ps
T358 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3931085944 Jul 01 04:50:34 PM PDT 24 Jul 01 04:50:43 PM PDT 24 2610572502 ps
T285 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.399262088 Jul 01 04:50:24 PM PDT 24 Jul 01 04:50:34 PM PDT 24 2459613270 ps
T288 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.432100287 Jul 01 04:52:01 PM PDT 24 Jul 01 04:52:07 PM PDT 24 2590892705 ps
T359 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1913221198 Jul 01 04:50:38 PM PDT 24 Jul 01 04:50:47 PM PDT 24 2482673219 ps
T86 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1780655114 Jul 01 04:52:48 PM PDT 24 Jul 01 04:53:58 PM PDT 24 27330475161 ps
T360 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1240531713 Jul 01 04:51:45 PM PDT 24 Jul 01 04:51:51 PM PDT 24 2617769595 ps
T289 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3397487509 Jul 01 04:51:46 PM PDT 24 Jul 01 04:51:49 PM PDT 24 2672502170 ps
T238 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.2458732533 Jul 01 04:52:39 PM PDT 24 Jul 01 04:55:44 PM PDT 24 75114608570 ps
T46 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.901785509 Jul 01 04:52:29 PM PDT 24 Jul 01 04:52:39 PM PDT 24 3663941096 ps
T252 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.2034991029 Jul 01 04:50:20 PM PDT 24 Jul 01 04:51:02 PM PDT 24 42072881495 ps
T174 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.787865608 Jul 01 04:51:00 PM PDT 24 Jul 01 04:51:14 PM PDT 24 5862056216 ps
T87 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2809463999 Jul 01 04:52:56 PM PDT 24 Jul 01 04:55:08 PM PDT 24 115693410925 ps
T152 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.2098547728 Jul 01 04:52:00 PM PDT 24 Jul 01 04:52:07 PM PDT 24 3428278714 ps
T277 /workspace/coverage/default/42.sysrst_ctrl_stress_all.4122592385 Jul 01 04:52:26 PM PDT 24 Jul 01 04:52:52 PM PDT 24 7674140442 ps
T278 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.1087712140 Jul 01 04:51:25 PM PDT 24 Jul 01 04:51:34 PM PDT 24 2611077706 ps
T279 /workspace/coverage/default/25.sysrst_ctrl_smoke.2723397621 Jul 01 04:51:36 PM PDT 24 Jul 01 04:51:44 PM PDT 24 2108349180 ps
T280 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3703863480 Jul 01 04:51:35 PM PDT 24 Jul 01 04:51:43 PM PDT 24 2509380279 ps
T166 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.449538512 Jul 01 04:51:45 PM PDT 24 Jul 01 04:51:58 PM PDT 24 4314030109 ps
T281 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.1535513079 Jul 01 04:50:24 PM PDT 24 Jul 01 04:50:29 PM PDT 24 2629875445 ps
T361 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.102779365 Jul 01 04:50:42 PM PDT 24 Jul 01 04:50:45 PM PDT 24 3746292013 ps
T362 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1006231276 Jul 01 04:51:52 PM PDT 24 Jul 01 04:52:05 PM PDT 24 3649876080 ps
T37 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3742567493 Jul 01 04:52:38 PM PDT 24 Jul 01 04:55:01 PM PDT 24 59435786395 ps
T363 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.4220612980 Jul 01 04:51:45 PM PDT 24 Jul 01 04:51:48 PM PDT 24 2196300754 ps
T364 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1171841718 Jul 01 04:52:39 PM PDT 24 Jul 01 04:52:44 PM PDT 24 2528547193 ps
T167 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.3949247364 Jul 01 04:51:17 PM PDT 24 Jul 01 04:51:22 PM PDT 24 2857677499 ps
T365 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.629574575 Jul 01 04:52:51 PM PDT 24 Jul 01 04:53:01 PM PDT 24 3694315278 ps
T38 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.4173570090 Jul 01 04:50:54 PM PDT 24 Jul 01 04:52:11 PM PDT 24 100295860675 ps
T229 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.374268330 Jul 01 04:52:49 PM PDT 24 Jul 01 04:53:44 PM PDT 24 77664004237 ps
T312 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.1167871359 Jul 01 04:51:01 PM PDT 24 Jul 01 04:53:33 PM PDT 24 113114096792 ps
T366 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.405874050 Jul 01 04:50:17 PM PDT 24 Jul 01 04:50:23 PM PDT 24 2401476339 ps
T367 /workspace/coverage/default/39.sysrst_ctrl_alert_test.1532410128 Jul 01 04:52:24 PM PDT 24 Jul 01 04:52:33 PM PDT 24 2012449624 ps
T368 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2896446642 Jul 01 04:52:02 PM PDT 24 Jul 01 04:52:11 PM PDT 24 3542756422 ps
T369 /workspace/coverage/default/46.sysrst_ctrl_alert_test.3392418795 Jul 01 04:52:37 PM PDT 24 Jul 01 04:52:41 PM PDT 24 2027546635 ps
T175 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.626438213 Jul 01 04:50:49 PM PDT 24 Jul 01 04:50:59 PM PDT 24 3298045173 ps
T370 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3658316720 Jul 01 04:51:32 PM PDT 24 Jul 01 04:51:40 PM PDT 24 2209950489 ps
T286 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3233423090 Jul 01 04:52:11 PM PDT 24 Jul 01 04:52:20 PM PDT 24 2460182745 ps
T371 /workspace/coverage/default/31.sysrst_ctrl_alert_test.3754371299 Jul 01 04:51:59 PM PDT 24 Jul 01 04:52:07 PM PDT 24 2022714916 ps
T372 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2843093885 Jul 01 04:50:34 PM PDT 24 Jul 01 04:50:42 PM PDT 24 2173728628 ps
T70 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.954051635 Jul 01 04:50:52 PM PDT 24 Jul 01 04:50:56 PM PDT 24 6597823126 ps
T373 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.320020044 Jul 01 04:51:52 PM PDT 24 Jul 01 04:52:02 PM PDT 24 2449936513 ps
T374 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3970897786 Jul 01 04:52:49 PM PDT 24 Jul 01 04:52:57 PM PDT 24 2451196453 ps
T310 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.4076551474 Jul 01 04:51:03 PM PDT 24 Jul 01 04:51:39 PM PDT 24 40048226932 ps
T282 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.166780009 Jul 01 04:51:19 PM PDT 24 Jul 01 04:52:02 PM PDT 24 32214933698 ps
T352 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3548815898 Jul 01 04:52:24 PM PDT 24 Jul 01 04:52:36 PM PDT 24 2512714949 ps
T375 /workspace/coverage/default/34.sysrst_ctrl_alert_test.1968931869 Jul 01 04:52:02 PM PDT 24 Jul 01 04:52:12 PM PDT 24 2007436838 ps
T153 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.638685942 Jul 01 04:50:47 PM PDT 24 Jul 01 04:50:50 PM PDT 24 2839121679 ps
T376 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.1820016981 Jul 01 04:51:45 PM PDT 24 Jul 01 04:51:54 PM PDT 24 2609734407 ps
T377 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.900278988 Jul 01 04:50:30 PM PDT 24 Jul 01 04:50:33 PM PDT 24 3948313214 ps
T88 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.423127309 Jul 01 04:50:18 PM PDT 24 Jul 01 04:51:21 PM PDT 24 40363297775 ps
T378 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1355758232 Jul 01 04:50:45 PM PDT 24 Jul 01 04:50:48 PM PDT 24 2037429313 ps
T78 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1601584733 Jul 01 04:51:01 PM PDT 24 Jul 01 04:51:15 PM PDT 24 4817713512 ps
T156 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2390640602 Jul 01 04:52:40 PM PDT 24 Jul 01 04:52:45 PM PDT 24 3442438830 ps
T157 /workspace/coverage/default/38.sysrst_ctrl_alert_test.1071825521 Jul 01 04:52:21 PM PDT 24 Jul 01 04:52:28 PM PDT 24 2040176021 ps
T158 /workspace/coverage/default/35.sysrst_ctrl_stress_all.2381685247 Jul 01 04:52:01 PM PDT 24 Jul 01 04:52:16 PM PDT 24 17136466344 ps
T159 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2306953230 Jul 01 04:50:53 PM PDT 24 Jul 01 04:50:58 PM PDT 24 2490216853 ps
T160 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3520382758 Jul 01 04:52:19 PM PDT 24 Jul 01 04:52:27 PM PDT 24 3721051878 ps
T71 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.2000706065 Jul 01 04:51:50 PM PDT 24 Jul 01 04:54:40 PM PDT 24 375242448494 ps
T161 /workspace/coverage/default/16.sysrst_ctrl_smoke.64254058 Jul 01 04:51:01 PM PDT 24 Jul 01 04:51:10 PM PDT 24 2109270111 ps
T162 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.4146349957 Jul 01 04:51:01 PM PDT 24 Jul 01 04:51:11 PM PDT 24 2539177449 ps
T72 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1943728056 Jul 01 04:50:37 PM PDT 24 Jul 01 04:50:47 PM PDT 24 7685184472 ps
T111 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.138356758 Jul 01 04:50:49 PM PDT 24 Jul 01 04:50:55 PM PDT 24 3089261148 ps
T112 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.4267853013 Jul 01 04:52:49 PM PDT 24 Jul 01 04:54:31 PM PDT 24 36658941686 ps
T113 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1173856922 Jul 01 04:50:47 PM PDT 24 Jul 01 04:50:56 PM PDT 24 2610972444 ps
T114 /workspace/coverage/default/48.sysrst_ctrl_alert_test.1523958624 Jul 01 04:52:49 PM PDT 24 Jul 01 04:52:53 PM PDT 24 2085394666 ps
T80 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1899186248 Jul 01 04:52:49 PM PDT 24 Jul 01 04:55:09 PM PDT 24 71455609031 ps
T115 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.1262651350 Jul 01 04:52:13 PM PDT 24 Jul 01 04:52:22 PM PDT 24 2633459150 ps
T116 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.949372750 Jul 01 04:51:37 PM PDT 24 Jul 01 04:52:32 PM PDT 24 37618270268 ps
T117 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.3908213934 Jul 01 04:52:17 PM PDT 24 Jul 01 04:52:21 PM PDT 24 3631020907 ps
T118 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1149532716 Jul 01 04:52:47 PM PDT 24 Jul 01 04:52:52 PM PDT 24 2206960599 ps
T245 /workspace/coverage/default/23.sysrst_ctrl_stress_all.3164807772 Jul 01 04:51:28 PM PDT 24 Jul 01 04:53:11 PM PDT 24 164766733636 ps
T170 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.1709203004 Jul 01 04:51:53 PM PDT 24 Jul 01 04:52:05 PM PDT 24 3049686678 ps
T379 /workspace/coverage/default/21.sysrst_ctrl_alert_test.3427839994 Jul 01 04:51:26 PM PDT 24 Jul 01 04:51:35 PM PDT 24 2009912481 ps
T287 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1265150725 Jul 01 04:51:01 PM PDT 24 Jul 01 04:51:07 PM PDT 24 2466241024 ps
T380 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3702798459 Jul 01 04:51:47 PM PDT 24 Jul 01 04:51:53 PM PDT 24 2526665522 ps
T381 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.138294446 Jul 01 04:52:25 PM PDT 24 Jul 01 04:52:38 PM PDT 24 2614235201 ps
T382 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.4216338814 Jul 01 04:52:25 PM PDT 24 Jul 01 04:52:32 PM PDT 24 2495948864 ps
T383 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3800683377 Jul 01 04:52:01 PM PDT 24 Jul 01 04:52:10 PM PDT 24 2228937065 ps
T384 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1683856258 Jul 01 04:50:32 PM PDT 24 Jul 01 04:50:35 PM PDT 24 2468321217 ps
T385 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.311577229 Jul 01 04:52:21 PM PDT 24 Jul 01 04:52:28 PM PDT 24 2185249169 ps
T386 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.902076175 Jul 01 04:52:38 PM PDT 24 Jul 01 04:52:45 PM PDT 24 2255610022 ps
T283 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.916981488 Jul 01 04:51:16 PM PDT 24 Jul 01 04:51:21 PM PDT 24 3423239618 ps
T89 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1346408295 Jul 01 04:52:27 PM PDT 24 Jul 01 04:53:07 PM PDT 24 194422572647 ps
T230 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3620560074 Jul 01 04:52:56 PM PDT 24 Jul 01 04:55:56 PM PDT 24 72114185884 ps
T231 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.331185661 Jul 01 04:50:34 PM PDT 24 Jul 01 04:51:37 PM PDT 24 84708872738 ps
T387 /workspace/coverage/default/18.sysrst_ctrl_alert_test.4261727135 Jul 01 04:51:15 PM PDT 24 Jul 01 04:51:22 PM PDT 24 2013559029 ps
T388 /workspace/coverage/default/12.sysrst_ctrl_alert_test.2517035628 Jul 01 04:51:00 PM PDT 24 Jul 01 04:51:05 PM PDT 24 2012303961 ps
T389 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.410860764 Jul 01 04:51:27 PM PDT 24 Jul 01 04:51:32 PM PDT 24 2485842034 ps
T390 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1493775109 Jul 01 04:52:37 PM PDT 24 Jul 01 04:53:12 PM PDT 24 28766699403 ps
T391 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1107406738 Jul 01 04:51:36 PM PDT 24 Jul 01 04:51:40 PM PDT 24 2490409483 ps
T392 /workspace/coverage/default/12.sysrst_ctrl_smoke.1507566754 Jul 01 04:50:55 PM PDT 24 Jul 01 04:51:00 PM PDT 24 2118915369 ps
T104 /workspace/coverage/default/7.sysrst_ctrl_stress_all.3931693290 Jul 01 04:50:39 PM PDT 24 Jul 01 04:59:05 PM PDT 24 2107388681676 ps
T179 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.2651796734 Jul 01 04:52:17 PM PDT 24 Jul 01 04:52:23 PM PDT 24 5293106357 ps
T393 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3188276081 Jul 01 04:51:50 PM PDT 24 Jul 01 04:51:58 PM PDT 24 2512805124 ps
T394 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1184693846 Jul 01 04:52:39 PM PDT 24 Jul 01 04:54:14 PM PDT 24 47817581282 ps
T395 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2185617166 Jul 01 04:51:26 PM PDT 24 Jul 01 04:51:37 PM PDT 24 2608453907 ps
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T404 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.724235156 Jul 01 04:50:54 PM PDT 24 Jul 01 04:50:59 PM PDT 24 3243378583 ps
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T410 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1959072838 Jul 01 04:50:41 PM PDT 24 Jul 01 04:50:49 PM PDT 24 2611149789 ps
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T413 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.2875795175 Jul 01 04:52:19 PM PDT 24 Jul 01 04:52:26 PM PDT 24 2576729223 ps
T253 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.3814390159 Jul 01 04:50:26 PM PDT 24 Jul 01 04:52:17 PM PDT 24 42010472335 ps
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T125 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2366095837 Jul 01 04:51:00 PM PDT 24 Jul 01 04:51:09 PM PDT 24 4765918143 ps
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T186 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2440099896 Jul 01 04:52:56 PM PDT 24 Jul 01 04:54:31 PM PDT 24 143262445017 ps
T187 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1745680759 Jul 01 04:52:47 PM PDT 24 Jul 01 04:52:50 PM PDT 24 3362020861 ps
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T189 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2353400872 Jul 01 04:50:57 PM PDT 24 Jul 01 04:51:03 PM PDT 24 917405271901 ps
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T180 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2059096627 Jul 01 04:52:44 PM PDT 24 Jul 01 04:53:21 PM PDT 24 131479556572 ps
T417 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3305553550 Jul 01 04:51:17 PM PDT 24 Jul 01 04:51:22 PM PDT 24 2022991355 ps
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T418 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.865435225 Jul 01 04:52:38 PM PDT 24 Jul 01 04:52:46 PM PDT 24 2614680888 ps
T419 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1404317987 Jul 01 04:52:39 PM PDT 24 Jul 01 04:52:45 PM PDT 24 4718867440 ps
T420 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1855094994 Jul 01 04:50:39 PM PDT 24 Jul 01 04:50:43 PM PDT 24 2530594655 ps
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T133 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.589370605 Jul 01 04:51:13 PM PDT 24 Jul 01 04:52:45 PM PDT 24 40301076747 ps
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T421 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3001974532 Jul 01 04:51:54 PM PDT 24 Jul 01 04:52:03 PM PDT 24 3957469154 ps
T422 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.890815562 Jul 01 04:52:18 PM PDT 24 Jul 01 04:52:30 PM PDT 24 2611278148 ps
T93 /workspace/coverage/default/4.sysrst_ctrl_stress_all.4235181721 Jul 01 04:50:34 PM PDT 24 Jul 01 04:51:24 PM PDT 24 114794888487 ps
T423 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3568503968 Jul 01 04:50:54 PM PDT 24 Jul 01 04:50:58 PM PDT 24 2538300399 ps
T227 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.2572855816 Jul 01 04:52:28 PM PDT 24 Jul 01 04:52:42 PM PDT 24 3604641642 ps
T424 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1342524620 Jul 01 04:52:18 PM PDT 24 Jul 01 04:52:24 PM PDT 24 2470072465 ps
T425 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4067302191 Jul 01 04:52:26 PM PDT 24 Jul 01 04:52:33 PM PDT 24 2638595759 ps
T426 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3416533269 Jul 01 04:51:55 PM PDT 24 Jul 01 04:52:06 PM PDT 24 11949478163 ps
T336 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.1485744752 Jul 01 04:51:48 PM PDT 24 Jul 01 04:55:08 PM PDT 24 116001252356 ps
T427 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3379817412 Jul 01 04:51:52 PM PDT 24 Jul 01 04:52:02 PM PDT 24 2607854235 ps
T428 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.2475048845 Jul 01 04:52:00 PM PDT 24 Jul 01 04:52:08 PM PDT 24 2523910478 ps
T429 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1165038606 Jul 01 04:50:51 PM PDT 24 Jul 01 04:50:54 PM PDT 24 2501382277 ps
T430 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1206466969 Jul 01 04:51:26 PM PDT 24 Jul 01 04:51:32 PM PDT 24 3080235885 ps
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