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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.11 99.31 96.43 100.00 96.79 98.74 99.52 88.98


Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T467 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.77271819 Jul 03 04:22:33 PM PDT 24 Jul 03 04:22:40 PM PDT 24 2298497817 ps
T268 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2269366476 Jul 03 04:24:16 PM PDT 24 Jul 03 04:24:48 PM PDT 24 53848234739 ps
T468 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.3935915029 Jul 03 04:23:04 PM PDT 24 Jul 03 04:23:08 PM PDT 24 2476098713 ps
T469 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.3975036401 Jul 03 04:23:59 PM PDT 24 Jul 03 04:24:06 PM PDT 24 2709272561 ps
T221 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.404333745 Jul 03 04:23:53 PM PDT 24 Jul 03 04:23:54 PM PDT 24 5416102220 ps
T470 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.56860299 Jul 03 04:24:00 PM PDT 24 Jul 03 04:24:03 PM PDT 24 2137785195 ps
T78 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.373185131 Jul 03 04:24:05 PM PDT 24 Jul 03 04:24:21 PM PDT 24 252799868228 ps
T471 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.2779777808 Jul 03 04:25:04 PM PDT 24 Jul 03 04:25:06 PM PDT 24 2949654956 ps
T248 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.915429635 Jul 03 04:24:30 PM PDT 24 Jul 03 04:30:39 PM PDT 24 133464391512 ps
T297 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.3843014817 Jul 03 04:22:43 PM PDT 24 Jul 03 04:22:45 PM PDT 24 3733670996 ps
T375 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2012689743 Jul 03 04:24:39 PM PDT 24 Jul 03 04:28:27 PM PDT 24 83652725583 ps
T233 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1684951307 Jul 03 04:24:33 PM PDT 24 Jul 03 04:25:19 PM PDT 24 63826182725 ps
T472 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.3394680189 Jul 03 04:23:46 PM PDT 24 Jul 03 04:23:53 PM PDT 24 3589785246 ps
T473 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2402620404 Jul 03 04:23:48 PM PDT 24 Jul 03 04:23:55 PM PDT 24 2227435636 ps
T474 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.838035123 Jul 03 04:24:08 PM PDT 24 Jul 03 04:24:16 PM PDT 24 3072759222 ps
T475 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.3748986773 Jul 03 04:23:53 PM PDT 24 Jul 03 04:24:00 PM PDT 24 2819994725 ps
T89 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.2826162259 Jul 03 04:24:27 PM PDT 24 Jul 03 04:26:25 PM PDT 24 47653212396 ps
T476 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.827639947 Jul 03 04:23:11 PM PDT 24 Jul 03 04:23:14 PM PDT 24 2486893505 ps
T477 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.432944860 Jul 03 04:24:02 PM PDT 24 Jul 03 04:24:05 PM PDT 24 2627605092 ps
T478 /workspace/coverage/default/44.sysrst_ctrl_alert_test.3481346171 Jul 03 04:24:36 PM PDT 24 Jul 03 04:24:39 PM PDT 24 2025049006 ps
T479 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2832823236 Jul 03 04:24:19 PM PDT 24 Jul 03 04:24:27 PM PDT 24 2608581817 ps
T234 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4141392728 Jul 03 04:24:26 PM PDT 24 Jul 03 04:25:55 PM PDT 24 35322623653 ps
T241 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.780930061 Jul 03 04:24:31 PM PDT 24 Jul 03 04:29:27 PM PDT 24 114233590255 ps
T480 /workspace/coverage/default/12.sysrst_ctrl_smoke.2249265409 Jul 03 04:23:04 PM PDT 24 Jul 03 04:23:08 PM PDT 24 2124858676 ps
T481 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.2082475007 Jul 03 04:23:32 PM PDT 24 Jul 03 04:23:35 PM PDT 24 2524652865 ps
T482 /workspace/coverage/default/48.sysrst_ctrl_alert_test.24350934 Jul 03 04:24:34 PM PDT 24 Jul 03 04:24:37 PM PDT 24 2044448771 ps
T483 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2086452211 Jul 03 04:23:32 PM PDT 24 Jul 03 04:23:35 PM PDT 24 2459476872 ps
T271 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.3751050881 Jul 03 04:23:48 PM PDT 24 Jul 03 04:29:45 PM PDT 24 136400896365 ps
T484 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3554855494 Jul 03 04:23:11 PM PDT 24 Jul 03 04:23:20 PM PDT 24 2127732607 ps
T179 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.1210980709 Jul 03 04:24:21 PM PDT 24 Jul 03 04:24:25 PM PDT 24 4545842885 ps
T162 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.930596906 Jul 03 04:23:45 PM PDT 24 Jul 03 04:23:56 PM PDT 24 4784364569 ps
T485 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.494890585 Jul 03 04:24:43 PM PDT 24 Jul 03 04:24:45 PM PDT 24 2495281058 ps
T486 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2128829689 Jul 03 04:24:08 PM PDT 24 Jul 03 04:26:33 PM PDT 24 216067542760 ps
T487 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.215670302 Jul 03 04:23:05 PM PDT 24 Jul 03 04:23:09 PM PDT 24 4398703813 ps
T488 /workspace/coverage/default/17.sysrst_ctrl_smoke.1442682059 Jul 03 04:23:15 PM PDT 24 Jul 03 04:23:21 PM PDT 24 2111605152 ps
T277 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1285232823 Jul 03 04:22:53 PM PDT 24 Jul 03 04:24:43 PM PDT 24 42013313907 ps
T238 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.113941821 Jul 03 04:22:59 PM PDT 24 Jul 03 04:23:10 PM PDT 24 22155988605 ps
T489 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.886081907 Jul 03 04:22:42 PM PDT 24 Jul 03 04:23:48 PM PDT 24 71677119232 ps
T249 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2019967117 Jul 03 04:24:50 PM PDT 24 Jul 03 04:25:58 PM PDT 24 27328869742 ps
T490 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.1956345684 Jul 03 04:23:32 PM PDT 24 Jul 03 04:23:34 PM PDT 24 2631953619 ps
T491 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1621552861 Jul 03 04:23:54 PM PDT 24 Jul 03 04:24:04 PM PDT 24 3397895921 ps
T358 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3851218548 Jul 03 04:23:54 PM PDT 24 Jul 03 04:24:29 PM PDT 24 240765709640 ps
T492 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.4009287213 Jul 03 04:23:56 PM PDT 24 Jul 03 04:24:06 PM PDT 24 3380235558 ps
T493 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.344531174 Jul 03 04:22:45 PM PDT 24 Jul 03 04:22:53 PM PDT 24 2613111171 ps
T167 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.860007298 Jul 03 04:24:23 PM PDT 24 Jul 03 04:24:48 PM PDT 24 56571930642 ps
T222 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.4047098180 Jul 03 04:23:43 PM PDT 24 Jul 03 04:23:48 PM PDT 24 2710388120 ps
T494 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1313664296 Jul 03 04:24:01 PM PDT 24 Jul 03 04:24:04 PM PDT 24 2493940277 ps
T250 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2582129881 Jul 03 04:25:20 PM PDT 24 Jul 03 04:25:52 PM PDT 24 24340437602 ps
T209 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.3214974925 Jul 03 04:23:04 PM PDT 24 Jul 03 04:23:13 PM PDT 24 4226018911 ps
T495 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3132339788 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:43 PM PDT 24 3726491142 ps
T496 /workspace/coverage/default/49.sysrst_ctrl_stress_all.1257180401 Jul 03 04:24:44 PM PDT 24 Jul 03 04:25:05 PM PDT 24 13512612743 ps
T210 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3911670026 Jul 03 04:23:36 PM PDT 24 Jul 03 04:29:22 PM PDT 24 694027808752 ps
T497 /workspace/coverage/default/18.sysrst_ctrl_stress_all.288144290 Jul 03 04:23:19 PM PDT 24 Jul 03 04:23:32 PM PDT 24 11914148584 ps
T498 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.3542266934 Jul 03 04:22:56 PM PDT 24 Jul 03 04:22:58 PM PDT 24 2510754639 ps
T499 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.3778835798 Jul 03 04:22:57 PM PDT 24 Jul 03 04:23:08 PM PDT 24 3403229579 ps
T500 /workspace/coverage/default/41.sysrst_ctrl_smoke.39499074 Jul 03 04:24:43 PM PDT 24 Jul 03 04:24:45 PM PDT 24 2166417649 ps
T90 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.725008443 Jul 03 04:23:04 PM PDT 24 Jul 03 04:24:54 PM PDT 24 162255456861 ps
T501 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3049013074 Jul 03 04:23:00 PM PDT 24 Jul 03 04:23:07 PM PDT 24 2514906721 ps
T502 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1110127821 Jul 03 04:23:33 PM PDT 24 Jul 03 04:23:39 PM PDT 24 2086149011 ps
T503 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1043015673 Jul 03 04:22:48 PM PDT 24 Jul 03 04:22:50 PM PDT 24 2179937956 ps
T371 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1296441827 Jul 03 04:22:36 PM PDT 24 Jul 03 04:24:57 PM PDT 24 99246544210 ps
T380 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.3216797989 Jul 03 04:23:00 PM PDT 24 Jul 03 04:26:19 PM PDT 24 156032589542 ps
T345 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2330771995 Jul 03 04:24:54 PM PDT 24 Jul 03 04:27:22 PM PDT 24 59240049834 ps
T504 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2271075962 Jul 03 04:22:35 PM PDT 24 Jul 03 04:23:15 PM PDT 24 199054444512 ps
T505 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.2271478568 Jul 03 04:24:03 PM PDT 24 Jul 03 04:24:12 PM PDT 24 4001019830 ps
T163 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1869507665 Jul 03 04:24:01 PM PDT 24 Jul 03 04:25:17 PM PDT 24 27800284659 ps
T278 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.2924644631 Jul 03 04:22:59 PM PDT 24 Jul 03 04:24:50 PM PDT 24 42011426939 ps
T506 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3370932766 Jul 03 04:24:03 PM PDT 24 Jul 03 04:24:18 PM PDT 24 22105782184 ps
T507 /workspace/coverage/default/2.sysrst_ctrl_alert_test.2902972529 Jul 03 04:22:41 PM PDT 24 Jul 03 04:22:43 PM PDT 24 2043951345 ps
T383 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.871527434 Jul 03 04:24:31 PM PDT 24 Jul 03 04:24:41 PM PDT 24 27148855678 ps
T508 /workspace/coverage/default/20.sysrst_ctrl_smoke.565468384 Jul 03 04:23:25 PM PDT 24 Jul 03 04:23:32 PM PDT 24 2114793387 ps
T509 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.929601073 Jul 03 04:24:23 PM PDT 24 Jul 03 04:24:29 PM PDT 24 2662186092 ps
T510 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.514726989 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:46 PM PDT 24 2150835742 ps
T346 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.856338623 Jul 03 04:24:02 PM PDT 24 Jul 03 04:30:52 PM PDT 24 158814561902 ps
T511 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3741835686 Jul 03 04:23:00 PM PDT 24 Jul 03 04:23:11 PM PDT 24 2988446084 ps
T512 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1217546492 Jul 03 04:23:56 PM PDT 24 Jul 03 04:23:58 PM PDT 24 3936661549 ps
T513 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2692327500 Jul 03 04:22:39 PM PDT 24 Jul 03 04:22:41 PM PDT 24 2567860042 ps
T514 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3501460117 Jul 03 04:24:42 PM PDT 24 Jul 03 04:24:44 PM PDT 24 2538072295 ps
T515 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2372143453 Jul 03 04:24:29 PM PDT 24 Jul 03 04:24:46 PM PDT 24 26102167858 ps
T516 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3529289881 Jul 03 04:22:59 PM PDT 24 Jul 03 04:23:04 PM PDT 24 2461817256 ps
T386 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2949130684 Jul 03 04:23:42 PM PDT 24 Jul 03 04:23:59 PM PDT 24 11062475441 ps
T517 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.2875547054 Jul 03 04:23:40 PM PDT 24 Jul 03 04:23:47 PM PDT 24 2872386408 ps
T518 /workspace/coverage/default/40.sysrst_ctrl_smoke.3385410812 Jul 03 04:24:44 PM PDT 24 Jul 03 04:24:47 PM PDT 24 2115370694 ps
T519 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3667588470 Jul 03 04:23:35 PM PDT 24 Jul 03 04:23:42 PM PDT 24 2862229239 ps
T520 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4088767980 Jul 03 04:22:59 PM PDT 24 Jul 03 04:23:04 PM PDT 24 2528414597 ps
T521 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1208786934 Jul 03 04:24:33 PM PDT 24 Jul 03 04:24:40 PM PDT 24 2456904152 ps
T372 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3863243552 Jul 03 04:23:10 PM PDT 24 Jul 03 04:24:38 PM PDT 24 134843904369 ps
T522 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2019816272 Jul 03 04:22:44 PM PDT 24 Jul 03 04:23:03 PM PDT 24 25358644556 ps
T523 /workspace/coverage/default/9.sysrst_ctrl_alert_test.472679714 Jul 03 04:23:01 PM PDT 24 Jul 03 04:23:06 PM PDT 24 2027042689 ps
T524 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2964146031 Jul 03 04:22:59 PM PDT 24 Jul 03 04:23:04 PM PDT 24 2034382936 ps
T231 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1499722535 Jul 03 04:24:28 PM PDT 24 Jul 03 04:24:46 PM PDT 24 49607121854 ps
T525 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3451855541 Jul 03 04:23:10 PM PDT 24 Jul 03 04:23:46 PM PDT 24 12973202538 ps
T526 /workspace/coverage/default/30.sysrst_ctrl_alert_test.1939260464 Jul 03 04:23:58 PM PDT 24 Jul 03 04:24:05 PM PDT 24 2013015763 ps
T527 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2838668985 Jul 03 04:24:50 PM PDT 24 Jul 03 04:24:54 PM PDT 24 3688437240 ps
T528 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1412867747 Jul 03 04:24:02 PM PDT 24 Jul 03 04:24:07 PM PDT 24 2943469039 ps
T529 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1947876767 Jul 03 04:24:33 PM PDT 24 Jul 03 04:25:25 PM PDT 24 20579528163 ps
T530 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.1898769161 Jul 03 04:23:27 PM PDT 24 Jul 03 04:23:28 PM PDT 24 3384625710 ps
T352 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.3789655884 Jul 03 04:23:01 PM PDT 24 Jul 03 04:27:47 PM PDT 24 228438362525 ps
T531 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.1924272211 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:36 PM PDT 24 2842357431 ps
T532 /workspace/coverage/default/8.sysrst_ctrl_alert_test.1557448856 Jul 03 04:23:11 PM PDT 24 Jul 03 04:23:15 PM PDT 24 2014933678 ps
T533 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.87487108 Jul 03 04:24:17 PM PDT 24 Jul 03 04:24:25 PM PDT 24 2610357057 ps
T534 /workspace/coverage/default/38.sysrst_ctrl_stress_all.2451070380 Jul 03 04:24:11 PM PDT 24 Jul 03 04:24:15 PM PDT 24 6434739169 ps
T535 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.4242163373 Jul 03 04:23:42 PM PDT 24 Jul 03 04:23:45 PM PDT 24 2500346367 ps
T536 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1233170181 Jul 03 04:23:17 PM PDT 24 Jul 03 04:23:20 PM PDT 24 6475579651 ps
T537 /workspace/coverage/default/9.sysrst_ctrl_smoke.1597566855 Jul 03 04:23:09 PM PDT 24 Jul 03 04:23:14 PM PDT 24 2115075393 ps
T538 /workspace/coverage/default/19.sysrst_ctrl_alert_test.2092985718 Jul 03 04:23:33 PM PDT 24 Jul 03 04:23:39 PM PDT 24 2015398661 ps
T539 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2321746671 Jul 03 04:23:51 PM PDT 24 Jul 03 04:23:53 PM PDT 24 2040053905 ps
T540 /workspace/coverage/default/38.sysrst_ctrl_smoke.3443616589 Jul 03 04:24:21 PM PDT 24 Jul 03 04:24:25 PM PDT 24 2122125927 ps
T541 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2101910790 Jul 03 04:23:50 PM PDT 24 Jul 03 04:30:54 PM PDT 24 169655791956 ps
T387 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2201986029 Jul 03 04:22:43 PM PDT 24 Jul 03 04:27:04 PM PDT 24 1480248871016 ps
T180 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.3219891023 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:43 PM PDT 24 3969868860 ps
T362 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3109378550 Jul 03 04:24:52 PM PDT 24 Jul 03 04:25:47 PM PDT 24 70049581545 ps
T542 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.979074512 Jul 03 04:24:25 PM PDT 24 Jul 03 04:24:29 PM PDT 24 2579395194 ps
T377 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.425201913 Jul 03 04:25:21 PM PDT 24 Jul 03 04:28:32 PM PDT 24 69748129536 ps
T543 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2899374193 Jul 03 04:24:23 PM PDT 24 Jul 03 04:24:27 PM PDT 24 2516445367 ps
T378 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1414206230 Jul 03 04:24:34 PM PDT 24 Jul 03 04:25:44 PM PDT 24 51676611191 ps
T544 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1120543362 Jul 03 04:22:30 PM PDT 24 Jul 03 04:22:32 PM PDT 24 2660021804 ps
T322 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2536174459 Jul 03 04:23:12 PM PDT 24 Jul 03 04:24:41 PM PDT 24 33133104195 ps
T545 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3512830615 Jul 03 04:22:51 PM PDT 24 Jul 03 04:22:55 PM PDT 24 2518677408 ps
T354 /workspace/coverage/default/46.sysrst_ctrl_stress_all.515583665 Jul 03 04:24:50 PM PDT 24 Jul 03 04:26:26 PM PDT 24 174369662784 ps
T298 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.580152312 Jul 03 04:22:58 PM PDT 24 Jul 03 04:23:43 PM PDT 24 18040481847 ps
T546 /workspace/coverage/default/48.sysrst_ctrl_stress_all.3382069493 Jul 03 04:24:25 PM PDT 24 Jul 03 04:24:44 PM PDT 24 6852985108 ps
T547 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1753439097 Jul 03 04:23:54 PM PDT 24 Jul 03 04:23:57 PM PDT 24 2484280004 ps
T374 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1805552433 Jul 03 04:24:26 PM PDT 24 Jul 03 04:25:29 PM PDT 24 89821157165 ps
T548 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3639056379 Jul 03 04:24:18 PM PDT 24 Jul 03 04:24:22 PM PDT 24 4730706013 ps
T355 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.897248998 Jul 03 04:24:23 PM PDT 24 Jul 03 04:25:45 PM PDT 24 136299272645 ps
T75 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3246625728 Jul 03 04:24:30 PM PDT 24 Jul 03 04:37:02 PM PDT 24 340913110036 ps
T549 /workspace/coverage/default/36.sysrst_ctrl_alert_test.3084351150 Jul 03 04:24:00 PM PDT 24 Jul 03 04:24:07 PM PDT 24 2010373112 ps
T550 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.784843185 Jul 03 04:23:51 PM PDT 24 Jul 03 04:23:54 PM PDT 24 2719393727 ps
T551 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.169870857 Jul 03 04:24:31 PM PDT 24 Jul 03 04:24:38 PM PDT 24 2512445560 ps
T552 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.733562359 Jul 03 04:22:52 PM PDT 24 Jul 03 04:23:01 PM PDT 24 2610334625 ps
T553 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2688623808 Jul 03 04:24:37 PM PDT 24 Jul 03 04:26:04 PM PDT 24 69020113155 ps
T554 /workspace/coverage/default/13.sysrst_ctrl_smoke.3224602944 Jul 03 04:23:05 PM PDT 24 Jul 03 04:23:08 PM PDT 24 2131059100 ps
T164 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2288144485 Jul 03 04:22:47 PM PDT 24 Jul 03 04:24:46 PM PDT 24 427218255081 ps
T555 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.943799804 Jul 03 04:23:53 PM PDT 24 Jul 03 04:24:02 PM PDT 24 3422485851 ps
T195 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1259848055 Jul 03 04:24:20 PM PDT 24 Jul 03 04:24:25 PM PDT 24 5121786444 ps
T556 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3978276488 Jul 03 04:24:22 PM PDT 24 Jul 03 04:24:29 PM PDT 24 2513138097 ps
T557 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.475465300 Jul 03 04:24:15 PM PDT 24 Jul 03 04:24:17 PM PDT 24 2529488158 ps
T558 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1703148735 Jul 03 04:23:50 PM PDT 24 Jul 03 04:23:52 PM PDT 24 2493796974 ps
T559 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.2061164030 Jul 03 04:24:31 PM PDT 24 Jul 03 04:24:34 PM PDT 24 3552221127 ps
T308 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.1791400775 Jul 03 04:23:42 PM PDT 24 Jul 03 04:24:32 PM PDT 24 78921812705 ps
T81 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2441972403 Jul 03 04:23:54 PM PDT 24 Jul 03 04:26:19 PM PDT 24 717460074727 ps
T313 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.328696591 Jul 03 04:24:29 PM PDT 24 Jul 03 04:25:39 PM PDT 24 26578814329 ps
T314 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2698927515 Jul 03 04:23:51 PM PDT 24 Jul 03 04:23:55 PM PDT 24 4710111996 ps
T315 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2903331744 Jul 03 04:23:42 PM PDT 24 Jul 03 04:23:50 PM PDT 24 2611950509 ps
T316 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.508915152 Jul 03 04:23:02 PM PDT 24 Jul 03 04:23:11 PM PDT 24 2201234640 ps
T317 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.4011548147 Jul 03 04:22:40 PM PDT 24 Jul 03 04:22:50 PM PDT 24 3882885069 ps
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T319 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.204945085 Jul 03 04:22:36 PM PDT 24 Jul 03 04:22:40 PM PDT 24 2458301142 ps
T320 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1037470329 Jul 03 04:23:15 PM PDT 24 Jul 03 04:23:23 PM PDT 24 2513469781 ps
T321 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2860815470 Jul 03 04:22:58 PM PDT 24 Jul 03 04:23:02 PM PDT 24 2472356043 ps
T560 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1997720815 Jul 03 04:24:26 PM PDT 24 Jul 03 04:24:29 PM PDT 24 2451353620 ps
T211 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.2640474446 Jul 03 04:22:41 PM PDT 24 Jul 03 04:22:48 PM PDT 24 4269113499 ps
T291 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.1847625078 Jul 03 04:22:40 PM PDT 24 Jul 03 04:23:14 PM PDT 24 42081880116 ps
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T309 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.528184739 Jul 03 04:22:46 PM PDT 24 Jul 03 04:23:53 PM PDT 24 25250759884 ps
T562 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.1028279246 Jul 03 04:24:04 PM PDT 24 Jul 03 04:24:06 PM PDT 24 3224837784 ps
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T344 /workspace/coverage/default/6.sysrst_ctrl_stress_all.3115038505 Jul 03 04:23:00 PM PDT 24 Jul 03 04:27:22 PM PDT 24 192052060109 ps
T563 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.4222205995 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:38 PM PDT 24 2106650254 ps
T564 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.635603333 Jul 03 04:24:25 PM PDT 24 Jul 03 04:24:29 PM PDT 24 2520214666 ps
T565 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2720187217 Jul 03 04:23:14 PM PDT 24 Jul 03 04:23:19 PM PDT 24 3932167884 ps
T566 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.1194016401 Jul 03 04:24:34 PM PDT 24 Jul 03 04:24:37 PM PDT 24 2620290275 ps
T255 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1315973923 Jul 03 04:23:52 PM PDT 24 Jul 03 04:26:29 PM PDT 24 131233430269 ps
T310 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3145607903 Jul 03 04:23:36 PM PDT 24 Jul 03 04:24:24 PM PDT 24 148554156201 ps
T567 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2761050692 Jul 03 04:23:27 PM PDT 24 Jul 03 04:23:32 PM PDT 24 3387656242 ps
T357 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.120582329 Jul 03 04:25:26 PM PDT 24 Jul 03 04:26:11 PM PDT 24 62235641886 ps
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T266 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3731391329 Jul 03 04:24:32 PM PDT 24 Jul 03 04:26:55 PM PDT 24 53109039618 ps
T569 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3954248113 Jul 03 04:23:53 PM PDT 24 Jul 03 04:23:55 PM PDT 24 2628534410 ps
T311 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.341394305 Jul 03 04:24:12 PM PDT 24 Jul 03 04:25:48 PM PDT 24 39168442694 ps
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T135 /workspace/coverage/default/42.sysrst_ctrl_stress_all.1872165085 Jul 03 04:23:59 PM PDT 24 Jul 03 04:24:22 PM PDT 24 493093649027 ps
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T573 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1779519484 Jul 03 04:22:48 PM PDT 24 Jul 03 04:22:52 PM PDT 24 2114841202 ps
T574 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4118402487 Jul 03 04:24:30 PM PDT 24 Jul 03 04:24:38 PM PDT 24 2610179915 ps
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T260 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1430636580 Jul 03 04:22:33 PM PDT 24 Jul 03 04:22:37 PM PDT 24 2476058947 ps
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T262 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.632930812 Jul 03 04:23:42 PM PDT 24 Jul 03 04:23:49 PM PDT 24 2241923794 ps
T243 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.4085804292 Jul 03 04:23:58 PM PDT 24 Jul 03 04:25:47 PM PDT 24 179108052512 ps
T263 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.524045451 Jul 03 04:24:10 PM PDT 24 Jul 03 04:24:14 PM PDT 24 2619823149 ps
T131 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1663633426 Jul 03 04:24:14 PM PDT 24 Jul 03 04:26:48 PM PDT 24 242654416555 ps
T264 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2049797356 Jul 03 04:24:29 PM PDT 24 Jul 03 04:26:20 PM PDT 24 45140794453 ps
T265 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3604856036 Jul 03 04:24:35 PM PDT 24 Jul 03 04:24:39 PM PDT 24 3763952580 ps
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T576 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1970445985 Jul 03 04:24:27 PM PDT 24 Jul 03 04:24:30 PM PDT 24 2630173577 ps
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T182 /workspace/coverage/default/43.sysrst_ctrl_stress_all.2405368212 Jul 03 04:23:58 PM PDT 24 Jul 03 04:24:25 PM PDT 24 13281352383 ps
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T579 /workspace/coverage/default/7.sysrst_ctrl_smoke.2151047849 Jul 03 04:22:59 PM PDT 24 Jul 03 04:23:08 PM PDT 24 2111387785 ps
T580 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.611758308 Jul 03 04:24:31 PM PDT 24 Jul 03 04:24:37 PM PDT 24 3622832093 ps
T581 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1151512966 Jul 03 04:23:59 PM PDT 24 Jul 03 04:24:28 PM PDT 24 11523788697 ps
T582 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3112066117 Jul 03 04:24:06 PM PDT 24 Jul 03 04:24:09 PM PDT 24 2531036377 ps
T348 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.1968250287 Jul 03 04:23:35 PM PDT 24 Jul 03 04:26:48 PM PDT 24 73956009528 ps
T583 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.824849248 Jul 03 04:22:56 PM PDT 24 Jul 03 04:22:59 PM PDT 24 2525946980 ps
T584 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.735742410 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:37 PM PDT 24 2629696121 ps
T585 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3781927195 Jul 03 04:22:39 PM PDT 24 Jul 03 04:22:41 PM PDT 24 2090528237 ps
T586 /workspace/coverage/default/19.sysrst_ctrl_stress_all.277571438 Jul 03 04:24:01 PM PDT 24 Jul 03 04:24:12 PM PDT 24 6570514345 ps
T244 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.3169242090 Jul 03 04:22:47 PM PDT 24 Jul 03 04:23:55 PM PDT 24 150565832060 ps
T587 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2097313054 Jul 03 04:24:52 PM PDT 24 Jul 03 04:25:32 PM PDT 24 62814473261 ps
T588 /workspace/coverage/default/5.sysrst_ctrl_alert_test.259326836 Jul 03 04:22:45 PM PDT 24 Jul 03 04:22:49 PM PDT 24 2018967840 ps
T299 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3710701966 Jul 03 04:23:06 PM PDT 24 Jul 03 04:25:16 PM PDT 24 48393106520 ps
T589 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.1307589066 Jul 03 04:23:29 PM PDT 24 Jul 03 04:23:31 PM PDT 24 8511925200 ps
T590 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1888427859 Jul 03 04:23:48 PM PDT 24 Jul 03 04:23:52 PM PDT 24 2845198731 ps
T591 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.107142978 Jul 03 04:22:53 PM PDT 24 Jul 03 04:22:56 PM PDT 24 2205675889 ps
T272 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3680514990 Jul 03 04:23:41 PM PDT 24 Jul 03 04:24:21 PM PDT 24 53537382861 ps
T592 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4110269048 Jul 03 04:24:15 PM PDT 24 Jul 03 04:24:18 PM PDT 24 2637823366 ps
T593 /workspace/coverage/default/42.sysrst_ctrl_alert_test.2252132327 Jul 03 04:24:25 PM PDT 24 Jul 03 04:24:27 PM PDT 24 2070811392 ps
T594 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1761225966 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:43 PM PDT 24 2091348024 ps
T245 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.575541803 Jul 03 04:23:56 PM PDT 24 Jul 03 04:27:59 PM PDT 24 95546320506 ps
T168 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.2477672350 Jul 03 04:23:04 PM PDT 24 Jul 03 04:23:10 PM PDT 24 3079903871 ps
T595 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.4188785016 Jul 03 04:23:15 PM PDT 24 Jul 03 04:23:17 PM PDT 24 2742282816 ps
T136 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.877887257 Jul 03 04:24:01 PM PDT 24 Jul 03 04:24:07 PM PDT 24 6968389527 ps
T596 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2028742921 Jul 03 04:24:18 PM PDT 24 Jul 03 04:24:22 PM PDT 24 2086124159 ps
T597 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2993753638 Jul 03 04:24:00 PM PDT 24 Jul 03 04:24:02 PM PDT 24 2082244509 ps
T598 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3170415004 Jul 03 04:23:17 PM PDT 24 Jul 03 04:23:23 PM PDT 24 2509008340 ps
T599 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1181307609 Jul 03 04:24:24 PM PDT 24 Jul 03 04:24:28 PM PDT 24 2266363192 ps
T312 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3990431713 Jul 03 04:24:13 PM PDT 24 Jul 03 04:25:18 PM PDT 24 23808421054 ps
T600 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.4186848745 Jul 03 04:23:50 PM PDT 24 Jul 03 04:23:53 PM PDT 24 2525100147 ps
T601 /workspace/coverage/default/21.sysrst_ctrl_smoke.3156585765 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:37 PM PDT 24 2119516180 ps
T602 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.650220022 Jul 03 04:22:51 PM PDT 24 Jul 03 04:22:59 PM PDT 24 2464174187 ps
T603 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.4203539148 Jul 03 04:24:13 PM PDT 24 Jul 03 04:24:17 PM PDT 24 2161070208 ps
T604 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.6000138 Jul 03 04:22:42 PM PDT 24 Jul 03 04:22:52 PM PDT 24 3686220601 ps
T605 /workspace/coverage/default/34.sysrst_ctrl_stress_all.808661313 Jul 03 04:24:02 PM PDT 24 Jul 03 04:24:08 PM PDT 24 15301782836 ps
T91 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.286745174 Jul 03 04:23:51 PM PDT 24 Jul 03 04:24:17 PM PDT 24 40295828489 ps
T104 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.4222638678 Jul 03 04:23:01 PM PDT 24 Jul 03 04:27:18 PM PDT 24 95465941423 ps
T105 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1536579912 Jul 03 04:24:23 PM PDT 24 Jul 03 04:29:14 PM PDT 24 961825874770 ps
T106 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2094650543 Jul 03 04:24:05 PM PDT 24 Jul 03 04:24:31 PM PDT 24 9854119384 ps
T107 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3361591163 Jul 03 04:23:00 PM PDT 24 Jul 03 04:23:04 PM PDT 24 2545757338 ps
T108 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1982659516 Jul 03 04:22:58 PM PDT 24 Jul 03 04:23:49 PM PDT 24 75243911525 ps
T109 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1080281407 Jul 03 04:23:13 PM PDT 24 Jul 03 04:23:54 PM PDT 24 104726788346 ps
T110 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3083262914 Jul 03 04:23:11 PM PDT 24 Jul 03 04:23:17 PM PDT 24 3724574516 ps
T111 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3874450949 Jul 03 04:23:57 PM PDT 24 Jul 03 04:24:01 PM PDT 24 11636855184 ps
T112 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1381982385 Jul 03 04:23:44 PM PDT 24 Jul 03 04:23:54 PM PDT 24 3442915459 ps
T165 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.842281880 Jul 03 04:23:59 PM PDT 24 Jul 03 04:28:41 PM PDT 24 380190868049 ps
T171 /workspace/coverage/default/23.sysrst_ctrl_alert_test.1395838336 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:37 PM PDT 24 2030344497 ps
T172 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1542262651 Jul 03 04:23:00 PM PDT 24 Jul 03 04:23:23 PM PDT 24 30171225101 ps
T173 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3555630420 Jul 03 04:23:03 PM PDT 24 Jul 03 04:23:10 PM PDT 24 2838125250 ps
T174 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.601293537 Jul 03 04:23:07 PM PDT 24 Jul 03 04:23:10 PM PDT 24 2076957984 ps
T69 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2725708460 Jul 03 04:22:36 PM PDT 24 Jul 03 04:23:28 PM PDT 24 38628865263 ps
T175 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.583269747 Jul 03 04:24:30 PM PDT 24 Jul 03 04:24:40 PM PDT 24 3567043663 ps
T176 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3795205942 Jul 03 04:24:23 PM PDT 24 Jul 03 04:26:55 PM PDT 24 734404282675 ps
T177 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3217220309 Jul 03 04:23:15 PM PDT 24 Jul 03 04:23:20 PM PDT 24 2482647479 ps
T178 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2408585390 Jul 03 04:24:17 PM PDT 24 Jul 03 04:24:27 PM PDT 24 3454598657 ps
T606 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.261934681 Jul 03 04:23:55 PM PDT 24 Jul 03 04:24:00 PM PDT 24 2621470286 ps
T607 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1404344362 Jul 03 04:24:51 PM PDT 24 Jul 03 04:25:18 PM PDT 24 101121777163 ps
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