Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.11 99.31 96.43 100.00 96.79 98.74 99.52 88.98


Total tests in report: 909
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
53.77 53.77 75.14 75.14 60.62 60.62 62.56 62.56 16.03 16.03 76.04 76.04 63.29 63.29 22.73 22.73 /workspace/coverage/default/37.sysrst_ctrl_stress_all.2643935066
71.67 17.90 86.10 10.95 77.50 16.89 85.05 22.49 45.51 29.49 87.02 10.98 77.07 13.78 43.46 20.72 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3463353278
79.67 8.00 92.55 6.46 86.00 8.49 96.46 11.42 54.49 8.97 92.38 5.36 86.13 9.06 49.71 6.26 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2915915588
86.65 6.98 96.45 3.90 90.42 4.42 96.69 0.23 71.79 17.31 95.86 3.48 92.77 6.65 62.57 12.86 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2164756556
88.87 2.22 97.61 1.16 92.01 1.59 96.69 0.00 83.33 11.54 97.08 1.22 92.77 0.00 62.57 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2725708460
90.26 1.40 97.93 0.32 92.29 0.28 96.69 0.00 85.90 2.56 97.38 0.30 95.47 2.70 66.19 3.62 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1912028382
91.48 1.22 98.00 0.07 93.55 1.26 97.37 0.68 85.90 0.00 97.49 0.11 95.66 0.19 72.39 6.20 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.2325029867
92.49 1.01 98.40 0.39 93.88 0.33 97.37 0.00 88.46 2.56 97.71 0.22 96.82 1.16 74.80 2.41 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1782061468
93.03 0.53 98.49 0.09 94.06 0.18 97.37 0.00 89.10 0.64 97.86 0.15 97.21 0.39 77.10 2.30 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1663633426
93.39 0.36 98.62 0.13 94.11 0.05 97.37 0.00 90.38 1.28 97.93 0.07 97.21 0.00 78.07 0.98 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1560118197
93.69 0.30 98.71 0.09 94.49 0.38 97.37 0.00 91.67 1.28 98.04 0.11 97.40 0.19 78.13 0.06 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3710321641
93.98 0.29 98.77 0.06 94.57 0.08 99.09 1.71 91.67 0.00 98.04 0.00 97.40 0.00 78.30 0.17 /workspace/coverage/default/24.sysrst_ctrl_alert_test.294909866
94.25 0.27 98.81 0.04 94.77 0.20 99.09 0.00 91.67 0.00 98.11 0.07 97.98 0.58 79.33 1.03 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_rw.532339362
94.52 0.27 98.88 0.07 94.82 0.05 99.09 0.00 92.95 1.28 98.19 0.07 98.17 0.19 79.56 0.23 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.203182972
94.74 0.22 98.88 0.00 94.82 0.00 99.09 0.00 92.95 0.00 98.19 0.00 98.17 0.00 81.11 1.55 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.3789655884
94.92 0.17 98.94 0.06 94.92 0.10 99.09 0.00 93.59 0.64 98.26 0.07 98.46 0.29 81.17 0.06 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.286745174
95.09 0.17 98.94 0.00 95.73 0.81 99.09 0.00 93.59 0.00 98.26 0.00 98.46 0.00 81.57 0.40 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_errors.3563462885
95.25 0.16 98.94 0.00 95.73 0.00 99.09 0.00 93.59 0.00 98.26 0.00 98.46 0.00 82.72 1.15 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.2826162259
95.39 0.14 98.97 0.04 95.75 0.03 99.09 0.00 94.23 0.64 98.30 0.04 98.55 0.10 82.84 0.11 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3459503853
95.51 0.12 98.97 0.00 95.75 0.00 99.09 0.00 94.23 0.00 98.30 0.00 98.55 0.00 83.70 0.86 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1436797859
95.63 0.12 99.01 0.04 95.78 0.03 99.09 0.00 94.87 0.64 98.34 0.04 98.65 0.10 83.70 0.00 /workspace/coverage/default/17.sysrst_ctrl_stress_all.1153296633
95.75 0.12 99.05 0.04 95.80 0.03 99.09 0.00 95.51 0.64 98.37 0.04 98.75 0.10 83.70 0.00 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1320696585
95.87 0.12 99.09 0.04 95.83 0.03 99.09 0.00 96.15 0.64 98.41 0.04 98.84 0.10 83.70 0.00 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.842281880
95.99 0.12 99.12 0.04 95.85 0.03 99.09 0.00 96.79 0.64 98.45 0.04 98.94 0.10 83.70 0.00 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3259549072
96.10 0.11 99.12 0.00 95.88 0.03 99.54 0.46 96.79 0.00 98.45 0.00 98.94 0.00 83.98 0.29 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3145607903
96.20 0.10 99.12 0.00 95.90 0.03 100.00 0.46 96.79 0.00 98.45 0.00 99.04 0.10 84.10 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1285232823
96.29 0.09 99.16 0.04 95.93 0.03 100.00 0.00 96.79 0.00 98.45 0.00 99.13 0.10 84.56 0.46 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2168128677
96.37 0.08 99.16 0.00 95.98 0.05 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.19 84.90 0.34 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.920631809
96.46 0.08 99.16 0.00 95.98 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 85.48 0.57 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1080281407
96.52 0.07 99.16 0.00 95.98 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 85.94 0.46 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.693173375
96.59 0.06 99.18 0.02 96.03 0.05 100.00 0.00 96.79 0.00 98.45 0.00 99.42 0.10 86.22 0.29 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3563808628
96.63 0.05 99.18 0.00 96.03 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.42 0.00 86.57 0.34 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1306658277
96.67 0.04 99.18 0.00 96.06 0.03 100.00 0.00 96.79 0.00 98.45 0.00 99.42 0.00 86.80 0.23 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1883373178
96.70 0.03 99.18 0.00 96.08 0.03 100.00 0.00 96.79 0.00 98.45 0.00 99.52 0.10 86.91 0.11 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1757360895
96.74 0.03 99.18 0.00 96.08 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.52 0.00 87.14 0.23 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1571158291
96.77 0.03 99.22 0.04 96.08 0.00 100.00 0.00 96.79 0.00 98.52 0.07 99.52 0.00 87.26 0.11 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.860007298
96.80 0.03 99.22 0.00 96.28 0.20 100.00 0.00 96.79 0.00 98.52 0.00 99.52 0.00 87.26 0.00 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2852968177
96.82 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.52 0.00 99.52 0.00 87.43 0.17 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2012689743
96.84 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.04 99.52 0.00 87.54 0.11 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.4230382347
96.86 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.00 99.52 0.00 87.66 0.11 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3697605533
96.88 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.00 99.52 0.00 87.77 0.11 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.112727387
96.89 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.00 99.52 0.00 87.89 0.11 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3703272695
96.91 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.00 99.52 0.00 88.00 0.11 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.702418956
96.93 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.00 99.52 0.00 88.12 0.11 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3344052509
96.94 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.00 99.52 0.00 88.23 0.11 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.3169242090
96.96 0.02 99.22 0.00 96.28 0.00 100.00 0.00 96.79 0.00 98.56 0.00 99.52 0.00 88.35 0.11 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1414206230
96.98 0.02 99.23 0.02 96.28 0.00 100.00 0.00 96.79 0.00 98.60 0.04 99.52 0.00 88.40 0.06 /workspace/coverage/default/28.sysrst_ctrl_stress_all.2098118547
96.99 0.01 99.23 0.00 96.36 0.08 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.40 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.1728835188
96.99 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.46 0.06 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2113921758
97.00 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.52 0.06 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3262047116
97.01 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.58 0.06 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1245496830
97.02 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.63 0.06 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2340698426
97.03 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.69 0.06 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3549285330
97.04 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.75 0.06 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.897248998
97.04 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.81 0.06 /workspace/coverage/default/46.sysrst_ctrl_stress_all.515583665
97.05 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.86 0.06 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2983266580
97.06 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.92 0.06 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3872934619
97.07 0.01 99.23 0.00 96.36 0.00 100.00 0.00 96.79 0.00 98.60 0.00 99.52 0.00 88.98 0.06 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3731391329
97.08 0.01 99.25 0.02 96.36 0.00 100.00 0.00 96.79 0.00 98.63 0.04 99.52 0.00 88.98 0.00 /workspace/coverage/default/10.sysrst_ctrl_stress_all.542715106
97.08 0.01 99.27 0.02 96.36 0.00 100.00 0.00 96.79 0.00 98.67 0.04 99.52 0.00 88.98 0.00 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3961068071
97.09 0.01 99.29 0.02 96.36 0.00 100.00 0.00 96.79 0.00 98.71 0.04 99.52 0.00 88.98 0.00 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2100260130
97.10 0.01 99.31 0.02 96.36 0.00 100.00 0.00 96.79 0.00 98.74 0.04 99.52 0.00 88.98 0.00 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.3747567162
97.10 0.01 99.31 0.00 96.39 0.03 100.00 0.00 96.79 0.00 98.74 0.00 99.52 0.00 88.98 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3819989003
97.11 0.01 99.31 0.00 96.41 0.03 100.00 0.00 96.79 0.00 98.74 0.00 99.52 0.00 88.98 0.00 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3596929953

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.115294199
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1920711163
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1777985196
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3230879715
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1499126512
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2259236494
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.4024961366
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2119435707
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.816812715
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2735701534
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2085124289
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1133238293
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3699343079
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1906051723
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.43188569
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2012868640
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2760510441
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.153372906
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2140948665
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3731383716
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3701923093
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1470139915
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3679986198
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1783843749
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.3240146723
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.553774609
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2180369217
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3392547480
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.144196842
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1119524701
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.4141938338
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.1680612748
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.4015329744
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.1588652357
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1394787329
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.3377417880
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3149985906
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2015701330
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.386544800
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2618481167
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.2746235607
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3055179716
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1109889519
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1182052159
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2220260261
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2340322391
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.914469397
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2980277433
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3214529774
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2135649899
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2997514151
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2669781840
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2770450900
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2916038388
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.4192113645
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3216631842
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3650661084
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.1504129535
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.264293826
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.760485533
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.276297481
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.398601987
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2455186700
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3240590711
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1409508802
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.1504202444
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2625608458
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2058094537
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1538086524
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2181670306
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.4008468006
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2537276819
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.4279375047
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.4160268029
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1488256409
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1928158793
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2202829867
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.3367112171
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.4080632076
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1469181750
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1120985880
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.1927366009
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.117819486
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.2095151182
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.253751170
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.2168132220
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.149782409
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.2311150453
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.1174739635
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.870277582
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.3170560808
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/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3966893667
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2884993760
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3547915550
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2202341759
/workspace/coverage/default/42.sysrst_ctrl_smoke.2922816056
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1872165085
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.341394305
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.877887257
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3740356728
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3055952728
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3983915111
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2408585390
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3181993456
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4110269048
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4130231661
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1574476290
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.635603333
/workspace/coverage/default/43.sysrst_ctrl_smoke.3756883829
/workspace/coverage/default/43.sysrst_ctrl_stress_all.2405368212
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1704486050
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4059666818
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3481346171
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3410227861
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.856338623
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1815308640
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4052805286
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1325447959
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.242795569
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.57101617
/workspace/coverage/default/44.sysrst_ctrl_smoke.218806165
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2470089994
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1230568143
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2393646876
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1412867747
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3867291751
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1404344362
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1100504108
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3821714729
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2832823236
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2619448221
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2028742921
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.169870857
/workspace/coverage/default/45.sysrst_ctrl_smoke.2849907153
/workspace/coverage/default/45.sysrst_ctrl_stress_all.315003956
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.619031686
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.661909299
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3911722214
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.611758308
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4099630331
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3639056379
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1259848055
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1814900722
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1997720815
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.194016183
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2899374193
/workspace/coverage/default/46.sysrst_ctrl_smoke.3918382146
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.3737255641
/workspace/coverage/default/47.sysrst_ctrl_alert_test.18563567
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.583269747
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3256324051
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.903825756
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3795205942
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.979074512
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1970445985
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3754650926
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1181307609
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2814978119
/workspace/coverage/default/47.sysrst_ctrl_smoke.1497455951
/workspace/coverage/default/47.sysrst_ctrl_stress_all.861950808
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3990431713
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3688885504
/workspace/coverage/default/48.sysrst_ctrl_alert_test.24350934
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.4257925883
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.780930061
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.177105026
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2838668985
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.929601073
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.87487108
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1208786934
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.541517628
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3478864924
/workspace/coverage/default/48.sysrst_ctrl_smoke.3364418895
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3382069493
/workspace/coverage/default/49.sysrst_ctrl_alert_test.73116144
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.4203654263
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1427405597
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.1499722535
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3474698042
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2779777808
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4118402487
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3954368271
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.4112910549
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.354838387
/workspace/coverage/default/49.sysrst_ctrl_smoke.85901336
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1257180401
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2678576145
/workspace/coverage/default/5.sysrst_ctrl_alert_test.259326836
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2680891296
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2416582242
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1081111882
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3741835686
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1368749631
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2512253912
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.827639947
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1779519484
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.4062744958
/workspace/coverage/default/5.sysrst_ctrl_smoke.555650870
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2913061036
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.528184739
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.2582129881
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4141392728
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2627953623
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2019967117
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3350848958
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2097313054
/workspace/coverage/default/6.sysrst_ctrl_alert_test.561227751
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2232435774
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3934824370
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3555630420
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3420795097
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.37526958
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1043015673
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4088767980
/workspace/coverage/default/6.sysrst_ctrl_smoke.759269556
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3115038505
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3308657152
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.2065128633
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1805552433
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.120582329
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.513062249
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3109378550
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.871527434
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2330771995
/workspace/coverage/default/7.sysrst_ctrl_alert_test.212780351
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3216797989
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.113941821
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1139919057
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2391713308
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2528340971
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.404716164
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1675963664
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3049013074
/workspace/coverage/default/7.sysrst_ctrl_smoke.2151047849
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3895735410
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1542262651
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.577242590
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1661010511
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.425201913
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3323658906
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3246625728
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1947791031
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.958889597
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.373903167
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1557448856
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.271195024
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.806172662
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1982659516
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3568339943
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3748408154
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2942104303
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3529289881
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.107142978
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3512830615
/workspace/coverage/default/8.sysrst_ctrl_smoke.1669488175
/workspace/coverage/default/8.sysrst_ctrl_stress_all.4051390989
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1022031002
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3457539428
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.865595464
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1684951307
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2049797356
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2702933807
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1992783741
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.915429635
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.4083303470
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3480672422
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2372143453
/workspace/coverage/default/9.sysrst_ctrl_alert_test.472679714
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2615333344
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4222638678
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3279076251
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3303052158
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.784737532
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2279802215
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.650220022
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1126973256
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3361591163
/workspace/coverage/default/9.sysrst_ctrl_smoke.1597566855
/workspace/coverage/default/9.sysrst_ctrl_stress_all.194336369
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3502566971
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3166003724
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1947876767
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.952247440
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2799489586
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.4056429780
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2688623808
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.328696591
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1097833756



Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T5 /workspace/coverage/default/29.sysrst_ctrl_alert_test.3747921239 Jul 03 04:23:54 PM PDT 24 Jul 03 04:23:57 PM PDT 24 2046649054 ps
T1 /workspace/coverage/default/37.sysrst_ctrl_stress_all.2643935066 Jul 03 04:24:23 PM PDT 24 Jul 03 04:25:25 PM PDT 24 322673946608 ps
T6 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.536339330 Jul 03 04:22:40 PM PDT 24 Jul 03 04:22:49 PM PDT 24 2513903027 ps
T13 /workspace/coverage/default/24.sysrst_ctrl_alert_test.294909866 Jul 03 04:24:14 PM PDT 24 Jul 03 04:24:19 PM PDT 24 2015013685 ps
T14 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3547915550 Jul 03 04:23:58 PM PDT 24 Jul 03 04:24:02 PM PDT 24 2188154344 ps
T15 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1836863850 Jul 03 04:22:40 PM PDT 24 Jul 03 04:23:39 PM PDT 24 21191643231 ps
T2 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.1011367048 Jul 03 04:23:43 PM PDT 24 Jul 03 04:23:48 PM PDT 24 9491419238 ps
T16 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2943145834 Jul 03 04:23:26 PM PDT 24 Jul 03 04:24:37 PM PDT 24 113569347031 ps
T17 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1073548226 Jul 03 04:24:00 PM PDT 24 Jul 03 04:24:02 PM PDT 24 2079479211 ps
T3 /workspace/coverage/default/0.sysrst_ctrl_stress_all.1245496830 Jul 03 04:22:38 PM PDT 24 Jul 03 04:22:44 PM PDT 24 17420146831 ps
T4 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.952247440 Jul 03 04:24:42 PM PDT 24 Jul 03 04:25:25 PM PDT 24 63355132720 ps
T45 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1126973256 Jul 03 04:23:00 PM PDT 24 Jul 03 04:23:06 PM PDT 24 2212625273 ps
T24 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4052805286 Jul 03 04:24:22 PM PDT 24 Jul 03 04:24:26 PM PDT 24 2612060616 ps
T7 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.3748408154 Jul 03 04:23:01 PM PDT 24 Jul 03 04:23:17 PM PDT 24 5102108717 ps
T25 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.2915915588 Jul 03 04:23:20 PM PDT 24 Jul 03 04:25:06 PM PDT 24 38988835458 ps
T8 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.950750499 Jul 03 04:23:22 PM PDT 24 Jul 03 04:24:14 PM PDT 24 19513509419 ps
T46 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.634647238 Jul 03 04:23:40 PM PDT 24 Jul 03 04:23:48 PM PDT 24 3168166962 ps
T9 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3463353278 Jul 03 04:24:16 PM PDT 24 Jul 03 04:24:52 PM PDT 24 117173212763 ps
T35 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2615333344 Jul 03 04:23:24 PM PDT 24 Jul 03 04:23:30 PM PDT 24 3511273631 ps
T47 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1784762149 Jul 03 04:23:58 PM PDT 24 Jul 03 04:24:02 PM PDT 24 2513907678 ps
T36 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.982990795 Jul 03 04:22:43 PM PDT 24 Jul 03 04:22:52 PM PDT 24 3664221571 ps
T48 /workspace/coverage/default/7.sysrst_ctrl_alert_test.212780351 Jul 03 04:22:47 PM PDT 24 Jul 03 04:22:53 PM PDT 24 2019824325 ps
T10 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3610564078 Jul 03 04:23:43 PM PDT 24 Jul 03 04:25:56 PM PDT 24 184319671668 ps
T11 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1373034178 Jul 03 04:24:03 PM PDT 24 Jul 03 04:27:30 PM PDT 24 83493919869 ps
T117 /workspace/coverage/default/25.sysrst_ctrl_smoke.3789538053 Jul 03 04:23:36 PM PDT 24 Jul 03 04:23:39 PM PDT 24 2129106468 ps
T118 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.4145246766 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:50 PM PDT 24 3968813964 ps
T119 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3706761239 Jul 03 04:23:40 PM PDT 24 Jul 03 04:23:45 PM PDT 24 2933069161 ps
T389 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2433723808 Jul 03 04:23:02 PM PDT 24 Jul 03 04:23:11 PM PDT 24 2012520342 ps
T390 /workspace/coverage/default/16.sysrst_ctrl_alert_test.1211723893 Jul 03 04:23:24 PM PDT 24 Jul 03 04:23:25 PM PDT 24 2071617142 ps
T391 /workspace/coverage/default/45.sysrst_ctrl_alert_test.2393646876 Jul 03 04:24:23 PM PDT 24 Jul 03 04:24:26 PM PDT 24 2035710256 ps
T12 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3041142804 Jul 03 04:23:15 PM PDT 24 Jul 03 04:24:13 PM PDT 24 94092756825 ps
T22 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3774091913 Jul 03 04:23:38 PM PDT 24 Jul 03 04:23:42 PM PDT 24 2478227226 ps
T37 /workspace/coverage/default/16.sysrst_ctrl_stress_all.2083322178 Jul 03 04:23:16 PM PDT 24 Jul 03 04:24:27 PM PDT 24 117508759462 ps
T38 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2983266580 Jul 03 04:24:29 PM PDT 24 Jul 03 04:25:44 PM PDT 24 30438850889 ps
T39 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1782061468 Jul 03 04:24:28 PM PDT 24 Jul 03 04:25:29 PM PDT 24 55966819280 ps
T60 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1176744726 Jul 03 04:23:47 PM PDT 24 Jul 03 04:23:55 PM PDT 24 2512449865 ps
T61 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.305447993 Jul 03 04:24:15 PM PDT 24 Jul 03 04:24:23 PM PDT 24 2611754463 ps
T32 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.294830771 Jul 03 04:23:32 PM PDT 24 Jul 03 04:23:37 PM PDT 24 3231230387 ps
T40 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3328961837 Jul 03 04:25:43 PM PDT 24 Jul 03 04:25:53 PM PDT 24 3203909309 ps
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T63 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.1889388763 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:46 PM PDT 24 4245958935 ps
T41 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.834625265 Jul 03 04:22:35 PM PDT 24 Jul 03 04:22:42 PM PDT 24 2257727026 ps
T42 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4099630331 Jul 03 04:24:47 PM PDT 24 Jul 03 04:25:00 PM PDT 24 92056536881 ps
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T23 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2164756556 Jul 03 04:24:14 PM PDT 24 Jul 03 04:25:55 PM PDT 24 41682464355 ps
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T49 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.4059666818 Jul 03 04:23:58 PM PDT 24 Jul 03 04:24:05 PM PDT 24 2643222144 ps
T193 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2310897352 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:39 PM PDT 24 2210733377 ps
T50 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1355736723 Jul 03 04:23:54 PM PDT 24 Jul 03 04:23:57 PM PDT 24 6138848289 ps
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T33 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1912028382 Jul 03 04:23:33 PM PDT 24 Jul 03 04:24:51 PM PDT 24 587317329148 ps
T51 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3166003724 Jul 03 04:22:56 PM PDT 24 Jul 03 04:22:58 PM PDT 24 4474574551 ps
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T394 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.290760602 Jul 03 04:23:49 PM PDT 24 Jul 03 04:23:51 PM PDT 24 2658311361 ps
T395 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.541517628 Jul 03 04:24:32 PM PDT 24 Jul 03 04:24:39 PM PDT 24 2192859524 ps
T64 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1542069652 Jul 03 04:23:43 PM PDT 24 Jul 03 04:24:53 PM PDT 24 27329768035 ps
T56 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2603580060 Jul 03 04:24:02 PM PDT 24 Jul 03 04:24:04 PM PDT 24 2477814527 ps
T251 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3943771168 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:39 PM PDT 24 2518957252 ps
T113 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.773930653 Jul 03 04:23:47 PM PDT 24 Jul 03 04:25:15 PM PDT 24 66743774615 ps
T252 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3303052158 Jul 03 04:23:09 PM PDT 24 Jul 03 04:23:12 PM PDT 24 2435789298 ps
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T65 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.177417587 Jul 03 04:23:58 PM PDT 24 Jul 03 04:24:04 PM PDT 24 14080601364 ps
T253 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.3934619821 Jul 03 04:22:45 PM PDT 24 Jul 03 04:24:32 PM PDT 24 42013271741 ps
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T57 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2518524357 Jul 03 04:24:14 PM PDT 24 Jul 03 04:25:34 PM PDT 24 32155045872 ps
T44 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3055952728 Jul 03 04:24:12 PM PDT 24 Jul 03 04:35:17 PM PDT 24 244770018811 ps
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T235 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.4056429780 Jul 03 04:24:35 PM PDT 24 Jul 03 04:24:49 PM PDT 24 53301110217 ps
T59 /workspace/coverage/default/11.sysrst_ctrl_stress_all.414766472 Jul 03 04:23:04 PM PDT 24 Jul 03 04:25:46 PM PDT 24 248910856508 ps
T84 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2666306280 Jul 03 04:23:28 PM PDT 24 Jul 03 04:24:41 PM PDT 24 27080265653 ps
T293 /workspace/coverage/default/17.sysrst_ctrl_alert_test.36123096 Jul 03 04:23:21 PM PDT 24 Jul 03 04:23:22 PM PDT 24 2050102797 ps
T396 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2378866105 Jul 03 04:23:53 PM PDT 24 Jul 03 04:23:56 PM PDT 24 3145857008 ps
T303 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1052814286 Jul 03 04:23:35 PM PDT 24 Jul 03 04:23:38 PM PDT 24 2533088960 ps
T397 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.363522028 Jul 03 04:23:35 PM PDT 24 Jul 03 04:23:42 PM PDT 24 2049861892 ps
T114 /workspace/coverage/default/45.sysrst_ctrl_stress_all.315003956 Jul 03 04:24:28 PM PDT 24 Jul 03 04:24:48 PM PDT 24 7624696648 ps
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T236 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3323658906 Jul 03 04:25:25 PM PDT 24 Jul 03 04:28:44 PM PDT 24 83707173227 ps
T398 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1726901661 Jul 03 04:22:52 PM PDT 24 Jul 03 04:22:59 PM PDT 24 2244424603 ps
T399 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1139464112 Jul 03 04:22:37 PM PDT 24 Jul 03 04:22:43 PM PDT 24 2613415605 ps
T300 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4130231661 Jul 03 04:24:00 PM PDT 24 Jul 03 04:24:08 PM PDT 24 2456383874 ps
T400 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2154948623 Jul 03 04:23:10 PM PDT 24 Jul 03 04:23:15 PM PDT 24 2470232559 ps
T240 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.706324301 Jul 03 04:23:32 PM PDT 24 Jul 03 04:25:01 PM PDT 24 127838752464 ps
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T402 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1200824833 Jul 03 04:23:36 PM PDT 24 Jul 03 04:23:39 PM PDT 24 5540647028 ps
T85 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2168128677 Jul 03 04:24:37 PM PDT 24 Jul 03 04:28:07 PM PDT 24 77198499521 ps
T403 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.902886041 Jul 03 04:22:50 PM PDT 24 Jul 03 04:22:53 PM PDT 24 3583432262 ps
T73 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.373903167 Jul 03 04:24:34 PM PDT 24 Jul 03 04:26:17 PM PDT 24 38239132965 ps
T301 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2619448221 Jul 03 04:24:23 PM PDT 24 Jul 03 04:24:26 PM PDT 24 2484929890 ps
T404 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.903107901 Jul 03 04:22:50 PM PDT 24 Jul 03 04:22:58 PM PDT 24 2194128599 ps
T405 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2236048586 Jul 03 04:22:46 PM PDT 24 Jul 03 04:22:49 PM PDT 24 2637982387 ps
T406 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.4112910549 Jul 03 04:24:46 PM PDT 24 Jul 03 04:24:52 PM PDT 24 2019633544 ps
T407 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.351212950 Jul 03 04:23:00 PM PDT 24 Jul 03 04:23:05 PM PDT 24 2040997537 ps
T408 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1733487431 Jul 03 04:23:56 PM PDT 24 Jul 03 04:23:57 PM PDT 24 3486477924 ps
T66 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.869739402 Jul 03 04:25:59 PM PDT 24 Jul 03 04:26:05 PM PDT 24 8041907555 ps
T71 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3259549072 Jul 03 04:24:35 PM PDT 24 Jul 03 04:24:38 PM PDT 24 4390547039 ps
T223 /workspace/coverage/default/21.sysrst_ctrl_alert_test.4162379763 Jul 03 04:23:34 PM PDT 24 Jul 03 04:23:40 PM PDT 24 2014677320 ps
T224 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1441878466 Jul 03 04:23:33 PM PDT 24 Jul 03 04:23:40 PM PDT 24 2241965429 ps
T190 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.4086300027 Jul 03 04:23:26 PM PDT 24 Jul 03 04:23:32 PM PDT 24 3216363234 ps
T225 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1599187219 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:47 PM PDT 24 5684579463 ps
T149 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.1269626777 Jul 03 04:24:27 PM PDT 24 Jul 03 04:24:34 PM PDT 24 3629542296 ps
T226 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3084273578 Jul 03 04:22:41 PM PDT 24 Jul 03 04:22:48 PM PDT 24 2509624067 ps
T227 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2165903035 Jul 03 04:22:41 PM PDT 24 Jul 03 04:22:44 PM PDT 24 2964067496 ps
T74 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3563808628 Jul 03 04:24:21 PM PDT 24 Jul 03 04:26:15 PM PDT 24 176082073434 ps
T228 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.24219292 Jul 03 04:23:35 PM PDT 24 Jul 03 04:23:37 PM PDT 24 2221226132 ps
T86 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.3575825285 Jul 03 04:24:31 PM PDT 24 Jul 03 04:25:45 PM PDT 24 27832697990 ps
T409 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1325447959 Jul 03 04:24:48 PM PDT 24 Jul 03 04:24:52 PM PDT 24 2458138195 ps
T67 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.602611414 Jul 03 04:23:37 PM PDT 24 Jul 03 04:23:40 PM PDT 24 6481499810 ps
T191 /workspace/coverage/default/28.sysrst_ctrl_stress_all.2098118547 Jul 03 04:24:07 PM PDT 24 Jul 03 04:26:03 PM PDT 24 185553987813 ps
T410 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1927176208 Jul 03 04:23:57 PM PDT 24 Jul 03 04:24:00 PM PDT 24 2624194066 ps
T269 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.2936323761 Jul 03 04:23:35 PM PDT 24 Jul 03 04:27:08 PM PDT 24 99995345707 ps
T115 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3961068071 Jul 03 04:23:34 PM PDT 24 Jul 03 04:26:07 PM PDT 24 158165636995 ps
T411 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2460287951 Jul 03 04:24:22 PM PDT 24 Jul 03 04:24:26 PM PDT 24 2242930308 ps
T412 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3954368271 Jul 03 04:24:22 PM PDT 24 Jul 03 04:24:27 PM PDT 24 2462071737 ps
T413 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3352390333 Jul 03 04:22:22 PM PDT 24 Jul 03 04:22:26 PM PDT 24 2618007230 ps
T294 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.2402853911 Jul 03 04:24:10 PM PDT 24 Jul 03 04:24:54 PM PDT 24 60480106757 ps
T414 /workspace/coverage/default/48.sysrst_ctrl_smoke.3364418895 Jul 03 04:24:14 PM PDT 24 Jul 03 04:24:16 PM PDT 24 2127696192 ps
T415 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3428904500 Jul 03 04:23:38 PM PDT 24 Jul 03 04:23:44 PM PDT 24 3615747722 ps
T304 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.2397093576 Jul 03 04:22:57 PM PDT 24 Jul 03 04:23:00 PM PDT 24 2529248308 ps
T416 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2884993760 Jul 03 04:23:57 PM PDT 24 Jul 03 04:24:05 PM PDT 24 2466962235 ps
T417 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1707281306 Jul 03 04:23:46 PM PDT 24 Jul 03 04:23:48 PM PDT 24 2486275313 ps
T418 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.2587088396 Jul 03 04:23:35 PM PDT 24 Jul 03 04:23:44 PM PDT 24 2975590325 ps
T419 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.3290195105 Jul 03 04:23:53 PM PDT 24 Jul 03 04:24:01 PM PDT 24 2459917660 ps
T420 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3235719075 Jul 03 04:23:21 PM PDT 24 Jul 03 04:23:29 PM PDT 24 2509567544 ps
T421 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1643822824 Jul 03 04:23:54 PM PDT 24 Jul 03 04:24:04 PM PDT 24 3477242750 ps
T422 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.3471619277 Jul 03 04:23:39 PM PDT 24 Jul 03 04:23:44 PM PDT 24 3096049725 ps
T423 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1675963664 Jul 03 04:22:55 PM PDT 24 Jul 03 04:22:58 PM PDT 24 2176502313 ps
T247 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1560118197 Jul 03 04:24:50 PM PDT 24 Jul 03 04:26:33 PM PDT 24 82670952903 ps
T83 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3717691760 Jul 03 04:23:36 PM PDT 24 Jul 03 04:23:39 PM PDT 24 7994003951 ps
T169 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1219438229 Jul 03 04:23:55 PM PDT 24 Jul 03 04:24:02 PM PDT 24 2616151779 ps
T424 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.3820964004 Jul 03 04:22:47 PM PDT 24 Jul 03 04:22:51 PM PDT 24 3598582120 ps
T425 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.4212876926 Jul 03 04:22:38 PM PDT 24 Jul 03 04:22:40 PM PDT 24 2336414263 ps
T349 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3222638962 Jul 03 04:24:45 PM PDT 24 Jul 03 04:25:49 PM PDT 24 94376929725 ps
T150 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.48774131 Jul 03 04:23:08 PM PDT 24 Jul 03 04:23:15 PM PDT 24 3872400086 ps
T426 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2528340971 Jul 03 04:22:51 PM PDT 24 Jul 03 04:22:59 PM PDT 24 2614207169 ps
T427 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2156034906 Jul 03 04:23:58 PM PDT 24 Jul 03 04:24:06 PM PDT 24 2610152879 ps
T428 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.4245089705 Jul 03 04:23:46 PM PDT 24 Jul 03 04:23:48 PM PDT 24 3844886916 ps
T429 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.390223797 Jul 03 04:23:55 PM PDT 24 Jul 03 04:23:59 PM PDT 24 2028418293 ps
T430 /workspace/coverage/default/22.sysrst_ctrl_smoke.1767707848 Jul 03 04:23:35 PM PDT 24 Jul 03 04:23:43 PM PDT 24 2108692553 ps
T302 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.1222255388 Jul 03 04:24:52 PM PDT 24 Jul 03 04:24:55 PM PDT 24 2475557299 ps
T431 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3339028644 Jul 03 04:23:41 PM PDT 24 Jul 03 04:23:46 PM PDT 24 2511626953 ps
T432 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.2590935975 Jul 03 04:23:50 PM PDT 24 Jul 03 04:23:58 PM PDT 24 3509893346 ps
T295 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3308657152 Jul 03 04:22:50 PM PDT 24 Jul 03 04:23:11 PM PDT 24 28838566115 ps
T307 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.4230382347 Jul 03 04:23:27 PM PDT 24 Jul 03 04:24:02 PM PDT 24 55179254429 ps
T433 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3013777244 Jul 03 04:22:35 PM PDT 24 Jul 03 04:22:38 PM PDT 24 2411256961 ps
T434 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2523822901 Jul 03 04:22:49 PM PDT 24 Jul 03 04:22:52 PM PDT 24 2273304293 ps
T435 /workspace/coverage/default/1.sysrst_ctrl_alert_test.626568716 Jul 03 04:22:48 PM PDT 24 Jul 03 04:22:55 PM PDT 24 2015143479 ps
T170 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.2134853286 Jul 03 04:22:38 PM PDT 24 Jul 03 04:22:42 PM PDT 24 2733380934 ps
T306 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.2359763207 Jul 03 04:23:36 PM PDT 24 Jul 03 04:23:40 PM PDT 24 3663928323 ps
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T151 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.1543659746 Jul 03 04:22:50 PM PDT 24 Jul 03 04:23:01 PM PDT 24 4454910389 ps
T152 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1704486050 Jul 03 04:24:00 PM PDT 24 Jul 03 04:24:43 PM PDT 24 16119682590 ps
T267 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3344052509 Jul 03 04:23:45 PM PDT 24 Jul 03 04:29:01 PM PDT 24 126051066078 ps
T436 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2322471972 Jul 03 04:23:14 PM PDT 24 Jul 03 04:23:17 PM PDT 24 2141539234 ps
T208 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2704332887 Jul 03 04:22:33 PM PDT 24 Jul 03 04:22:39 PM PDT 24 12995126198 ps
T437 /workspace/coverage/default/40.sysrst_ctrl_alert_test.2376628685 Jul 03 04:24:07 PM PDT 24 Jul 03 04:24:14 PM PDT 24 2014200477 ps
T72 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.203182972 Jul 03 04:23:56 PM PDT 24 Jul 03 04:26:04 PM PDT 24 96363223247 ps
T87 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.513062249 Jul 03 04:24:31 PM PDT 24 Jul 03 04:25:42 PM PDT 24 119514498189 ps
T184 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.742375091 Jul 03 04:24:01 PM PDT 24 Jul 03 04:24:04 PM PDT 24 2532312139 ps
T185 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2785769814 Jul 03 04:23:44 PM PDT 24 Jul 03 04:25:27 PM PDT 24 44276807877 ps
T186 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1100504108 Jul 03 04:24:23 PM PDT 24 Jul 03 04:24:28 PM PDT 24 2664397656 ps
T134 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3688885504 Jul 03 04:24:49 PM PDT 24 Jul 03 04:24:51 PM PDT 24 4743906519 ps
T187 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2814978119 Jul 03 04:24:19 PM PDT 24 Jul 03 04:24:23 PM PDT 24 2513883860 ps
T161 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.3747567162 Jul 03 04:23:00 PM PDT 24 Jul 03 04:23:07 PM PDT 24 4811296623 ps
T188 /workspace/coverage/default/41.sysrst_ctrl_alert_test.1587330326 Jul 03 04:24:00 PM PDT 24 Jul 03 04:24:06 PM PDT 24 2013041666 ps
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T213 /workspace/coverage/default/27.sysrst_ctrl_alert_test.1089629503 Jul 03 04:23:40 PM PDT 24 Jul 03 04:23:49 PM PDT 24 2014301259 ps
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T438 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.214066471 Jul 03 04:23:37 PM PDT 24 Jul 03 04:23:48 PM PDT 24 3498978309 ps
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T125 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.4083303470 Jul 03 04:24:35 PM PDT 24 Jul 03 04:24:58 PM PDT 24 30988852797 ps
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T127 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3457539428 Jul 03 04:23:13 PM PDT 24 Jul 03 04:23:47 PM PDT 24 1464747640963 ps
T128 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1527140865 Jul 03 04:23:41 PM PDT 24 Jul 03 04:25:45 PM PDT 24 92425712474 ps
T129 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.426457320 Jul 03 04:23:38 PM PDT 24 Jul 03 04:23:45 PM PDT 24 5367327723 ps
T305 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3471727127 Jul 03 04:22:47 PM PDT 24 Jul 03 04:22:51 PM PDT 24 3266212659 ps
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T463 /workspace/coverage/default/34.sysrst_ctrl_alert_test.241061769 Jul 03 04:24:23 PM PDT 24 Jul 03 04:24:25 PM PDT 24 2105059274 ps
T464 /workspace/coverage/default/29.sysrst_ctrl_stress_all.2276851264 Jul 03 04:23:59 PM PDT 24 Jul 03 04:24:12 PM PDT 24 8744707375 ps
T465 /workspace/coverage/default/11.sysrst_ctrl_smoke.2427616069 Jul 03 04:23:01 PM PDT 24 Jul 03 04:23:09 PM PDT 24 2113801503 ps
T466 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3772265058 Jul 03 04:22:44 PM PDT 24 Jul 03 04:22:49 PM PDT 24 2618325311 ps
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