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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.84 99.35 96.41 100.00 96.79 98.82 99.52 93.98


Total test records in report: 907
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T597 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2284647672 Jul 07 05:52:25 PM PDT 24 Jul 07 05:52:35 PM PDT 24 3861015395 ps
T157 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2788069357 Jul 07 05:54:24 PM PDT 24 Jul 07 05:54:31 PM PDT 24 20924056072 ps
T220 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.2710261365 Jul 07 05:53:57 PM PDT 24 Jul 07 05:54:04 PM PDT 24 6233033529 ps
T598 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2355835124 Jul 07 05:52:36 PM PDT 24 Jul 07 05:56:18 PM PDT 24 82752939649 ps
T599 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.79585760 Jul 07 05:53:56 PM PDT 24 Jul 07 05:53:59 PM PDT 24 3343427710 ps
T600 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3247233853 Jul 07 05:54:03 PM PDT 24 Jul 07 05:54:14 PM PDT 24 3953404257 ps
T218 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1393877001 Jul 07 05:52:50 PM PDT 24 Jul 07 05:52:57 PM PDT 24 3974527059 ps
T601 /workspace/coverage/default/26.sysrst_ctrl_smoke.757006836 Jul 07 05:53:13 PM PDT 24 Jul 07 05:53:15 PM PDT 24 2127494752 ps
T602 /workspace/coverage/default/28.sysrst_ctrl_stress_all.2846066471 Jul 07 05:53:24 PM PDT 24 Jul 07 05:53:43 PM PDT 24 75965600537 ps
T603 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.1928362723 Jul 07 05:52:29 PM PDT 24 Jul 07 05:52:31 PM PDT 24 2487703262 ps
T241 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3852356369 Jul 07 05:54:32 PM PDT 24 Jul 07 05:55:46 PM PDT 24 111872757296 ps
T368 /workspace/coverage/default/30.sysrst_ctrl_stress_all.2201779238 Jul 07 05:53:28 PM PDT 24 Jul 07 05:53:58 PM PDT 24 10685192973 ps
T604 /workspace/coverage/default/21.sysrst_ctrl_smoke.1280488692 Jul 07 05:53:04 PM PDT 24 Jul 07 05:53:08 PM PDT 24 2118085658 ps
T605 /workspace/coverage/default/48.sysrst_ctrl_alert_test.4072583770 Jul 07 05:54:22 PM PDT 24 Jul 07 05:54:24 PM PDT 24 2042346380 ps
T189 /workspace/coverage/default/37.sysrst_ctrl_stress_all.429770104 Jul 07 05:53:50 PM PDT 24 Jul 07 05:54:11 PM PDT 24 7901788547 ps
T606 /workspace/coverage/default/18.sysrst_ctrl_smoke.536224895 Jul 07 05:52:46 PM PDT 24 Jul 07 05:52:48 PM PDT 24 2137539546 ps
T607 /workspace/coverage/default/16.sysrst_ctrl_stress_all.2488835484 Jul 07 05:52:43 PM PDT 24 Jul 07 05:52:46 PM PDT 24 8457851668 ps
T608 /workspace/coverage/default/37.sysrst_ctrl_smoke.874911511 Jul 07 05:53:49 PM PDT 24 Jul 07 05:53:55 PM PDT 24 2114640511 ps
T609 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2620013021 Jul 07 05:52:52 PM PDT 24 Jul 07 06:01:58 PM PDT 24 2132312471277 ps
T610 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3480019973 Jul 07 05:53:30 PM PDT 24 Jul 07 05:54:45 PM PDT 24 32204182885 ps
T611 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1149144837 Jul 07 05:53:33 PM PDT 24 Jul 07 05:53:37 PM PDT 24 2515670214 ps
T236 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2909169115 Jul 07 05:54:32 PM PDT 24 Jul 07 05:56:23 PM PDT 24 165385668340 ps
T612 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1770376522 Jul 07 05:53:13 PM PDT 24 Jul 07 05:53:23 PM PDT 24 3839020400 ps
T613 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1398521364 Jul 07 05:53:53 PM PDT 24 Jul 07 05:53:57 PM PDT 24 3373562949 ps
T614 /workspace/coverage/default/36.sysrst_ctrl_alert_test.888812339 Jul 07 05:53:46 PM PDT 24 Jul 07 05:53:47 PM PDT 24 2047367935 ps
T615 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1335428032 Jul 07 05:53:22 PM PDT 24 Jul 07 05:53:35 PM PDT 24 20614870421 ps
T158 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.1839229571 Jul 07 05:52:42 PM PDT 24 Jul 07 05:52:55 PM PDT 24 5016059109 ps
T616 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3515978993 Jul 07 05:53:15 PM PDT 24 Jul 07 05:53:56 PM PDT 24 29560913199 ps
T617 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3918268349 Jul 07 05:53:21 PM PDT 24 Jul 07 05:53:59 PM PDT 24 31744044115 ps
T618 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.999408169 Jul 07 05:52:55 PM PDT 24 Jul 07 05:53:00 PM PDT 24 3231343906 ps
T619 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.812532670 Jul 07 05:54:16 PM PDT 24 Jul 07 05:54:23 PM PDT 24 2513734658 ps
T620 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1977928532 Jul 07 05:52:18 PM PDT 24 Jul 07 05:52:24 PM PDT 24 2511586801 ps
T621 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.374669499 Jul 07 05:52:05 PM PDT 24 Jul 07 05:52:07 PM PDT 24 2495738093 ps
T348 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2468519996 Jul 07 05:54:37 PM PDT 24 Jul 07 05:54:52 PM PDT 24 69170267995 ps
T622 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.1268934212 Jul 07 05:53:04 PM PDT 24 Jul 07 05:53:07 PM PDT 24 2530708091 ps
T623 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.2174828832 Jul 07 05:52:46 PM PDT 24 Jul 07 05:52:48 PM PDT 24 2470991803 ps
T359 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.2590466678 Jul 07 05:52:35 PM PDT 24 Jul 07 05:54:53 PM PDT 24 98601548119 ps
T243 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.3747005135 Jul 07 05:53:55 PM PDT 24 Jul 07 05:56:54 PM PDT 24 72021534609 ps
T624 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2129358304 Jul 07 05:54:14 PM PDT 24 Jul 07 05:54:18 PM PDT 24 2585317060 ps
T625 /workspace/coverage/default/22.sysrst_ctrl_stress_all.4289686424 Jul 07 05:53:07 PM PDT 24 Jul 07 05:53:34 PM PDT 24 10421311668 ps
T626 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3778770137 Jul 07 05:54:04 PM PDT 24 Jul 07 05:54:16 PM PDT 24 4219029121 ps
T627 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.877748386 Jul 07 05:52:39 PM PDT 24 Jul 07 05:52:46 PM PDT 24 2466988811 ps
T628 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3152371217 Jul 07 05:53:01 PM PDT 24 Jul 07 05:55:18 PM PDT 24 205441682322 ps
T629 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.4158240245 Jul 07 05:52:38 PM PDT 24 Jul 07 05:52:48 PM PDT 24 3543585215 ps
T355 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.25758857 Jul 07 05:52:54 PM PDT 24 Jul 07 05:55:09 PM PDT 24 51923934377 ps
T238 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.2004154155 Jul 07 05:53:31 PM PDT 24 Jul 07 05:54:32 PM PDT 24 83024656651 ps
T630 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2399241158 Jul 07 05:52:52 PM PDT 24 Jul 07 05:55:50 PM PDT 24 147261538137 ps
T273 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.4279128470 Jul 07 05:52:13 PM PDT 24 Jul 07 05:52:28 PM PDT 24 22394252282 ps
T631 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1384143814 Jul 07 05:52:29 PM PDT 24 Jul 07 05:52:33 PM PDT 24 2464980223 ps
T632 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.86282652 Jul 07 05:53:06 PM PDT 24 Jul 07 05:53:14 PM PDT 24 2508532900 ps
T633 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2989242020 Jul 07 05:53:01 PM PDT 24 Jul 07 05:53:12 PM PDT 24 3739767433 ps
T634 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.1043565465 Jul 07 05:52:39 PM PDT 24 Jul 07 05:52:42 PM PDT 24 2984234442 ps
T269 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.370789004 Jul 07 05:54:10 PM PDT 24 Jul 07 05:54:24 PM PDT 24 5132700630 ps
T635 /workspace/coverage/default/33.sysrst_ctrl_alert_test.1818123572 Jul 07 05:53:34 PM PDT 24 Jul 07 05:53:40 PM PDT 24 2010572927 ps
T636 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3982540325 Jul 07 05:53:56 PM PDT 24 Jul 07 05:54:00 PM PDT 24 2682649670 ps
T637 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.834118937 Jul 07 05:52:32 PM PDT 24 Jul 07 05:52:35 PM PDT 24 2073976938 ps
T638 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1501024220 Jul 07 05:54:30 PM PDT 24 Jul 07 05:55:34 PM PDT 24 75908630442 ps
T159 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.1877391967 Jul 07 05:53:43 PM PDT 24 Jul 07 05:53:48 PM PDT 24 5920909215 ps
T639 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.3776964966 Jul 07 05:52:31 PM PDT 24 Jul 07 05:52:34 PM PDT 24 2163060855 ps
T334 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.4162625152 Jul 07 05:53:49 PM PDT 24 Jul 07 05:54:25 PM PDT 24 126701584049 ps
T640 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.4136671939 Jul 07 05:53:16 PM PDT 24 Jul 07 05:53:19 PM PDT 24 2492219809 ps
T160 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3375227437 Jul 07 05:53:30 PM PDT 24 Jul 07 05:55:09 PM PDT 24 47191406450 ps
T641 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.2783878647 Jul 07 05:52:55 PM PDT 24 Jul 07 05:53:03 PM PDT 24 2612571474 ps
T274 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.3602128962 Jul 07 05:52:08 PM PDT 24 Jul 07 05:53:03 PM PDT 24 22015064675 ps
T642 /workspace/coverage/default/25.sysrst_ctrl_stress_all.3188592753 Jul 07 05:53:21 PM PDT 24 Jul 07 05:53:31 PM PDT 24 7502838895 ps
T643 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3490793727 Jul 07 05:52:38 PM PDT 24 Jul 07 05:52:47 PM PDT 24 3691789180 ps
T644 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2336137647 Jul 07 05:53:25 PM PDT 24 Jul 07 05:53:31 PM PDT 24 2239044495 ps
T645 /workspace/coverage/default/38.sysrst_ctrl_alert_test.896085277 Jul 07 05:53:49 PM PDT 24 Jul 07 05:53:52 PM PDT 24 2017363539 ps
T646 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1504275330 Jul 07 05:54:08 PM PDT 24 Jul 07 05:54:15 PM PDT 24 2459797028 ps
T336 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3175274118 Jul 07 05:54:36 PM PDT 24 Jul 07 06:00:17 PM PDT 24 139550761051 ps
T647 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3040674515 Jul 07 05:53:41 PM PDT 24 Jul 07 05:57:10 PM PDT 24 343479562165 ps
T161 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.5293080 Jul 07 05:53:41 PM PDT 24 Jul 07 05:55:49 PM PDT 24 2062540352382 ps
T648 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2355459048 Jul 07 05:54:26 PM PDT 24 Jul 07 05:54:34 PM PDT 24 2509189347 ps
T649 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.311457505 Jul 07 05:53:54 PM PDT 24 Jul 07 05:53:56 PM PDT 24 3270195130 ps
T650 /workspace/coverage/default/4.sysrst_ctrl_smoke.201582722 Jul 07 05:52:17 PM PDT 24 Jul 07 05:52:19 PM PDT 24 2136408977 ps
T105 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.4222344984 Jul 07 05:53:23 PM PDT 24 Jul 07 05:56:04 PM PDT 24 243849562888 ps
T651 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.364017744 Jul 07 05:53:59 PM PDT 24 Jul 07 05:54:04 PM PDT 24 2440759970 ps
T366 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2144383906 Jul 07 05:53:25 PM PDT 24 Jul 07 05:55:53 PM PDT 24 62908521089 ps
T652 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.990002283 Jul 07 05:53:17 PM PDT 24 Jul 07 05:53:19 PM PDT 24 2486476801 ps
T244 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.3038138363 Jul 07 05:53:24 PM PDT 24 Jul 07 05:54:01 PM PDT 24 58889623959 ps
T653 /workspace/coverage/default/17.sysrst_ctrl_smoke.3170990915 Jul 07 05:52:50 PM PDT 24 Jul 07 05:52:54 PM PDT 24 2119969380 ps
T330 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3824888903 Jul 07 05:53:45 PM PDT 24 Jul 07 05:55:01 PM PDT 24 110890936553 ps
T654 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.1285787063 Jul 07 05:53:29 PM PDT 24 Jul 07 05:53:33 PM PDT 24 2463972118 ps
T655 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.2303913770 Jul 07 05:53:17 PM PDT 24 Jul 07 05:53:19 PM PDT 24 2636815008 ps
T369 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.195947489 Jul 07 05:53:27 PM PDT 24 Jul 07 05:53:43 PM PDT 24 960263743363 ps
T239 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3396407493 Jul 07 05:54:10 PM PDT 24 Jul 07 05:54:44 PM PDT 24 56234565836 ps
T656 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.16161337 Jul 07 05:53:07 PM PDT 24 Jul 07 05:55:11 PM PDT 24 99327798724 ps
T657 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.993897308 Jul 07 05:52:22 PM PDT 24 Jul 07 05:52:25 PM PDT 24 2535458278 ps
T658 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3729180893 Jul 07 05:53:49 PM PDT 24 Jul 07 05:54:39 PM PDT 24 38283895211 ps
T659 /workspace/coverage/default/45.sysrst_ctrl_smoke.2922477069 Jul 07 05:54:05 PM PDT 24 Jul 07 05:54:09 PM PDT 24 2121046422 ps
T660 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3476549027 Jul 07 05:52:52 PM PDT 24 Jul 07 05:53:01 PM PDT 24 3334035534 ps
T338 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4069473908 Jul 07 05:54:27 PM PDT 24 Jul 07 05:57:28 PM PDT 24 321354840448 ps
T661 /workspace/coverage/default/9.sysrst_ctrl_alert_test.877417915 Jul 07 05:52:39 PM PDT 24 Jul 07 05:52:42 PM PDT 24 2021094032 ps
T662 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.1392164960 Jul 07 05:53:31 PM PDT 24 Jul 07 05:53:45 PM PDT 24 1178162076910 ps
T663 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1028739143 Jul 07 05:52:10 PM PDT 24 Jul 07 05:53:06 PM PDT 24 582084356412 ps
T664 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.722736422 Jul 07 05:52:43 PM PDT 24 Jul 07 05:59:03 PM PDT 24 155363401489 ps
T116 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.977552101 Jul 07 05:53:13 PM PDT 24 Jul 07 05:54:03 PM PDT 24 41291929843 ps
T122 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.2721107812 Jul 07 05:54:14 PM PDT 24 Jul 07 05:54:26 PM PDT 24 5593452176 ps
T123 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3837505575 Jul 07 05:52:48 PM PDT 24 Jul 07 05:54:25 PM PDT 24 37574384043 ps
T119 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.4273980647 Jul 07 05:52:41 PM PDT 24 Jul 07 05:52:42 PM PDT 24 3326064968 ps
T124 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.5093951 Jul 07 05:54:10 PM PDT 24 Jul 07 05:54:17 PM PDT 24 2610032777 ps
T125 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1790037779 Jul 07 05:53:13 PM PDT 24 Jul 07 05:53:20 PM PDT 24 2612034945 ps
T126 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.2715173815 Jul 07 05:52:46 PM PDT 24 Jul 07 05:55:16 PM PDT 24 328785431254 ps
T127 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.478430512 Jul 07 05:54:06 PM PDT 24 Jul 07 05:55:40 PM PDT 24 141112085781 ps
T128 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1835794075 Jul 07 05:53:38 PM PDT 24 Jul 07 05:53:40 PM PDT 24 2052177614 ps
T129 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.4041622938 Jul 07 05:53:35 PM PDT 24 Jul 07 05:53:38 PM PDT 24 2638128878 ps
T665 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1875464097 Jul 07 05:52:34 PM PDT 24 Jul 07 05:52:42 PM PDT 24 2612443834 ps
T666 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1274360623 Jul 07 05:54:24 PM PDT 24 Jul 07 05:54:26 PM PDT 24 3889202256 ps
T667 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.1056420975 Jul 07 05:53:19 PM PDT 24 Jul 07 05:54:26 PM PDT 24 96314404914 ps
T668 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3972225836 Jul 07 05:52:18 PM PDT 24 Jul 07 05:52:19 PM PDT 24 2607251312 ps
T669 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3956803995 Jul 07 05:54:19 PM PDT 24 Jul 07 05:54:22 PM PDT 24 2238401515 ps
T670 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1584940677 Jul 07 05:54:13 PM PDT 24 Jul 07 05:58:11 PM PDT 24 99040239438 ps
T671 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3267528507 Jul 07 05:53:34 PM PDT 24 Jul 07 05:53:36 PM PDT 24 2576608234 ps
T672 /workspace/coverage/default/5.sysrst_ctrl_stress_all.1494474792 Jul 07 05:52:20 PM PDT 24 Jul 07 05:55:44 PM PDT 24 85342157593 ps
T673 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2009767858 Jul 07 05:54:09 PM PDT 24 Jul 07 05:54:16 PM PDT 24 2811195782 ps
T674 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.2010146009 Jul 07 05:52:54 PM PDT 24 Jul 07 05:53:00 PM PDT 24 2143314129 ps
T675 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.4191992419 Jul 07 05:53:25 PM PDT 24 Jul 07 05:58:43 PM PDT 24 123575328160 ps
T676 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.613281918 Jul 07 05:52:37 PM PDT 24 Jul 07 05:55:03 PM PDT 24 61236588501 ps
T677 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.799131407 Jul 07 05:54:28 PM PDT 24 Jul 07 05:54:53 PM PDT 24 44022182189 ps
T240 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.4095740954 Jul 07 05:52:45 PM PDT 24 Jul 07 05:53:10 PM PDT 24 111713928853 ps
T678 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.3334696668 Jul 07 05:52:12 PM PDT 24 Jul 07 05:52:15 PM PDT 24 2498092541 ps
T354 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.489632763 Jul 07 05:54:32 PM PDT 24 Jul 07 05:57:26 PM PDT 24 295691764773 ps
T679 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.4152588799 Jul 07 05:53:04 PM PDT 24 Jul 07 05:53:08 PM PDT 24 2476495106 ps
T680 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1774135246 Jul 07 05:52:54 PM PDT 24 Jul 07 05:53:23 PM PDT 24 121504109602 ps
T681 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.83101022 Jul 07 05:52:35 PM PDT 24 Jul 07 05:52:38 PM PDT 24 2484307549 ps
T682 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2000591133 Jul 07 05:52:31 PM PDT 24 Jul 07 05:52:34 PM PDT 24 2551218247 ps
T683 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2931181679 Jul 07 05:53:32 PM PDT 24 Jul 07 05:53:39 PM PDT 24 2458460926 ps
T684 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3177516624 Jul 07 05:54:18 PM PDT 24 Jul 07 05:54:23 PM PDT 24 3097871920 ps
T685 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.1550493176 Jul 07 05:53:42 PM PDT 24 Jul 07 05:53:45 PM PDT 24 3463983239 ps
T686 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.2868980012 Jul 07 05:53:53 PM PDT 24 Jul 07 05:53:59 PM PDT 24 3513469628 ps
T687 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.2288925611 Jul 07 05:53:32 PM PDT 24 Jul 07 05:55:13 PM PDT 24 39163853214 ps
T688 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.2927422235 Jul 07 05:53:17 PM PDT 24 Jul 07 05:53:20 PM PDT 24 3466268865 ps
T689 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3778642855 Jul 07 05:52:43 PM PDT 24 Jul 07 05:52:58 PM PDT 24 41703077695 ps
T690 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1437125864 Jul 07 05:52:44 PM PDT 24 Jul 07 05:52:46 PM PDT 24 2541957552 ps
T117 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1022027316 Jul 07 05:53:11 PM PDT 24 Jul 07 05:56:11 PM PDT 24 715536676148 ps
T691 /workspace/coverage/default/44.sysrst_ctrl_smoke.2759493684 Jul 07 05:54:05 PM PDT 24 Jul 07 05:54:11 PM PDT 24 2111576344 ps
T692 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2892812743 Jul 07 05:52:19 PM PDT 24 Jul 07 05:52:24 PM PDT 24 2465662018 ps
T693 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3227910706 Jul 07 05:53:11 PM PDT 24 Jul 07 05:53:14 PM PDT 24 2034616826 ps
T694 /workspace/coverage/default/20.sysrst_ctrl_alert_test.2953377188 Jul 07 05:53:04 PM PDT 24 Jul 07 05:53:10 PM PDT 24 2012441313 ps
T695 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.2804490329 Jul 07 05:53:12 PM PDT 24 Jul 07 05:53:16 PM PDT 24 7824707682 ps
T696 /workspace/coverage/default/39.sysrst_ctrl_stress_all.3474252093 Jul 07 05:53:54 PM PDT 24 Jul 07 05:54:13 PM PDT 24 7750297490 ps
T196 /workspace/coverage/default/12.sysrst_ctrl_stress_all.1806118510 Jul 07 05:52:41 PM PDT 24 Jul 07 05:53:07 PM PDT 24 54562448419 ps
T697 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2822520075 Jul 07 05:53:20 PM PDT 24 Jul 07 05:53:26 PM PDT 24 2013032741 ps
T698 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.317892889 Jul 07 05:54:03 PM PDT 24 Jul 07 05:54:05 PM PDT 24 2044238415 ps
T339 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2120935955 Jul 07 05:54:08 PM PDT 24 Jul 07 05:55:18 PM PDT 24 112298478910 ps
T699 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.122680088 Jul 07 05:52:18 PM PDT 24 Jul 07 05:52:20 PM PDT 24 2440232046 ps
T351 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.825641023 Jul 07 05:52:18 PM PDT 24 Jul 07 05:55:47 PM PDT 24 80911476865 ps
T700 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.4165896889 Jul 07 05:53:54 PM PDT 24 Jul 07 05:53:56 PM PDT 24 2038477617 ps
T701 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3594759261 Jul 07 05:53:18 PM PDT 24 Jul 07 05:53:20 PM PDT 24 2232646262 ps
T702 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2131321258 Jul 07 05:54:04 PM PDT 24 Jul 07 05:54:49 PM PDT 24 37292802587 ps
T703 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2718964964 Jul 07 05:52:48 PM PDT 24 Jul 07 05:53:08 PM PDT 24 675484679605 ps
T245 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3624052647 Jul 07 05:53:04 PM PDT 24 Jul 07 05:53:33 PM PDT 24 65771761424 ps
T704 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2571328297 Jul 07 05:52:15 PM PDT 24 Jul 07 05:52:21 PM PDT 24 2614346378 ps
T705 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2441706503 Jul 07 05:53:24 PM PDT 24 Jul 07 05:53:26 PM PDT 24 2317041152 ps
T706 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.4259822367 Jul 07 05:52:49 PM PDT 24 Jul 07 05:52:58 PM PDT 24 4075802785 ps
T331 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.1250013007 Jul 07 05:52:50 PM PDT 24 Jul 07 05:54:38 PM PDT 24 168501965243 ps
T707 /workspace/coverage/default/35.sysrst_ctrl_smoke.421319597 Jul 07 05:53:41 PM PDT 24 Jul 07 05:53:43 PM PDT 24 2125587477 ps
T708 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.3540101212 Jul 07 05:53:57 PM PDT 24 Jul 07 05:54:01 PM PDT 24 2669410737 ps
T709 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3221603948 Jul 07 05:53:59 PM PDT 24 Jul 07 05:54:01 PM PDT 24 2538439777 ps
T710 /workspace/coverage/default/16.sysrst_ctrl_smoke.1515550930 Jul 07 05:52:45 PM PDT 24 Jul 07 05:52:49 PM PDT 24 2123601659 ps
T711 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2762952995 Jul 07 05:52:40 PM PDT 24 Jul 07 05:52:57 PM PDT 24 13897539026 ps
T712 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1251218573 Jul 07 05:53:31 PM PDT 24 Jul 07 05:53:38 PM PDT 24 2612942023 ps
T713 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.196054480 Jul 07 05:52:49 PM PDT 24 Jul 07 05:52:52 PM PDT 24 2526518665 ps
T340 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1340595302 Jul 07 05:52:30 PM PDT 24 Jul 07 05:53:10 PM PDT 24 122377038068 ps
T714 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.1952422997 Jul 07 05:54:08 PM PDT 24 Jul 07 05:54:18 PM PDT 24 3571227147 ps
T715 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.1929401801 Jul 07 05:54:11 PM PDT 24 Jul 07 05:54:13 PM PDT 24 4008439456 ps
T716 /workspace/coverage/default/0.sysrst_ctrl_alert_test.522353308 Jul 07 05:52:13 PM PDT 24 Jul 07 05:52:19 PM PDT 24 2013136042 ps
T717 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2474439736 Jul 07 05:52:15 PM PDT 24 Jul 07 05:52:22 PM PDT 24 2511265499 ps
T718 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.23892628 Jul 07 05:53:18 PM PDT 24 Jul 07 05:53:19 PM PDT 24 3558169014 ps
T719 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.2056395545 Jul 07 05:53:23 PM PDT 24 Jul 07 05:56:59 PM PDT 24 1679023276363 ps
T720 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1903231852 Jul 07 05:52:12 PM PDT 24 Jul 07 05:52:20 PM PDT 24 5555117934 ps
T721 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2130411931 Jul 07 05:52:13 PM PDT 24 Jul 07 05:52:16 PM PDT 24 5485943019 ps
T722 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3080788352 Jul 07 05:52:25 PM PDT 24 Jul 07 05:52:32 PM PDT 24 2613676651 ps
T723 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1114387963 Jul 07 05:53:43 PM PDT 24 Jul 07 05:53:51 PM PDT 24 2610994013 ps
T724 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2999464037 Jul 07 05:53:38 PM PDT 24 Jul 07 05:53:58 PM PDT 24 7125038311 ps
T725 /workspace/coverage/default/6.sysrst_ctrl_smoke.1941944481 Jul 07 05:52:23 PM PDT 24 Jul 07 05:52:29 PM PDT 24 2115164813 ps
T726 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2231626405 Jul 07 05:54:20 PM PDT 24 Jul 07 05:54:30 PM PDT 24 3714624520 ps
T727 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.2769954448 Jul 07 05:52:47 PM PDT 24 Jul 07 05:52:57 PM PDT 24 5333318949 ps
T728 /workspace/coverage/default/34.sysrst_ctrl_smoke.3396169183 Jul 07 05:53:39 PM PDT 24 Jul 07 05:53:43 PM PDT 24 2115680219 ps
T729 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1742162355 Jul 07 05:53:49 PM PDT 24 Jul 07 05:53:56 PM PDT 24 2510370934 ps
T730 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.23691891 Jul 07 05:53:53 PM PDT 24 Jul 07 05:54:12 PM PDT 24 138784947636 ps
T361 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.551338942 Jul 07 05:53:14 PM PDT 24 Jul 07 05:54:09 PM PDT 24 68006507373 ps
T731 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3578514354 Jul 07 05:54:21 PM PDT 24 Jul 07 05:54:28 PM PDT 24 2459635052 ps
T732 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.2147602681 Jul 07 05:54:25 PM PDT 24 Jul 07 05:54:34 PM PDT 24 3658907949 ps
T733 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.2504137831 Jul 07 05:54:35 PM PDT 24 Jul 07 05:56:46 PM PDT 24 53366928371 ps
T734 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3587352990 Jul 07 05:52:53 PM PDT 24 Jul 07 05:52:55 PM PDT 24 2094504189 ps
T735 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3585405789 Jul 07 05:52:56 PM PDT 24 Jul 07 05:53:31 PM PDT 24 39662847026 ps
T736 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2849365297 Jul 07 05:52:16 PM PDT 24 Jul 07 05:52:19 PM PDT 24 2168943800 ps
T162 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3922662829 Jul 07 05:52:48 PM PDT 24 Jul 07 05:53:54 PM PDT 24 137389498673 ps
T352 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1695991998 Jul 07 05:54:35 PM PDT 24 Jul 07 06:00:27 PM PDT 24 135004320649 ps
T737 /workspace/coverage/default/5.sysrst_ctrl_smoke.496554874 Jul 07 05:52:36 PM PDT 24 Jul 07 05:52:39 PM PDT 24 2124111791 ps
T738 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.327955334 Jul 07 05:53:12 PM PDT 24 Jul 07 05:53:15 PM PDT 24 3482222195 ps
T739 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1482778280 Jul 07 05:53:33 PM PDT 24 Jul 07 05:55:48 PM PDT 24 129564185792 ps
T740 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.875681437 Jul 07 05:53:28 PM PDT 24 Jul 07 05:53:33 PM PDT 24 2744917217 ps
T741 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3417205811 Jul 07 05:54:07 PM PDT 24 Jul 07 05:54:14 PM PDT 24 2512943686 ps
T742 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.907694211 Jul 07 05:54:32 PM PDT 24 Jul 07 05:56:27 PM PDT 24 46558603030 ps
T743 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2583353340 Jul 07 05:52:43 PM PDT 24 Jul 07 05:52:46 PM PDT 24 3310966673 ps
T744 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1475006086 Jul 07 05:53:20 PM PDT 24 Jul 07 05:55:28 PM PDT 24 208041104261 ps
T745 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3288506754 Jul 07 05:54:29 PM PDT 24 Jul 07 05:54:41 PM PDT 24 27612299810 ps
T746 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2944728767 Jul 07 05:52:30 PM PDT 24 Jul 07 05:52:38 PM PDT 24 2987975105 ps
T747 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1271675180 Jul 07 05:52:19 PM PDT 24 Jul 07 05:52:27 PM PDT 24 2462762686 ps
T748 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1559394123 Jul 07 05:53:49 PM PDT 24 Jul 07 05:53:55 PM PDT 24 5230887990 ps
T749 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3700956501 Jul 07 05:54:21 PM PDT 24 Jul 07 05:54:25 PM PDT 24 2619514516 ps
T750 /workspace/coverage/default/28.sysrst_ctrl_alert_test.1531028154 Jul 07 05:53:21 PM PDT 24 Jul 07 05:53:23 PM PDT 24 2043294902 ps
T751 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.1853240673 Jul 07 05:54:32 PM PDT 24 Jul 07 05:55:12 PM PDT 24 28583755763 ps
T752 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3377955919 Jul 07 05:54:03 PM PDT 24 Jul 07 05:54:06 PM PDT 24 2193364104 ps
T753 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1146928364 Jul 07 05:53:30 PM PDT 24 Jul 07 05:53:38 PM PDT 24 2512132714 ps
T754 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1601919661 Jul 07 05:53:27 PM PDT 24 Jul 07 05:53:36 PM PDT 24 3194751699 ps
T755 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1986936315 Jul 07 05:53:12 PM PDT 24 Jul 07 05:53:20 PM PDT 24 2510759611 ps
T756 /workspace/coverage/default/38.sysrst_ctrl_smoke.2141101857 Jul 07 05:53:48 PM PDT 24 Jul 07 05:53:51 PM PDT 24 2122962920 ps
T757 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.4119909764 Jul 07 05:53:46 PM PDT 24 Jul 07 05:55:18 PM PDT 24 562048378326 ps
T758 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.3129915463 Jul 07 05:52:12 PM PDT 24 Jul 07 05:54:28 PM PDT 24 151433428971 ps
T759 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.1450668150 Jul 07 05:52:04 PM PDT 24 Jul 07 05:52:06 PM PDT 24 3456442085 ps
T760 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.804762677 Jul 07 05:52:49 PM PDT 24 Jul 07 05:52:58 PM PDT 24 2478572392 ps
T761 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.1403987884 Jul 07 05:53:56 PM PDT 24 Jul 07 05:56:42 PM PDT 24 139631953379 ps
T762 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1324117825 Jul 07 05:53:50 PM PDT 24 Jul 07 05:53:52 PM PDT 24 2495500446 ps
T763 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.1027572318 Jul 07 05:53:31 PM PDT 24 Jul 07 05:53:33 PM PDT 24 3823125060 ps
T764 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1268185605 Jul 07 05:53:42 PM PDT 24 Jul 07 05:53:50 PM PDT 24 2511697718 ps
T765 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2407624935 Jul 07 05:53:13 PM PDT 24 Jul 07 05:53:17 PM PDT 24 2250311713 ps
T766 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.403000568 Jul 07 05:53:20 PM PDT 24 Jul 07 05:53:27 PM PDT 24 3885135065 ps
T767 /workspace/coverage/default/49.sysrst_ctrl_smoke.155448913 Jul 07 05:54:20 PM PDT 24 Jul 07 05:54:27 PM PDT 24 2110358850 ps
T768 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.1015560455 Jul 07 05:53:39 PM PDT 24 Jul 07 05:53:41 PM PDT 24 2455789379 ps
T769 /workspace/coverage/default/3.sysrst_ctrl_alert_test.2156240737 Jul 07 05:52:18 PM PDT 24 Jul 07 05:52:24 PM PDT 24 2010298120 ps
T365 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1914793092 Jul 07 05:54:02 PM PDT 24 Jul 07 05:56:15 PM PDT 24 74660180186 ps
T770 /workspace/coverage/default/37.sysrst_ctrl_alert_test.494143904 Jul 07 05:53:50 PM PDT 24 Jul 07 05:53:56 PM PDT 24 2010814304 ps
T771 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1957719782 Jul 07 05:52:24 PM PDT 24 Jul 07 05:52:35 PM PDT 24 3845989935 ps
T772 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.2574890350 Jul 07 05:52:34 PM PDT 24 Jul 07 05:53:10 PM PDT 24 55121192205 ps
T773 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.124011910 Jul 07 05:53:50 PM PDT 24 Jul 07 05:53:52 PM PDT 24 2499429736 ps
T774 /workspace/coverage/default/28.sysrst_ctrl_smoke.361458162 Jul 07 05:53:20 PM PDT 24 Jul 07 05:53:26 PM PDT 24 2113905893 ps
T775 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1164084539 Jul 07 05:54:07 PM PDT 24 Jul 07 05:54:15 PM PDT 24 3037344864 ps
T776 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.213249508 Jul 07 05:53:34 PM PDT 24 Jul 07 05:53:38 PM PDT 24 2443086144 ps
T777 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.514839384 Jul 07 05:53:15 PM PDT 24 Jul 07 05:53:19 PM PDT 24 5040612409 ps
T778 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1671485966 Jul 07 05:52:12 PM PDT 24 Jul 07 05:53:18 PM PDT 24 103002683774 ps
T779 /workspace/coverage/default/6.sysrst_ctrl_stress_all.744969621 Jul 07 05:52:28 PM PDT 24 Jul 07 05:52:36 PM PDT 24 12981464075 ps
T780 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.1406208607 Jul 07 05:53:51 PM PDT 24 Jul 07 05:53:53 PM PDT 24 2626324639 ps
T120 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1842618928 Jul 07 05:53:42 PM PDT 24 Jul 07 05:54:50 PM PDT 24 1893934075156 ps
T781 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.1312458472 Jul 07 05:54:10 PM PDT 24 Jul 07 05:54:15 PM PDT 24 2619009735 ps
T782 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3718087064 Jul 07 05:53:08 PM PDT 24 Jul 07 05:53:11 PM PDT 24 2527983213 ps
T783 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.654695564 Jul 07 05:54:14 PM PDT 24 Jul 07 05:54:22 PM PDT 24 2447287251 ps
T784 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2281780590 Jul 07 05:52:35 PM PDT 24 Jul 07 05:52:40 PM PDT 24 2613221933 ps
T785 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.2684584663 Jul 07 05:53:38 PM PDT 24 Jul 07 05:53:45 PM PDT 24 6679616910 ps
T786 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1339414459 Jul 07 05:54:02 PM PDT 24 Jul 07 05:54:05 PM PDT 24 6808744934 ps
T15 /workspace/coverage/cover_reg_top/8.sysrst_ctrl_same_csr_outstanding.2029459421 Jul 07 05:48:59 PM PDT 24 Jul 07 05:49:11 PM PDT 24 4321703162 ps
T19 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.3602357412 Jul 07 05:48:48 PM PDT 24 Jul 07 05:49:37 PM PDT 24 42630018152 ps
T20 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.4045669192 Jul 07 05:49:02 PM PDT 24 Jul 07 05:49:11 PM PDT 24 2672664253 ps
T257 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2931525737 Jul 07 05:49:02 PM PDT 24 Jul 07 05:49:34 PM PDT 24 42795965453 ps
T258 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.3308398167 Jul 07 05:49:02 PM PDT 24 Jul 07 05:49:10 PM PDT 24 2091804747 ps
T16 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1568468776 Jul 07 05:49:11 PM PDT 24 Jul 07 05:49:30 PM PDT 24 4785051823 ps
T264 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3077412126 Jul 07 05:49:02 PM PDT 24 Jul 07 05:49:06 PM PDT 24 2135884431 ps
T787 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1928262514 Jul 07 05:49:07 PM PDT 24 Jul 07 05:49:09 PM PDT 24 2036687353 ps
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