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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.62 98.75 96.76 100.00 95.51 98.23 99.33 87.78


Total test records in report: 904
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T313 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1743497447 Jul 09 06:57:15 PM PDT 24 Jul 09 07:00:16 PM PDT 24 568809989672 ps
T259 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.663035283 Jul 09 06:56:03 PM PDT 24 Jul 09 06:57:32 PM PDT 24 36331609402 ps
T604 /workspace/coverage/default/1.sysrst_ctrl_alert_test.956416446 Jul 09 06:54:55 PM PDT 24 Jul 09 06:55:01 PM PDT 24 2025051799 ps
T605 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2553433091 Jul 09 06:55:09 PM PDT 24 Jul 09 06:55:17 PM PDT 24 2366168454 ps
T606 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.552770916 Jul 09 06:57:39 PM PDT 24 Jul 09 06:57:42 PM PDT 24 2498351993 ps
T607 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1050358519 Jul 09 06:55:06 PM PDT 24 Jul 09 06:56:39 PM PDT 24 71539180085 ps
T362 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3867494020 Jul 09 06:58:04 PM PDT 24 Jul 09 06:58:45 PM PDT 24 64302511171 ps
T608 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.2942848326 Jul 09 06:56:45 PM PDT 24 Jul 09 06:59:22 PM PDT 24 114769395435 ps
T609 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3624570300 Jul 09 06:57:18 PM PDT 24 Jul 09 06:57:23 PM PDT 24 2515760684 ps
T610 /workspace/coverage/default/32.sysrst_ctrl_smoke.291793315 Jul 09 06:56:56 PM PDT 24 Jul 09 06:57:00 PM PDT 24 2112555463 ps
T353 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.364121255 Jul 09 06:58:06 PM PDT 24 Jul 09 06:58:44 PM PDT 24 140617713309 ps
T611 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1152845331 Jul 09 06:55:18 PM PDT 24 Jul 09 06:55:23 PM PDT 24 3702205520 ps
T612 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.4055293903 Jul 09 06:54:52 PM PDT 24 Jul 09 06:54:56 PM PDT 24 2251660469 ps
T613 /workspace/coverage/default/20.sysrst_ctrl_smoke.549305234 Jul 09 06:56:07 PM PDT 24 Jul 09 06:56:14 PM PDT 24 2110108138 ps
T614 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1692508105 Jul 09 06:57:41 PM PDT 24 Jul 09 06:57:49 PM PDT 24 3185861629 ps
T615 /workspace/coverage/default/18.sysrst_ctrl_alert_test.978569523 Jul 09 06:56:01 PM PDT 24 Jul 09 06:56:04 PM PDT 24 2030750668 ps
T260 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3521929998 Jul 09 06:55:17 PM PDT 24 Jul 09 07:04:15 PM PDT 24 213620680463 ps
T616 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3210456864 Jul 09 06:57:30 PM PDT 24 Jul 09 06:57:33 PM PDT 24 2057568700 ps
T384 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1067456382 Jul 09 06:57:52 PM PDT 24 Jul 09 06:59:18 PM PDT 24 889161204239 ps
T617 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1967338306 Jul 09 06:57:28 PM PDT 24 Jul 09 06:57:34 PM PDT 24 2470253666 ps
T618 /workspace/coverage/default/19.sysrst_ctrl_smoke.1928117236 Jul 09 06:55:58 PM PDT 24 Jul 09 06:56:02 PM PDT 24 2118593770 ps
T146 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.345534770 Jul 09 06:57:26 PM PDT 24 Jul 09 06:59:30 PM PDT 24 48597845856 ps
T619 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2922473288 Jul 09 06:56:42 PM PDT 24 Jul 09 06:56:46 PM PDT 24 2534589330 ps
T620 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2401678136 Jul 09 06:57:28 PM PDT 24 Jul 09 06:57:33 PM PDT 24 5161098778 ps
T621 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.350625187 Jul 09 06:57:27 PM PDT 24 Jul 09 06:57:37 PM PDT 24 2462505334 ps
T227 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.3869577872 Jul 09 06:57:43 PM PDT 24 Jul 09 06:57:48 PM PDT 24 2876920200 ps
T622 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.259982751 Jul 09 06:57:32 PM PDT 24 Jul 09 06:57:41 PM PDT 24 2511554836 ps
T623 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.224072116 Jul 09 06:56:38 PM PDT 24 Jul 09 06:56:49 PM PDT 24 2611468649 ps
T624 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.2180101820 Jul 09 06:55:00 PM PDT 24 Jul 09 06:55:03 PM PDT 24 3088551463 ps
T361 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1865979402 Jul 09 06:58:04 PM PDT 24 Jul 09 07:01:02 PM PDT 24 67942214537 ps
T625 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1485174195 Jul 09 06:55:31 PM PDT 24 Jul 09 06:56:22 PM PDT 24 19284029521 ps
T626 /workspace/coverage/default/19.sysrst_ctrl_alert_test.1361887206 Jul 09 06:56:07 PM PDT 24 Jul 09 06:56:14 PM PDT 24 2013291962 ps
T627 /workspace/coverage/default/49.sysrst_ctrl_alert_test.506451341 Jul 09 06:58:00 PM PDT 24 Jul 09 06:58:07 PM PDT 24 2012568892 ps
T168 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3147688054 Jul 09 06:56:16 PM PDT 24 Jul 09 07:01:26 PM PDT 24 815169679969 ps
T109 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4193934373 Jul 09 06:57:42 PM PDT 24 Jul 09 06:59:24 PM PDT 24 40040530460 ps
T628 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.2429009143 Jul 09 06:55:58 PM PDT 24 Jul 09 06:56:40 PM PDT 24 29856456324 ps
T629 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.478061717 Jul 09 06:57:12 PM PDT 24 Jul 09 06:57:16 PM PDT 24 2467494732 ps
T630 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.442564299 Jul 09 06:55:07 PM PDT 24 Jul 09 06:55:11 PM PDT 24 3093158420 ps
T631 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.2502386112 Jul 09 06:57:14 PM PDT 24 Jul 09 06:57:18 PM PDT 24 2527704202 ps
T632 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.3543960629 Jul 09 06:57:20 PM PDT 24 Jul 09 06:57:25 PM PDT 24 2473100109 ps
T633 /workspace/coverage/default/13.sysrst_ctrl_alert_test.1567227937 Jul 09 06:55:43 PM PDT 24 Jul 09 06:55:49 PM PDT 24 2044798265 ps
T166 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.1082412638 Jul 09 06:57:13 PM PDT 24 Jul 09 06:57:18 PM PDT 24 4393322841 ps
T634 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.525270434 Jul 09 06:57:09 PM PDT 24 Jul 09 06:57:17 PM PDT 24 5577028579 ps
T635 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.3591902218 Jul 09 06:57:42 PM PDT 24 Jul 09 06:59:30 PM PDT 24 41356841127 ps
T636 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2253399933 Jul 09 06:56:19 PM PDT 24 Jul 09 06:56:24 PM PDT 24 2628593907 ps
T637 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.1599012231 Jul 09 06:55:37 PM PDT 24 Jul 09 06:55:47 PM PDT 24 2612318558 ps
T638 /workspace/coverage/default/18.sysrst_ctrl_smoke.1824712700 Jul 09 06:56:00 PM PDT 24 Jul 09 06:56:02 PM PDT 24 2142104623 ps
T639 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.358369377 Jul 09 06:55:08 PM PDT 24 Jul 09 06:55:22 PM PDT 24 4161384891 ps
T640 /workspace/coverage/default/1.sysrst_ctrl_smoke.3969280662 Jul 09 06:54:53 PM PDT 24 Jul 09 06:54:57 PM PDT 24 2132014046 ps
T641 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.4018878339 Jul 09 06:57:31 PM PDT 24 Jul 09 06:57:35 PM PDT 24 3670038359 ps
T642 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3447639736 Jul 09 06:56:18 PM PDT 24 Jul 09 06:56:31 PM PDT 24 3914634992 ps
T643 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2127380816 Jul 09 06:57:37 PM PDT 24 Jul 09 07:02:36 PM PDT 24 123595749859 ps
T644 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1819328701 Jul 09 06:55:24 PM PDT 24 Jul 09 06:55:32 PM PDT 24 2177636075 ps
T645 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2785258249 Jul 09 06:57:18 PM PDT 24 Jul 09 06:57:22 PM PDT 24 2280544684 ps
T646 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.25445200 Jul 09 06:56:44 PM PDT 24 Jul 09 06:58:20 PM PDT 24 154485859984 ps
T647 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.808424190 Jul 09 06:55:37 PM PDT 24 Jul 09 06:55:40 PM PDT 24 2180527575 ps
T648 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2692956812 Jul 09 06:55:31 PM PDT 24 Jul 09 06:55:35 PM PDT 24 2482023602 ps
T649 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.2254403592 Jul 09 06:57:02 PM PDT 24 Jul 09 06:57:05 PM PDT 24 2500837952 ps
T650 /workspace/coverage/default/9.sysrst_ctrl_smoke.3743169925 Jul 09 06:55:22 PM PDT 24 Jul 09 06:55:31 PM PDT 24 2112614870 ps
T651 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3053459695 Jul 09 06:57:26 PM PDT 24 Jul 09 06:57:28 PM PDT 24 2554315707 ps
T652 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.2164062802 Jul 09 06:56:53 PM PDT 24 Jul 09 07:02:27 PM PDT 24 127947470054 ps
T653 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2365138983 Jul 09 06:56:14 PM PDT 24 Jul 09 06:56:21 PM PDT 24 2009143313 ps
T654 /workspace/coverage/default/14.sysrst_ctrl_alert_test.1041983874 Jul 09 06:55:48 PM PDT 24 Jul 09 06:55:53 PM PDT 24 2028927903 ps
T655 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.727384703 Jul 09 06:56:24 PM PDT 24 Jul 09 06:56:33 PM PDT 24 2611923820 ps
T656 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1041476781 Jul 09 06:55:23 PM PDT 24 Jul 09 06:55:50 PM PDT 24 39552089741 ps
T657 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.531825233 Jul 09 06:55:02 PM PDT 24 Jul 09 06:55:04 PM PDT 24 3840147847 ps
T658 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3981396919 Jul 09 06:58:00 PM PDT 24 Jul 09 06:59:54 PM PDT 24 43121916242 ps
T659 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.2311428667 Jul 09 06:57:06 PM PDT 24 Jul 09 06:57:10 PM PDT 24 2236093586 ps
T660 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3410179775 Jul 09 06:56:44 PM PDT 24 Jul 09 06:56:47 PM PDT 24 2560220260 ps
T661 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1238718455 Jul 09 06:56:44 PM PDT 24 Jul 09 06:56:50 PM PDT 24 2171190093 ps
T662 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.1331871773 Jul 09 06:55:59 PM PDT 24 Jul 09 06:56:03 PM PDT 24 2160983022 ps
T663 /workspace/coverage/default/49.sysrst_ctrl_smoke.2213030945 Jul 09 06:57:56 PM PDT 24 Jul 09 06:57:59 PM PDT 24 2135534157 ps
T664 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2792143751 Jul 09 06:55:20 PM PDT 24 Jul 09 06:55:24 PM PDT 24 5209500512 ps
T665 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.871323972 Jul 09 06:55:44 PM PDT 24 Jul 09 06:55:51 PM PDT 24 3708104081 ps
T666 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1865211141 Jul 09 06:55:05 PM PDT 24 Jul 09 06:55:24 PM PDT 24 6746153756 ps
T667 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.898786529 Jul 09 06:55:26 PM PDT 24 Jul 09 06:55:30 PM PDT 24 3519309767 ps
T358 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.435299489 Jul 09 06:58:11 PM PDT 24 Jul 09 07:00:03 PM PDT 24 83036848676 ps
T668 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3551059340 Jul 09 06:56:50 PM PDT 24 Jul 09 06:56:53 PM PDT 24 2090685015 ps
T669 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2394946295 Jul 09 06:56:46 PM PDT 24 Jul 09 06:56:51 PM PDT 24 2038028177 ps
T670 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.509460847 Jul 09 06:56:16 PM PDT 24 Jul 09 06:56:29 PM PDT 24 3667668349 ps
T671 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.1604962233 Jul 09 06:58:01 PM PDT 24 Jul 09 07:02:29 PM PDT 24 108825542341 ps
T672 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1941575948 Jul 09 06:55:22 PM PDT 24 Jul 09 06:56:04 PM PDT 24 15306557486 ps
T673 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.1595167993 Jul 09 06:57:39 PM PDT 24 Jul 09 07:00:49 PM PDT 24 72469491226 ps
T674 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3125726335 Jul 09 06:55:49 PM PDT 24 Jul 09 06:56:20 PM PDT 24 11671910841 ps
T675 /workspace/coverage/default/44.sysrst_ctrl_alert_test.808690748 Jul 09 06:57:37 PM PDT 24 Jul 09 06:57:41 PM PDT 24 2041408234 ps
T238 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.1991269396 Jul 09 06:55:26 PM PDT 24 Jul 09 06:55:29 PM PDT 24 3496591025 ps
T314 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3716875070 Jul 09 06:57:26 PM PDT 24 Jul 09 06:58:57 PM PDT 24 36515030186 ps
T676 /workspace/coverage/default/24.sysrst_ctrl_alert_test.2248725474 Jul 09 06:56:25 PM PDT 24 Jul 09 06:56:32 PM PDT 24 2012361933 ps
T677 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3632561364 Jul 09 06:57:27 PM PDT 24 Jul 09 06:57:32 PM PDT 24 4605323754 ps
T678 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.4170345717 Jul 09 06:57:01 PM PDT 24 Jul 09 06:57:09 PM PDT 24 4867449362 ps
T679 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.623496403 Jul 09 06:55:54 PM PDT 24 Jul 09 06:56:06 PM PDT 24 3618918252 ps
T680 /workspace/coverage/default/45.sysrst_ctrl_stress_all.999171722 Jul 09 06:57:43 PM PDT 24 Jul 09 06:58:07 PM PDT 24 8823316813 ps
T681 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.563414550 Jul 09 06:55:42 PM PDT 24 Jul 09 06:55:54 PM PDT 24 3090069900 ps
T682 /workspace/coverage/default/12.sysrst_ctrl_smoke.3019917170 Jul 09 06:55:35 PM PDT 24 Jul 09 06:55:43 PM PDT 24 2111805969 ps
T683 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1496445240 Jul 09 06:57:52 PM PDT 24 Jul 09 07:07:32 PM PDT 24 883285326420 ps
T684 /workspace/coverage/default/7.sysrst_ctrl_smoke.4218939066 Jul 09 06:55:16 PM PDT 24 Jul 09 06:55:24 PM PDT 24 2111313733 ps
T685 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.3549302028 Jul 09 06:55:31 PM PDT 24 Jul 09 06:55:37 PM PDT 24 3444617668 ps
T686 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1085244347 Jul 09 06:56:32 PM PDT 24 Jul 09 06:56:37 PM PDT 24 3748379296 ps
T253 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1270821949 Jul 09 06:56:46 PM PDT 24 Jul 09 06:57:04 PM PDT 24 24113276583 ps
T273 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3017873719 Jul 09 06:55:58 PM PDT 24 Jul 09 06:56:45 PM PDT 24 34418407308 ps
T687 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.1363447765 Jul 09 06:55:26 PM PDT 24 Jul 09 06:55:30 PM PDT 24 2124628660 ps
T688 /workspace/coverage/default/4.sysrst_ctrl_stress_all.298895968 Jul 09 06:55:15 PM PDT 24 Jul 09 06:55:57 PM PDT 24 128207629022 ps
T689 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.955515228 Jul 09 06:57:17 PM PDT 24 Jul 09 06:57:26 PM PDT 24 2611438857 ps
T375 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.2147186994 Jul 09 06:56:57 PM PDT 24 Jul 09 06:59:06 PM PDT 24 198488869338 ps
T690 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.117623353 Jul 09 06:55:06 PM PDT 24 Jul 09 06:55:14 PM PDT 24 2511893359 ps
T691 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3123404194 Jul 09 06:55:19 PM PDT 24 Jul 09 06:55:28 PM PDT 24 2470080445 ps
T692 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2371875502 Jul 09 06:57:56 PM PDT 24 Jul 09 07:00:05 PM PDT 24 51489802775 ps
T199 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.2598344081 Jul 09 06:57:54 PM PDT 24 Jul 09 06:58:04 PM PDT 24 3034081478 ps
T693 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3200730711 Jul 09 06:57:13 PM PDT 24 Jul 09 06:57:16 PM PDT 24 3236464223 ps
T694 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3444824135 Jul 09 06:56:04 PM PDT 24 Jul 09 06:57:36 PM PDT 24 152541576200 ps
T695 /workspace/coverage/default/10.sysrst_ctrl_smoke.929013084 Jul 09 06:55:29 PM PDT 24 Jul 09 06:55:38 PM PDT 24 2111576530 ps
T320 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3577712999 Jul 09 06:56:45 PM PDT 24 Jul 09 06:57:40 PM PDT 24 21957330804 ps
T696 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2007132766 Jul 09 06:55:12 PM PDT 24 Jul 09 06:55:22 PM PDT 24 2458610707 ps
T183 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.8985580 Jul 09 06:54:49 PM PDT 24 Jul 09 06:54:54 PM PDT 24 4019726882 ps
T697 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.310935873 Jul 09 06:57:28 PM PDT 24 Jul 09 06:57:31 PM PDT 24 2936684947 ps
T354 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1502495250 Jul 09 06:58:09 PM PDT 24 Jul 09 06:58:34 PM PDT 24 104751646619 ps
T698 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.2881229753 Jul 09 06:55:59 PM PDT 24 Jul 09 06:56:07 PM PDT 24 2512588827 ps
T699 /workspace/coverage/default/25.sysrst_ctrl_alert_test.1018381212 Jul 09 06:56:35 PM PDT 24 Jul 09 06:56:40 PM PDT 24 2036570184 ps
T700 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.430687635 Jul 09 06:56:44 PM PDT 24 Jul 09 06:58:44 PM PDT 24 54115003583 ps
T701 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2278888335 Jul 09 06:55:42 PM PDT 24 Jul 09 06:55:54 PM PDT 24 2607713978 ps
T702 /workspace/coverage/default/40.sysrst_ctrl_smoke.947434549 Jul 09 06:57:26 PM PDT 24 Jul 09 06:57:32 PM PDT 24 2121431294 ps
T365 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1817589986 Jul 09 06:55:17 PM PDT 24 Jul 09 06:57:23 PM PDT 24 111416365709 ps
T703 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3601473404 Jul 09 06:57:54 PM PDT 24 Jul 09 06:58:01 PM PDT 24 3132249462 ps
T147 /workspace/coverage/default/23.sysrst_ctrl_stress_all.3484714903 Jul 09 06:56:20 PM PDT 24 Jul 09 06:56:24 PM PDT 24 15120242111 ps
T704 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.3471769361 Jul 09 06:56:16 PM PDT 24 Jul 09 06:57:08 PM PDT 24 85155249411 ps
T155 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.697344650 Jul 09 06:57:17 PM PDT 24 Jul 09 06:58:04 PM PDT 24 625734438791 ps
T705 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.1495470114 Jul 09 06:57:31 PM PDT 24 Jul 09 06:57:58 PM PDT 24 171098431946 ps
T706 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3590471691 Jul 09 06:55:11 PM PDT 24 Jul 09 06:56:15 PM PDT 24 99139280931 ps
T707 /workspace/coverage/default/44.sysrst_ctrl_smoke.1309845213 Jul 09 06:57:41 PM PDT 24 Jul 09 06:57:46 PM PDT 24 2116757160 ps
T708 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2618572283 Jul 09 06:57:53 PM PDT 24 Jul 09 06:57:55 PM PDT 24 3452259302 ps
T709 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1620385362 Jul 09 06:56:16 PM PDT 24 Jul 09 06:56:22 PM PDT 24 2465268865 ps
T212 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.406018968 Jul 09 06:55:22 PM PDT 24 Jul 09 06:55:35 PM PDT 24 4037103347 ps
T710 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1476562773 Jul 09 06:54:57 PM PDT 24 Jul 09 06:55:10 PM PDT 24 3867737272 ps
T711 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2387332603 Jul 09 06:57:01 PM PDT 24 Jul 09 07:00:15 PM PDT 24 289007003449 ps
T712 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.83712126 Jul 09 06:56:58 PM PDT 24 Jul 09 06:57:00 PM PDT 24 2492583511 ps
T713 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4141634212 Jul 09 06:57:42 PM PDT 24 Jul 09 06:57:51 PM PDT 24 2512709838 ps
T355 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2565452882 Jul 09 06:58:02 PM PDT 24 Jul 09 07:05:23 PM PDT 24 171655750977 ps
T714 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3389028570 Jul 09 06:56:11 PM PDT 24 Jul 09 06:56:21 PM PDT 24 3276564859 ps
T715 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1945720647 Jul 09 06:55:12 PM PDT 24 Jul 09 06:55:22 PM PDT 24 2609653011 ps
T716 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3267448032 Jul 09 06:54:54 PM PDT 24 Jul 09 06:54:59 PM PDT 24 2475140357 ps
T364 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.367371668 Jul 09 06:55:28 PM PDT 24 Jul 09 06:58:13 PM PDT 24 72046398209 ps
T717 /workspace/coverage/default/1.sysrst_ctrl_stress_all.3911885692 Jul 09 06:54:56 PM PDT 24 Jul 09 06:55:04 PM PDT 24 8096900978 ps
T148 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.402046114 Jul 09 06:55:24 PM PDT 24 Jul 09 06:56:32 PM PDT 24 51457640864 ps
T363 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2910241781 Jul 09 06:57:17 PM PDT 24 Jul 09 06:57:32 PM PDT 24 53096119984 ps
T718 /workspace/coverage/default/28.sysrst_ctrl_stress_all.197442618 Jul 09 06:56:45 PM PDT 24 Jul 09 06:56:50 PM PDT 24 10718407863 ps
T719 /workspace/coverage/default/29.sysrst_ctrl_alert_test.4081121971 Jul 09 06:56:47 PM PDT 24 Jul 09 06:56:53 PM PDT 24 2016632687 ps
T720 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3805543412 Jul 09 06:56:47 PM PDT 24 Jul 09 06:56:53 PM PDT 24 2475863529 ps
T721 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.3856817036 Jul 09 06:57:16 PM PDT 24 Jul 09 06:59:39 PM PDT 24 107343685336 ps
T722 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1383138205 Jul 09 06:57:29 PM PDT 24 Jul 09 06:57:32 PM PDT 24 2637876051 ps
T160 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.142062046 Jul 09 06:55:07 PM PDT 24 Jul 09 06:55:38 PM PDT 24 204715835604 ps
T723 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3766632409 Jul 09 06:55:53 PM PDT 24 Jul 09 06:55:58 PM PDT 24 2531465948 ps
T724 /workspace/coverage/default/41.sysrst_ctrl_alert_test.2983659561 Jul 09 06:57:33 PM PDT 24 Jul 09 06:57:38 PM PDT 24 2020626949 ps
T195 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.175273453 Jul 09 06:56:04 PM PDT 24 Jul 09 06:56:13 PM PDT 24 3126823230 ps
T725 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3674186033 Jul 09 06:57:27 PM PDT 24 Jul 09 06:57:55 PM PDT 24 33228731486 ps
T726 /workspace/coverage/default/35.sysrst_ctrl_smoke.570147937 Jul 09 06:57:09 PM PDT 24 Jul 09 06:57:16 PM PDT 24 2113726067 ps
T727 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.689204268 Jul 09 06:57:18 PM PDT 24 Jul 09 06:57:27 PM PDT 24 2790875138 ps
T282 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.1987217845 Jul 09 06:55:31 PM PDT 24 Jul 09 07:01:36 PM PDT 24 139739353472 ps
T728 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2783973384 Jul 09 06:58:03 PM PDT 24 Jul 09 06:58:51 PM PDT 24 44227127786 ps
T156 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1891643157 Jul 09 06:56:16 PM PDT 24 Jul 09 06:56:22 PM PDT 24 4966805618 ps
T729 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.239907032 Jul 09 06:56:44 PM PDT 24 Jul 09 06:56:57 PM PDT 24 3525476098 ps
T730 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3547380518 Jul 09 06:55:31 PM PDT 24 Jul 09 06:55:41 PM PDT 24 6103773898 ps
T731 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.1182049593 Jul 09 06:55:56 PM PDT 24 Jul 09 06:56:06 PM PDT 24 2610509469 ps
T732 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1470109177 Jul 09 06:55:17 PM PDT 24 Jul 09 07:16:46 PM PDT 24 1781796905645 ps
T733 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3936623112 Jul 09 06:56:18 PM PDT 24 Jul 09 06:59:58 PM PDT 24 368508936853 ps
T734 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3211270954 Jul 09 06:57:59 PM PDT 24 Jul 09 06:59:01 PM PDT 24 25833305011 ps
T735 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1874706860 Jul 09 06:56:29 PM PDT 24 Jul 09 06:56:32 PM PDT 24 2918346696 ps
T736 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2724793036 Jul 09 06:54:50 PM PDT 24 Jul 09 06:54:55 PM PDT 24 2334530407 ps
T211 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.3536497398 Jul 09 06:56:32 PM PDT 24 Jul 09 06:56:37 PM PDT 24 3590738955 ps
T737 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2521293875 Jul 09 06:57:59 PM PDT 24 Jul 09 07:02:31 PM PDT 24 108830593864 ps
T738 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2084975563 Jul 09 06:58:10 PM PDT 24 Jul 09 06:58:19 PM PDT 24 36932315131 ps
T739 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.2243154483 Jul 09 06:54:57 PM PDT 24 Jul 09 06:55:17 PM PDT 24 28847384572 ps
T740 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.1620924200 Jul 09 06:56:07 PM PDT 24 Jul 09 06:56:10 PM PDT 24 2219798087 ps
T741 /workspace/coverage/default/35.sysrst_ctrl_alert_test.1656638654 Jul 09 06:57:09 PM PDT 24 Jul 09 06:57:16 PM PDT 24 2013104358 ps
T742 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.677636926 Jul 09 06:57:13 PM PDT 24 Jul 09 06:57:16 PM PDT 24 2635749377 ps
T743 /workspace/coverage/default/36.sysrst_ctrl_alert_test.2717685799 Jul 09 06:57:14 PM PDT 24 Jul 09 06:57:17 PM PDT 24 2026856637 ps
T744 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.347168489 Jul 09 06:56:35 PM PDT 24 Jul 09 06:56:45 PM PDT 24 2968381274 ps
T745 /workspace/coverage/default/38.sysrst_ctrl_alert_test.2677407297 Jul 09 06:57:24 PM PDT 24 Jul 09 06:57:26 PM PDT 24 2027666415 ps
T746 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.546268638 Jul 09 06:57:23 PM PDT 24 Jul 09 06:57:26 PM PDT 24 2762079862 ps
T747 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.640889205 Jul 09 06:57:53 PM PDT 24 Jul 09 06:57:56 PM PDT 24 2059876721 ps
T748 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.209908368 Jul 09 06:55:55 PM PDT 24 Jul 09 06:55:59 PM PDT 24 2136957885 ps
T749 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.3321750326 Jul 09 06:56:08 PM PDT 24 Jul 09 06:57:27 PM PDT 24 119819325180 ps
T370 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1160485270 Jul 09 06:55:36 PM PDT 24 Jul 09 06:56:58 PM PDT 24 65913471664 ps
T750 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2408971582 Jul 09 06:56:47 PM PDT 24 Jul 09 06:56:51 PM PDT 24 2973187689 ps
T751 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.2315173895 Jul 09 06:56:32 PM PDT 24 Jul 09 06:56:39 PM PDT 24 2105313910 ps
T752 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.4200575069 Jul 09 06:54:57 PM PDT 24 Jul 09 06:55:06 PM PDT 24 5254781085 ps
T753 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3492071784 Jul 09 06:55:22 PM PDT 24 Jul 09 06:56:32 PM PDT 24 53594789440 ps
T754 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3185107547 Jul 09 06:57:55 PM PDT 24 Jul 09 06:57:59 PM PDT 24 2629371020 ps
T755 /workspace/coverage/default/42.sysrst_ctrl_stress_all.773668725 Jul 09 06:57:32 PM PDT 24 Jul 09 06:58:15 PM PDT 24 17857008668 ps
T756 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1043131549 Jul 09 06:56:00 PM PDT 24 Jul 09 06:56:03 PM PDT 24 2255041686 ps
T303 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.2490353148 Jul 09 06:55:12 PM PDT 24 Jul 09 06:57:06 PM PDT 24 42010739576 ps
T757 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.772066812 Jul 09 06:55:39 PM PDT 24 Jul 09 06:56:26 PM PDT 24 87528103953 ps
T758 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.4232998450 Jul 09 06:57:09 PM PDT 24 Jul 09 07:01:58 PM PDT 24 125073805966 ps
T200 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.1612441276 Jul 09 06:55:58 PM PDT 24 Jul 09 06:56:02 PM PDT 24 3951113147 ps
T248 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.4280024220 Jul 09 06:56:52 PM PDT 24 Jul 09 06:57:01 PM PDT 24 4935926066 ps
T759 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2344806304 Jul 09 06:57:09 PM PDT 24 Jul 09 06:57:17 PM PDT 24 2613536877 ps
T760 /workspace/coverage/default/17.sysrst_ctrl_alert_test.932858101 Jul 09 06:56:16 PM PDT 24 Jul 09 06:56:24 PM PDT 24 2014779240 ps
T761 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.1413878544 Jul 09 06:57:08 PM PDT 24 Jul 09 06:57:12 PM PDT 24 2516900623 ps
T283 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2601137689 Jul 09 06:55:45 PM PDT 24 Jul 09 06:57:47 PM PDT 24 89075766212 ps
T284 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.3207325770 Jul 09 06:56:57 PM PDT 24 Jul 09 06:58:29 PM PDT 24 162946871901 ps
T762 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3620131673 Jul 09 06:54:58 PM PDT 24 Jul 09 06:55:03 PM PDT 24 2532003234 ps
T763 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3577833302 Jul 09 06:56:53 PM PDT 24 Jul 09 06:57:11 PM PDT 24 20595275070 ps
T304 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.3610895057 Jul 09 06:55:10 PM PDT 24 Jul 09 06:55:19 PM PDT 24 22244632900 ps
T198 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.1849253934 Jul 09 06:55:40 PM PDT 24 Jul 09 06:55:53 PM PDT 24 3708486315 ps
T201 /workspace/coverage/default/39.sysrst_ctrl_smoke.2600187729 Jul 09 06:57:22 PM PDT 24 Jul 09 06:57:28 PM PDT 24 2112084726 ps
T202 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3112934197 Jul 09 06:56:08 PM PDT 24 Jul 09 06:56:55 PM PDT 24 37477902156 ps
T203 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2507804617 Jul 09 06:57:43 PM PDT 24 Jul 09 06:57:51 PM PDT 24 2610651698 ps
T204 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.482317650 Jul 09 06:56:37 PM PDT 24 Jul 09 06:59:26 PM PDT 24 286519628360 ps
T205 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1754205657 Jul 09 06:55:12 PM PDT 24 Jul 09 06:55:16 PM PDT 24 2571506094 ps
T206 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3412284034 Jul 09 06:56:48 PM PDT 24 Jul 09 06:56:57 PM PDT 24 3896678387 ps
T207 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3889958698 Jul 09 06:57:28 PM PDT 24 Jul 09 06:58:34 PM PDT 24 24327102885 ps
T208 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.4080721418 Jul 09 06:56:29 PM PDT 24 Jul 09 06:57:09 PM PDT 24 63178607157 ps
T209 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.3928573858 Jul 09 06:56:26 PM PDT 24 Jul 09 07:05:11 PM PDT 24 205982716271 ps
T764 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.146509011 Jul 09 06:55:24 PM PDT 24 Jul 09 06:56:58 PM PDT 24 136488245589 ps
T110 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.209222337 Jul 09 06:55:18 PM PDT 24 Jul 09 06:55:23 PM PDT 24 3593772624 ps
T765 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2348828665 Jul 09 06:57:09 PM PDT 24 Jul 09 06:57:16 PM PDT 24 3910104274 ps
T766 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1876766216 Jul 09 06:57:56 PM PDT 24 Jul 09 06:58:05 PM PDT 24 2489240722 ps
T767 /workspace/coverage/default/8.sysrst_ctrl_stress_all.1671379275 Jul 09 06:55:21 PM PDT 24 Jul 09 06:55:40 PM PDT 24 8707453231 ps
T768 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.377846388 Jul 09 06:55:34 PM PDT 24 Jul 09 06:55:43 PM PDT 24 2511534305 ps
T769 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.680363327 Jul 09 06:56:14 PM PDT 24 Jul 09 06:56:23 PM PDT 24 2682775113 ps
T770 /workspace/coverage/default/26.sysrst_ctrl_alert_test.4264262382 Jul 09 06:56:35 PM PDT 24 Jul 09 06:56:40 PM PDT 24 2044135766 ps
T771 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.77999887 Jul 09 06:55:21 PM PDT 24 Jul 09 06:55:27 PM PDT 24 7680394156 ps
T772 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1922959871 Jul 09 06:55:21 PM PDT 24 Jul 09 06:55:28 PM PDT 24 2077331471 ps
T773 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.3471284777 Jul 09 06:56:16 PM PDT 24 Jul 09 06:56:25 PM PDT 24 2752458557 ps
T774 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.1263430488 Jul 09 06:57:00 PM PDT 24 Jul 09 06:57:04 PM PDT 24 2529820851 ps
T194 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.408284187 Jul 09 06:55:44 PM PDT 24 Jul 09 06:59:01 PM PDT 24 83316537374 ps
T775 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.4286273556 Jul 09 06:56:38 PM PDT 24 Jul 09 06:56:46 PM PDT 24 2017533944 ps
T776 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1513681910 Jul 09 06:57:54 PM PDT 24 Jul 09 06:57:57 PM PDT 24 2680311854 ps
T777 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.2096699990 Jul 09 06:56:00 PM PDT 24 Jul 09 06:56:04 PM PDT 24 3406364173 ps
T778 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.3455155234 Jul 09 06:57:06 PM PDT 24 Jul 09 06:57:10 PM PDT 24 3682307259 ps
T274 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2725943587 Jul 09 06:57:18 PM PDT 24 Jul 09 07:00:53 PM PDT 24 77209848721 ps
T779 /workspace/coverage/default/33.sysrst_ctrl_alert_test.1394263047 Jul 09 06:57:01 PM PDT 24 Jul 09 06:57:05 PM PDT 24 2039084038 ps
T780 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3623589787 Jul 09 06:58:03 PM PDT 24 Jul 09 06:59:28 PM PDT 24 62755916339 ps
T57 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.532499239 Jul 09 06:54:57 PM PDT 24 Jul 09 06:55:23 PM PDT 24 35403793060 ps
T781 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2515662987 Jul 09 06:55:01 PM PDT 24 Jul 09 06:55:09 PM PDT 24 2611559897 ps
T782 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1837810180 Jul 09 06:56:45 PM PDT 24 Jul 09 06:56:54 PM PDT 24 2486178724 ps
T783 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.477779697 Jul 09 06:56:05 PM PDT 24 Jul 09 06:56:08 PM PDT 24 2502252050 ps
T371 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.24891408 Jul 09 06:57:22 PM PDT 24 Jul 09 06:57:46 PM PDT 24 111715309291 ps
T784 /workspace/coverage/default/7.sysrst_ctrl_stress_all.2791660603 Jul 09 06:55:17 PM PDT 24 Jul 09 06:55:22 PM PDT 24 6823022155 ps
T785 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1875721281 Jul 09 06:56:05 PM PDT 24 Jul 09 06:56:14 PM PDT 24 2795716968 ps
T30 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3154241597 Jul 09 06:52:32 PM PDT 24 Jul 09 06:52:44 PM PDT 24 2910784326 ps
T285 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_errors.2054315041 Jul 09 06:53:11 PM PDT 24 Jul 09 06:53:16 PM PDT 24 2363130505 ps
T31 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.4106533505 Jul 09 06:53:04 PM PDT 24 Jul 09 06:53:39 PM PDT 24 42482864970 ps
T286 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.3717648730 Jul 09 06:53:05 PM PDT 24 Jul 09 06:53:08 PM PDT 24 2294403100 ps
T32 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2072679042 Jul 09 06:53:21 PM PDT 24 Jul 09 06:53:26 PM PDT 24 2099895898 ps
T786 /workspace/coverage/cover_reg_top/9.sysrst_ctrl_intr_test.303993906 Jul 09 06:53:09 PM PDT 24 Jul 09 06:53:16 PM PDT 24 2012552088 ps
T787 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.4278680884 Jul 09 06:53:33 PM PDT 24 Jul 09 06:53:40 PM PDT 24 2014091361 ps
T18 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.3372466985 Jul 09 06:52:38 PM PDT 24 Jul 09 06:53:02 PM PDT 24 7142764011 ps
T19 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.570228984 Jul 09 06:53:17 PM PDT 24 Jul 09 06:53:20 PM PDT 24 5133534736 ps
T788 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.2712602874 Jul 09 06:53:36 PM PDT 24 Jul 09 06:53:41 PM PDT 24 2013108366 ps
T20 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2672974663 Jul 09 06:53:22 PM PDT 24 Jul 09 06:53:37 PM PDT 24 4670426541 ps
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