Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.62	98.75	96.76	100.00	95.51	98.23	99.33	87.78

Total tests in report: 904

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
58.12	58.12	77.44	77.44	66.38	66.38	90.98	90.98	11.54	11.54	78.30	78.30	67.15	67.15	15.07	15.07	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3284904450
72.03	13.90	89.42	11.98	81.42	15.04	94.52	3.54	46.15	34.62	90.17	11.87	83.72	16.57	18.78	3.71	/workspace/coverage/default/21.sysrst_ctrl_stress_all.1051398426
81.01	8.99	94.78	5.36	88.55	7.13	95.89	1.37	60.90	14.74	94.64	4.47	89.60	5.88	42.73	23.95	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.4235502307
84.82	3.80	95.84	1.06	89.33	0.78	96.12	0.23	68.59	7.69	95.49	0.85	92.10	2.50	56.24	13.51	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1206109126
86.40	1.58	96.23	0.39	89.84	0.51	96.58	0.46	71.15	2.56	95.86	0.37	93.45	1.35	61.68	5.44	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.343383607
87.79	1.39	97.03	0.80	92.01	2.17	96.58	0.00	76.92	5.77	96.67	0.81	93.64	0.19	61.68	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2012709198
89.07	1.28	97.11	0.07	93.25	1.24	97.26	0.68	76.92	0.00	96.78	0.11	93.64	0.00	68.51	6.84	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_intg_err.4106533505
90.21	1.14	97.46	0.35	93.68	0.43	97.26	0.00	80.13	3.21	97.04	0.26	94.89	1.25	70.99	2.48	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3220620631
90.89	0.68	97.54	0.07	94.06	0.38	97.26	0.00	80.77	0.64	97.12	0.07	95.28	0.39	74.22	3.23	/workspace/coverage/default/40.sysrst_ctrl_stress_all.1800142698
91.36	0.47	97.56	0.02	94.06	0.00	97.26	0.00	80.77	0.00	97.15	0.04	96.63	1.35	76.10	1.88	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3511449570
91.72	0.36	97.67	0.11	94.14	0.08	97.26	0.00	82.69	1.92	97.26	0.11	96.92	0.29	76.10	0.00	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1082412638
92.07	0.35	97.72	0.06	94.26	0.13	97.26	0.00	82.69	0.00	97.26	0.00	96.92	0.00	78.36	2.26	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1310215148
92.41	0.34	98.04	0.32	94.59	0.33	98.17	0.91	82.69	0.00	97.41	0.15	97.40	0.48	78.58	0.22	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3767966889
92.71	0.30	98.10	0.06	94.59	0.00	98.17	0.00	84.62	1.92	97.52	0.11	97.40	0.00	78.58	0.00	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.4280024220
93.00	0.28	98.10	0.00	94.62	0.03	99.77	1.60	84.62	0.00	97.52	0.00	97.50	0.10	78.85	0.27	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1777636335
93.26	0.27	98.19	0.09	94.64	0.03	99.77	0.00	85.26	0.64	97.56	0.04	97.59	0.10	79.82	0.97	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2472494526
93.48	0.22	98.23	0.04	94.69	0.05	99.77	0.00	86.54	1.28	97.63	0.07	97.69	0.10	79.82	0.00	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.3536497398
93.70	0.22	98.25	0.02	94.74	0.05	99.77	0.00	87.82	1.28	97.67	0.04	97.78	0.10	79.87	0.05	/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.173056770
93.92	0.22	98.30	0.06	94.77	0.03	99.77	0.00	89.10	1.28	97.74	0.07	97.88	0.10	79.87	0.00	/workspace/coverage/default/19.sysrst_ctrl_stress_all.2008765017
94.14	0.22	98.36	0.06	94.79	0.03	99.77	0.00	90.38	1.28	97.82	0.07	97.98	0.10	79.87	0.00	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2108623924
94.34	0.20	98.36	0.00	94.79	0.00	99.77	0.00	90.38	0.00	97.82	0.00	97.98	0.00	81.27	1.40	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2304498702
94.50	0.16	98.40	0.04	95.12	0.33	99.77	0.00	91.03	0.64	97.86	0.04	98.07	0.10	81.27	0.00	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1825159244
94.64	0.14	98.40	0.00	95.22	0.10	99.77	0.00	91.03	0.00	97.86	0.00	98.75	0.67	81.49	0.22	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3154241597
94.78	0.14	98.41	0.02	95.25	0.03	99.77	0.00	91.03	0.00	97.86	0.00	98.75	0.00	82.40	0.91	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4209737184
94.92	0.14	98.41	0.00	95.93	0.68	99.77	0.00	91.03	0.00	97.86	0.00	98.75	0.00	82.67	0.27	/workspace/coverage/cover_reg_top/7.sysrst_ctrl_tl_errors.3717648730
95.05	0.13	98.45	0.04	95.96	0.03	99.77	0.00	91.67	0.64	97.89	0.04	98.84	0.10	82.78	0.11	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4193934373
95.19	0.13	98.47	0.02	95.98	0.03	99.77	0.00	92.31	0.64	97.93	0.04	98.84	0.00	82.99	0.22	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1084463314
95.30	0.12	98.51	0.04	96.01	0.03	99.77	0.00	92.95	0.64	97.97	0.04	98.94	0.10	82.99	0.00	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.1849253934
95.42	0.12	98.54	0.04	96.03	0.03	99.77	0.00	93.59	0.64	98.00	0.04	99.04	0.10	82.99	0.00	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3545731160
95.54	0.12	98.58	0.04	96.06	0.03	99.77	0.00	94.23	0.64	98.04	0.04	99.13	0.10	82.99	0.00	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.105861420
95.65	0.11	98.58	0.00	96.06	0.00	99.77	0.00	94.23	0.00	98.04	0.00	99.13	0.00	83.75	0.75	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1334884184
95.76	0.11	98.60	0.02	96.06	0.00	99.77	0.00	94.87	0.64	98.08	0.04	99.13	0.00	83.80	0.05	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3147688054
95.87	0.11	98.62	0.02	96.06	0.00	99.77	0.00	95.51	0.64	98.11	0.04	99.13	0.00	83.85	0.05	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3098806922
95.95	0.09	98.62	0.00	96.08	0.03	99.77	0.00	95.51	0.00	98.11	0.00	99.23	0.10	84.34	0.48	/workspace/coverage/default/17.sysrst_ctrl_stress_all.76414121
96.01	0.06	98.62	0.00	96.08	0.00	99.77	0.00	95.51	0.00	98.11	0.00	99.23	0.00	84.77	0.43	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.247746871
96.07	0.05	98.62	0.00	96.08	0.00	99.77	0.00	95.51	0.00	98.11	0.00	99.23	0.00	85.15	0.38	/workspace/coverage/default/0.sysrst_ctrl_stress_all.316529972
96.12	0.05	98.62	0.00	96.08	0.00	99.77	0.00	95.51	0.00	98.11	0.00	99.23	0.00	85.52	0.38	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1734883706
96.17	0.05	98.68	0.06	96.16	0.08	100.00	0.23	95.51	0.00	98.11	0.00	99.23	0.00	85.52	0.00	/workspace/coverage/default/10.sysrst_ctrl_alert_test.3087743769
96.22	0.05	98.71	0.04	96.31	0.15	100.00	0.00	95.51	0.00	98.19	0.07	99.33	0.10	85.52	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1138941888
96.27	0.04	98.71	0.00	96.61	0.30	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	85.52	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2209938596
96.31	0.04	98.71	0.00	96.61	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	85.79	0.27	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3521929998
96.34	0.03	98.71	0.00	96.61	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	86.01	0.22	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.266881498
96.37	0.03	98.71	0.00	96.61	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	86.22	0.22	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2565452882
96.39	0.03	98.71	0.00	96.64	0.03	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	86.38	0.16	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2725943587
96.42	0.02	98.71	0.00	96.64	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	86.54	0.16	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3354256485
96.44	0.02	98.71	0.00	96.64	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	86.71	0.16	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1502495250
96.46	0.02	98.71	0.00	96.66	0.03	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	86.81	0.11	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2791918371
96.47	0.02	98.71	0.00	96.66	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	86.92	0.11	/workspace/coverage/cover_reg_top/8.sysrst_ctrl_tl_intg_err.1041727197
96.49	0.02	98.71	0.00	96.66	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	87.03	0.11	/workspace/coverage/default/15.sysrst_ctrl_stress_all.4138117233
96.51	0.02	98.71	0.00	96.66	0.00	100.00	0.00	95.51	0.00	98.19	0.00	99.33	0.00	87.14	0.11	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2910241781
96.52	0.01	98.75	0.04	96.69	0.03	100.00	0.00	95.51	0.00	98.23	0.04	99.33	0.00	87.14	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.532499239
96.53	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.19	0.05	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1671179078
96.54	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.24	0.05	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.883686068
96.54	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.30	0.05	/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1160485270
96.55	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.35	0.05	/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2494485881
96.56	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.41	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.4115205808
96.57	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.46	0.05	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.254408094
96.57	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.51	0.05	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3750085448
96.58	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.57	0.05	/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3630864966
96.59	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.62	0.05	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1502368305
96.60	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.67	0.05	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.1817589986
96.60	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.73	0.05	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.364121255
96.61	0.01	98.75	0.00	96.69	0.00	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.78	0.05	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3679607587
96.62	0.01	98.75	0.00	96.71	0.03	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.78	0.00	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.3745436618
96.62	0.01	98.75	0.00	96.74	0.03	100.00	0.00	95.51	0.00	98.23	0.00	99.33	0.00	87.78	0.00	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.663035283

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1253466983
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1915520717
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.2179126635
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1883348390
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.4276273659
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.143228355
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1409013005
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1894708769
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1794939304
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1935260324
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.495618615
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1158854503
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.1637526860
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.254751988
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1166394595
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2356525083
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3299367242
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1523351311
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1796892079
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1404304671
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.2208686115
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2479121265
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1379615689
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.570228984
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.400907136
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3125350972
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.2947086138
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.25532612
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1101194902
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3637424413
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2640712488
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2072679042
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3791696759
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.793639269
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.292527649
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2779416466
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1337477987
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2387113184
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.1585921418
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3844214041
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.2672974663
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.1479073245
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.4016253864
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.713196324
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4263954786
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2809390426
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1160615778
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1037647775
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.3766661038
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3759989471
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1199517886
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.4278680884
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.3004634451
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2526804074
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2376781717
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2553459836
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/workspace/coverage/default/40.sysrst_ctrl_alert_test.4134531453
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1330401586
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2786273866
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3674186033
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3632561364
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1375612607
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.952134044
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2611561406
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1338588834
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1126010038
/workspace/coverage/default/40.sysrst_ctrl_smoke.947434549
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3716875070
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.864898517
/workspace/coverage/default/41.sysrst_ctrl_alert_test.2983659561
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1611014965
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3958330715
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3889958698
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.310935873
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1656224475
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.1383138205
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.350625187
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3005571168
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3053459695
/workspace/coverage/default/41.sysrst_ctrl_smoke.769284615
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2572586779
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3776285090
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2668146513
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.4018878339
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1495470114
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.3868862069
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1871122919
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.3655361825
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.956061950
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.964818798
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.506360864
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.259982751
/workspace/coverage/default/42.sysrst_ctrl_smoke.1425497271
/workspace/coverage/default/42.sysrst_ctrl_stress_all.773668725
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.584840840
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4184599066
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3175438980
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.1595167993
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2778121870
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3309810892
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.900995181
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3813649520
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2458632567
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2388099298
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4246359090
/workspace/coverage/default/43.sysrst_ctrl_smoke.3364403020
/workspace/coverage/default/43.sysrst_ctrl_stress_all.54789734
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.807029641
/workspace/coverage/default/44.sysrst_ctrl_alert_test.808690748
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3393574663
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2930890985
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2127380816
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3930592571
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.72616659
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1678433356
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1370889361
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3076692545
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.737938847
/workspace/coverage/default/44.sysrst_ctrl_smoke.1309845213
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1015312779
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1692508105
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2224618489
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2648450568
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3591902218
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.949512898
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4272271675
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3869577872
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2507804617
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.552770916
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.43947153
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.4141634212
/workspace/coverage/default/45.sysrst_ctrl_smoke.3532590077
/workspace/coverage/default/45.sysrst_ctrl_stress_all.999171722
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3405588338
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3523365572
/workspace/coverage/default/46.sysrst_ctrl_alert_test.2152528340
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2510672127
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3397053036
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1155398885
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4263918125
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2125843765
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2376933219
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.214589721
/workspace/coverage/default/46.sysrst_ctrl_smoke.207349199
/workspace/coverage/default/46.sysrst_ctrl_stress_all.2317605463
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.196108711
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2242151228
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2618572283
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3322413744
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2371875502
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2683533806
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.2598344081
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3819997080
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1989580647
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3148548616
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4179362448
/workspace/coverage/default/47.sysrst_ctrl_smoke.1088301840
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1352768333
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2111357679
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1067456382
/workspace/coverage/default/48.sysrst_ctrl_alert_test.698215630
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.3601473404
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2261941940
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4101403369
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1496445240
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4219341247
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1513681910
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1876766216
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.640889205
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.590503936
/workspace/coverage/default/48.sysrst_ctrl_smoke.1318040400
/workspace/coverage/default/48.sysrst_ctrl_stress_all.134352472
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2149642865
/workspace/coverage/default/49.sysrst_ctrl_alert_test.506451341
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1284232538
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1604962233
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3918351185
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2813567908
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1126552381
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3185107547
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1810795279
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3984445399
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1396208078
/workspace/coverage/default/49.sysrst_ctrl_smoke.2213030945
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3194313735
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3001759542
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1263178830
/workspace/coverage/default/5.sysrst_ctrl_alert_test.789784298
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.936780115
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3773717215
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3590471691
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1373554973
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2203738630
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1945720647
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2007132766
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.90892508
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1754205657
/workspace/coverage/default/5.sysrst_ctrl_smoke.1973049318
/workspace/coverage/default/5.sysrst_ctrl_stress_all.859190427
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3377038687
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3123323415
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1970224647
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3623589787
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3573672490
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2521293875
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3981396919
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.155089018
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2450404906
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.209222337
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.1470109177
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3198494581
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2343924517
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3914440000
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1676506730
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2236307885
/workspace/coverage/default/6.sysrst_ctrl_smoke.3738089756
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2804042466
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3211270954
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.866051839
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3234401568
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1876237605
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.543778857
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.649384003
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.3263119711
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3903710732
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1152845331
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.988820406
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.4014871380
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.406018968
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1643908011
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3123404194
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2433861500
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.824551145
/workspace/coverage/default/7.sysrst_ctrl_smoke.4218939066
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2791660603
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.905877951
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2783973384
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3257617062
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.3547842391
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3867494020
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1865979402
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1819365246
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2554398639
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2226082366
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3013958613
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1774805708
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.146509011
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2197906386
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1735876613
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.24678522
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1989233617
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1922959871
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1859994884
/workspace/coverage/default/8.sysrst_ctrl_smoke.4023918126
/workspace/coverage/default/8.sysrst_ctrl_stress_all.1671379275
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.402046114
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.77999887
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.755744767
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4152476551
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.2828118883
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3734535507
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2492027237
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.831532460
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1505338687
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3358793339
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3734394664
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1041476781
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3492071784
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1637058308
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1991269396
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2155005591
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3344355471
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1819328701
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1750986756
/workspace/coverage/default/9.sysrst_ctrl_smoke.3743169925
/workspace/coverage/default/9.sysrst_ctrl_stress_all.966932296
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1941575948
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2792143751
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2084975563
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.435299489
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1299458841
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.790841989
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2936040537
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2457549211
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.968626682
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2762725791

Total test records in report: 904

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1643908011	Jul 09 06:55:17 PM PDT 24	Jul 09 06:55:21 PM PDT 24	2618930079 ps
T5	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.1383073968	Jul 09 06:56:35 PM PDT 24	Jul 09 06:56:44 PM PDT 24	4280865818 ps
T1	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.237572094	Jul 09 06:56:01 PM PDT 24	Jul 09 06:56:09 PM PDT 24	4799388396 ps
T2	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3284904450	Jul 09 06:57:48 PM PDT 24	Jul 09 06:59:49 PM PDT 24	47133882582 ps
T3	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1735876613	Jul 09 06:55:23 PM PDT 24	Jul 09 06:55:27 PM PDT 24	2770562393 ps
T13	/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2875417208	Jul 09 06:56:14 PM PDT 24	Jul 09 06:56:17 PM PDT 24	2180922807 ps
T14	/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2832269145	Jul 09 06:57:20 PM PDT 24	Jul 09 06:57:23 PM PDT 24	3951647686 ps
T6	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.141879760	Jul 09 06:56:38 PM PDT 24	Jul 09 06:59:37 PM PDT 24	132889498317 ps
T15	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2556626748	Jul 09 06:56:46 PM PDT 24	Jul 09 06:56:50 PM PDT 24	2622981208 ps
T7	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.1889084014	Jul 09 06:55:36 PM PDT 24	Jul 09 06:55:40 PM PDT 24	4512834539 ps
T16	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2376933219	Jul 09 06:57:43 PM PDT 24	Jul 09 06:57:51 PM PDT 24	2239197269 ps
T17	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.3767966889	Jul 09 06:56:35 PM PDT 24	Jul 09 06:56:40 PM PDT 24	2530731502 ps
T29	/workspace/coverage/default/33.sysrst_ctrl_stress_all.1001435141	Jul 09 06:56:56 PM PDT 24	Jul 09 06:57:33 PM PDT 24	21040290786 ps
T8	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.282503540	Jul 09 06:56:25 PM PDT 24	Jul 09 06:56:29 PM PDT 24	3251592885 ps
T51	/workspace/coverage/default/20.sysrst_ctrl_alert_test.1336337226	Jul 09 06:56:08 PM PDT 24	Jul 09 06:56:11 PM PDT 24	2038609069 ps
T9	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1334884184	Jul 09 06:55:22 PM PDT 24	Jul 09 07:00:58 PM PDT 24	136995984940 ps
T93	/workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2494485881	Jul 09 06:55:33 PM PDT 24	Jul 09 06:55:41 PM PDT 24	2092897483 ps
T94	/workspace/coverage/default/43.sysrst_ctrl_alert_test.3175438980	Jul 09 06:57:38 PM PDT 24	Jul 09 06:57:41 PM PDT 24	2032810988 ps
T10	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.4184599066	Jul 09 06:57:33 PM PDT 24	Jul 09 06:57:38 PM PDT 24	2807824780 ps
T11	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1375612607	Jul 09 06:57:26 PM PDT 24	Jul 09 06:57:32 PM PDT 24	2492080596 ps
T95	/workspace/coverage/default/4.sysrst_ctrl_alert_test.1147893848	Jul 09 06:55:14 PM PDT 24	Jul 09 06:55:18 PM PDT 24	2038877259 ps
T12	/workspace/coverage/default/26.sysrst_ctrl_stress_all.4224046798	Jul 09 06:56:34 PM PDT 24	Jul 09 06:56:47 PM PDT 24	7567885956 ps
T25	/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.846550724	Jul 09 06:55:14 PM PDT 24	Jul 09 06:55:22 PM PDT 24	2514117570 ps
T27	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.155089018	Jul 09 06:58:01 PM PDT 24	Jul 09 06:58:19 PM PDT 24	26344313930 ps
T61	/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2683533806	Jul 09 06:57:49 PM PDT 24	Jul 09 06:57:56 PM PDT 24	4207910290 ps
T21	/workspace/coverage/default/21.sysrst_ctrl_stress_all.1051398426	Jul 09 06:56:13 PM PDT 24	Jul 09 07:03:10 PM PDT 24	1637621861446 ps
T132	/workspace/coverage/default/28.sysrst_ctrl_alert_test.1348326569	Jul 09 06:56:40 PM PDT 24	Jul 09 06:56:45 PM PDT 24	2020369628 ps
T58	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.1647645979	Jul 09 06:55:44 PM PDT 24	Jul 09 06:55:54 PM PDT 24	12757793806 ps
T33	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.146560140	Jul 09 06:54:52 PM PDT 24	Jul 09 06:54:59 PM PDT 24	2414618198 ps
T62	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.3905564275	Jul 09 06:56:06 PM PDT 24	Jul 09 06:56:10 PM PDT 24	3911623580 ps
T133	/workspace/coverage/default/45.sysrst_ctrl_smoke.3532590077	Jul 09 06:57:41 PM PDT 24	Jul 09 06:57:43 PM PDT 24	2161573759 ps
T71	/workspace/coverage/default/44.sysrst_ctrl_stress_all.1015312779	Jul 09 06:57:38 PM PDT 24	Jul 09 06:57:59 PM PDT 24	6526520016 ps
T72	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.3526098146	Jul 09 06:56:24 PM PDT 24	Jul 09 06:56:29 PM PDT 24	2518570100 ps
T134	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.452200815	Jul 09 06:56:47 PM PDT 24	Jul 09 06:56:51 PM PDT 24	2252898890 ps
T63	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3776285090	Jul 09 06:57:30 PM PDT 24	Jul 09 06:57:34 PM PDT 24	11593283938 ps
T28	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.1299458841	Jul 09 06:58:13 PM PDT 24	Jul 09 06:58:38 PM PDT 24	35783291137 ps
T59	/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2119555119	Jul 09 06:56:16 PM PDT 24	Jul 09 06:56:22 PM PDT 24	3995862274 ps
T75	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.72616659	Jul 09 06:57:41 PM PDT 24	Jul 09 06:57:52 PM PDT 24	3365283888 ps
T262	/workspace/coverage/default/23.sysrst_ctrl_alert_test.1142218774	Jul 09 06:56:20 PM PDT 24	Jul 09 06:56:27 PM PDT 24	2011414590 ps
T41	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1502368305	Jul 09 06:57:58 PM PDT 24	Jul 09 06:59:12 PM PDT 24	113076859778 ps
T60	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3123323415	Jul 09 06:55:12 PM PDT 24	Jul 09 06:55:22 PM PDT 24	5774583770 ps
T73	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2236307885	Jul 09 06:55:22 PM PDT 24	Jul 09 06:55:27 PM PDT 24	2530915975 ps
T64	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2885561033	Jul 09 06:55:32 PM PDT 24	Jul 09 06:55:38 PM PDT 24	7987597521 ps
T74	/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.180264963	Jul 09 06:56:14 PM PDT 24	Jul 09 06:56:18 PM PDT 24	2630234371 ps
T22	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.4235502307	Jul 09 06:56:45 PM PDT 24	Jul 09 06:59:07 PM PDT 24	245823857068 ps
T52	/workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.731464973	Jul 09 06:55:07 PM PDT 24	Jul 09 06:55:11 PM PDT 24	2638713833 ps
T42	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2021388537	Jul 09 06:56:39 PM PDT 24	Jul 09 06:57:44 PM PDT 24	89342813237 ps
T45	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.968626682	Jul 09 06:58:09 PM PDT 24	Jul 09 06:59:16 PM PDT 24	24831368994 ps
T53	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3155119531	Jul 09 06:56:58 PM PDT 24	Jul 09 06:57:04 PM PDT 24	2888305001 ps
T54	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3148548616	Jul 09 06:57:50 PM PDT 24	Jul 09 06:57:54 PM PDT 24	2246405718 ps
T23	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3344355471	Jul 09 06:55:23 PM PDT 24	Jul 09 06:55:33 PM PDT 24	2459715914 ps
T55	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3377038687	Jul 09 06:55:12 PM PDT 24	Jul 09 06:55:44 PM PDT 24	11216995523 ps
T70	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2428779184	Jul 09 06:55:41 PM PDT 24	Jul 09 06:57:05 PM PDT 24	275575847158 ps
T46	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1188416014	Jul 09 06:55:10 PM PDT 24	Jul 09 06:55:40 PM PDT 24	44337022698 ps
T111	/workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.42708402	Jul 09 06:56:45 PM PDT 24	Jul 09 06:56:50 PM PDT 24	2618779458 ps
T112	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.1310215148	Jul 09 06:55:48 PM PDT 24	Jul 09 06:57:00 PM PDT 24	51612491037 ps
T26	/workspace/coverage/default/6.sysrst_ctrl_stress_all.2804042466	Jul 09 06:55:17 PM PDT 24	Jul 09 06:55:23 PM PDT 24	12366264835 ps
T113	/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2343924517	Jul 09 06:55:17 PM PDT 24	Jul 09 06:55:26 PM PDT 24	2609763263 ps
T24	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2111357679	Jul 09 06:57:53 PM PDT 24	Jul 09 06:59:53 PM PDT 24	50062918871 ps
T114	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.677218347	Jul 09 06:57:02 PM PDT 24	Jul 09 06:57:10 PM PDT 24	2614622436 ps
T38	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1206109126	Jul 09 06:54:50 PM PDT 24	Jul 09 06:55:41 PM PDT 24	72690727855 ps
T115	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.737938847	Jul 09 06:57:37 PM PDT 24	Jul 09 06:57:45 PM PDT 24	2514195684 ps
T77	/workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1825159244	Jul 09 06:56:19 PM PDT 24	Jul 09 06:56:28 PM PDT 24	11697884640 ps
T47	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3407097771	Jul 09 06:55:40 PM PDT 24	Jul 09 06:55:52 PM PDT 24	3740061793 ps
T65	/workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3025146546	Jul 09 06:56:16 PM PDT 24	Jul 09 06:56:21 PM PDT 24	2469064399 ps
T149	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.3688099021	Jul 09 06:55:59 PM PDT 24	Jul 09 06:56:09 PM PDT 24	2974325099 ps
T48	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2409461184	Jul 09 06:56:45 PM PDT 24	Jul 09 06:56:50 PM PDT 24	3630445025 ps
T150	/workspace/coverage/default/10.sysrst_ctrl_alert_test.3087743769	Jul 09 06:55:26 PM PDT 24	Jul 09 06:55:31 PM PDT 24	2042536941 ps
T43	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4209737184	Jul 09 06:57:59 PM PDT 24	Jul 09 07:01:30 PM PDT 24	81798827733 ps
T36	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.247746871	Jul 09 06:57:41 PM PDT 24	Jul 09 06:59:00 PM PDT 24	67844963821 ps
T49	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.4032906562	Jul 09 06:56:51 PM PDT 24	Jul 09 06:57:34 PM PDT 24	36034330380 ps
T151	/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1859994884	Jul 09 06:55:30 PM PDT 24	Jul 09 06:55:38 PM PDT 24	2510617963 ps
T50	/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1774805708	Jul 09 06:55:21 PM PDT 24	Jul 09 06:55:33 PM PDT 24	3472049665 ps
T92	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.1714494432	Jul 09 06:56:23 PM PDT 24	Jul 09 06:56:27 PM PDT 24	3745384839 ps
T237	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.846729602	Jul 09 06:56:05 PM PDT 24	Jul 09 06:56:08 PM PDT 24	3938470911 ps
T66	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2125843765	Jul 09 06:57:42 PM PDT 24	Jul 09 06:57:44 PM PDT 24	2482337695 ps
T386	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3597137760	Jul 09 06:56:44 PM PDT 24	Jul 09 06:56:49 PM PDT 24	2637209882 ps
T40	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.4265976248	Jul 09 06:55:38 PM PDT 24	Jul 09 07:07:03 PM PDT 24	536462897213 ps
T67	/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1370889361	Jul 09 06:57:38 PM PDT 24	Jul 09 06:57:47 PM PDT 24	2453937482 ps
T127	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.418760365	Jul 09 06:55:12 PM PDT 24	Jul 09 07:00:56 PM PDT 24	185962583936 ps
T387	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.862459161	Jul 09 06:56:56 PM PDT 24	Jul 09 06:57:00 PM PDT 24	3818109295 ps
T388	/workspace/coverage/default/29.sysrst_ctrl_smoke.1194944234	Jul 09 06:56:47 PM PDT 24	Jul 09 06:56:55 PM PDT 24	2108242258 ps
T34	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3354256485	Jul 09 06:54:51 PM PDT 24	Jul 09 07:02:10 PM PDT 24	181983543608 ps
T389	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.983475926	Jul 09 06:56:57 PM PDT 24	Jul 09 06:57:01 PM PDT 24	2150496508 ps
T390	/workspace/coverage/default/23.sysrst_ctrl_smoke.2212752635	Jul 09 06:56:16 PM PDT 24	Jul 09 06:56:25 PM PDT 24	2110914026 ps
T391	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2510672127	Jul 09 06:57:45 PM PDT 24	Jul 09 06:57:51 PM PDT 24	3425549260 ps
T385	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2399324947	Jul 09 06:56:15 PM PDT 24	Jul 09 06:56:19 PM PDT 24	2520459747 ps
T37	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.343383607	Jul 09 06:55:18 PM PDT 24	Jul 09 06:56:46 PM PDT 24	623545469136 ps
T322	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.3679480148	Jul 09 06:56:29 PM PDT 24	Jul 09 06:56:37 PM PDT 24	2514460412 ps
T68	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.153174630	Jul 09 06:55:39 PM PDT 24	Jul 09 06:55:49 PM PDT 24	26127201803 ps
T129	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.807029641	Jul 09 06:57:38 PM PDT 24	Jul 09 06:57:44 PM PDT 24	4145060193 ps
T323	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2291600985	Jul 09 06:54:53 PM PDT 24	Jul 09 06:55:04 PM PDT 24	3276098988 ps
T125	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.4037421693	Jul 09 06:55:07 PM PDT 24	Jul 09 06:55:15 PM PDT 24	2410099547 ps
T130	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1203023130	Jul 09 06:56:15 PM PDT 24	Jul 09 06:56:22 PM PDT 24	7747191435 ps
T87	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1263178830	Jul 09 06:57:58 PM PDT 24	Jul 09 06:58:02 PM PDT 24	6111859202 ps
T69	/workspace/coverage/default/27.sysrst_ctrl_stress_all.79547293	Jul 09 06:56:36 PM PDT 24	Jul 09 06:56:47 PM PDT 24	9673938059 ps
T128	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.2141084089	Jul 09 06:56:48 PM PDT 24	Jul 09 06:57:59 PM PDT 24	131445630702 ps
T79	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2108623924	Jul 09 06:55:11 PM PDT 24	Jul 09 06:55:22 PM PDT 24	3570901220 ps
T184	/workspace/coverage/default/27.sysrst_ctrl_alert_test.647504707	Jul 09 06:56:48 PM PDT 24	Jul 09 06:56:55 PM PDT 24	2015108167 ps
T135	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.864898517	Jul 09 06:57:26 PM PDT 24	Jul 09 07:03:19 PM PDT 24	2676958232088 ps
T185	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.389419620	Jul 09 06:55:50 PM PDT 24	Jul 09 06:56:00 PM PDT 24	2508903714 ps
T186	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.179881383	Jul 09 06:54:48 PM PDT 24	Jul 09 06:54:57 PM PDT 24	2248312085 ps
T187	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3380479627	Jul 09 06:55:41 PM PDT 24	Jul 09 06:55:51 PM PDT 24	2474316579 ps
T188	/workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.705007610	Jul 09 06:55:49 PM PDT 24	Jul 09 06:55:54 PM PDT 24	2629679245 ps
T189	/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2737114517	Jul 09 06:55:06 PM PDT 24	Jul 09 06:55:13 PM PDT 24	2131850319 ps
T190	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1637058308	Jul 09 06:55:21 PM PDT 24	Jul 09 06:55:26 PM PDT 24	3576550861 ps
T191	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.2998010337	Jul 09 06:55:29 PM PDT 24	Jul 09 06:55:34 PM PDT 24	3272671287 ps
T39	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4219341247	Jul 09 06:58:04 PM PDT 24	Jul 09 07:03:08 PM PDT 24	866700890941 ps
T392	/workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1433273986	Jul 09 06:56:58 PM PDT 24	Jul 09 06:57:02 PM PDT 24	2473022591 ps
T310	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3001759542	Jul 09 06:58:00 PM PDT 24	Jul 09 06:58:34 PM PDT 24	28928155494 ps
T393	/workspace/coverage/default/14.sysrst_ctrl_smoke.2088179220	Jul 09 06:55:44 PM PDT 24	Jul 09 06:55:50 PM PDT 24	2121003454 ps
T394	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1514386756	Jul 09 06:56:15 PM PDT 24	Jul 09 06:56:19 PM PDT 24	3439331723 ps
T44	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.831532460	Jul 09 06:58:09 PM PDT 24	Jul 09 06:58:39 PM PDT 24	45035952842 ps
T88	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.905877951	Jul 09 06:55:17 PM PDT 24	Jul 09 06:55:26 PM PDT 24	5335800207 ps
T35	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2762725791	Jul 09 06:58:12 PM PDT 24	Jul 09 06:59:35 PM PDT 24	31054610578 ps
T395	/workspace/coverage/default/43.sysrst_ctrl_smoke.3364403020	Jul 09 06:57:32 PM PDT 24	Jul 09 06:57:35 PM PDT 24	2127314165 ps
T396	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.4195827777	Jul 09 06:57:13 PM PDT 24	Jul 09 06:57:18 PM PDT 24	2473998598 ps
T397	/workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.954511904	Jul 09 06:56:19 PM PDT 24	Jul 09 06:56:23 PM PDT 24	2484963260 ps
T398	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.205214894	Jul 09 06:57:12 PM PDT 24	Jul 09 06:57:20 PM PDT 24	2510466987 ps
T399	/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2155005591	Jul 09 06:55:22 PM PDT 24	Jul 09 06:55:27 PM PDT 24	2639359731 ps
T263	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3773717215	Jul 09 06:55:11 PM PDT 24	Jul 09 06:55:43 PM PDT 24	45389547150 ps
T400	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3076692545	Jul 09 06:57:37 PM PDT 24	Jul 09 06:57:45 PM PDT 24	2072417328 ps
T76	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3220620631	Jul 09 06:56:16 PM PDT 24	Jul 09 06:56:43 PM PDT 24	38653629541 ps
T401	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1678433356	Jul 09 06:57:39 PM PDT 24	Jul 09 06:57:45 PM PDT 24	2622895455 ps
T402	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1871122919	Jul 09 06:57:32 PM PDT 24	Jul 09 06:57:44 PM PDT 24	3301770496 ps
T403	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.2888045546	Jul 09 06:57:08 PM PDT 24	Jul 09 06:57:12 PM PDT 24	2632055390 ps
T404	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.4164364082	Jul 09 06:55:01 PM PDT 24	Jul 09 06:55:04 PM PDT 24	2484277700 ps
T405	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.240107725	Jul 09 06:57:19 PM PDT 24	Jul 09 06:57:22 PM PDT 24	2770908893 ps
T406	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3603218431	Jul 09 06:56:39 PM PDT 24	Jul 09 06:56:43 PM PDT 24	2477385511 ps
T407	/workspace/coverage/default/13.sysrst_ctrl_smoke.77006551	Jul 09 06:55:40 PM PDT 24	Jul 09 06:55:43 PM PDT 24	2160498491 ps
T408	/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3550033113	Jul 09 06:56:43 PM PDT 24	Jul 09 06:56:50 PM PDT 24	3416784429 ps
T96	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1970224647	Jul 09 06:57:58 PM PDT 24	Jul 09 06:58:26 PM PDT 24	62988947428 ps
T97	/workspace/coverage/default/7.sysrst_ctrl_combo_detect.988820406	Jul 09 06:55:16 PM PDT 24	Jul 09 06:56:09 PM PDT 24	19508293580 ps
T268	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1033263352	Jul 09 06:56:13 PM PDT 24	Jul 09 06:56:16 PM PDT 24	2534290732 ps
T126	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3573672490	Jul 09 06:58:00 PM PDT 24	Jul 09 06:59:24 PM PDT 24	69557603875 ps
T269	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1523478613	Jul 09 06:57:28 PM PDT 24	Jul 09 06:57:39 PM PDT 24	3539546279 ps
T157	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.1656224475	Jul 09 06:57:25 PM PDT 24	Jul 09 06:57:30 PM PDT 24	4631266159 ps
T161	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1029726922	Jul 09 06:56:04 PM PDT 24	Jul 09 06:56:30 PM PDT 24	39968207184 ps
T270	/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1198115562	Jul 09 06:55:07 PM PDT 24	Jul 09 06:55:11 PM PDT 24	2481884241 ps
T271	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.964818798	Jul 09 06:57:32 PM PDT 24	Jul 09 06:57:38 PM PDT 24	2463348241 ps
T272	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.647566130	Jul 09 06:56:26 PM PDT 24	Jul 09 06:56:29 PM PDT 24	2487114071 ps
T89	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.196108711	Jul 09 06:57:51 PM PDT 24	Jul 09 06:57:54 PM PDT 24	12661816453 ps
T98	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2576145459	Jul 09 06:55:12 PM PDT 24	Jul 09 06:55:23 PM PDT 24	25295908615 ps
T136	/workspace/coverage/default/38.sysrst_ctrl_smoke.3579421333	Jul 09 06:57:17 PM PDT 24	Jul 09 06:57:24 PM PDT 24	2108370937 ps
T137	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1810795279	Jul 09 06:57:53 PM PDT 24	Jul 09 06:57:56 PM PDT 24	2502216751 ps
T138	/workspace/coverage/default/27.sysrst_ctrl_smoke.38994290	Jul 09 06:56:35 PM PDT 24	Jul 09 06:56:41 PM PDT 24	2124769607 ps
T139	/workspace/coverage/default/25.sysrst_ctrl_smoke.3137861545	Jul 09 06:56:26 PM PDT 24	Jul 09 06:56:29 PM PDT 24	2131479386 ps
T140	/workspace/coverage/default/8.sysrst_ctrl_smoke.4023918126	Jul 09 06:55:22 PM PDT 24	Jul 09 06:55:28 PM PDT 24	2117173699 ps
T141	/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4246359090	Jul 09 06:57:37 PM PDT 24	Jul 09 06:57:40 PM PDT 24	2551882117 ps
T142	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2611561406	Jul 09 06:57:28 PM PDT 24	Jul 09 06:57:34 PM PDT 24	2458454104 ps
T143	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2756697695	Jul 09 06:55:37 PM PDT 24	Jul 09 06:59:03 PM PDT 24	154604233886 ps
T256	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2226082366	Jul 09 06:58:12 PM PDT 24	Jul 09 07:01:52 PM PDT 24	91412943864 ps
T257	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.473195176	Jul 09 06:54:52 PM PDT 24	Jul 09 06:57:56 PM PDT 24	71418694875 ps
T258	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1895013277	Jul 09 06:56:18 PM PDT 24	Jul 09 06:57:16 PM PDT 24	42827499247 ps
T99	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1411728466	Jul 09 06:56:04 PM PDT 24	Jul 09 06:56:50 PM PDT 24	29161773313 ps
T279	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.2653700291	Jul 09 06:55:40 PM PDT 24	Jul 09 06:57:46 PM PDT 24	96192374703 ps
T409	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3819997080	Jul 09 06:57:49 PM PDT 24	Jul 09 06:57:54 PM PDT 24	2613314490 ps
T410	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3930592571	Jul 09 06:57:37 PM PDT 24	Jul 09 06:57:49 PM PDT 24	4484169523 ps
T131	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.1255138261	Jul 09 06:56:31 PM PDT 24	Jul 09 06:56:36 PM PDT 24	6430979728 ps
T287	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1777636335	Jul 09 06:54:51 PM PDT 24	Jul 09 06:55:48 PM PDT 24	42020920885 ps
T100	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2472494526	Jul 09 06:57:07 PM PDT 24	Jul 09 06:58:56 PM PDT 24	84408497393 ps
T305	/workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2758722516	Jul 09 06:56:58 PM PDT 24	Jul 09 06:57:04 PM PDT 24	3294804796 ps
T306	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.3714427906	Jul 09 06:55:55 PM PDT 24	Jul 09 06:55:59 PM PDT 24	2630364179 ps
T307	/workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.12401367	Jul 09 06:56:05 PM PDT 24	Jul 09 06:56:08 PM PDT 24	9278361211 ps
T308	/workspace/coverage/default/21.sysrst_ctrl_alert_test.4201986624	Jul 09 06:56:16 PM PDT 24	Jul 09 06:56:22 PM PDT 24	2012442468 ps
T169	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.2600493099	Jul 09 06:55:53 PM PDT 24	Jul 09 06:56:02 PM PDT 24	2538911214 ps
T254	/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3257617062	Jul 09 06:58:04 PM PDT 24	Jul 09 06:58:30 PM PDT 24	36752350843 ps
T309	/workspace/coverage/default/22.sysrst_ctrl_smoke.3707912240	Jul 09 06:56:18 PM PDT 24	Jul 09 06:56:22 PM PDT 24	2137494118 ps
T101	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.579980884	Jul 09 06:55:58 PM PDT 24	Jul 09 06:57:25 PM PDT 24	32779095248 ps
T411	/workspace/coverage/default/41.sysrst_ctrl_stress_all.2572586779	Jul 09 06:57:36 PM PDT 24	Jul 09 06:57:46 PM PDT 24	13562822002 ps
T317	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1436094617	Jul 09 06:57:21 PM PDT 24	Jul 09 06:57:29 PM PDT 24	2513909455 ps
T255	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.790841989	Jul 09 06:58:09 PM PDT 24	Jul 09 06:59:12 PM PDT 24	23081261864 ps
T347	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2304498702	Jul 09 06:55:18 PM PDT 24	Jul 09 06:56:10 PM PDT 24	78425615775 ps
T196	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.1755823425	Jul 09 06:55:48 PM PDT 24	Jul 09 06:56:02 PM PDT 24	4024967793 ps
T412	/workspace/coverage/default/47.sysrst_ctrl_smoke.1088301840	Jul 09 06:57:49 PM PDT 24	Jul 09 06:57:53 PM PDT 24	2137427662 ps
T413	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2011690898	Jul 09 06:55:31 PM PDT 24	Jul 09 06:55:35 PM PDT 24	4737774281 ps
T414	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.29279581	Jul 09 06:55:00 PM PDT 24	Jul 09 06:55:02 PM PDT 24	2340810126 ps
T102	/workspace/coverage/default/17.sysrst_ctrl_stress_all.76414121	Jul 09 06:55:58 PM PDT 24	Jul 09 06:57:43 PM PDT 24	535245428154 ps
T415	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.3919003539	Jul 09 06:57:09 PM PDT 24	Jul 09 06:57:13 PM PDT 24	2064405875 ps
T416	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.2254219203	Jul 09 06:57:08 PM PDT 24	Jul 09 06:57:33 PM PDT 24	32676861488 ps
T417	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.650444779	Jul 09 06:57:25 PM PDT 24	Jul 09 06:57:27 PM PDT 24	2685171071 ps
T418	/workspace/coverage/default/45.sysrst_ctrl_alert_test.2224618489	Jul 09 06:57:48 PM PDT 24	Jul 09 06:57:53 PM PDT 24	2022309876 ps
T278	/workspace/coverage/default/0.sysrst_ctrl_stress_all.316529972	Jul 09 06:54:51 PM PDT 24	Jul 09 06:55:49 PM PDT 24	91175719384 ps
T419	/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3162051207	Jul 09 06:55:27 PM PDT 24	Jul 09 06:55:37 PM PDT 24	2611616981 ps
T178	/workspace/coverage/default/33.sysrst_ctrl_edge_detect.1253295062	Jul 09 06:56:58 PM PDT 24	Jul 09 06:57:02 PM PDT 24	4487991741 ps
T420	/workspace/coverage/default/17.sysrst_ctrl_smoke.1388388983	Jul 09 06:55:55 PM PDT 24	Jul 09 06:55:59 PM PDT 24	2129823583 ps
T421	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1686449076	Jul 09 06:55:28 PM PDT 24	Jul 09 06:55:33 PM PDT 24	2537207826 ps
T422	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2294141792	Jul 09 06:56:14 PM PDT 24	Jul 09 06:56:21 PM PDT 24	2199356007 ps
T152	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3511449570	Jul 09 06:54:59 PM PDT 24	Jul 09 06:55:40 PM PDT 24	130731218533 ps
T423	/workspace/coverage/default/39.sysrst_ctrl_stress_all.1968727002	Jul 09 06:57:28 PM PDT 24	Jul 09 06:57:54 PM PDT 24	9782641178 ps
T316	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.918457675	Jul 09 06:55:26 PM PDT 24	Jul 09 06:55:30 PM PDT 24	2466001085 ps
T162	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.1084463314	Jul 09 06:57:01 PM PDT 24	Jul 09 07:01:01 PM PDT 24	395300065514 ps
T280	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.755744767	Jul 09 06:58:09 PM PDT 24	Jul 09 07:00:14 PM PDT 24	50950627371 ps
T90	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3545731160	Jul 09 06:55:49 PM PDT 24	Jul 09 06:55:59 PM PDT 24	5684138075 ps
T424	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3309810892	Jul 09 06:57:37 PM PDT 24	Jul 09 06:57:55 PM PDT 24	5713990657 ps
T236	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.2877570249	Jul 09 06:56:55 PM PDT 24	Jul 09 06:57:03 PM PDT 24	2414713535 ps
T425	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.1813448526	Jul 09 06:55:10 PM PDT 24	Jul 09 06:55:14 PM PDT 24	2438215798 ps
T426	/workspace/coverage/default/28.sysrst_ctrl_smoke.1093463723	Jul 09 06:56:45 PM PDT 24	Jul 09 06:56:48 PM PDT 24	2168255968 ps
T288	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.79417444	Jul 09 06:54:55 PM PDT 24	Jul 09 06:55:53 PM PDT 24	22009993660 ps
T82	/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3734535507	Jul 09 06:58:11 PM PDT 24	Jul 09 07:00:32 PM PDT 24	50553183101 ps
T427	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3991632309	Jul 09 06:57:01 PM PDT 24	Jul 09 06:57:04 PM PDT 24	2093710584 ps
T428	/workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1139864705	Jul 09 06:55:49 PM PDT 24	Jul 09 06:55:56 PM PDT 24	4162987024 ps
T261	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1876237605	Jul 09 06:58:02 PM PDT 24	Jul 09 06:58:15 PM PDT 24	26609084533 ps
T311	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.1611014965	Jul 09 06:57:28 PM PDT 24	Jul 09 06:57:33 PM PDT 24	3337324021 ps
T103	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2930890985	Jul 09 06:57:38 PM PDT 24	Jul 09 06:58:08 PM PDT 24	87008007059 ps
T83	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3679607587	Jul 09 06:58:11 PM PDT 24	Jul 09 06:58:37 PM PDT 24	61652749079 ps
T429	/workspace/coverage/default/35.sysrst_ctrl_stress_all.1654217280	Jul 09 06:57:08 PM PDT 24	Jul 09 06:57:43 PM PDT 24	12788945706 ps
T430	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1006537068	Jul 09 06:54:51 PM PDT 24	Jul 09 06:54:56 PM PDT 24	2548477006 ps
T192	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.862328139	Jul 09 06:57:05 PM PDT 24	Jul 09 06:57:09 PM PDT 24	4959538478 ps
T431	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.518667084	Jul 09 06:55:27 PM PDT 24	Jul 09 06:55:38 PM PDT 24	3195899193 ps
T239	/workspace/coverage/default/47.sysrst_ctrl_stress_all.1352768333	Jul 09 06:57:53 PM PDT 24	Jul 09 06:58:03 PM PDT 24	11852935075 ps
T432	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3044727571	Jul 09 06:54:54 PM PDT 24	Jul 09 06:55:01 PM PDT 24	2622644897 ps
T433	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1528166497	Jul 09 06:55:13 PM PDT 24	Jul 09 06:55:18 PM PDT 24	2627817693 ps
T318	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1505258237	Jul 09 06:54:50 PM PDT 24	Jul 09 06:54:54 PM PDT 24	5342407382 ps
T179	/workspace/coverage/default/40.sysrst_ctrl_stress_all.1800142698	Jul 09 06:57:31 PM PDT 24	Jul 09 06:59:52 PM PDT 24	213094586974 ps
T434	/workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.785127830	Jul 09 06:56:28 PM PDT 24	Jul 09 06:56:31 PM PDT 24	3293562299 ps
T435	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.24678522	Jul 09 06:55:23 PM PDT 24	Jul 09 06:55:27 PM PDT 24	2633970637 ps
T436	/workspace/coverage/default/42.sysrst_ctrl_alert_test.2668146513	Jul 09 06:57:33 PM PDT 24	Jul 09 06:57:40 PM PDT 24	2016908595 ps
T264	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.1862760076	Jul 09 06:55:33 PM PDT 24	Jul 09 06:59:45 PM PDT 24	103584804096 ps
T437	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.952134044	Jul 09 06:57:31 PM PDT 24	Jul 09 06:57:39 PM PDT 24	2613154567 ps
T438	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1338588834	Jul 09 06:57:27 PM PDT 24	Jul 09 06:57:30 PM PDT 24	2244101991 ps
T439	/workspace/coverage/default/6.sysrst_ctrl_smoke.3738089756	Jul 09 06:55:12 PM PDT 24	Jul 09 06:55:17 PM PDT 24	2124547560 ps
T440	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.1788361825	Jul 09 06:56:35 PM PDT 24	Jul 09 06:56:41 PM PDT 24	3213946954 ps
T56	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.2012709198	Jul 09 06:54:52 PM PDT 24	Jul 09 06:55:02 PM PDT 24	40675800916 ps
T441	/workspace/coverage/default/46.sysrst_ctrl_smoke.207349199	Jul 09 06:57:44 PM PDT 24	Jul 09 06:57:47 PM PDT 24	2132885499 ps
T292	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.584840840	Jul 09 06:57:36 PM PDT 24	Jul 09 07:00:39 PM PDT 24	72210733273 ps
T378	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.883686068	Jul 09 06:54:55 PM PDT 24	Jul 09 06:56:43 PM PDT 24	160608728444 ps
T442	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.4039628670	Jul 09 06:56:32 PM PDT 24	Jul 09 06:56:41 PM PDT 24	2464277036 ps
T443	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3596555193	Jul 09 06:56:58 PM PDT 24	Jul 09 06:57:01 PM PDT 24	2772291723 ps
T444	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.4272271675	Jul 09 06:57:42 PM PDT 24	Jul 09 07:31:36 PM PDT 24	1319446020330 ps
T275	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2492027237	Jul 09 06:58:09 PM PDT 24	Jul 09 06:59:38 PM PDT 24	36011544318 ps
T445	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.883190590	Jul 09 06:55:40 PM PDT 24	Jul 09 06:55:45 PM PDT 24	2535696147 ps
T446	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4143449554	Jul 09 06:57:08 PM PDT 24	Jul 09 06:57:11 PM PDT 24	2765128532 ps
T447	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3984445399	Jul 09 06:57:55 PM PDT 24	Jul 09 06:58:03 PM PDT 24	2120731660 ps
T448	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2770579567	Jul 09 06:56:00 PM PDT 24	Jul 09 06:56:03 PM PDT 24	2538002615 ps
T383	/workspace/coverage/default/3.sysrst_ctrl_stress_all.2352095372	Jul 09 06:55:06 PM PDT 24	Jul 09 07:00:17 PM PDT 24	464918861048 ps
T449	/workspace/coverage/default/16.sysrst_ctrl_smoke.1811635154	Jul 09 06:55:49 PM PDT 24	Jul 09 06:55:56 PM PDT 24	2119371254 ps
T450	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.2151707931	Jul 09 06:56:03 PM PDT 24	Jul 09 06:56:06 PM PDT 24	4443330640 ps
T451	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.90892508	Jul 09 06:55:10 PM PDT 24	Jul 09 06:55:19 PM PDT 24	2086285217 ps
T265	/workspace/coverage/default/46.sysrst_ctrl_combo_detect.3397053036	Jul 09 06:57:49 PM PDT 24	Jul 09 07:00:36 PM PDT 24	61323901452 ps
T452	/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2458632567	Jul 09 06:57:31 PM PDT 24	Jul 09 06:57:34 PM PDT 24	2562215192 ps
T312	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.4005652194	Jul 09 06:56:01 PM PDT 24	Jul 09 06:56:33 PM PDT 24	13014740812 ps
T104	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2261941940	Jul 09 06:57:54 PM PDT 24	Jul 09 06:59:06 PM PDT 24	63991452580 ps
T453	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2433861500	Jul 09 06:55:20 PM PDT 24	Jul 09 06:55:28 PM PDT 24	2251513714 ps
T289	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.3687001348	Jul 09 06:55:06 PM PDT 24	Jul 09 06:56:04 PM PDT 24	22013225762 ps
T454	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2986960815	Jul 09 06:54:56 PM PDT 24	Jul 09 06:55:03 PM PDT 24	4512689211 ps
T351	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.266881498	Jul 09 06:55:13 PM PDT 24	Jul 09 07:01:54 PM PDT 24	163472958142 ps
T455	/workspace/coverage/default/16.sysrst_ctrl_stress_all.234359218	Jul 09 06:55:57 PM PDT 24	Jul 09 06:56:03 PM PDT 24	9383550305 ps
T456	/workspace/coverage/default/4.sysrst_ctrl_smoke.4051731299	Jul 09 06:55:08 PM PDT 24	Jul 09 06:55:11 PM PDT 24	2132638877 ps
T457	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1396208078	Jul 09 06:57:59 PM PDT 24	Jul 09 06:58:03 PM PDT 24	2534121990 ps