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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.01 99.46 96.48 100.00 98.72 98.93 99.81 92.68


Total test records in report: 910
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T490 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1374613153 Jul 12 05:52:48 PM PDT 24 Jul 12 05:52:54 PM PDT 24 2083648240 ps
T491 /workspace/coverage/default/26.sysrst_ctrl_alert_test.123655362 Jul 12 05:52:33 PM PDT 24 Jul 12 05:52:36 PM PDT 24 2032490037 ps
T492 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2369776731 Jul 12 05:52:56 PM PDT 24 Jul 12 05:53:00 PM PDT 24 2546729929 ps
T493 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.83115038 Jul 12 05:53:12 PM PDT 24 Jul 12 05:53:23 PM PDT 24 2614286100 ps
T494 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.3216644337 Jul 12 05:52:37 PM PDT 24 Jul 12 05:52:42 PM PDT 24 2766363696 ps
T189 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.232486857 Jul 12 05:52:18 PM PDT 24 Jul 12 05:52:29 PM PDT 24 2633250649 ps
T86 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1951001168 Jul 12 05:52:56 PM PDT 24 Jul 12 05:54:29 PM PDT 24 151201706991 ps
T148 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.2716254200 Jul 12 05:52:47 PM PDT 24 Jul 12 05:52:50 PM PDT 24 2532061839 ps
T149 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.1335672396 Jul 12 05:53:08 PM PDT 24 Jul 12 05:54:56 PM PDT 24 157281320650 ps
T150 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.3879093614 Jul 12 05:53:26 PM PDT 24 Jul 12 05:56:05 PM PDT 24 531177297488 ps
T151 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.402896977 Jul 12 05:53:11 PM PDT 24 Jul 12 05:53:15 PM PDT 24 8812292554 ps
T152 /workspace/coverage/default/32.sysrst_ctrl_smoke.3569080090 Jul 12 05:52:50 PM PDT 24 Jul 12 05:52:53 PM PDT 24 2142320207 ps
T153 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.1866966420 Jul 12 05:53:27 PM PDT 24 Jul 12 05:53:36 PM PDT 24 2612597106 ps
T154 /workspace/coverage/default/16.sysrst_ctrl_smoke.508943842 Jul 12 05:52:09 PM PDT 24 Jul 12 05:52:17 PM PDT 24 2108816942 ps
T155 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.367151418 Jul 12 05:53:38 PM PDT 24 Jul 12 05:53:51 PM PDT 24 57964992947 ps
T156 /workspace/coverage/default/33.sysrst_ctrl_smoke.1930447855 Jul 12 05:52:54 PM PDT 24 Jul 12 05:53:00 PM PDT 24 2116963349 ps
T495 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1141327237 Jul 12 05:52:04 PM PDT 24 Jul 12 05:52:08 PM PDT 24 2628376490 ps
T258 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3800924620 Jul 12 05:53:45 PM PDT 24 Jul 12 05:55:19 PM PDT 24 68685869948 ps
T496 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1031572145 Jul 12 05:51:53 PM PDT 24 Jul 12 05:52:00 PM PDT 24 2513711130 ps
T135 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2233553003 Jul 12 05:53:25 PM PDT 24 Jul 12 05:53:55 PM PDT 24 150826933373 ps
T259 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.334157863 Jul 12 05:53:00 PM PDT 24 Jul 12 05:54:04 PM PDT 24 89542173459 ps
T116 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.1797416748 Jul 12 05:52:36 PM PDT 24 Jul 12 05:53:45 PM PDT 24 757448672972 ps
T87 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1284439958 Jul 12 05:52:21 PM PDT 24 Jul 12 05:52:33 PM PDT 24 34956587329 ps
T497 /workspace/coverage/default/21.sysrst_ctrl_alert_test.813269056 Jul 12 05:52:33 PM PDT 24 Jul 12 05:52:35 PM PDT 24 2099288621 ps
T498 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1168425848 Jul 12 05:52:14 PM PDT 24 Jul 12 05:52:26 PM PDT 24 3292045861 ps
T499 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3612900775 Jul 12 05:53:21 PM PDT 24 Jul 12 05:53:29 PM PDT 24 2789751234 ps
T282 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.359611303 Jul 12 05:53:12 PM PDT 24 Jul 12 05:55:25 PM PDT 24 54307586830 ps
T500 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.4150652554 Jul 12 05:52:35 PM PDT 24 Jul 12 05:52:43 PM PDT 24 2458189071 ps
T129 /workspace/coverage/default/29.sysrst_ctrl_stress_all.2932810867 Jul 12 05:52:42 PM PDT 24 Jul 12 05:52:54 PM PDT 24 10376340680 ps
T501 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4169422388 Jul 12 05:53:28 PM PDT 24 Jul 12 05:54:21 PM PDT 24 84354398055 ps
T270 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.2517700592 Jul 12 05:52:54 PM PDT 24 Jul 12 05:54:18 PM PDT 24 32253977461 ps
T158 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1377586602 Jul 12 05:53:08 PM PDT 24 Jul 12 05:53:18 PM PDT 24 3537856275 ps
T290 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.1153879131 Jul 12 05:52:54 PM PDT 24 Jul 12 05:53:38 PM PDT 24 183543472775 ps
T291 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.1604566044 Jul 12 05:52:18 PM PDT 24 Jul 12 05:52:25 PM PDT 24 2519810558 ps
T292 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1679439197 Jul 12 05:52:15 PM PDT 24 Jul 12 05:52:23 PM PDT 24 2452782839 ps
T145 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1461457974 Jul 12 05:52:30 PM PDT 24 Jul 12 05:52:35 PM PDT 24 2606042436 ps
T293 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1139087904 Jul 12 05:53:28 PM PDT 24 Jul 12 05:53:33 PM PDT 24 3563590381 ps
T294 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2822361493 Jul 12 05:52:44 PM PDT 24 Jul 12 05:52:49 PM PDT 24 2619011624 ps
T260 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.4123422064 Jul 12 05:52:20 PM PDT 24 Jul 12 05:57:36 PM PDT 24 127186515105 ps
T295 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3035367244 Jul 12 05:52:19 PM PDT 24 Jul 12 05:52:25 PM PDT 24 2134998311 ps
T502 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.617821327 Jul 12 05:51:55 PM PDT 24 Jul 12 05:51:59 PM PDT 24 7113204688 ps
T319 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.1953038171 Jul 12 05:51:44 PM PDT 24 Jul 12 05:52:42 PM PDT 24 22009202623 ps
T503 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3471589923 Jul 12 05:53:21 PM PDT 24 Jul 12 05:53:39 PM PDT 24 6442435660 ps
T375 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1914479106 Jul 12 05:53:32 PM PDT 24 Jul 12 05:53:42 PM PDT 24 46565179628 ps
T504 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.3181063643 Jul 12 05:52:58 PM PDT 24 Jul 12 05:53:03 PM PDT 24 2535819464 ps
T201 /workspace/coverage/default/44.sysrst_ctrl_stress_all.293762739 Jul 12 05:53:23 PM PDT 24 Jul 12 05:54:01 PM PDT 24 14774538199 ps
T204 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.4121146548 Jul 12 05:51:55 PM PDT 24 Jul 12 05:52:11 PM PDT 24 21584667255 ps
T205 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.426675433 Jul 12 05:53:10 PM PDT 24 Jul 12 05:53:21 PM PDT 24 4370735722 ps
T206 /workspace/coverage/default/48.sysrst_ctrl_smoke.3379799721 Jul 12 05:53:25 PM PDT 24 Jul 12 05:53:28 PM PDT 24 2179845752 ps
T207 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.2092282305 Jul 12 05:52:04 PM PDT 24 Jul 12 05:57:58 PM PDT 24 132590523373 ps
T208 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1603605674 Jul 12 05:53:01 PM PDT 24 Jul 12 05:53:08 PM PDT 24 2932102215 ps
T209 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1526323910 Jul 12 05:52:47 PM PDT 24 Jul 12 05:58:54 PM PDT 24 2484583162116 ps
T88 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3766650263 Jul 12 05:53:48 PM PDT 24 Jul 12 05:54:31 PM PDT 24 67552832617 ps
T210 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1395900586 Jul 12 05:51:36 PM PDT 24 Jul 12 05:52:40 PM PDT 24 23769333538 ps
T211 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.2640745261 Jul 12 05:52:03 PM PDT 24 Jul 12 05:52:28 PM PDT 24 35508038238 ps
T505 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.3510921396 Jul 12 05:52:41 PM PDT 24 Jul 12 06:03:31 PM PDT 24 247433711263 ps
T168 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.475921659 Jul 12 05:53:12 PM PDT 24 Jul 12 05:53:18 PM PDT 24 3590201341 ps
T506 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.37703320 Jul 12 05:53:27 PM PDT 24 Jul 12 05:53:32 PM PDT 24 2714534571 ps
T378 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1107284743 Jul 12 05:53:33 PM PDT 24 Jul 12 05:54:40 PM PDT 24 91141683913 ps
T507 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2188116494 Jul 12 05:52:49 PM PDT 24 Jul 12 05:52:59 PM PDT 24 3208644428 ps
T89 /workspace/coverage/default/18.sysrst_ctrl_stress_all.3314956566 Jul 12 05:52:18 PM PDT 24 Jul 12 05:55:20 PM PDT 24 66491862509 ps
T90 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1819297221 Jul 12 05:53:29 PM PDT 24 Jul 12 05:53:34 PM PDT 24 3848222366 ps
T74 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2272289892 Jul 12 05:51:37 PM PDT 24 Jul 12 05:52:01 PM PDT 24 30886771305 ps
T508 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2242694634 Jul 12 05:52:55 PM PDT 24 Jul 12 05:52:58 PM PDT 24 3260963127 ps
T509 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3600692387 Jul 12 05:52:24 PM PDT 24 Jul 12 05:52:32 PM PDT 24 2898166456 ps
T510 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2197032428 Jul 12 05:52:10 PM PDT 24 Jul 12 05:52:20 PM PDT 24 2754481332 ps
T386 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3758572890 Jul 12 05:52:10 PM PDT 24 Jul 12 05:52:55 PM PDT 24 78838182356 ps
T511 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2259809279 Jul 12 05:52:06 PM PDT 24 Jul 12 05:52:09 PM PDT 24 2102949878 ps
T512 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3258211790 Jul 12 05:51:44 PM PDT 24 Jul 12 05:51:54 PM PDT 24 2547706512 ps
T513 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1918929360 Jul 12 05:51:35 PM PDT 24 Jul 12 05:51:44 PM PDT 24 2321856829 ps
T402 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.631786559 Jul 12 05:53:28 PM PDT 24 Jul 12 05:57:47 PM PDT 24 101236437629 ps
T514 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3321241096 Jul 12 05:52:07 PM PDT 24 Jul 12 05:52:16 PM PDT 24 2515634697 ps
T515 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1574744576 Jul 12 05:52:14 PM PDT 24 Jul 12 05:52:22 PM PDT 24 3316377663 ps
T404 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.4170854135 Jul 12 05:51:51 PM PDT 24 Jul 12 05:53:43 PM PDT 24 84584582330 ps
T516 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.3152577312 Jul 12 05:53:01 PM PDT 24 Jul 12 05:53:05 PM PDT 24 2626167926 ps
T517 /workspace/coverage/default/49.sysrst_ctrl_stress_all.209732658 Jul 12 05:53:30 PM PDT 24 Jul 12 05:53:49 PM PDT 24 7115029375 ps
T376 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3756213875 Jul 12 05:53:36 PM PDT 24 Jul 12 05:54:36 PM PDT 24 90334263338 ps
T518 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3477838658 Jul 12 05:53:45 PM PDT 24 Jul 12 05:55:49 PM PDT 24 47519161263 ps
T342 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3122648360 Jul 12 05:51:56 PM PDT 24 Jul 12 05:53:33 PM PDT 24 37237911762 ps
T519 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1600706706 Jul 12 05:53:02 PM PDT 24 Jul 12 05:53:07 PM PDT 24 2184641371 ps
T298 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1239801749 Jul 12 05:53:35 PM PDT 24 Jul 12 05:54:20 PM PDT 24 71499406553 ps
T224 /workspace/coverage/default/26.sysrst_ctrl_stress_all.3186231173 Jul 12 05:52:39 PM PDT 24 Jul 12 05:52:49 PM PDT 24 13501412191 ps
T226 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.4166911774 Jul 12 05:51:59 PM PDT 24 Jul 12 05:55:23 PM PDT 24 170185951571 ps
T227 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2055105216 Jul 12 05:51:52 PM PDT 24 Jul 12 05:51:55 PM PDT 24 15126037643 ps
T228 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2562801024 Jul 12 05:53:11 PM PDT 24 Jul 12 05:53:15 PM PDT 24 3270741635 ps
T229 /workspace/coverage/default/1.sysrst_ctrl_stress_all.3536105993 Jul 12 05:51:53 PM PDT 24 Jul 12 05:52:26 PM PDT 24 14338359156 ps
T91 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.1468735094 Jul 12 05:53:01 PM PDT 24 Jul 12 05:53:35 PM PDT 24 20814853108 ps
T230 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.1096733491 Jul 12 05:52:08 PM PDT 24 Jul 12 05:52:15 PM PDT 24 3122532153 ps
T231 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2835087099 Jul 12 05:52:04 PM PDT 24 Jul 12 05:52:12 PM PDT 24 2463806362 ps
T232 /workspace/coverage/default/21.sysrst_ctrl_smoke.2287568754 Jul 12 05:52:27 PM PDT 24 Jul 12 05:52:30 PM PDT 24 2120254994 ps
T233 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.4221683392 Jul 12 05:52:51 PM PDT 24 Jul 12 05:52:55 PM PDT 24 4944641109 ps
T520 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1631815509 Jul 12 05:52:58 PM PDT 24 Jul 12 05:53:28 PM PDT 24 38525559316 ps
T338 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3247940824 Jul 12 05:53:11 PM PDT 24 Jul 12 05:54:52 PM PDT 24 37863636187 ps
T521 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3393884464 Jul 12 05:52:35 PM PDT 24 Jul 12 05:52:39 PM PDT 24 3658431385 ps
T522 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1268740712 Jul 12 05:53:11 PM PDT 24 Jul 12 05:53:22 PM PDT 24 2466182115 ps
T523 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1063524713 Jul 12 05:52:35 PM PDT 24 Jul 12 05:52:39 PM PDT 24 2625784840 ps
T398 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3869368862 Jul 12 05:53:16 PM PDT 24 Jul 12 05:54:16 PM PDT 24 84000743777 ps
T524 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.3293345931 Jul 12 05:52:02 PM PDT 24 Jul 12 05:52:04 PM PDT 24 2555535223 ps
T525 /workspace/coverage/default/27.sysrst_ctrl_alert_test.153763865 Jul 12 05:52:43 PM PDT 24 Jul 12 05:52:47 PM PDT 24 2023109770 ps
T526 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.4173876149 Jul 12 05:52:45 PM PDT 24 Jul 12 05:52:50 PM PDT 24 2516659690 ps
T527 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1447707238 Jul 12 05:53:08 PM PDT 24 Jul 12 05:53:10 PM PDT 24 3838330914 ps
T368 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.1280227956 Jul 12 05:52:05 PM PDT 24 Jul 12 05:52:48 PM PDT 24 63300106508 ps
T528 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.1840126031 Jul 12 05:53:00 PM PDT 24 Jul 12 05:53:04 PM PDT 24 2481631976 ps
T529 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.1666606203 Jul 12 05:53:09 PM PDT 24 Jul 12 05:53:18 PM PDT 24 14707442551 ps
T530 /workspace/coverage/default/15.sysrst_ctrl_alert_test.2393672842 Jul 12 05:52:08 PM PDT 24 Jul 12 05:52:12 PM PDT 24 2031266622 ps
T531 /workspace/coverage/default/12.sysrst_ctrl_alert_test.88854502 Jul 12 05:52:01 PM PDT 24 Jul 12 05:52:08 PM PDT 24 2012806422 ps
T141 /workspace/coverage/default/48.sysrst_ctrl_stress_all.339067496 Jul 12 05:53:20 PM PDT 24 Jul 12 05:53:52 PM PDT 24 12123757296 ps
T532 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2113697176 Jul 12 05:52:05 PM PDT 24 Jul 12 05:52:09 PM PDT 24 7118603384 ps
T533 /workspace/coverage/default/5.sysrst_ctrl_smoke.137228899 Jul 12 05:52:01 PM PDT 24 Jul 12 05:52:05 PM PDT 24 2118193986 ps
T534 /workspace/coverage/default/11.sysrst_ctrl_alert_test.2381877777 Jul 12 05:51:59 PM PDT 24 Jul 12 05:52:03 PM PDT 24 2017077414 ps
T535 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.4293304111 Jul 12 05:51:45 PM PDT 24 Jul 12 05:51:56 PM PDT 24 3441426183 ps
T536 /workspace/coverage/default/19.sysrst_ctrl_alert_test.4144082638 Jul 12 05:52:23 PM PDT 24 Jul 12 05:52:27 PM PDT 24 2029746624 ps
T537 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1361685926 Jul 12 05:53:09 PM PDT 24 Jul 12 05:53:11 PM PDT 24 3697048976 ps
T401 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1248832060 Jul 12 05:53:37 PM PDT 24 Jul 12 05:54:54 PM PDT 24 99372967917 ps
T538 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1768195064 Jul 12 05:52:06 PM PDT 24 Jul 12 05:52:09 PM PDT 24 5206943988 ps
T539 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.3075822864 Jul 12 05:52:28 PM PDT 24 Jul 12 05:53:26 PM PDT 24 225787566730 ps
T540 /workspace/coverage/default/7.sysrst_ctrl_alert_test.1020324591 Jul 12 05:51:53 PM PDT 24 Jul 12 05:51:55 PM PDT 24 2026296613 ps
T541 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.987645239 Jul 12 05:53:33 PM PDT 24 Jul 12 05:54:16 PM PDT 24 111515831162 ps
T542 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1740867896 Jul 12 05:52:06 PM PDT 24 Jul 12 05:52:14 PM PDT 24 2419896210 ps
T543 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3801515940 Jul 12 05:52:35 PM PDT 24 Jul 12 05:52:56 PM PDT 24 521430666196 ps
T544 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.544395501 Jul 12 05:52:35 PM PDT 24 Jul 12 05:52:39 PM PDT 24 3076154083 ps
T545 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.4228094828 Jul 12 05:53:00 PM PDT 24 Jul 12 05:53:17 PM PDT 24 5341557505 ps
T265 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.1689244443 Jul 12 05:52:13 PM PDT 24 Jul 12 05:54:32 PM PDT 24 52504865497 ps
T546 /workspace/coverage/default/23.sysrst_ctrl_alert_test.2271884517 Jul 12 05:52:42 PM PDT 24 Jul 12 05:52:49 PM PDT 24 2012416258 ps
T320 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.66040206 Jul 12 05:51:45 PM PDT 24 Jul 12 05:53:30 PM PDT 24 42010560419 ps
T547 /workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.656289735 Jul 12 05:52:18 PM PDT 24 Jul 12 05:52:25 PM PDT 24 2620705575 ps
T548 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.937291921 Jul 12 05:52:20 PM PDT 24 Jul 12 05:52:25 PM PDT 24 2485067178 ps
T391 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3530062769 Jul 12 05:52:55 PM PDT 24 Jul 12 05:54:09 PM PDT 24 79075087283 ps
T549 /workspace/coverage/default/15.sysrst_ctrl_smoke.142199110 Jul 12 05:52:08 PM PDT 24 Jul 12 05:52:12 PM PDT 24 2125137553 ps
T550 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.724472957 Jul 12 05:52:02 PM PDT 24 Jul 12 05:52:07 PM PDT 24 8281689448 ps
T551 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3920147549 Jul 12 05:53:10 PM PDT 24 Jul 12 05:53:15 PM PDT 24 2206016249 ps
T552 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3967751680 Jul 12 05:52:20 PM PDT 24 Jul 12 05:52:36 PM PDT 24 9966422680 ps
T553 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.314101756 Jul 12 05:51:43 PM PDT 24 Jul 12 05:51:49 PM PDT 24 2513946750 ps
T554 /workspace/coverage/default/8.sysrst_ctrl_smoke.2737175311 Jul 12 05:52:08 PM PDT 24 Jul 12 05:52:12 PM PDT 24 2129304971 ps
T555 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.4220768413 Jul 12 05:52:19 PM PDT 24 Jul 12 05:54:21 PM PDT 24 46578544123 ps
T299 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.3746409161 Jul 12 05:51:57 PM PDT 24 Jul 12 05:52:45 PM PDT 24 91412941323 ps
T308 /workspace/coverage/default/1.sysrst_ctrl_alert_test.2407329031 Jul 12 05:51:43 PM PDT 24 Jul 12 05:51:50 PM PDT 24 2010187822 ps
T309 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.2714044437 Jul 12 05:53:32 PM PDT 24 Jul 12 05:55:20 PM PDT 24 39037207312 ps
T92 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2289638085 Jul 12 05:52:56 PM PDT 24 Jul 12 05:53:04 PM PDT 24 3600391301 ps
T310 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1163714921 Jul 12 05:52:30 PM PDT 24 Jul 12 06:02:45 PM PDT 24 247592769902 ps
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T312 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1536542493 Jul 12 05:53:11 PM PDT 24 Jul 12 05:53:21 PM PDT 24 2460157259 ps
T313 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.464753 Jul 12 05:52:17 PM PDT 24 Jul 12 05:52:24 PM PDT 24 2497183048 ps
T314 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.3226338752 Jul 12 05:53:20 PM PDT 24 Jul 12 05:53:24 PM PDT 24 2475288284 ps
T315 /workspace/coverage/default/27.sysrst_ctrl_smoke.4292069703 Jul 12 05:52:38 PM PDT 24 Jul 12 05:52:41 PM PDT 24 2127645824 ps
T343 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3537137425 Jul 12 05:53:29 PM PDT 24 Jul 12 05:54:14 PM PDT 24 19833613204 ps
T556 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.3818856765 Jul 12 05:52:54 PM PDT 24 Jul 12 05:52:58 PM PDT 24 2562545502 ps
T557 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1667949754 Jul 12 05:53:38 PM PDT 24 Jul 12 05:54:43 PM PDT 24 25083929727 ps
T190 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.3897057328 Jul 12 05:51:57 PM PDT 24 Jul 12 05:52:01 PM PDT 24 2859047974 ps
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T94 /workspace/coverage/default/43.sysrst_ctrl_stress_all.3046077526 Jul 12 05:53:14 PM PDT 24 Jul 12 05:56:06 PM PDT 24 141276203137 ps
T558 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2482740343 Jul 12 05:51:46 PM PDT 24 Jul 12 05:51:49 PM PDT 24 2177612262 ps
T559 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.486786781 Jul 12 05:53:10 PM PDT 24 Jul 12 05:53:15 PM PDT 24 3433991442 ps
T344 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2425903655 Jul 12 05:52:32 PM PDT 24 Jul 12 05:54:47 PM PDT 24 54187096887 ps
T560 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1498475696 Jul 12 05:52:18 PM PDT 24 Jul 12 05:52:27 PM PDT 24 2009695652 ps
T169 /workspace/coverage/default/21.sysrst_ctrl_stress_all.1014736559 Jul 12 05:52:36 PM PDT 24 Jul 12 05:52:49 PM PDT 24 18415071604 ps
T561 /workspace/coverage/default/25.sysrst_ctrl_smoke.1581331448 Jul 12 05:52:39 PM PDT 24 Jul 12 05:52:41 PM PDT 24 2136553267 ps
T281 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.899518918 Jul 12 05:51:57 PM PDT 24 Jul 12 05:52:07 PM PDT 24 63096757919 ps
T388 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.2159212199 Jul 12 05:51:45 PM PDT 24 Jul 12 05:52:30 PM PDT 24 64994636217 ps
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T130 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.807108310 Jul 12 05:52:17 PM PDT 24 Jul 12 05:52:56 PM PDT 24 163313310822 ps
T411 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.676121969 Jul 12 05:52:56 PM PDT 24 Jul 12 05:53:33 PM PDT 24 68613271649 ps
T562 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.4141280409 Jul 12 05:51:42 PM PDT 24 Jul 12 05:51:47 PM PDT 24 2206393609 ps
T563 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1401557234 Jul 12 05:53:26 PM PDT 24 Jul 12 05:53:30 PM PDT 24 2459912978 ps
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T565 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2203550172 Jul 12 05:51:44 PM PDT 24 Jul 12 05:52:15 PM PDT 24 23239639665 ps
T300 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1677151507 Jul 12 05:52:00 PM PDT 24 Jul 12 05:54:08 PM PDT 24 46349815248 ps
T392 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.981014252 Jul 12 05:51:59 PM PDT 24 Jul 12 05:52:51 PM PDT 24 86174435668 ps
T117 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.74110077 Jul 12 05:52:49 PM PDT 24 Jul 12 05:54:59 PM PDT 24 61265125105 ps
T566 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.511152672 Jul 12 05:52:14 PM PDT 24 Jul 12 05:52:18 PM PDT 24 2536005910 ps
T567 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2162993628 Jul 12 05:51:54 PM PDT 24 Jul 12 05:51:58 PM PDT 24 3698792329 ps
T367 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.677424467 Jul 12 05:52:53 PM PDT 24 Jul 12 05:53:50 PM PDT 24 83392869618 ps
T568 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3303392093 Jul 12 05:52:15 PM PDT 24 Jul 12 05:52:27 PM PDT 24 3539431450 ps
T569 /workspace/coverage/default/4.sysrst_ctrl_alert_test.3558907818 Jul 12 05:52:06 PM PDT 24 Jul 12 05:52:18 PM PDT 24 2014777658 ps
T570 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.3721592444 Jul 12 05:52:55 PM PDT 24 Jul 12 05:52:59 PM PDT 24 2621046399 ps
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T572 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3391714062 Jul 12 05:52:19 PM PDT 24 Jul 12 06:16:18 PM PDT 24 2198322196113 ps
T573 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.960289367 Jul 12 05:53:16 PM PDT 24 Jul 12 05:53:25 PM PDT 24 2613887691 ps
T95 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.3206078789 Jul 12 05:52:49 PM PDT 24 Jul 12 06:00:07 PM PDT 24 177150484693 ps
T96 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3760652269 Jul 12 05:52:45 PM PDT 24 Jul 12 05:54:27 PM PDT 24 948586325848 ps
T574 /workspace/coverage/default/0.sysrst_ctrl_alert_test.3717770803 Jul 12 05:51:41 PM PDT 24 Jul 12 05:51:49 PM PDT 24 2009825873 ps
T302 /workspace/coverage/default/3.sysrst_ctrl_stress_all.2038060741 Jul 12 05:51:46 PM PDT 24 Jul 12 05:57:34 PM PDT 24 134610672312 ps
T575 /workspace/coverage/default/44.sysrst_ctrl_alert_test.2635691252 Jul 12 05:53:17 PM PDT 24 Jul 12 05:53:25 PM PDT 24 2009986230 ps
T576 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.48055207 Jul 12 05:52:36 PM PDT 24 Jul 12 05:52:42 PM PDT 24 2455916175 ps
T393 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3935995298 Jul 12 05:53:27 PM PDT 24 Jul 12 05:54:56 PM PDT 24 70694779437 ps
T577 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.3675190018 Jul 12 05:53:29 PM PDT 24 Jul 12 05:53:33 PM PDT 24 2531469066 ps
T578 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.252528443 Jul 12 05:53:22 PM PDT 24 Jul 12 05:53:25 PM PDT 24 2106875950 ps
T579 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3130108873 Jul 12 05:53:20 PM PDT 24 Jul 12 05:53:24 PM PDT 24 2537559410 ps
T580 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.45102077 Jul 12 05:52:07 PM PDT 24 Jul 12 05:52:12 PM PDT 24 3503680271 ps
T581 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3194695265 Jul 12 05:51:49 PM PDT 24 Jul 12 05:52:04 PM PDT 24 5363277751 ps
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T582 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1673063385 Jul 12 05:53:30 PM PDT 24 Jul 12 05:53:39 PM PDT 24 2613049262 ps
T395 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2837535577 Jul 12 05:53:32 PM PDT 24 Jul 12 05:55:55 PM PDT 24 115843895270 ps
T583 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.4110063042 Jul 12 05:52:11 PM PDT 24 Jul 12 05:52:19 PM PDT 24 4005479950 ps
T584 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.4101512229 Jul 12 05:52:56 PM PDT 24 Jul 12 06:00:13 PM PDT 24 164850315611 ps
T585 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.1800260915 Jul 12 05:52:49 PM PDT 24 Jul 12 05:54:08 PM PDT 24 28330669704 ps
T586 /workspace/coverage/default/10.sysrst_ctrl_smoke.1403206446 Jul 12 05:52:01 PM PDT 24 Jul 12 05:52:03 PM PDT 24 2139123968 ps
T379 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2899997384 Jul 12 05:52:59 PM PDT 24 Jul 12 05:53:52 PM PDT 24 147537213322 ps
T118 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4150132038 Jul 12 05:51:49 PM PDT 24 Jul 12 05:53:48 PM PDT 24 1090949306459 ps
T142 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2427568406 Jul 12 05:51:42 PM PDT 24 Jul 12 05:51:46 PM PDT 24 5943095333 ps
T587 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2700881431 Jul 12 05:53:06 PM PDT 24 Jul 12 05:53:21 PM PDT 24 10314092747 ps
T283 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.69313768 Jul 12 05:51:50 PM PDT 24 Jul 12 05:52:38 PM PDT 24 84646026343 ps
T588 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.946783847 Jul 12 05:53:08 PM PDT 24 Jul 12 05:53:16 PM PDT 24 2513008512 ps
T97 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.2518755504 Jul 12 05:53:11 PM PDT 24 Jul 12 05:55:28 PM PDT 24 105802189822 ps
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T193 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1509004944 Jul 12 05:51:53 PM PDT 24 Jul 12 05:51:57 PM PDT 24 4096432931 ps
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T119 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3606670743 Jul 12 05:52:13 PM PDT 24 Jul 12 05:53:16 PM PDT 24 53003595490 ps
T195 /workspace/coverage/default/35.sysrst_ctrl_smoke.1885900265 Jul 12 05:52:56 PM PDT 24 Jul 12 05:53:00 PM PDT 24 2147741865 ps
T196 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.2544231867 Jul 12 05:53:12 PM PDT 24 Jul 12 05:53:17 PM PDT 24 5243686425 ps
T197 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2270370807 Jul 12 05:52:39 PM PDT 24 Jul 12 05:52:46 PM PDT 24 2105529373 ps
T198 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4016491425 Jul 12 05:53:11 PM PDT 24 Jul 12 05:53:20 PM PDT 24 2474673651 ps
T131 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1017472856 Jul 12 05:53:13 PM PDT 24 Jul 12 05:53:20 PM PDT 24 7627276345 ps
T589 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1727666556 Jul 12 05:51:52 PM PDT 24 Jul 12 05:51:56 PM PDT 24 2617736671 ps
T389 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.767146357 Jul 12 05:52:53 PM PDT 24 Jul 12 05:54:12 PM PDT 24 62635801601 ps
T590 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.3085059119 Jul 12 05:52:33 PM PDT 24 Jul 12 05:52:38 PM PDT 24 2492254366 ps
T591 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1050507558 Jul 12 05:53:33 PM PDT 24 Jul 12 05:53:50 PM PDT 24 26597905978 ps
T592 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2808611307 Jul 12 05:52:17 PM PDT 24 Jul 12 05:52:24 PM PDT 24 3292205309 ps
T593 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3914315855 Jul 12 05:52:29 PM PDT 24 Jul 12 05:52:34 PM PDT 24 2462858237 ps
T143 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.2718693173 Jul 12 05:51:59 PM PDT 24 Jul 12 05:52:07 PM PDT 24 4566568779 ps
T594 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.2920248791 Jul 12 05:53:01 PM PDT 24 Jul 12 05:53:06 PM PDT 24 2072340844 ps
T595 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.3956159723 Jul 12 05:52:49 PM PDT 24 Jul 12 05:52:53 PM PDT 24 3897338310 ps
T596 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2812603459 Jul 12 05:53:16 PM PDT 24 Jul 12 05:53:20 PM PDT 24 2069377565 ps
T597 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3111713671 Jul 12 05:52:51 PM PDT 24 Jul 12 05:52:57 PM PDT 24 3657245845 ps
T374 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.1616068178 Jul 12 05:52:17 PM PDT 24 Jul 12 05:54:07 PM PDT 24 174193148952 ps
T598 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.2338982483 Jul 12 05:51:47 PM PDT 24 Jul 12 05:51:49 PM PDT 24 2708501821 ps
T599 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.4252038276 Jul 12 05:51:58 PM PDT 24 Jul 12 05:52:30 PM PDT 24 162049872918 ps
T600 /workspace/coverage/default/23.sysrst_ctrl_smoke.428714751 Jul 12 05:52:28 PM PDT 24 Jul 12 05:52:29 PM PDT 24 2225604792 ps
T199 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.3893310943 Jul 12 05:52:22 PM PDT 24 Jul 12 05:52:30 PM PDT 24 3950484351 ps
T601 /workspace/coverage/default/1.sysrst_ctrl_smoke.563116425 Jul 12 05:51:42 PM PDT 24 Jul 12 05:51:46 PM PDT 24 2130759733 ps
T602 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.321316557 Jul 12 05:52:52 PM PDT 24 Jul 12 05:52:56 PM PDT 24 2078665277 ps
T603 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2979458611 Jul 12 05:53:10 PM PDT 24 Jul 12 05:53:52 PM PDT 24 15525484253 ps
T604 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2532422874 Jul 12 05:52:20 PM PDT 24 Jul 12 05:52:26 PM PDT 24 2619646456 ps
T605 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3141683311 Jul 12 05:52:11 PM PDT 24 Jul 12 05:52:14 PM PDT 24 2206528332 ps
T606 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.119882585 Jul 12 05:51:49 PM PDT 24 Jul 12 05:51:52 PM PDT 24 2152166176 ps
T607 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.326942087 Jul 12 05:53:12 PM PDT 24 Jul 12 05:53:23 PM PDT 24 7813617363 ps
T608 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.908755243 Jul 12 05:53:31 PM PDT 24 Jul 12 05:53:36 PM PDT 24 3551017483 ps
T225 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.3271190733 Jul 12 05:52:01 PM PDT 24 Jul 12 05:52:09 PM PDT 24 2737385449 ps
T200 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2330003084 Jul 12 05:52:18 PM PDT 24 Jul 12 05:52:31 PM PDT 24 16499543739 ps
T247 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.36573802 Jul 12 05:53:31 PM PDT 24 Jul 12 05:53:38 PM PDT 24 3838332950 ps
T609 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3862510450 Jul 12 05:52:03 PM PDT 24 Jul 12 05:52:12 PM PDT 24 2474124363 ps
T303 /workspace/coverage/default/17.sysrst_ctrl_stress_all.4025003725 Jul 12 05:52:19 PM PDT 24 Jul 12 05:53:31 PM PDT 24 118300082709 ps
T610 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3914824670 Jul 12 05:52:42 PM PDT 24 Jul 12 05:52:48 PM PDT 24 2451271391 ps
T611 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3007588328 Jul 12 05:51:41 PM PDT 24 Jul 12 05:51:49 PM PDT 24 2394678720 ps
T304 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3764070134 Jul 12 05:52:06 PM PDT 24 Jul 12 05:53:31 PM PDT 24 189736740057 ps
T612 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1528781414 Jul 12 05:53:40 PM PDT 24 Jul 12 05:54:55 PM PDT 24 26083047911 ps
T377 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2348280557 Jul 12 05:52:42 PM PDT 24 Jul 12 05:55:03 PM PDT 24 213630811021 ps
T613 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3620901981 Jul 12 05:52:56 PM PDT 24 Jul 12 05:53:04 PM PDT 24 2158232664 ps
T614 /workspace/coverage/default/42.sysrst_ctrl_smoke.3470723535 Jul 12 05:53:08 PM PDT 24 Jul 12 05:53:12 PM PDT 24 2116855889 ps
T615 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.917986500 Jul 12 05:53:05 PM PDT 24 Jul 12 05:53:09 PM PDT 24 2456622106 ps
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