Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.75 99.27 96.76 100.00 96.15 98.74 99.42 93.89


Total tests in report: 909
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
65.35 65.35 82.31 82.31 73.66 73.66 87.21 87.21 20.51 20.51 84.58 84.58 67.82 67.82 41.33 41.33 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1889586860
75.95 10.61 88.67 6.36 80.46 6.80 88.36 1.14 53.21 32.69 89.80 5.21 81.89 14.07 49.29 7.96 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1181536698
83.00 7.05 95.67 7.00 89.89 9.43 90.18 1.83 64.74 11.54 95.38 5.58 90.94 9.06 54.20 4.91 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.4187947400
85.94 2.93 96.25 0.58 90.39 0.51 90.18 0.00 72.44 7.69 96.01 0.63 92.10 1.16 64.18 9.98 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3961279524
87.77 1.83 96.57 0.32 90.70 0.30 97.49 7.31 72.44 0.00 96.04 0.04 94.03 1.93 67.12 2.94 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.2655294902
89.58 1.81 97.57 1.01 92.29 1.59 97.49 0.00 81.41 8.97 97.12 1.07 94.03 0.00 67.12 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.513684610
90.98 1.41 97.97 0.39 92.64 0.35 97.49 0.00 83.97 2.56 97.45 0.33 94.99 0.96 72.36 5.23 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.461306329
92.25 1.27 98.04 0.07 93.76 1.11 98.17 0.68 83.97 0.00 97.56 0.11 94.99 0.00 79.28 6.92 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.961125814
93.16 0.91 98.23 0.19 93.88 0.13 98.17 0.00 87.18 3.21 97.74 0.18 95.47 0.48 81.46 2.18 /workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1468272489
93.81 0.65 98.30 0.07 93.98 0.10 98.17 0.00 87.82 0.64 97.78 0.04 97.11 1.64 83.53 2.07 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1946991560
94.32 0.51 98.56 0.26 94.11 0.13 98.17 0.00 90.38 2.56 97.93 0.15 97.50 0.39 83.59 0.05 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.366754030
94.76 0.43 98.62 0.06 94.16 0.05 98.17 0.00 91.67 1.28 98.00 0.07 97.50 0.00 85.17 1.58 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.2640449582
95.05 0.29 98.66 0.04 94.19 0.03 98.17 0.00 92.31 0.64 98.04 0.04 97.59 0.10 86.37 1.20 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1727119946
95.30 0.25 98.66 0.00 95.05 0.86 98.17 0.00 92.31 0.00 98.08 0.04 97.78 0.19 87.02 0.65 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1667492762
95.53 0.24 98.71 0.06 95.12 0.08 99.54 1.37 92.31 0.00 98.08 0.00 97.78 0.00 87.19 0.16 /workspace/coverage/default/13.sysrst_ctrl_alert_test.1174747950
95.75 0.22 98.75 0.04 95.15 0.03 99.54 0.00 92.95 0.64 98.11 0.04 97.88 0.10 87.90 0.71 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2002113678
95.92 0.16 98.79 0.04 95.48 0.33 99.54 0.00 93.59 0.64 98.15 0.04 97.98 0.10 87.90 0.00 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.2991553578
96.08 0.16 98.86 0.07 95.50 0.03 99.54 0.00 93.59 0.00 98.15 0.00 97.98 0.00 88.93 1.04 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3883010368
96.21 0.14 98.94 0.07 95.53 0.03 99.54 0.00 94.23 0.64 98.26 0.11 98.07 0.10 88.93 0.00 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.5952998
96.35 0.13 98.94 0.00 95.63 0.10 99.54 0.00 94.23 0.00 98.26 0.00 98.75 0.67 89.09 0.16 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.4253918110
96.48 0.13 98.99 0.06 95.65 0.03 99.54 0.00 94.87 0.64 98.34 0.07 98.84 0.10 89.09 0.00 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.612699337
96.60 0.12 98.99 0.00 95.65 0.00 99.54 0.00 94.87 0.00 98.34 0.00 98.84 0.00 89.97 0.87 /workspace/coverage/default/39.sysrst_ctrl_stress_all.3965006502
96.72 0.12 99.03 0.04 95.68 0.03 99.54 0.00 95.51 0.64 98.37 0.04 98.94 0.10 89.97 0.00 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.3325192517
96.84 0.12 99.07 0.04 95.70 0.03 99.54 0.00 96.15 0.64 98.41 0.04 99.04 0.10 89.97 0.00 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.3669595067
96.94 0.10 99.07 0.00 95.73 0.03 100.00 0.46 96.15 0.00 98.41 0.00 99.13 0.10 90.08 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1646319411
97.03 0.09 99.10 0.04 95.73 0.00 100.00 0.00 96.15 0.00 98.41 0.00 99.13 0.00 90.68 0.60 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2907883249
97.11 0.08 99.10 0.00 95.73 0.00 100.00 0.00 96.15 0.00 98.41 0.00 99.13 0.00 91.22 0.55 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3843087860
97.17 0.06 99.10 0.00 96.16 0.43 100.00 0.00 96.15 0.00 98.41 0.00 99.13 0.00 91.22 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2186962478
97.22 0.05 99.10 0.00 96.16 0.00 100.00 0.00 96.15 0.00 98.41 0.00 99.13 0.00 91.60 0.38 /workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1199029672
97.27 0.05 99.14 0.04 96.31 0.15 100.00 0.00 96.15 0.00 98.48 0.07 99.23 0.10 91.60 0.00 /workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2522496219
97.31 0.04 99.14 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.48 0.00 99.23 0.00 91.88 0.27 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3140924787
97.35 0.04 99.18 0.04 96.36 0.05 100.00 0.00 96.15 0.00 98.56 0.07 99.33 0.10 91.88 0.00 /workspace/coverage/default/24.sysrst_ctrl_stress_all.213864481
97.38 0.03 99.22 0.04 96.36 0.00 100.00 0.00 96.15 0.00 98.63 0.07 99.33 0.00 91.98 0.11 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.939805186
97.41 0.03 99.22 0.00 96.36 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.20 0.22 /workspace/coverage/default/20.sysrst_ctrl_stress_all.1823019064
97.44 0.03 99.22 0.00 96.56 0.20 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.20 0.00 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.310128996
97.47 0.03 99.22 0.00 96.59 0.03 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.37 0.16 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.2997859135
97.49 0.02 99.22 0.00 96.59 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.53 0.16 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.384820543
97.51 0.02 99.22 0.00 96.61 0.03 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.64 0.11 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3400740664
97.53 0.02 99.22 0.00 96.61 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.75 0.11 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.991695279
97.54 0.02 99.22 0.00 96.61 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.86 0.11 /workspace/coverage/default/12.sysrst_ctrl_combo_detect.650301025
97.56 0.02 99.22 0.00 96.61 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 92.97 0.11 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3178499728
97.57 0.02 99.22 0.00 96.61 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 93.08 0.11 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.322641461
97.59 0.02 99.22 0.00 96.61 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 93.18 0.11 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.657680837
97.60 0.02 99.22 0.00 96.61 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.33 0.00 93.29 0.11 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1992149452
97.62 0.01 99.22 0.00 96.61 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.42 0.10 93.29 0.00 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2797185876
97.63 0.01 99.22 0.00 96.64 0.03 100.00 0.00 96.15 0.00 98.63 0.00 99.42 0.00 93.35 0.05 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1044011548
97.64 0.01 99.23 0.02 96.64 0.00 100.00 0.00 96.15 0.00 98.67 0.04 99.42 0.00 93.35 0.00 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.3075711494
97.65 0.01 99.25 0.02 96.64 0.00 100.00 0.00 96.15 0.00 98.71 0.04 99.42 0.00 93.35 0.00 /workspace/coverage/default/25.sysrst_ctrl_stress_all.2790244121
97.65 0.01 99.27 0.02 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.04 99.42 0.00 93.35 0.00 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.399456428
97.66 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.40 0.05 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.4151410359
97.67 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.46 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2533973022
97.68 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.51 0.05 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.1908129676
97.69 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.57 0.05 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.2733042557
97.69 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.62 0.05 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1624996273
97.70 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.68 0.05 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1100459857
97.71 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.73 0.05 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.4080985500
97.72 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.78 0.05 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.2682474491
97.72 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.84 0.05 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.935532717
97.73 0.01 99.27 0.00 96.64 0.00 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.89 0.05 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3347914826
97.74 0.01 99.27 0.00 96.69 0.05 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.89 0.00 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.469979342
97.74 0.01 99.27 0.00 96.71 0.03 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.89 0.00 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2388052780
97.75 0.01 99.27 0.00 96.74 0.03 100.00 0.00 96.15 0.00 98.74 0.00 99.42 0.00 93.89 0.00 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1713113913

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2436482374
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.2887345864
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.3872022191
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.334930765
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2633279976
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.176571985
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3809520535
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2153450343
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.425989948
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1603463673
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2078609522
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2714774402
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1634909334
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.4023336871
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2746351411
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3842449521
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2472960726
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1621054780
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.3076072334
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2130932647
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.374339228
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.3223114818
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3812510499
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2036710799
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.4261506292
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1949266644
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2383914350
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.219554907
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.189961165
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.1778589840
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3765233043
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2766606956
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2124401535
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.77901740
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3576599958
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1049230732
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.1108584003
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1465862532
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1150140091
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.906500826
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3076286122
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1565413713
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.6629296
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3647436353
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1774683735
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3378844563
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.894958407
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.533521891
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1684968480
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2301875330
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2886750726
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.4105794082
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3213971694
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.1587442425
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1280253329
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3105180828
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.3545739712
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.3922429513
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.19544053
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.3986421765
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.3151542856
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2050802676
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.4290440329
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.870266821
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3737170498
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3404126146
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.2452404159
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2955248743
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1382844079
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.166492825
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2744445656
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2248253689
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.3601935259
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.11507429
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.3414672867
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.375792990
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.800047521
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.1902414902
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2791405821
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1523983945
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1145750519
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.3413379734
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2200224674
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.3171257571
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.4068757986
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.2373553372
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.312864439
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.2469410974
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.4154869152
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.3135286194
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.1051448436
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.1785845557
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.4015393872
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.505651685
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.206895690
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.2383452225
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/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.521317607
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3629769682
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.764451814
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2002400903
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.4217994970
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3248702690
/workspace/coverage/default/43.sysrst_ctrl_smoke.1404547603
/workspace/coverage/default/43.sysrst_ctrl_stress_all.110220929
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1315254898
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2074594494
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2092674578
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3063123950
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2804606988
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3741696200
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3299238552
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2879363553
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.2783312526
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.462164366
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.480280423
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3347732811
/workspace/coverage/default/44.sysrst_ctrl_smoke.1108829498
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2898351660
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.229501416
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2031288373
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3365520713
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.873089727
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3300191234
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3793917462
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2648289187
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.1163661822
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1401226372
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1244442102
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.356449116
/workspace/coverage/default/45.sysrst_ctrl_smoke.2221501059
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2204090258
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.665776381
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1964154742
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3159358953
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1582322268
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3799541394
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2726134586
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2753547704
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3056244832
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2946552790
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.756994758
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.550840503
/workspace/coverage/default/46.sysrst_ctrl_smoke.3793764423
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3540583395
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1332541987
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.500049722
/workspace/coverage/default/47.sysrst_ctrl_alert_test.4078554858
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1144708679
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3463383338
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.2727127725
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2329379398
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.1158797292
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.738133278
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4079487322
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1472080317
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.771131501
/workspace/coverage/default/47.sysrst_ctrl_smoke.3480758502
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3133140754
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2388466246
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.573135994
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2086877348
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.763493937
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.71491088
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.261909195
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3747743886
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3209282684
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2151038531
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3360507528
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1798817715
/workspace/coverage/default/48.sysrst_ctrl_smoke.3645324575
/workspace/coverage/default/48.sysrst_ctrl_stress_all.3016631155
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4221235638
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2409707034
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.179860999
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1058075355
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3467418286
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.300551556
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.2156723842
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3423659600
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3020141361
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2722005191
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3507095136
/workspace/coverage/default/49.sysrst_ctrl_smoke.2078110524
/workspace/coverage/default/49.sysrst_ctrl_stress_all.2803955440
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3757094238
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2113317586
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3032356900
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3645501215
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2163692436
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2507713872
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.158329789
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1783638539
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1746901707
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1778691425
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1452640588
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1810612348
/workspace/coverage/default/5.sysrst_ctrl_smoke.1647712595
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2107139438
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.388177769
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1343072635
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.841995492
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3151799408
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.1417612567
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1100708530
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2816510997
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1520561292
/workspace/coverage/default/6.sysrst_ctrl_alert_test.165930627
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2815492065
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3390541279
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.835772977
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3920731552
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3656905135
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2374590964
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1506658460
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2631722175
/workspace/coverage/default/6.sysrst_ctrl_smoke.2429220318
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3680849671
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.782952562
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.4043658300
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2499390933
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1490144874
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.582180225
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.78095970
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.141154984
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.551816860
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3290604482
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3220420155
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4191402505
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4659885
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1210644594
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.320149516
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3770825664
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.85857186
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1528378973
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3827402324
/workspace/coverage/default/7.sysrst_ctrl_smoke.3211023029
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2475515014
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2389817480
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.510652485
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.52289323
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2669504502
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1121854695
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.639757317
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2123331678
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.646465833
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1427173282
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2600947725
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2785520980
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.152181970
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2278452193
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3284331267
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3304911218
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.969962117
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1911204527
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1747499403
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3981768924
/workspace/coverage/default/8.sysrst_ctrl_smoke.936245382
/workspace/coverage/default/8.sysrst_ctrl_stress_all.200627921
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1827708841
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3557724562
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4109887232
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1954163289
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1410315072
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.207408765
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3552888788
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.2814051829
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2837453577
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3924462460
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2671260311
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.46694127
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.752826124
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1442579783
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1212335744
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1633209001
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1742087411
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2489989970
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.3342408035
/workspace/coverage/default/9.sysrst_ctrl_smoke.3318251794
/workspace/coverage/default/9.sysrst_ctrl_stress_all.868978846
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.930468878
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.412610587
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2915123503
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.622897301
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2335957727
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.530730520
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.233095822
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3988323890
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2031852792
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.898411835



Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.71491088 Jul 13 06:36:54 PM PDT 24 Jul 13 06:43:15 PM PDT 24 143977568008 ps
T4 /workspace/coverage/default/15.sysrst_ctrl_alert_test.2757754618 Jul 13 06:35:13 PM PDT 24 Jul 13 06:35:16 PM PDT 24 2038657451 ps
T2 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1889586860 Jul 13 06:35:13 PM PDT 24 Jul 13 06:36:00 PM PDT 24 67101439725 ps
T3 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.2390885899 Jul 13 06:35:32 PM PDT 24 Jul 13 06:35:35 PM PDT 24 3143406369 ps
T12 /workspace/coverage/default/44.sysrst_ctrl_stress_all.2898351660 Jul 13 06:36:45 PM PDT 24 Jul 13 06:40:10 PM PDT 24 81638724103 ps
T13 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.749404614 Jul 13 06:35:04 PM PDT 24 Jul 13 06:35:14 PM PDT 24 2461055319 ps
T14 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1137254188 Jul 13 06:34:59 PM PDT 24 Jul 13 06:35:08 PM PDT 24 2612236381 ps
T5 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.369355655 Jul 13 06:34:38 PM PDT 24 Jul 13 06:34:47 PM PDT 24 2835233199 ps
T6 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.2655294902 Jul 13 06:36:25 PM PDT 24 Jul 13 06:39:43 PM PDT 24 79542696580 ps
T15 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3795690115 Jul 13 06:35:16 PM PDT 24 Jul 13 06:35:19 PM PDT 24 2637983701 ps
T46 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2135565276 Jul 13 06:36:35 PM PDT 24 Jul 13 06:36:39 PM PDT 24 2169287006 ps
T7 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.320149516 Jul 13 06:34:51 PM PDT 24 Jul 13 06:34:55 PM PDT 24 2749675946 ps
T107 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1452640588 Jul 13 06:34:51 PM PDT 24 Jul 13 06:34:56 PM PDT 24 2176412216 ps
T23 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.475940848 Jul 13 06:34:40 PM PDT 24 Jul 13 06:34:44 PM PDT 24 3520058026 ps
T8 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2499390933 Jul 13 06:36:58 PM PDT 24 Jul 13 06:39:41 PM PDT 24 61544114717 ps
T47 /workspace/coverage/default/35.sysrst_ctrl_smoke.2549634949 Jul 13 06:36:21 PM PDT 24 Jul 13 06:36:28 PM PDT 24 2110817445 ps
T39 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2387967715 Jul 13 06:34:39 PM PDT 24 Jul 13 06:35:14 PM PDT 24 85290614850 ps
T48 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.2621679159 Jul 13 06:35:39 PM PDT 24 Jul 13 06:35:42 PM PDT 24 2640244917 ps
T9 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3806028587 Jul 13 06:34:28 PM PDT 24 Jul 13 06:34:32 PM PDT 24 2405476422 ps
T49 /workspace/coverage/default/40.sysrst_ctrl_smoke.1235904179 Jul 13 06:36:22 PM PDT 24 Jul 13 06:36:24 PM PDT 24 2132953378 ps
T50 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.458008041 Jul 13 06:35:08 PM PDT 24 Jul 13 06:35:15 PM PDT 24 2510396538 ps
T22 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2151038531 Jul 13 06:36:55 PM PDT 24 Jul 13 06:37:01 PM PDT 24 2466870212 ps
T51 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2797185876 Jul 13 06:34:32 PM PDT 24 Jul 13 06:34:41 PM PDT 24 3154194057 ps
T72 /workspace/coverage/default/32.sysrst_ctrl_alert_test.38458283 Jul 13 06:36:05 PM PDT 24 Jul 13 06:36:10 PM PDT 24 2019495957 ps
T65 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.2238935012 Jul 13 06:36:16 PM PDT 24 Jul 13 06:36:19 PM PDT 24 2534831151 ps
T10 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3883010368 Jul 13 06:36:05 PM PDT 24 Jul 13 06:37:11 PM PDT 24 119584141171 ps
T25 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3837214068 Jul 13 06:35:38 PM PDT 24 Jul 13 06:38:31 PM PDT 24 127974190513 ps
T61 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.250871503 Jul 13 06:34:54 PM PDT 24 Jul 13 06:35:00 PM PDT 24 2486212425 ps
T62 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1560532627 Jul 13 06:35:02 PM PDT 24 Jul 13 06:35:11 PM PDT 24 2458993595 ps
T246 /workspace/coverage/default/34.sysrst_ctrl_alert_test.909789932 Jul 13 06:36:13 PM PDT 24 Jul 13 06:36:17 PM PDT 24 2017078944 ps
T40 /workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.366754030 Jul 13 06:37:02 PM PDT 24 Jul 13 06:37:40 PM PDT 24 26834916806 ps
T235 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2329379398 Jul 13 06:36:54 PM PDT 24 Jul 13 06:36:58 PM PDT 24 2751501495 ps
T236 /workspace/coverage/default/12.sysrst_ctrl_alert_test.4026552682 Jul 13 06:35:03 PM PDT 24 Jul 13 06:35:06 PM PDT 24 2116405079 ps
T11 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.2804606988 Jul 13 06:36:49 PM PDT 24 Jul 13 06:40:19 PM PDT 24 80726119953 ps
T237 /workspace/coverage/default/12.sysrst_ctrl_smoke.1022601805 Jul 13 06:34:58 PM PDT 24 Jul 13 06:35:02 PM PDT 24 2111933449 ps
T66 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1644712990 Jul 13 06:35:39 PM PDT 24 Jul 13 06:35:46 PM PDT 24 2514112439 ps
T238 /workspace/coverage/default/16.sysrst_ctrl_alert_test.1030670955 Jul 13 06:35:13 PM PDT 24 Jul 13 06:35:21 PM PDT 24 2011861333 ps
T67 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1633209001 Jul 13 06:34:51 PM PDT 24 Jul 13 06:34:57 PM PDT 24 2616231740 ps
T63 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3182696719 Jul 13 06:35:52 PM PDT 24 Jul 13 06:35:56 PM PDT 24 2476273580 ps
T30 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.745286498 Jul 13 06:34:58 PM PDT 24 Jul 13 06:35:07 PM PDT 24 3855248905 ps
T24 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3739140083 Jul 13 06:35:04 PM PDT 24 Jul 13 06:35:08 PM PDT 24 3540831899 ps
T140 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3250764922 Jul 13 06:35:52 PM PDT 24 Jul 13 06:35:56 PM PDT 24 3395924079 ps
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T64 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.3452459689 Jul 13 06:35:15 PM PDT 24 Jul 13 06:35:18 PM PDT 24 2494617242 ps
T31 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.2156723842 Jul 13 06:36:54 PM PDT 24 Jul 13 06:37:01 PM PDT 24 4341017741 ps
T87 /workspace/coverage/default/48.sysrst_ctrl_stress_all.3016631155 Jul 13 06:36:51 PM PDT 24 Jul 13 06:37:19 PM PDT 24 10513533194 ps
T19 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1437823420 Jul 13 06:36:08 PM PDT 24 Jul 13 06:36:12 PM PDT 24 5607696761 ps
T58 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.965494468 Jul 13 06:36:33 PM PDT 24 Jul 13 06:36:37 PM PDT 24 2475427496 ps
T20 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3124386062 Jul 13 06:36:23 PM PDT 24 Jul 13 06:36:27 PM PDT 24 6646375507 ps
T21 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3295705657 Jul 13 06:34:59 PM PDT 24 Jul 13 06:35:08 PM PDT 24 9896922348 ps
T53 /workspace/coverage/default/14.sysrst_ctrl_stress_all.140615137 Jul 13 06:35:03 PM PDT 24 Jul 13 06:40:14 PM PDT 24 119671261408 ps
T38 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3467418286 Jul 13 06:36:54 PM PDT 24 Jul 13 06:42:45 PM PDT 24 132715454370 ps
T59 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.4163561621 Jul 13 06:35:22 PM PDT 24 Jul 13 06:36:36 PM PDT 24 27788840975 ps
T60 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.3390541279 Jul 13 06:34:50 PM PDT 24 Jul 13 06:36:11 PM PDT 24 58666425212 ps
T27 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1727119946 Jul 13 06:36:54 PM PDT 24 Jul 13 06:38:50 PM PDT 24 91756035095 ps
T37 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.4187947400 Jul 13 06:37:06 PM PDT 24 Jul 13 06:40:58 PM PDT 24 148737293952 ps
T101 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1154753943 Jul 13 06:35:10 PM PDT 24 Jul 13 06:35:16 PM PDT 24 2186167178 ps
T54 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2736051219 Jul 13 06:35:30 PM PDT 24 Jul 13 06:36:02 PM PDT 24 12424427157 ps
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T104 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.1911204527 Jul 13 06:34:56 PM PDT 24 Jul 13 06:34:59 PM PDT 24 2490453331 ps
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T114 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1778691425 Jul 13 06:34:47 PM PDT 24 Jul 13 06:34:51 PM PDT 24 2469934670 ps
T41 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.297197227 Jul 13 06:35:21 PM PDT 24 Jul 13 06:35:27 PM PDT 24 3683508752 ps
T42 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3976039960 Jul 13 06:35:13 PM PDT 24 Jul 13 06:35:16 PM PDT 24 3168078889 ps
T115 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.190388299 Jul 13 06:35:05 PM PDT 24 Jul 13 06:35:14 PM PDT 24 2611504815 ps
T43 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3212378643 Jul 13 06:36:22 PM PDT 24 Jul 13 06:36:26 PM PDT 24 2932621141 ps
T390 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2403066970 Jul 13 06:35:04 PM PDT 24 Jul 13 06:35:09 PM PDT 24 2621385093 ps
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T44 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.240349519 Jul 13 06:36:36 PM PDT 24 Jul 13 06:36:58 PM PDT 24 47208348587 ps
T55 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.2066460497 Jul 13 06:36:16 PM PDT 24 Jul 13 06:36:23 PM PDT 24 3645168942 ps
T56 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.4209707858 Jul 13 06:35:21 PM PDT 24 Jul 13 06:35:25 PM PDT 24 5534059861 ps
T257 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1758772682 Jul 13 06:35:03 PM PDT 24 Jul 13 06:35:07 PM PDT 24 2536378885 ps
T45 /workspace/coverage/default/37.sysrst_ctrl_stress_all.1234130363 Jul 13 06:36:25 PM PDT 24 Jul 13 06:37:38 PM PDT 24 120109861013 ps
T89 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2388466246 Jul 13 06:36:52 PM PDT 24 Jul 13 06:38:58 PM PDT 24 203462222560 ps
T258 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.2982758557 Jul 13 06:34:39 PM PDT 24 Jul 13 06:34:43 PM PDT 24 2464544418 ps
T259 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3560669615 Jul 13 06:35:52 PM PDT 24 Jul 13 06:36:00 PM PDT 24 2609649230 ps
T260 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.786862715 Jul 13 06:35:52 PM PDT 24 Jul 13 06:36:00 PM PDT 24 3569403632 ps
T329 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.4224934543 Jul 13 06:36:14 PM PDT 24 Jul 13 06:36:19 PM PDT 24 4509767830 ps
T391 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.3584526403 Jul 13 06:36:13 PM PDT 24 Jul 13 06:36:17 PM PDT 24 3332467038 ps
T88 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2130348184 Jul 13 06:34:21 PM PDT 24 Jul 13 06:34:28 PM PDT 24 3372935694 ps
T392 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.4285015088 Jul 13 06:35:04 PM PDT 24 Jul 13 06:35:06 PM PDT 24 2169085042 ps
T69 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.1791454137 Jul 13 06:35:13 PM PDT 24 Jul 13 06:35:45 PM PDT 24 23586377678 ps
T57 /workspace/coverage/default/32.sysrst_ctrl_stress_all.366904297 Jul 13 06:36:04 PM PDT 24 Jul 13 06:36:16 PM PDT 24 7849552434 ps
T70 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.1100708530 Jul 13 06:36:55 PM PDT 24 Jul 13 06:38:19 PM PDT 24 58647324360 ps
T28 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.1181536698 Jul 13 06:35:44 PM PDT 24 Jul 13 06:37:15 PM PDT 24 150815776525 ps
T204 /workspace/coverage/default/8.sysrst_ctrl_smoke.936245382 Jul 13 06:34:51 PM PDT 24 Jul 13 06:34:54 PM PDT 24 2129378267 ps
T205 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2692275923 Jul 13 06:35:24 PM PDT 24 Jul 13 06:35:31 PM PDT 24 2451523579 ps
T206 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.1902119541 Jul 13 06:34:22 PM PDT 24 Jul 13 06:34:30 PM PDT 24 2464142127 ps
T34 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3961279524 Jul 13 06:35:54 PM PDT 24 Jul 13 06:37:34 PM PDT 24 212280599960 ps
T71 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.752826124 Jul 13 06:34:53 PM PDT 24 Jul 13 06:35:11 PM PDT 24 23844337073 ps
T122 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.1020452041 Jul 13 06:35:21 PM PDT 24 Jul 13 06:36:11 PM PDT 24 35126846437 ps
T123 /workspace/coverage/default/36.sysrst_ctrl_alert_test.3710089537 Jul 13 06:36:13 PM PDT 24 Jul 13 06:36:16 PM PDT 24 2033494646 ps
T33 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2635411150 Jul 13 06:34:42 PM PDT 24 Jul 13 06:35:36 PM PDT 24 22456104635 ps
T124 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.4235994591 Jul 13 06:34:22 PM PDT 24 Jul 13 06:34:27 PM PDT 24 2419687303 ps
T125 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.918494857 Jul 13 06:35:36 PM PDT 24 Jul 13 06:35:44 PM PDT 24 2456715925 ps
T126 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.317905382 Jul 13 06:36:01 PM PDT 24 Jul 13 06:36:06 PM PDT 24 2519431030 ps
T127 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2717137056 Jul 13 06:35:41 PM PDT 24 Jul 13 06:38:56 PM PDT 24 73003604225 ps
T128 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1312993823 Jul 13 06:35:13 PM PDT 24 Jul 13 06:35:16 PM PDT 24 2649709487 ps
T73 /workspace/coverage/default/5.sysrst_ctrl_stress_all.2107139438 Jul 13 06:34:53 PM PDT 24 Jul 13 06:35:01 PM PDT 24 13480993202 ps
T239 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.90008808 Jul 13 06:35:14 PM PDT 24 Jul 13 06:38:56 PM PDT 24 89282398399 ps
T29 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.252195447 Jul 13 06:35:52 PM PDT 24 Jul 13 06:35:55 PM PDT 24 2578756532 ps
T393 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2360760794 Jul 13 06:35:22 PM PDT 24 Jul 13 06:35:26 PM PDT 24 3241885909 ps
T394 /workspace/coverage/default/0.sysrst_ctrl_smoke.3381452191 Jul 13 06:34:23 PM PDT 24 Jul 13 06:34:26 PM PDT 24 2139360991 ps
T395 /workspace/coverage/default/23.sysrst_ctrl_alert_test.958903257 Jul 13 06:35:41 PM PDT 24 Jul 13 06:35:48 PM PDT 24 2014832210 ps
T90 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.510652485 Jul 13 06:37:03 PM PDT 24 Jul 13 06:37:40 PM PDT 24 54557026935 ps
T396 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2691629430 Jul 13 06:34:33 PM PDT 24 Jul 13 06:34:38 PM PDT 24 2519280790 ps
T144 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.3984144921 Jul 13 06:35:40 PM PDT 24 Jul 13 06:35:44 PM PDT 24 4713709926 ps
T108 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.388177769 Jul 13 06:34:52 PM PDT 24 Jul 13 06:34:55 PM PDT 24 2677438702 ps
T106 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1356732909 Jul 13 06:35:53 PM PDT 24 Jul 13 06:35:58 PM PDT 24 3243004138 ps
T397 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3424005737 Jul 13 06:35:40 PM PDT 24 Jul 13 06:35:48 PM PDT 24 2232353597 ps
T264 /workspace/coverage/default/39.sysrst_ctrl_stress_all.3965006502 Jul 13 06:36:22 PM PDT 24 Jul 13 06:37:35 PM PDT 24 229135898176 ps
T91 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2031852792 Jul 13 06:37:03 PM PDT 24 Jul 13 06:38:07 PM PDT 24 24831505322 ps
T372 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.3032345697 Jul 13 06:36:35 PM PDT 24 Jul 13 06:45:44 PM PDT 24 203596938331 ps
T109 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2260831037 Jul 13 06:36:13 PM PDT 24 Jul 13 06:36:16 PM PDT 24 6315991521 ps
T250 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.3749521127 Jul 13 06:36:33 PM PDT 24 Jul 13 06:37:21 PM PDT 24 47245555579 ps
T398 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.3997187233 Jul 13 06:34:41 PM PDT 24 Jul 13 06:34:50 PM PDT 24 2614358369 ps
T110 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2635224836 Jul 13 06:35:13 PM PDT 24 Jul 13 06:35:17 PM PDT 24 4056250032 ps
T399 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3056244832 Jul 13 06:36:45 PM PDT 24 Jul 13 06:36:48 PM PDT 24 2631068110 ps
T400 /workspace/coverage/default/20.sysrst_ctrl_alert_test.1988392160 Jul 13 06:35:21 PM PDT 24 Jul 13 06:35:27 PM PDT 24 2011070693 ps
T401 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1746901707 Jul 13 06:34:51 PM PDT 24 Jul 13 06:35:00 PM PDT 24 2609237233 ps
T35 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.725080608 Jul 13 06:35:13 PM PDT 24 Jul 13 06:35:17 PM PDT 24 2787712443 ps
T402 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.516734497 Jul 13 06:36:13 PM PDT 24 Jul 13 06:36:22 PM PDT 24 2459955170 ps
T320 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2463222 Jul 13 06:35:09 PM PDT 24 Jul 13 06:35:12 PM PDT 24 2534283194 ps
T403 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.2426389257 Jul 13 06:35:04 PM PDT 24 Jul 13 06:35:13 PM PDT 24 2510342992 ps
T92 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.1490144874 Jul 13 06:37:03 PM PDT 24 Jul 13 06:37:24 PM PDT 24 20841649363 ps
T404 /workspace/coverage/default/27.sysrst_ctrl_smoke.1987929819 Jul 13 06:35:41 PM PDT 24 Jul 13 06:35:49 PM PDT 24 2110636393 ps
T405 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3693328165 Jul 13 06:35:30 PM PDT 24 Jul 13 06:35:36 PM PDT 24 2010913609 ps
T406 /workspace/coverage/default/39.sysrst_ctrl_smoke.1471294826 Jul 13 06:36:22 PM PDT 24 Jul 13 06:36:29 PM PDT 24 2111073447 ps
T321 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.624772834 Jul 13 06:34:39 PM PDT 24 Jul 13 06:34:47 PM PDT 24 2510634757 ps
T407 /workspace/coverage/default/45.sysrst_ctrl_smoke.2221501059 Jul 13 06:36:43 PM PDT 24 Jul 13 06:36:46 PM PDT 24 2136447356 ps
T408 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.2108564889 Jul 13 06:34:43 PM PDT 24 Jul 13 06:34:51 PM PDT 24 5273922045 ps
T240 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2907883249 Jul 13 06:37:06 PM PDT 24 Jul 13 06:43:24 PM PDT 24 194834266731 ps
T409 /workspace/coverage/default/13.sysrst_ctrl_alert_test.1174747950 Jul 13 06:35:03 PM PDT 24 Jul 13 06:35:11 PM PDT 24 2013448526 ps
T241 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.325976894 Jul 13 06:34:29 PM PDT 24 Jul 13 06:34:34 PM PDT 24 2552454114 ps
T164 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.3560573125 Jul 13 06:35:40 PM PDT 24 Jul 13 06:35:51 PM PDT 24 3342673481 ps
T245 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.78095970 Jul 13 06:37:04 PM PDT 24 Jul 13 06:37:54 PM PDT 24 76983903004 ps
T80 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3843087860 Jul 13 06:36:20 PM PDT 24 Jul 13 06:36:55 PM PDT 24 51478518834 ps
T410 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3933572181 Jul 13 06:35:14 PM PDT 24 Jul 13 06:35:17 PM PDT 24 2535358977 ps
T347 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.4065881572 Jul 13 06:35:15 PM PDT 24 Jul 13 06:42:33 PM PDT 24 181858936345 ps
T36 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1732328783 Jul 13 06:35:36 PM PDT 24 Jul 13 06:35:39 PM PDT 24 2437818163 ps
T411 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.3989612380 Jul 13 06:35:41 PM PDT 24 Jul 13 06:35:45 PM PDT 24 2364613024 ps
T412 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2123734132 Jul 13 06:35:41 PM PDT 24 Jul 13 06:35:45 PM PDT 24 2623253095 ps
T413 /workspace/coverage/default/7.sysrst_ctrl_stress_all.2475515014 Jul 13 06:34:55 PM PDT 24 Jul 13 06:35:36 PM PDT 24 15473484117 ps
T414 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2629543669 Jul 13 06:36:05 PM PDT 24 Jul 13 06:36:10 PM PDT 24 2619146109 ps
T131 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.461306329 Jul 13 06:34:54 PM PDT 24 Jul 13 06:37:56 PM PDT 24 1039183990076 ps
T415 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.2157663716 Jul 13 06:36:23 PM PDT 24 Jul 13 06:36:27 PM PDT 24 3660827192 ps
T247 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2533973022 Jul 13 06:34:53 PM PDT 24 Jul 13 06:38:06 PM PDT 24 71761368132 ps
T416 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2225163263 Jul 13 06:35:21 PM PDT 24 Jul 13 06:35:23 PM PDT 24 2070863604 ps
T270 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.4132692863 Jul 13 06:34:53 PM PDT 24 Jul 13 06:34:58 PM PDT 24 22490356332 ps
T291 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.4089151440 Jul 13 06:36:23 PM PDT 24 Jul 13 06:36:28 PM PDT 24 3573589566 ps
T292 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.1564892227 Jul 13 06:34:24 PM PDT 24 Jul 13 06:34:33 PM PDT 24 2508968643 ps
T81 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.118035100 Jul 13 06:34:58 PM PDT 24 Jul 13 06:35:42 PM PDT 24 67593726845 ps
T293 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.835772977 Jul 13 06:34:56 PM PDT 24 Jul 13 06:34:59 PM PDT 24 4476921942 ps
T294 /workspace/coverage/default/23.sysrst_ctrl_smoke.1804527601 Jul 13 06:35:31 PM PDT 24 Jul 13 06:35:34 PM PDT 24 2131693978 ps
T248 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3400740664 Jul 13 06:37:10 PM PDT 24 Jul 13 06:37:26 PM PDT 24 85763118549 ps
T271 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.1013594597 Jul 13 06:34:40 PM PDT 24 Jul 13 06:35:38 PM PDT 24 22015062913 ps
T295 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.2998242014 Jul 13 06:36:03 PM PDT 24 Jul 13 06:36:12 PM PDT 24 2460606303 ps
T296 /workspace/coverage/default/10.sysrst_ctrl_smoke.4006556978 Jul 13 06:34:53 PM PDT 24 Jul 13 06:35:01 PM PDT 24 2113053007 ps
T132 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.2648289187 Jul 13 06:36:43 PM PDT 24 Jul 13 06:36:52 PM PDT 24 3494669964 ps
T417 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1139137079 Jul 13 06:35:01 PM PDT 24 Jul 13 06:35:03 PM PDT 24 2867271903 ps
T418 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.1928465866 Jul 13 06:36:14 PM PDT 24 Jul 13 06:36:18 PM PDT 24 2482563078 ps
T419 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.3092392515 Jul 13 06:34:38 PM PDT 24 Jul 13 06:34:46 PM PDT 24 2393795726 ps
T84 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3451447885 Jul 13 06:34:42 PM PDT 24 Jul 13 06:34:47 PM PDT 24 5695650035 ps
T420 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.277344736 Jul 13 06:35:52 PM PDT 24 Jul 13 06:36:01 PM PDT 24 2513680899 ps
T421 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.420366735 Jul 13 06:36:36 PM PDT 24 Jul 13 06:36:40 PM PDT 24 3371038813 ps
T422 /workspace/coverage/default/47.sysrst_ctrl_alert_test.4078554858 Jul 13 06:36:54 PM PDT 24 Jul 13 06:36:59 PM PDT 24 2030557697 ps
T142 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.3629769682 Jul 13 06:36:49 PM PDT 24 Jul 13 06:36:56 PM PDT 24 2367339433 ps
T262 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.625207184 Jul 13 06:35:40 PM PDT 24 Jul 13 06:36:26 PM PDT 24 64725335283 ps
T133 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.3920731552 Jul 13 06:34:54 PM PDT 24 Jul 13 06:35:00 PM PDT 24 3145425090 ps
T423 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.764451814 Jul 13 06:36:45 PM PDT 24 Jul 13 06:36:55 PM PDT 24 2610847740 ps
T348 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.433723483 Jul 13 06:36:45 PM PDT 24 Jul 13 06:45:32 PM PDT 24 192328341131 ps
T317 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2631461026 Jul 13 06:35:10 PM PDT 24 Jul 13 06:35:13 PM PDT 24 2489224480 ps
T424 /workspace/coverage/default/28.sysrst_ctrl_smoke.3265226232 Jul 13 06:35:52 PM PDT 24 Jul 13 06:36:00 PM PDT 24 2110776376 ps
T425 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.1623485011 Jul 13 06:34:22 PM PDT 24 Jul 13 06:34:30 PM PDT 24 2608380820 ps
T322 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3981768924 Jul 13 06:34:50 PM PDT 24 Jul 13 06:34:56 PM PDT 24 2512503394 ps
T242 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3988323890 Jul 13 06:37:04 PM PDT 24 Jul 13 06:38:19 PM PDT 24 31172242202 ps
T297 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.3209955776 Jul 13 06:35:53 PM PDT 24 Jul 13 06:36:01 PM PDT 24 3123949276 ps
T93 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1582322268 Jul 13 06:36:42 PM PDT 24 Jul 13 06:37:04 PM PDT 24 19876898567 ps
T426 /workspace/coverage/default/25.sysrst_ctrl_smoke.1806438835 Jul 13 06:35:39 PM PDT 24 Jul 13 06:35:42 PM PDT 24 2122709218 ps
T427 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.4006482040 Jul 13 06:36:14 PM PDT 24 Jul 13 06:36:18 PM PDT 24 2526463620 ps
T428 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.3171382696 Jul 13 06:36:20 PM PDT 24 Jul 13 06:36:30 PM PDT 24 3212566749 ps
T429 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.969962117 Jul 13 06:34:54 PM PDT 24 Jul 13 06:34:58 PM PDT 24 2640158652 ps
T430 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2815492065 Jul 13 06:34:51 PM PDT 24 Jul 13 06:34:54 PM PDT 24 3352022460 ps
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T148 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.4012108161 Jul 13 06:36:06 PM PDT 24 Jul 13 06:36:08 PM PDT 24 2605748195 ps
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T156 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3926771950 Jul 13 06:35:28 PM PDT 24 Jul 13 06:36:20 PM PDT 24 46063294148 ps
T455 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.53914078 Jul 13 06:35:03 PM PDT 24 Jul 13 06:35:08 PM PDT 24 4678195274 ps
T456 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3036045144 Jul 13 06:34:55 PM PDT 24 Jul 13 06:35:00 PM PDT 24 2087017941 ps
T457 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3391525674 Jul 13 06:35:39 PM PDT 24 Jul 13 06:35:48 PM PDT 24 3138094450 ps
T458 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2859742037 Jul 13 06:36:24 PM PDT 24 Jul 13 06:36:33 PM PDT 24 2614563737 ps
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T234 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2123331678 Jul 13 06:37:04 PM PDT 24 Jul 13 06:37:22 PM PDT 24 23608096288 ps
T459 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2726134586 Jul 13 06:36:46 PM PDT 24 Jul 13 06:36:57 PM PDT 24 3245701504 ps
T386 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2335957727 Jul 13 06:37:05 PM PDT 24 Jul 13 06:37:29 PM PDT 24 35831195579 ps
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