Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.76 99.31 96.36 100.00 96.15 98.78 99.42 94.27


Total tests in report: 906
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
61.18 61.18 79.21 79.21 68.20 68.20 92.01 92.01 21.15 21.15 79.67 79.67 71.10 71.10 16.90 16.90 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4198012021
78.93 17.75 88.90 9.68 80.38 12.18 93.84 1.83 53.85 32.69 89.02 9.35 84.10 13.01 62.39 45.49 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1038220805
83.40 4.48 91.98 3.08 83.85 3.46 94.98 1.14 66.03 12.18 91.61 2.59 92.10 8.00 63.27 0.88 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1560208485
86.44 3.04 95.63 3.66 89.41 5.56 96.58 1.60 66.03 0.00 95.27 3.66 93.35 1.25 68.81 5.53 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.66996860
89.00 2.56 96.81 1.18 90.55 1.14 96.58 0.00 75.00 8.97 96.30 1.04 96.24 2.89 71.50 2.69 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.995795374
91.03 2.04 97.89 1.08 92.21 1.67 96.58 0.00 85.26 10.26 97.45 1.15 96.34 0.10 71.50 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2930258231
92.21 1.17 97.93 0.04 93.43 1.21 97.26 0.68 85.26 0.00 97.56 0.11 96.34 0.00 77.67 6.17 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3400102100
92.86 0.66 98.02 0.09 93.50 0.08 97.26 0.00 87.18 1.92 97.71 0.15 96.53 0.19 79.82 2.15 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.28080071
93.40 0.54 98.21 0.19 93.63 0.13 97.26 0.00 89.74 2.56 97.86 0.15 96.92 0.39 80.22 0.39 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2317928735
93.87 0.47 98.36 0.15 93.78 0.15 97.72 0.46 90.38 0.64 97.97 0.11 97.11 0.19 81.78 1.57 /workspace/coverage/default/43.sysrst_ctrl_stress_all.3791444930
94.19 0.31 98.47 0.11 93.91 0.13 97.72 0.00 91.67 1.28 98.11 0.15 97.40 0.29 82.03 0.24 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2676380152
94.50 0.31 98.56 0.09 93.91 0.00 97.72 0.00 91.67 0.00 98.11 0.00 97.40 0.00 84.13 2.11 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2898483900
94.78 0.28 98.56 0.00 93.93 0.03 99.32 1.60 91.67 0.00 98.11 0.00 97.50 0.10 84.38 0.24 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.1715627692
95.05 0.27 98.60 0.04 94.74 0.81 99.77 0.46 91.67 0.00 98.11 0.00 97.59 0.10 84.87 0.49 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2276653716
95.26 0.21 98.64 0.04 94.77 0.03 99.77 0.00 92.31 0.64 98.15 0.04 97.69 0.10 85.50 0.64 /workspace/coverage/default/26.sysrst_ctrl_stress_all.243124781
95.46 0.20 98.69 0.06 94.82 0.05 99.77 0.00 92.31 0.00 98.15 0.00 97.69 0.00 86.78 1.27 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.593926827
95.65 0.19 98.69 0.00 94.82 0.00 99.77 0.00 92.31 0.00 98.15 0.00 97.69 0.00 88.10 1.32 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.636371368
95.83 0.19 98.73 0.04 94.87 0.05 99.77 0.00 92.95 0.64 98.19 0.04 97.78 0.10 88.54 0.44 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1684441516
96.01 0.18 98.77 0.04 94.94 0.08 99.77 0.00 93.59 0.64 98.23 0.04 97.88 0.10 88.88 0.34 /workspace/coverage/default/45.sysrst_ctrl_stress_all.1967978995
96.18 0.17 98.81 0.04 95.15 0.20 99.77 0.00 93.59 0.00 98.30 0.07 98.46 0.58 89.18 0.29 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.327539159
96.33 0.15 98.86 0.06 95.22 0.08 99.77 0.00 94.23 0.64 98.37 0.07 98.65 0.19 89.18 0.00 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.3481067996
96.45 0.13 98.90 0.04 95.25 0.03 99.77 0.00 94.23 0.00 98.41 0.04 98.75 0.10 89.86 0.69 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.2560727806
96.57 0.12 98.94 0.04 95.27 0.03 99.77 0.00 94.87 0.64 98.45 0.04 98.84 0.10 89.86 0.00 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.1415269599
96.69 0.12 98.97 0.04 95.30 0.03 99.77 0.00 95.51 0.64 98.48 0.04 98.94 0.10 89.86 0.00 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.1575791209
96.81 0.12 99.01 0.04 95.32 0.03 99.77 0.00 96.15 0.64 98.52 0.04 99.04 0.10 89.86 0.00 /workspace/coverage/default/48.sysrst_ctrl_stress_all.4181773198
96.91 0.10 99.07 0.06 95.40 0.08 99.77 0.00 96.15 0.00 98.52 0.00 99.04 0.00 90.45 0.59 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.15905137
96.99 0.08 99.07 0.00 95.40 0.00 99.77 0.00 96.15 0.00 98.52 0.00 99.04 0.00 90.99 0.54 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.2527381732
97.05 0.06 99.07 0.00 95.42 0.03 99.77 0.00 96.15 0.00 98.52 0.00 99.04 0.00 91.38 0.39 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4016693831
97.10 0.05 99.14 0.07 95.50 0.08 100.00 0.23 96.15 0.00 98.52 0.00 99.04 0.00 91.38 0.00 /workspace/coverage/default/36.sysrst_ctrl_alert_test.2872581282
97.16 0.05 99.16 0.02 95.53 0.03 100.00 0.00 96.15 0.00 98.56 0.04 99.23 0.19 91.48 0.10 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.3262306355
97.21 0.05 99.18 0.02 95.83 0.30 100.00 0.00 96.15 0.00 98.60 0.04 99.23 0.00 91.48 0.00 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1624732268
97.26 0.05 99.20 0.02 95.83 0.00 100.00 0.00 96.15 0.00 98.63 0.04 99.23 0.00 91.77 0.29 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1051919274
97.30 0.04 99.22 0.02 95.83 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.23 0.00 92.07 0.29 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1425149085
97.34 0.04 99.22 0.00 96.08 0.25 100.00 0.00 96.15 0.00 98.63 0.00 99.23 0.00 92.07 0.00 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1246669993
97.37 0.03 99.22 0.00 96.11 0.03 100.00 0.00 96.15 0.00 98.63 0.00 99.23 0.00 92.26 0.20 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.2397591046
97.40 0.03 99.22 0.00 96.21 0.10 100.00 0.00 96.15 0.00 98.63 0.00 99.23 0.00 92.36 0.10 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.4023935584
97.43 0.03 99.22 0.00 96.21 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.23 0.00 92.56 0.20 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.3842264224
97.46 0.03 99.22 0.00 96.21 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.23 0.00 92.75 0.20 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.213833551
97.48 0.03 99.22 0.00 96.21 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.42 0.19 92.75 0.00 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3846612139
97.51 0.02 99.23 0.02 96.26 0.05 100.00 0.00 96.15 0.00 98.63 0.00 99.42 0.00 92.85 0.10 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3189126408
97.53 0.02 99.23 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.42 0.00 93.00 0.15 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.761153723
97.55 0.02 99.23 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.63 0.00 99.42 0.00 93.14 0.15 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.955331499
97.57 0.02 99.27 0.04 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.07 99.42 0.00 93.14 0.00 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.2282178631
97.58 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.24 0.10 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.546936044
97.59 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.34 0.10 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3952062885
97.61 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.44 0.10 /workspace/coverage/default/11.sysrst_ctrl_stress_all.187168571
97.62 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.54 0.10 /workspace/coverage/default/28.sysrst_ctrl_stress_all.179081351
97.64 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.63 0.10 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1877022033
97.65 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.73 0.10 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1299389222
97.66 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.83 0.10 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1601883905
97.68 0.01 99.27 0.00 96.26 0.00 100.00 0.00 96.15 0.00 98.71 0.00 99.42 0.00 93.93 0.10 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2676531032
97.69 0.01 99.29 0.02 96.26 0.00 100.00 0.00 96.15 0.00 98.74 0.04 99.42 0.00 93.93 0.00 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3742836154
97.69 0.01 99.31 0.02 96.26 0.00 100.00 0.00 96.15 0.00 98.78 0.04 99.42 0.00 93.93 0.00 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1577634731
97.70 0.01 99.31 0.00 96.31 0.05 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 93.93 0.00 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.4040782489
97.71 0.01 99.31 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 93.98 0.05 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3734526682
97.71 0.01 99.31 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 94.03 0.05 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2947042778
97.72 0.01 99.31 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 94.07 0.05 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1780804179
97.73 0.01 99.31 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 94.12 0.05 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1712096781
97.74 0.01 99.31 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 94.17 0.05 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.2146938160
97.74 0.01 99.31 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 94.22 0.05 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.719553655
97.75 0.01 99.31 0.00 96.31 0.00 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 94.27 0.05 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1161019535
97.75 0.01 99.31 0.00 96.33 0.03 100.00 0.00 96.15 0.00 98.78 0.00 99.42 0.00 94.27 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.3119359016

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2878419383
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3344212149
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.721872328
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.2023678052
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2645781273
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3202155442
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3870752363
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.738080513
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.381303886
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.1378685045
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.4154292600
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2435613377
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3912585143
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.1649484727
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.403723650
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.150828911
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1803225885
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2013522041
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1677186737
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2384042348
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.1742260099
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3842870274
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.4104322749
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2736381249
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1859290777
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.954451767
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3843448647
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2754584050
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2051614557
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.762409959
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3556194242
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2370178652
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1178098247
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.3589294271
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.3609678845
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.4208496591
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3701504592
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2637250900
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3947356743
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2214499566
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1379489335
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1609347960
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.2244660128
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2891220883
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2036659243
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1135844955
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.1491844728
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.2221413865
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.53915427
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2154219027
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.2549969563
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.1733392268
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2752020106
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.221945693
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2578896893
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2630241827
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2166333184
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.723625140
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2836539681
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2414588787
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.1481982880
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.3492647115
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.4107203706
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3394837265
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.3834243055
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.1671227839
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.836295150
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2628985676
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.1079171938
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3688488456
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.1553035880
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.562887127
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.328114654
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1689673995
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1924617304
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.3898458990
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.136902849
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2760533769
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2848045546
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.276639320
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1892599992
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.3368296458
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.2384664992
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.3386196212
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.3300361125
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.648479614
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.1424907863
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.528186670
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.1754295413
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.897188744
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.973577339
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.1081604304
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.3447375801
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.1812167040
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.1095980456
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.3760356361
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/workspace/coverage/default/43.sysrst_ctrl_smoke.1739826194
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3411253689
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3867670595
/workspace/coverage/default/44.sysrst_ctrl_alert_test.603189512
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2221021988
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.3517034314
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1762214633
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2702769458
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1628283511
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4027206782
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3665773336
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3392596559
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3964160156
/workspace/coverage/default/44.sysrst_ctrl_smoke.4155490424
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1022353673
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.977685219
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1804527107
/workspace/coverage/default/45.sysrst_ctrl_alert_test.138180427
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2001521427
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2827972663
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.95087455
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.804049719
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2123060268
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3830734026
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2012132546
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2441748876
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2648424740
/workspace/coverage/default/45.sysrst_ctrl_smoke.71198762
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3247291032
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1043918376
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2512975240
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.906124782
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3421078582
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1863541793
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2378654849
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3349897449
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.2589059296
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.495181641
/workspace/coverage/default/46.sysrst_ctrl_smoke.583749755
/workspace/coverage/default/46.sysrst_ctrl_stress_all.1215838062
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1734488274
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.759571713
/workspace/coverage/default/47.sysrst_ctrl_alert_test.4261932255
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2333061290
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.3900059103
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.916787689
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3420150002
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2544940542
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.297112896
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.4155822511
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.325129252
/workspace/coverage/default/47.sysrst_ctrl_smoke.2150692277
/workspace/coverage/default/47.sysrst_ctrl_stress_all.704444838
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.103727766
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1374355315
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.4044063133
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.4029446281
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1400516213
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3987550978
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3805011284
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1617866451
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2188895730
/workspace/coverage/default/48.sysrst_ctrl_smoke.3824066713
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3003749696
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.453375630
/workspace/coverage/default/49.sysrst_ctrl_alert_test.1778553073
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1529536102
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1965285198
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3442755303
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2790089930
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.183700150
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3398467641
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.511952582
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.919302568
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3787907744
/workspace/coverage/default/49.sysrst_ctrl_smoke.125724577
/workspace/coverage/default/49.sysrst_ctrl_stress_all.401534800
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3646022338
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2700134423
/workspace/coverage/default/5.sysrst_ctrl_alert_test.4158569217
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4087902073
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1523879255
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1007795725
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.855366323
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.797222910
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.578202905
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3507556904
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2073616594
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1312275256
/workspace/coverage/default/5.sysrst_ctrl_smoke.453665525
/workspace/coverage/default/5.sysrst_ctrl_stress_all.4032985471
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3028959413
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.881702523
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3407541562
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4237450867
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2459957301
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1662556172
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3523421439
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.403418198
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3681220652
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.4212105992
/workspace/coverage/default/6.sysrst_ctrl_alert_test.377625699
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2138958230
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1281112990
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3905327733
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2024147774
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2435537653
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.1120242021
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2442112689
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1259452779
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2058469854
/workspace/coverage/default/6.sysrst_ctrl_smoke.2191699968
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2931035593
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.542788650
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.4009379539
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3847745099
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1504768768
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2129696767
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.290719925
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2792527859
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3151142496
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4073029955
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.473695329
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1831217724
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1818547177
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2757621693
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3454115206
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3458743549
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.691170603
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3420039854
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1258280940
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1401997999
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1703757040
/workspace/coverage/default/7.sysrst_ctrl_smoke.2578168794
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3145970547
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.418420038
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3473738465
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2392871053
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3469845148
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1496751790
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.309338024
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2577349183
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.362219254
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2230266087
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1284057397
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3433133413
/workspace/coverage/default/8.sysrst_ctrl_alert_test.235322073
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.169876143
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.504261678
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.439814305
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2830662790
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.3163573566
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1038743116
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.412597877
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.896059554
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2500158429
/workspace/coverage/default/8.sysrst_ctrl_smoke.3971294392
/workspace/coverage/default/8.sysrst_ctrl_stress_all.467576255
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.147343276
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1662477401
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3494263176
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.248875322
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3152594496
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.1582317177
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.879424244
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.3027590484
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.727125300
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2344224839
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.828314498
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3491843956
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.3609504361
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1760839620
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.1867922753
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1488127326
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1099001254
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2177712627
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2683906006
/workspace/coverage/default/9.sysrst_ctrl_smoke.3201141648
/workspace/coverage/default/9.sysrst_ctrl_stress_all.4108541676
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.802557970
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.2178074988
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1947018386
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3400429000
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.3499576364
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.735104905
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3925644241
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2081750022
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.275751640
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1370629644



Total test records in report: 906
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1905789522 Jul 14 06:41:57 PM PDT 24 Jul 14 06:42:04 PM PDT 24 2625599089 ps
T5 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.256673413 Jul 14 06:41:23 PM PDT 24 Jul 14 06:41:42 PM PDT 24 2518067949 ps
T6 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.169876143 Jul 14 06:41:01 PM PDT 24 Jul 14 06:41:05 PM PDT 24 3478571739 ps
T21 /workspace/coverage/default/27.sysrst_ctrl_alert_test.211202177 Jul 14 06:41:49 PM PDT 24 Jul 14 06:41:55 PM PDT 24 2113409900 ps
T22 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3562023377 Jul 14 06:41:16 PM PDT 24 Jul 14 06:41:28 PM PDT 24 2532455362 ps
T1 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.4198012021 Jul 14 06:42:41 PM PDT 24 Jul 14 06:43:02 PM PDT 24 91044797279 ps
T14 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1370629644 Jul 14 06:42:41 PM PDT 24 Jul 14 06:46:40 PM PDT 24 97078931494 ps
T2 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.3494263176 Jul 14 06:42:44 PM PDT 24 Jul 14 06:44:16 PM PDT 24 34657283807 ps
T15 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2830662790 Jul 14 06:41:01 PM PDT 24 Jul 14 06:41:15 PM PDT 24 4838484207 ps
T16 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.4106238680 Jul 14 06:41:56 PM PDT 24 Jul 14 06:42:01 PM PDT 24 2620408288 ps
T17 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.473695329 Jul 14 06:42:43 PM PDT 24 Jul 14 06:42:57 PM PDT 24 25855182155 ps
T18 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2086121881 Jul 14 06:42:12 PM PDT 24 Jul 14 06:42:22 PM PDT 24 3541238147 ps
T19 /workspace/coverage/default/36.sysrst_ctrl_alert_test.2872581282 Jul 14 06:42:05 PM PDT 24 Jul 14 06:42:12 PM PDT 24 2013391369 ps
T3 /workspace/coverage/default/43.sysrst_ctrl_stress_all.3791444930 Jul 14 06:42:17 PM PDT 24 Jul 14 06:44:08 PM PDT 24 865267131280 ps
T20 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.2575529439 Jul 14 06:42:16 PM PDT 24 Jul 14 06:42:20 PM PDT 24 2190907424 ps
T7 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.1965285198 Jul 14 06:42:43 PM PDT 24 Jul 14 06:43:23 PM PDT 24 49739303304 ps
T60 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.4023935584 Jul 14 06:40:34 PM PDT 24 Jul 14 06:40:42 PM PDT 24 2523989891 ps
T61 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3436248337 Jul 14 06:42:11 PM PDT 24 Jul 14 06:42:16 PM PDT 24 2519024494 ps
T62 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.1678105916 Jul 14 06:40:31 PM PDT 24 Jul 14 06:40:44 PM PDT 24 2237737633 ps
T63 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.66996860 Jul 14 06:42:29 PM PDT 24 Jul 14 06:42:38 PM PDT 24 2509937585 ps
T64 /workspace/coverage/default/25.sysrst_ctrl_alert_test.608864825 Jul 14 06:41:23 PM PDT 24 Jul 14 06:41:39 PM PDT 24 2072029093 ps
T45 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3381411759 Jul 14 06:40:30 PM PDT 24 Jul 14 06:40:40 PM PDT 24 2194529237 ps
T29 /workspace/coverage/default/36.sysrst_ctrl_stress_all.3411976221 Jul 14 06:42:03 PM PDT 24 Jul 14 06:42:09 PM PDT 24 10349584365 ps
T8 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2868972787 Jul 14 06:41:29 PM PDT 24 Jul 14 06:42:05 PM PDT 24 14482066029 ps
T52 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.919302568 Jul 14 06:42:35 PM PDT 24 Jul 14 06:42:42 PM PDT 24 2040377916 ps
T9 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.309338024 Jul 14 06:42:44 PM PDT 24 Jul 14 06:43:15 PM PDT 24 43451923815 ps
T53 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3075553447 Jul 14 06:41:13 PM PDT 24 Jul 14 06:41:22 PM PDT 24 5388661280 ps
T10 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.955331499 Jul 14 06:41:21 PM PDT 24 Jul 14 06:45:23 PM PDT 24 85647737974 ps
T54 /workspace/coverage/default/46.sysrst_ctrl_alert_test.1043918376 Jul 14 06:42:29 PM PDT 24 Jul 14 06:42:36 PM PDT 24 2007828861 ps
T11 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.921898938 Jul 14 06:41:56 PM PDT 24 Jul 14 06:42:09 PM PDT 24 3107467676 ps
T46 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.761153723 Jul 14 06:41:15 PM PDT 24 Jul 14 06:41:28 PM PDT 24 3349619669 ps
T70 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.1418577231 Jul 14 06:40:58 PM PDT 24 Jul 14 06:41:08 PM PDT 24 2510019115 ps
T12 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.15905137 Jul 14 06:42:40 PM PDT 24 Jul 14 06:44:04 PM PDT 24 63857257170 ps
T71 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3805011284 Jul 14 06:42:34 PM PDT 24 Jul 14 06:42:38 PM PDT 24 2631616043 ps
T220 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1127925575 Jul 14 06:41:28 PM PDT 24 Jul 14 07:07:34 PM PDT 24 652360119575 ps
T221 /workspace/coverage/default/7.sysrst_ctrl_alert_test.1831217724 Jul 14 06:40:58 PM PDT 24 Jul 14 06:41:05 PM PDT 24 2010932702 ps
T13 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2577349183 Jul 14 06:42:41 PM PDT 24 Jul 14 06:44:04 PM PDT 24 142096995636 ps
T222 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.788257625 Jul 14 06:41:16 PM PDT 24 Jul 14 06:41:27 PM PDT 24 2039585509 ps
T47 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2001521427 Jul 14 06:42:25 PM PDT 24 Jul 14 06:42:30 PM PDT 24 3246471356 ps
T30 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.3255948679 Jul 14 06:42:20 PM PDT 24 Jul 14 06:42:29 PM PDT 24 2483762515 ps
T31 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.630818184 Jul 14 06:41:14 PM PDT 24 Jul 14 06:41:24 PM PDT 24 2468177909 ps
T27 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.923797262 Jul 14 06:41:24 PM PDT 24 Jul 14 06:41:42 PM PDT 24 5034326545 ps
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T132 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3393575400 Jul 14 06:41:41 PM PDT 24 Jul 14 06:42:40 PM PDT 24 89558168527 ps
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T56 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1804527107 Jul 14 06:42:27 PM PDT 24 Jul 14 06:42:35 PM PDT 24 5055661863 ps
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T48 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.2317928735 Jul 14 06:41:08 PM PDT 24 Jul 14 06:42:14 PM PDT 24 26332699987 ps
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T65 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.412597877 Jul 14 06:40:57 PM PDT 24 Jul 14 06:41:05 PM PDT 24 2450642158 ps
T57 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1975624203 Jul 14 06:40:34 PM PDT 24 Jul 14 06:40:42 PM PDT 24 4562828191 ps
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T39 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1038220805 Jul 14 06:41:19 PM PDT 24 Jul 14 06:42:59 PM PDT 24 144189653778 ps
T212 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2693228033 Jul 14 06:41:19 PM PDT 24 Jul 14 06:41:33 PM PDT 24 2627189669 ps
T213 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.2648424740 Jul 14 06:42:24 PM PDT 24 Jul 14 06:42:28 PM PDT 24 2531583434 ps
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T216 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3537304871 Jul 14 06:40:37 PM PDT 24 Jul 14 06:40:44 PM PDT 24 2516373808 ps
T217 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1332646634 Jul 14 06:41:05 PM PDT 24 Jul 14 06:41:12 PM PDT 24 2024623877 ps
T58 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.701403713 Jul 14 06:41:05 PM PDT 24 Jul 14 06:41:08 PM PDT 24 2835773790 ps
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T68 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.2068619853 Jul 14 06:41:22 PM PDT 24 Jul 14 06:41:40 PM PDT 24 2488015707 ps
T49 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4087902073 Jul 14 06:40:56 PM PDT 24 Jul 14 06:41:01 PM PDT 24 3291827235 ps
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T69 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3639846020 Jul 14 06:41:18 PM PDT 24 Jul 14 06:41:38 PM PDT 24 2446662580 ps
T316 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.3567074698 Jul 14 06:42:17 PM PDT 24 Jul 14 06:42:22 PM PDT 24 4224535165 ps
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T385 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.3282084876 Jul 14 06:42:11 PM PDT 24 Jul 14 06:42:15 PM PDT 24 2504183799 ps
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T387 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4027206782 Jul 14 06:42:31 PM PDT 24 Jul 14 06:42:34 PM PDT 24 2628815633 ps
T388 /workspace/coverage/default/26.sysrst_ctrl_smoke.4261460516 Jul 14 06:41:22 PM PDT 24 Jul 14 06:41:43 PM PDT 24 2112785890 ps
T43 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.3856829672 Jul 14 06:42:07 PM PDT 24 Jul 14 06:42:16 PM PDT 24 3211483003 ps
T72 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.1863541793 Jul 14 06:42:33 PM PDT 24 Jul 14 06:42:41 PM PDT 24 5403128066 ps
T347 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.544203134 Jul 14 06:41:35 PM PDT 24 Jul 14 06:44:52 PM PDT 24 147851325645 ps
T389 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.790484468 Jul 14 06:41:06 PM PDT 24 Jul 14 06:41:12 PM PDT 24 2511187915 ps
T259 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2898483900 Jul 14 06:42:36 PM PDT 24 Jul 14 06:43:59 PM PDT 24 128840038137 ps
T390 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1204456635 Jul 14 06:42:12 PM PDT 24 Jul 14 06:42:21 PM PDT 24 3023988600 ps
T391 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.3448547938 Jul 14 06:40:29 PM PDT 24 Jul 14 06:40:44 PM PDT 24 2455810186 ps
T98 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3454115206 Jul 14 06:41:07 PM PDT 24 Jul 14 06:42:22 PM PDT 24 30098335644 ps
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T393 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3507556904 Jul 14 06:40:54 PM PDT 24 Jul 14 06:40:59 PM PDT 24 2474583109 ps
T260 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3469845148 Jul 14 06:42:42 PM PDT 24 Jul 14 06:43:41 PM PDT 24 39232044218 ps
T394 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.495181641 Jul 14 06:42:27 PM PDT 24 Jul 14 06:42:30 PM PDT 24 2530801935 ps
T51 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2303829174 Jul 14 06:41:13 PM PDT 24 Jul 14 06:41:42 PM PDT 24 30208045070 ps
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T28 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.977685219 Jul 14 06:42:23 PM PDT 24 Jul 14 06:42:55 PM PDT 24 22646530315 ps
T308 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2721224319 Jul 14 06:41:05 PM PDT 24 Jul 14 06:41:12 PM PDT 24 4048609069 ps
T309 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2218234915 Jul 14 06:41:17 PM PDT 24 Jul 14 06:41:32 PM PDT 24 2449761447 ps
T310 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.366672725 Jul 14 06:42:09 PM PDT 24 Jul 14 06:42:13 PM PDT 24 2532847738 ps
T311 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.219339021 Jul 14 06:41:22 PM PDT 24 Jul 14 06:41:40 PM PDT 24 4837739852 ps
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T314 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.297112896 Jul 14 06:42:33 PM PDT 24 Jul 14 06:42:36 PM PDT 24 2473042834 ps
T263 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.159577235 Jul 14 06:40:52 PM PDT 24 Jul 14 06:43:53 PM PDT 24 75148871137 ps
T315 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.781037473 Jul 14 06:41:56 PM PDT 24 Jul 14 06:42:02 PM PDT 24 2622546276 ps
T59 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.864019916 Jul 14 06:41:44 PM PDT 24 Jul 14 06:41:56 PM PDT 24 5301893819 ps
T144 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2024147774 Jul 14 06:41:11 PM PDT 24 Jul 14 06:41:23 PM PDT 24 2627792371 ps
T145 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.3124218328 Jul 14 06:41:28 PM PDT 24 Jul 14 06:41:43 PM PDT 24 3041761201 ps
T95 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3183811432 Jul 14 06:41:13 PM PDT 24 Jul 14 06:41:29 PM PDT 24 3500781787 ps
T146 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1703757040 Jul 14 06:40:56 PM PDT 24 Jul 14 06:40:59 PM PDT 24 2523262700 ps
T147 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.283883395 Jul 14 06:41:48 PM PDT 24 Jul 14 06:42:00 PM PDT 24 2449740800 ps
T123 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.3293577302 Jul 14 06:41:31 PM PDT 24 Jul 14 06:41:46 PM PDT 24 3373846609 ps
T148 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2111748307 Jul 14 06:41:24 PM PDT 24 Jul 14 06:41:41 PM PDT 24 2466142756 ps
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T150 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.3134920172 Jul 14 06:41:16 PM PDT 24 Jul 14 06:41:28 PM PDT 24 2461203640 ps
T395 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.3952996813 Jul 14 06:41:05 PM PDT 24 Jul 14 06:41:11 PM PDT 24 2622071786 ps
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T231 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.1638730579 Jul 14 06:41:53 PM PDT 24 Jul 14 06:42:03 PM PDT 24 2791932822 ps
T262 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.4154235145 Jul 14 06:40:56 PM PDT 24 Jul 14 06:41:59 PM PDT 24 45364146971 ps
T41 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1560208485 Jul 14 06:41:05 PM PDT 24 Jul 14 06:42:24 PM PDT 24 34388874292 ps
T225 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3836896357 Jul 14 06:41:47 PM PDT 24 Jul 14 06:41:54 PM PDT 24 2632918840 ps
T94 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.4220777155 Jul 14 06:41:43 PM PDT 24 Jul 14 06:44:18 PM PDT 24 57328989312 ps
T35 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2283418179 Jul 14 06:41:46 PM PDT 24 Jul 14 06:41:58 PM PDT 24 2513924246 ps
T226 /workspace/coverage/default/6.sysrst_ctrl_alert_test.377625699 Jul 14 06:40:57 PM PDT 24 Jul 14 06:41:02 PM PDT 24 2021345770 ps
T36 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.995795374 Jul 14 06:42:24 PM PDT 24 Jul 14 06:43:09 PM PDT 24 205553000039 ps
T84 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.624669302 Jul 14 06:41:41 PM PDT 24 Jul 14 06:41:53 PM PDT 24 3413996723 ps
T113 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3936599357 Jul 14 06:41:23 PM PDT 24 Jul 14 06:46:41 PM PDT 24 134984995262 ps
T114 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.1320976093 Jul 14 06:41:48 PM PDT 24 Jul 14 06:43:13 PM PDT 24 31295239509 ps
T44 /workspace/coverage/default/27.sysrst_ctrl_stress_all.2321542785 Jul 14 06:41:37 PM PDT 24 Jul 14 06:41:54 PM PDT 24 7828678637 ps
T115 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.238435381 Jul 14 06:41:23 PM PDT 24 Jul 14 06:41:40 PM PDT 24 2551074939 ps
T116 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.3959889330 Jul 14 06:42:03 PM PDT 24 Jul 14 06:43:17 PM PDT 24 55374658175 ps
T117 /workspace/coverage/default/8.sysrst_ctrl_alert_test.235322073 Jul 14 06:40:58 PM PDT 24 Jul 14 06:41:02 PM PDT 24 2050481549 ps
T118 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3694482716 Jul 14 06:40:58 PM PDT 24 Jul 14 06:41:04 PM PDT 24 2531382826 ps
T119 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.330454874 Jul 14 06:41:48 PM PDT 24 Jul 14 06:41:55 PM PDT 24 2493532055 ps
T120 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1259452779 Jul 14 06:41:08 PM PDT 24 Jul 14 06:41:15 PM PDT 24 2093176244 ps
T397 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.1019093854 Jul 14 06:41:48 PM PDT 24 Jul 14 06:41:55 PM PDT 24 2642558202 ps
T398 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.4147139955 Jul 14 06:40:53 PM PDT 24 Jul 14 06:40:57 PM PDT 24 2270233096 ps
T399 /workspace/coverage/default/23.sysrst_ctrl_alert_test.3971255273 Jul 14 06:41:23 PM PDT 24 Jul 14 06:41:44 PM PDT 24 2012902581 ps
T208 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1235614784 Jul 14 06:41:23 PM PDT 24 Jul 14 06:42:35 PM PDT 24 305608494133 ps
T348 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.705777721 Jul 14 06:42:13 PM PDT 24 Jul 14 06:44:18 PM PDT 24 118018065782 ps
T317 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3235261970 Jul 14 06:42:09 PM PDT 24 Jul 14 06:42:11 PM PDT 24 2570557127 ps
T400 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.4044063133 Jul 14 06:42:28 PM PDT 24 Jul 14 06:42:32 PM PDT 24 3702828480 ps
T401 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3421078582 Jul 14 06:42:21 PM PDT 24 Jul 14 06:42:33 PM PDT 24 3973504964 ps
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T403 /workspace/coverage/default/45.sysrst_ctrl_smoke.71198762 Jul 14 06:42:23 PM PDT 24 Jul 14 06:42:26 PM PDT 24 2150528485 ps
T75 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.542788650 Jul 14 06:41:05 PM PDT 24 Jul 14 06:46:45 PM PDT 24 1031376783113 ps
T404 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.2527976678 Jul 14 06:41:22 PM PDT 24 Jul 14 06:41:41 PM PDT 24 2064716434 ps
T299 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.322918944 Jul 14 06:41:41 PM PDT 24 Jul 14 06:43:24 PM PDT 24 1394101090163 ps
T279 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.3877193779 Jul 14 06:40:35 PM PDT 24 Jul 14 06:40:55 PM PDT 24 22069897254 ps
T76 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.4178599857 Jul 14 06:42:16 PM PDT 24 Jul 14 06:42:19 PM PDT 24 4303303353 ps
T405 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1227420568 Jul 14 06:41:10 PM PDT 24 Jul 14 06:41:16 PM PDT 24 2107984614 ps
T406 /workspace/coverage/default/24.sysrst_ctrl_alert_test.1412044051 Jul 14 06:41:24 PM PDT 24 Jul 14 06:41:42 PM PDT 24 2016382082 ps
T407 /workspace/coverage/default/37.sysrst_ctrl_alert_test.1842477003 Jul 14 06:42:10 PM PDT 24 Jul 14 06:42:17 PM PDT 24 2012015511 ps
T77 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.2111204361 Jul 14 06:40:43 PM PDT 24 Jul 14 06:40:48 PM PDT 24 11461773375 ps
T174 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.709478415 Jul 14 06:42:13 PM PDT 24 Jul 14 06:42:16 PM PDT 24 2922950464 ps
T408 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.549644948 Jul 14 06:41:09 PM PDT 24 Jul 14 06:41:18 PM PDT 24 3410842490 ps
T409 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.3014939228 Jul 14 06:42:01 PM PDT 24 Jul 14 06:42:15 PM PDT 24 4305508926 ps
T78 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1691543403 Jul 14 06:41:09 PM PDT 24 Jul 14 06:41:20 PM PDT 24 3177923489 ps
T410 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.830632827 Jul 14 06:41:17 PM PDT 24 Jul 14 06:41:33 PM PDT 24 4105266663 ps
T99 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.670258868 Jul 14 06:41:57 PM PDT 24 Jul 14 06:42:23 PM PDT 24 25344485386 ps
T100 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.446065698 Jul 14 06:41:20 PM PDT 24 Jul 14 06:42:23 PM PDT 24 87372087703 ps
T411 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.2068816196 Jul 14 06:42:22 PM PDT 24 Jul 14 06:42:30 PM PDT 24 2162304240 ps
T412 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2702769458 Jul 14 06:42:24 PM PDT 24 Jul 14 06:42:27 PM PDT 24 3015003938 ps
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T414 /workspace/coverage/default/45.sysrst_ctrl_alert_test.138180427 Jul 14 06:42:24 PM PDT 24 Jul 14 06:42:27 PM PDT 24 2053475303 ps
T415 /workspace/coverage/default/36.sysrst_ctrl_smoke.355845551 Jul 14 06:41:59 PM PDT 24 Jul 14 06:42:09 PM PDT 24 2109349227 ps
T416 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.2442112689 Jul 14 06:41:11 PM PDT 24 Jul 14 06:41:18 PM PDT 24 2446853244 ps
T417 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.923833865 Jul 14 06:42:24 PM PDT 24 Jul 14 06:53:58 PM PDT 24 1097894161656 ps
T418 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.358063116 Jul 14 06:41:43 PM PDT 24 Jul 14 06:41:53 PM PDT 24 2520283189 ps
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T419 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3399757733 Jul 14 06:40:35 PM PDT 24 Jul 14 06:40:41 PM PDT 24 2433428141 ps
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T460 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1088507398 Jul 14 06:41:22 PM PDT 24 Jul 14 06:41:44 PM PDT 24 2609567022 ps
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T265 /workspace/coverage/default/5.sysrst_ctrl_stress_all.4032985471 Jul 14 06:40:57 PM PDT 24 Jul 14 06:46:33 PM PDT 24 165545969688 ps
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