Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.07 99.46 96.76 100.00 98.72 98.93 99.52 93.08


Total tests in report: 911
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
59.11 59.11 78.56 78.56 67.69 67.69 90.98 90.98 17.95 17.95 79.15 79.15 68.50 68.50 10.92 10.92 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3356693430
76.24 17.13 86.99 8.43 77.60 9.91 93.04 2.05 54.49 36.54 86.40 7.25 84.10 15.61 51.08 40.15 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2346375967
82.11 5.87 91.49 4.50 84.00 6.40 94.63 1.60 63.46 8.97 91.53 5.14 89.02 4.91 60.67 9.59 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3555585322
84.97 2.86 95.17 3.68 89.38 5.38 97.49 2.85 63.46 0.00 95.19 3.66 90.37 1.35 63.74 3.08 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3525863590
87.69 2.71 96.32 1.16 91.15 1.77 97.49 0.00 78.21 14.74 96.38 1.18 90.46 0.10 63.79 0.05 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.4149052669
89.31 1.63 97.09 0.77 91.66 0.51 97.49 0.00 82.05 3.85 96.86 0.48 91.43 0.96 68.62 4.82 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.3992672173
90.67 1.36 97.70 0.62 92.26 0.61 97.49 0.00 86.54 4.49 97.45 0.59 93.26 1.83 70.00 1.38 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1815160598
91.80 1.13 97.72 0.02 93.23 0.96 98.17 0.68 86.54 0.00 97.49 0.04 93.26 0.00 76.21 6.21 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.449171264
92.65 0.85 97.74 0.02 93.38 0.15 98.17 0.00 87.18 0.64 97.52 0.04 96.53 3.28 78.05 1.85 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2302893912
93.22 0.56 98.02 0.28 93.48 0.10 98.17 0.00 87.18 0.00 97.56 0.04 96.63 0.10 81.49 3.44 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1076975592
93.71 0.49 98.19 0.17 93.63 0.15 98.17 0.00 89.10 1.92 97.78 0.22 97.01 0.39 82.05 0.56 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.206420781
94.19 0.49 98.40 0.21 94.03 0.40 98.17 0.00 91.67 2.56 98.00 0.22 97.01 0.00 82.05 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.3843620305
94.59 0.40 98.58 0.19 94.16 0.13 98.17 0.00 92.95 1.28 98.08 0.07 97.11 0.10 83.08 1.03 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2182136000
94.97 0.38 98.71 0.13 94.26 0.10 98.17 0.00 94.87 1.92 98.23 0.15 97.40 0.29 83.18 0.10 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.401896602
95.29 0.31 98.71 0.00 94.29 0.03 98.17 0.00 94.87 0.00 98.23 0.00 97.40 0.00 85.33 2.15 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.1090988731
95.57 0.28 98.73 0.02 94.31 0.03 99.77 1.60 94.87 0.00 98.23 0.00 97.50 0.10 85.59 0.26 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.2549412573
95.76 0.19 98.77 0.04 94.36 0.05 99.77 0.00 94.87 0.00 98.23 0.00 97.59 0.10 86.72 1.13 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1570062540
95.95 0.19 98.88 0.11 94.46 0.10 99.77 0.00 95.51 0.64 98.34 0.11 97.78 0.19 86.87 0.15 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.4172116448
96.12 0.17 98.88 0.00 94.62 0.15 99.77 0.00 95.51 0.00 98.34 0.00 98.46 0.67 87.23 0.36 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.2787731931
96.28 0.16 98.92 0.04 94.94 0.33 99.77 0.00 96.15 0.64 98.37 0.04 98.55 0.10 87.23 0.00 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2436068029
96.44 0.16 98.97 0.06 94.97 0.03 99.77 0.00 96.79 0.64 98.41 0.04 98.65 0.10 87.49 0.26 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.4190078012
96.57 0.14 99.05 0.07 94.99 0.03 99.77 0.00 97.44 0.64 98.52 0.11 98.75 0.10 87.49 0.00 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.3399506321
96.70 0.13 99.12 0.07 95.15 0.15 99.77 0.00 97.44 0.00 98.56 0.04 98.94 0.19 87.95 0.46 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3510736720
96.83 0.13 99.16 0.04 95.17 0.03 99.77 0.00 98.08 0.64 98.60 0.04 99.04 0.10 88.00 0.05 /workspace/coverage/default/16.sysrst_ctrl_edge_detect.310046633
96.95 0.12 99.16 0.00 95.17 0.00 99.77 0.00 98.08 0.00 98.60 0.00 99.04 0.00 88.87 0.87 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.402565013
97.07 0.12 99.20 0.04 95.20 0.03 99.77 0.00 98.72 0.64 98.63 0.04 99.13 0.10 88.87 0.00 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1502994235
97.19 0.12 99.20 0.00 95.90 0.71 99.77 0.00 98.72 0.00 98.63 0.00 99.13 0.00 88.97 0.10 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.4205737320
97.27 0.08 99.29 0.09 96.16 0.25 99.77 0.00 98.72 0.00 98.78 0.15 99.23 0.10 88.97 0.00 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.301457265
97.36 0.08 99.31 0.02 96.21 0.05 99.77 0.00 98.72 0.00 98.78 0.00 99.23 0.00 89.49 0.51 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4166729172
97.43 0.07 99.33 0.02 96.26 0.05 99.77 0.00 98.72 0.00 98.78 0.00 99.23 0.00 89.90 0.41 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.3280237704
97.49 0.06 99.33 0.00 96.28 0.03 99.77 0.00 98.72 0.00 98.78 0.00 99.33 0.10 90.21 0.31 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.1181286203
97.54 0.05 99.38 0.06 96.36 0.08 100.00 0.23 98.72 0.00 98.78 0.00 99.33 0.00 90.21 0.00 /workspace/coverage/default/21.sysrst_ctrl_alert_test.544531091
97.58 0.04 99.38 0.00 96.36 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.33 0.00 90.51 0.31 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.4126680074
97.63 0.04 99.38 0.00 96.66 0.30 100.00 0.00 98.72 0.00 98.78 0.00 99.33 0.00 90.51 0.00 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.3452958157
97.66 0.04 99.38 0.00 96.66 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.33 0.00 90.77 0.26 /workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.304121894
97.70 0.04 99.38 0.00 96.66 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.33 0.00 91.03 0.26 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.1793288894
97.73 0.03 99.38 0.00 96.66 0.00 100.00 0.00 98.72 0.00 98.78 0.00 99.33 0.00 91.23 0.21 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.175917842
97.75 0.03 99.40 0.02 96.69 0.03 100.00 0.00 98.72 0.00 98.82 0.04 99.42 0.10 91.23 0.00 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2994148648
97.78 0.02 99.40 0.00 96.69 0.00 100.00 0.00 98.72 0.00 98.82 0.00 99.42 0.00 91.38 0.15 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.3052690935
97.80 0.02 99.40 0.00 96.69 0.00 100.00 0.00 98.72 0.00 98.82 0.00 99.42 0.00 91.54 0.15 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3140652867
97.82 0.02 99.40 0.00 96.71 0.03 100.00 0.00 98.72 0.00 98.82 0.00 99.42 0.00 91.64 0.10 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.606100343
97.83 0.02 99.40 0.00 96.74 0.03 100.00 0.00 98.72 0.00 98.82 0.00 99.52 0.10 91.64 0.00 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2832907669
97.85 0.02 99.44 0.04 96.74 0.00 100.00 0.00 98.72 0.00 98.89 0.07 99.52 0.00 91.64 0.00 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.343615549
97.86 0.01 99.44 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.52 0.00 91.74 0.10 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2833052250
97.88 0.01 99.44 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.52 0.00 91.85 0.10 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.2553477890
97.89 0.01 99.44 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.52 0.00 91.95 0.10 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.364476169
97.91 0.01 99.44 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.52 0.00 92.05 0.10 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.454665654
97.92 0.01 99.44 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.52 0.00 92.15 0.10 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.126257813
97.94 0.01 99.44 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.89 0.00 99.52 0.00 92.26 0.10 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1667388382
97.95 0.01 99.46 0.02 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.04 99.52 0.00 92.26 0.00 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.2744632730
97.95 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.31 0.05 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.2720024913
97.96 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.36 0.05 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3174350408
97.97 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.41 0.05 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3219518052
97.97 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.46 0.05 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3870195271
97.98 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.51 0.05 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1123959984
97.99 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.56 0.05 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3411363223
98.00 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.62 0.05 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3350336743
98.00 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.67 0.05 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.678499401
98.01 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.72 0.05 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2507011356
98.02 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.77 0.05 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3770891795
98.03 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.82 0.05 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1118239256
98.03 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.87 0.05 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3666805626
98.04 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.92 0.05 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3780652618
98.05 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 92.97 0.05 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3958752861
98.06 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 93.03 0.05 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2837080938
98.06 0.01 99.46 0.00 96.74 0.00 100.00 0.00 98.72 0.00 98.93 0.00 99.52 0.00 93.08 0.05 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2010684505

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.2483087782
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.412635576
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.626799466
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3051814666
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.232244626
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3670750659
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2293496515
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.182086200
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3276827862
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3381719779
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2028000273
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2569945770
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2095122942
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2661085099
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3431956035
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.529487297
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3411408357
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3609387147
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2239983261
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2939434465
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2773291557
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1135570575
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3862315160
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1658597094
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.3220791794
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1497950444
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.1880697508
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1268626439
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.1999360720
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.362286466
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1440265562
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3537561315
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3681237051
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.875067082
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2168656913
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.4176264274
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.65322529
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2296717160
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2659106729
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.520017797
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.1464045498
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.26909047
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3456739217
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.3147971005
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2406046590
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3195063453
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1645416277
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1795417348
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.711120423
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.1420103934
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1964217505
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.1988069406
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3649397414
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2031091331
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.1861023712
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3747593249
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.2185791014
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.1046213273
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2060536669
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.2857012576
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.2012487248
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.765992469
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.62131589
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3928699492
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.1673859806
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.2088701045
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.172763106
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.3797553748
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2673544381
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.3230178347
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.1232415285
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2909680021
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.3454206452
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.992168363
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.36550478
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1747841440
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.4089999446
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.2455884106
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.2512013001
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.427002666
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.1940610670
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.93837178
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.902343217
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.217569754
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.2346345872
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.3043592184
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/workspace/coverage/default/41.sysrst_ctrl_stress_all.2700174565
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.1520481970
/workspace/coverage/default/42.sysrst_ctrl_alert_test.565878580
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.4052742317
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2415634577
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1279656997
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2011851739
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2149083815
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3337497712
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.687169664
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3868457432
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4138514531
/workspace/coverage/default/42.sysrst_ctrl_smoke.1289727658
/workspace/coverage/default/42.sysrst_ctrl_stress_all.656755389
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.3413172701
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2620715874
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.2200590640
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3755174433
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.999051005
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.3503809592
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1473843652
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.990991609
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1015280938
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.1736021294
/workspace/coverage/default/43.sysrst_ctrl_smoke.1239174269
/workspace/coverage/default/43.sysrst_ctrl_stress_all.3166344356
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1704061475
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2309211456
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1033767783
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3256436654
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2595365118
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.3550076556
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3953049644
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2193651021
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1916912498
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2866428794
/workspace/coverage/default/44.sysrst_ctrl_smoke.991456413
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1844185134
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2747663622
/workspace/coverage/default/45.sysrst_ctrl_alert_test.870712368
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2660664463
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3085427096
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2648124541
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1282382164
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3838048918
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1641816351
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.4017896607
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3602360845
/workspace/coverage/default/45.sysrst_ctrl_smoke.660952148
/workspace/coverage/default/45.sysrst_ctrl_stress_all.38371198
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3629710464
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1520396029
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3766211134
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2893234220
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3095394973
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2548603545
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3912529429
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3842839320
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1525672132
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.522002390
/workspace/coverage/default/46.sysrst_ctrl_smoke.2601776426
/workspace/coverage/default/46.sysrst_ctrl_stress_all.228194390
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.427931903
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2677026054
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2568343542
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.389450338
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.322367857
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3560081260
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3475060634
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2895631270
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4111838976
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1247386773
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.514193322
/workspace/coverage/default/47.sysrst_ctrl_smoke.2247022784
/workspace/coverage/default/47.sysrst_ctrl_stress_all.4282188267
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1957342975
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1529528796
/workspace/coverage/default/48.sysrst_ctrl_alert_test.4224316615
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.18027808
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2915532299
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3527593623
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2477217713
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.32866329
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3893406870
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.848970416
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1795490720
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1116897418
/workspace/coverage/default/48.sysrst_ctrl_smoke.2546783702
/workspace/coverage/default/48.sysrst_ctrl_stress_all.1422306197
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2516251908
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1196759712
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2713717491
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1079677256
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.4004070120
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.3538099494
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2000583232
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.574825467
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1482636954
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.354231760
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1759497555
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3720365914
/workspace/coverage/default/49.sysrst_ctrl_smoke.2401767644
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3537523092
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2689640042
/workspace/coverage/default/5.sysrst_ctrl_alert_test.965979345
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1519486410
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.3659134318
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1598107881
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.1262843302
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2310116026
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1910798536
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.692695491
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1467455141
/workspace/coverage/default/5.sysrst_ctrl_smoke.1716274142
/workspace/coverage/default/5.sysrst_ctrl_stress_all.4198882350
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.324904233
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.821456527
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3836749863
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2319483915
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.4110933825
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3821571668
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2238414659
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2191482320
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2432622204
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2542216412
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2426981204
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.327977938
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3291078008
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2883458183
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1347364916
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3809854370
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1419187262
/workspace/coverage/default/6.sysrst_ctrl_smoke.3716302308
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1355452669
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2295217935
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.3850518980
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.4212363837
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2327477371
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2778114833
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2099556859
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1389101492
/workspace/coverage/default/7.sysrst_ctrl_alert_test.3895775466
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.1169690152
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.142524089
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3229550473
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2833585086
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3713974278
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.4163065403
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.4168088609
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.4009411481
/workspace/coverage/default/7.sysrst_ctrl_smoke.88076667
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1214940954
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.830788023
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.1563670861
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2145645273
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.1660567093
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.474677221
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3937806534
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.186013388
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.4175753799
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1203288917
/workspace/coverage/default/8.sysrst_ctrl_alert_test.225792782
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2467959461
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.1890005086
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3835575495
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.4046472525
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1527117857
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2664246811
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3816540084
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.896723375
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.542679095
/workspace/coverage/default/8.sysrst_ctrl_smoke.3200339552
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3267769239
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1405587056
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2921709084
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2778543956
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.243204796
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3910302249
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3252076666
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3439550628
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.534889192
/workspace/coverage/default/9.sysrst_ctrl_alert_test.656787260
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3443146220
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.415785987
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2355708452
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.4228480022
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2754155763
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3820777448
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2349999741
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2757919793
/workspace/coverage/default/9.sysrst_ctrl_smoke.1931114480
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3261342188
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.829602465
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1971640641
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2025247238
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.4047770366
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.436771831
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1007259552
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2234996005
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.301086986
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3735321672
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.4192865508



Total test records in report: 911
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3356693430 Jul 19 05:58:51 PM PDT 24 Jul 19 05:59:45 PM PDT 24 69252484666 ps
T4 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.3240422298 Jul 19 05:58:26 PM PDT 24 Jul 19 05:58:29 PM PDT 24 2155400576 ps
T5 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1116897418 Jul 19 05:58:50 PM PDT 24 Jul 19 05:59:03 PM PDT 24 2514348989 ps
T13 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.2549412573 Jul 19 05:56:36 PM PDT 24 Jul 19 05:58:25 PM PDT 24 42010362010 ps
T2 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.4229710440 Jul 19 05:58:30 PM PDT 24 Jul 19 05:58:35 PM PDT 24 3614091060 ps
T14 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3525863590 Jul 19 05:58:21 PM PDT 24 Jul 19 05:58:50 PM PDT 24 20106829234 ps
T15 /workspace/coverage/default/48.sysrst_ctrl_alert_test.4224316615 Jul 19 05:58:50 PM PDT 24 Jul 19 05:59:01 PM PDT 24 2015448642 ps
T16 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1755688136 Jul 19 05:56:29 PM PDT 24 Jul 19 05:56:38 PM PDT 24 2509018205 ps
T3 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1570062540 Jul 19 05:58:04 PM PDT 24 Jul 19 06:04:04 PM PDT 24 136102250904 ps
T17 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2282711725 Jul 19 05:58:04 PM PDT 24 Jul 19 05:58:14 PM PDT 24 2160556490 ps
T25 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.1157520799 Jul 19 05:56:59 PM PDT 24 Jul 19 05:57:11 PM PDT 24 3885308804 ps
T28 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1871338964 Jul 19 05:56:38 PM PDT 24 Jul 19 05:56:45 PM PDT 24 2266694995 ps
T6 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3746687377 Jul 19 05:57:01 PM PDT 24 Jul 19 05:57:05 PM PDT 24 7492835247 ps
T52 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3773387997 Jul 19 05:58:27 PM PDT 24 Jul 19 05:58:31 PM PDT 24 2022343383 ps
T7 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2738802245 Jul 19 05:57:16 PM PDT 24 Jul 19 05:57:21 PM PDT 24 3350880852 ps
T26 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.1662051744 Jul 19 05:58:05 PM PDT 24 Jul 19 05:58:12 PM PDT 24 3338174646 ps
T53 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.2371676565 Jul 19 05:57:43 PM PDT 24 Jul 19 05:57:53 PM PDT 24 4819825339 ps
T29 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1279656997 Jul 19 05:58:39 PM PDT 24 Jul 19 05:59:16 PM PDT 24 26082403676 ps
T30 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2234996005 Jul 19 05:58:59 PM PDT 24 Jul 19 06:00:10 PM PDT 24 30332900831 ps
T54 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.327977938 Jul 19 05:56:53 PM PDT 24 Jul 19 05:57:04 PM PDT 24 3116032020 ps
T8 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1309358765 Jul 19 05:56:39 PM PDT 24 Jul 19 05:57:27 PM PDT 24 24290917396 ps
T9 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3780652618 Jul 19 05:58:49 PM PDT 24 Jul 19 06:00:14 PM PDT 24 108926940117 ps
T65 /workspace/coverage/default/6.sysrst_ctrl_stress_all.1355452669 Jul 19 05:56:54 PM PDT 24 Jul 19 05:57:10 PM PDT 24 6630338206 ps
T66 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.2866428794 Jul 19 05:58:37 PM PDT 24 Jul 19 05:58:42 PM PDT 24 2540095449 ps
T67 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.793253228 Jul 19 05:58:29 PM PDT 24 Jul 19 05:58:37 PM PDT 24 2128014442 ps
T23 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.1835534543 Jul 19 05:57:57 PM PDT 24 Jul 19 05:58:04 PM PDT 24 2483891636 ps
T68 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1247386773 Jul 19 05:58:46 PM PDT 24 Jul 19 05:58:55 PM PDT 24 2103763776 ps
T69 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3496475813 Jul 19 05:57:55 PM PDT 24 Jul 19 05:58:03 PM PDT 24 2057069233 ps
T70 /workspace/coverage/default/4.sysrst_ctrl_alert_test.3821879749 Jul 19 05:56:53 PM PDT 24 Jul 19 05:56:59 PM PDT 24 2017566643 ps
T71 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.364476169 Jul 19 05:57:53 PM PDT 24 Jul 19 05:58:03 PM PDT 24 2517044191 ps
T45 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.1890005086 Jul 19 05:56:54 PM PDT 24 Jul 19 05:58:09 PM PDT 24 64794295873 ps
T10 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.301086986 Jul 19 05:59:01 PM PDT 24 Jul 19 06:00:11 PM PDT 24 124461020371 ps
T402 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.764003014 Jul 19 05:57:53 PM PDT 24 Jul 19 05:58:04 PM PDT 24 2083739414 ps
T24 /workspace/coverage/default/44.sysrst_ctrl_stress_all.1844185134 Jul 19 05:58:46 PM PDT 24 Jul 19 05:58:55 PM PDT 24 7149805224 ps
T72 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1479807876 Jul 19 05:57:59 PM PDT 24 Jul 19 05:58:06 PM PDT 24 2532897950 ps
T340 /workspace/coverage/default/36.sysrst_ctrl_alert_test.241954968 Jul 19 05:58:13 PM PDT 24 Jul 19 05:58:18 PM PDT 24 2016670711 ps
T341 /workspace/coverage/default/23.sysrst_ctrl_smoke.3364012145 Jul 19 05:57:42 PM PDT 24 Jul 19 05:57:49 PM PDT 24 2114118983 ps
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T36 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3555585322 Jul 19 05:57:59 PM PDT 24 Jul 19 06:00:03 PM PDT 24 49232741974 ps
T178 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.522002390 Jul 19 05:58:42 PM PDT 24 Jul 19 05:58:48 PM PDT 24 2519819054 ps
T56 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3366079980 Jul 19 05:56:29 PM PDT 24 Jul 19 05:57:47 PM PDT 24 117120719647 ps
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T182 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.3529696581 Jul 19 05:57:57 PM PDT 24 Jul 19 05:58:05 PM PDT 24 2041433681 ps
T193 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2490355038 Jul 19 05:57:07 PM PDT 24 Jul 19 05:57:11 PM PDT 24 2706405640 ps
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T47 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.295167647 Jul 19 05:56:32 PM PDT 24 Jul 19 05:56:36 PM PDT 24 3380944386 ps
T120 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.4193678559 Jul 19 05:58:02 PM PDT 24 Jul 19 05:59:13 PM PDT 24 25582140795 ps
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T48 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2789137460 Jul 19 05:58:27 PM PDT 24 Jul 19 05:58:38 PM PDT 24 3025618540 ps
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T50 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3870195271 Jul 19 05:57:08 PM PDT 24 Jul 19 05:57:13 PM PDT 24 3651213930 ps
T51 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.4190078012 Jul 19 05:56:35 PM PDT 24 Jul 19 05:56:38 PM PDT 24 3613477549 ps
T133 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.1629122721 Jul 19 05:57:18 PM PDT 24 Jul 19 05:57:27 PM PDT 24 2184634401 ps
T134 /workspace/coverage/default/35.sysrst_ctrl_smoke.793707172 Jul 19 05:58:11 PM PDT 24 Jul 19 05:58:20 PM PDT 24 2111547831 ps
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T21 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.1092581548 Jul 19 05:57:43 PM PDT 24 Jul 19 05:58:46 PM PDT 24 24077592006 ps
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T138 /workspace/coverage/default/47.sysrst_ctrl_alert_test.2677026054 Jul 19 05:58:46 PM PDT 24 Jul 19 05:58:56 PM PDT 24 2012374412 ps
T61 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1494912923 Jul 19 05:58:12 PM PDT 24 Jul 19 05:58:17 PM PDT 24 2493404649 ps
T197 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.4194478353 Jul 19 05:57:55 PM PDT 24 Jul 19 05:58:02 PM PDT 24 2235631613 ps
T198 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3011996253 Jul 19 05:57:10 PM PDT 24 Jul 19 05:57:15 PM PDT 24 2528557079 ps
T74 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.2621280269 Jul 19 05:57:41 PM PDT 24 Jul 19 05:57:46 PM PDT 24 3090427736 ps
T199 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3560081260 Jul 19 05:58:41 PM PDT 24 Jul 19 05:58:47 PM PDT 24 3770242624 ps
T200 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.2225166206 Jul 19 05:57:25 PM PDT 24 Jul 19 05:57:29 PM PDT 24 3578142122 ps
T201 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.2259501713 Jul 19 05:58:31 PM PDT 24 Jul 19 05:58:34 PM PDT 24 2250522530 ps
T43 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.4278711690 Jul 19 05:57:26 PM PDT 24 Jul 19 05:57:35 PM PDT 24 3172548761 ps
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T266 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.4175753799 Jul 19 05:59:00 PM PDT 24 Jul 19 05:59:31 PM PDT 24 53771559439 ps
T267 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.2883458183 Jul 19 05:56:54 PM PDT 24 Jul 19 05:57:00 PM PDT 24 2621643146 ps
T268 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3868457432 Jul 19 05:58:38 PM PDT 24 Jul 19 05:58:46 PM PDT 24 2040237557 ps
T144 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.1220661108 Jul 19 05:56:37 PM PDT 24 Jul 19 05:57:46 PM PDT 24 108843817148 ps
T103 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3510736720 Jul 19 05:57:33 PM PDT 24 Jul 19 05:58:28 PM PDT 24 79448202804 ps
T139 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2310116026 Jul 19 05:56:53 PM PDT 24 Jul 19 05:56:58 PM PDT 24 2622574630 ps
T140 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.422789597 Jul 19 05:57:32 PM PDT 24 Jul 19 05:59:48 PM PDT 24 118515818344 ps
T141 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.494188514 Jul 19 05:58:06 PM PDT 24 Jul 19 05:59:21 PM PDT 24 110273932282 ps
T62 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.856662743 Jul 19 05:57:42 PM PDT 24 Jul 19 05:57:47 PM PDT 24 2496934270 ps
T22 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1836483573 Jul 19 05:56:36 PM PDT 24 Jul 19 05:56:45 PM PDT 24 4514995829 ps
T142 /workspace/coverage/default/5.sysrst_ctrl_alert_test.965979345 Jul 19 05:56:44 PM PDT 24 Jul 19 05:56:51 PM PDT 24 2012159074 ps
T57 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.1696390951 Jul 19 05:58:09 PM PDT 24 Jul 19 05:58:18 PM PDT 24 3965890594 ps
T58 /workspace/coverage/default/26.sysrst_ctrl_stress_all.94686505 Jul 19 05:57:52 PM PDT 24 Jul 19 05:58:36 PM PDT 24 17438018642 ps
T35 /workspace/coverage/default/42.sysrst_ctrl_stress_all.656755389 Jul 19 05:58:32 PM PDT 24 Jul 19 06:04:38 PM PDT 24 151261413314 ps
T40 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.2346375967 Jul 19 05:56:29 PM PDT 24 Jul 19 05:59:11 PM PDT 24 273320662549 ps
T154 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.3095394973 Jul 19 05:58:42 PM PDT 24 Jul 19 05:58:52 PM PDT 24 2960502152 ps
T155 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.1932638558 Jul 19 05:58:09 PM PDT 24 Jul 19 05:58:19 PM PDT 24 2612723757 ps
T156 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.833468114 Jul 19 05:57:33 PM PDT 24 Jul 19 05:57:40 PM PDT 24 2060595876 ps
T157 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2734557792 Jul 19 05:57:49 PM PDT 24 Jul 19 05:57:55 PM PDT 24 2540065170 ps
T158 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.1090988731 Jul 19 05:57:48 PM PDT 24 Jul 19 05:58:14 PM PDT 24 170619880952 ps
T159 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1219024991 Jul 19 05:57:57 PM PDT 24 Jul 19 05:58:35 PM PDT 24 26584569213 ps
T160 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.4006802043 Jul 19 05:58:09 PM PDT 24 Jul 19 05:58:15 PM PDT 24 3804152415 ps
T277 /workspace/coverage/default/7.sysrst_ctrl_pin_access_test.4168088609 Jul 19 05:56:54 PM PDT 24 Jul 19 05:57:03 PM PDT 24 2127907838 ps
T63 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1042342781 Jul 19 05:57:54 PM PDT 24 Jul 19 05:58:03 PM PDT 24 2459061199 ps
T59 /workspace/coverage/default/18.sysrst_ctrl_stress_all.3328640132 Jul 19 05:57:22 PM PDT 24 Jul 19 06:03:14 PM PDT 24 132564024944 ps
T346 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.389450338 Jul 19 05:58:48 PM PDT 24 Jul 19 06:01:39 PM PDT 24 137523410106 ps
T347 /workspace/coverage/default/27.sysrst_ctrl_alert_test.2418941567 Jul 19 05:57:48 PM PDT 24 Jul 19 05:57:56 PM PDT 24 2009384730 ps
T60 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.3084834733 Jul 19 05:57:44 PM PDT 24 Jul 19 05:57:49 PM PDT 24 5647315395 ps
T107 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3350336743 Jul 19 05:57:42 PM PDT 24 Jul 19 05:58:13 PM PDT 24 43458600736 ps
T42 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2833585086 Jul 19 05:56:55 PM PDT 24 Jul 19 05:57:02 PM PDT 24 3567851940 ps
T64 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3175058068 Jul 19 05:57:56 PM PDT 24 Jul 19 05:58:05 PM PDT 24 2459236924 ps
T44 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.211095214 Jul 19 05:57:30 PM PDT 24 Jul 19 05:57:38 PM PDT 24 3431558954 ps
T290 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.1810012445 Jul 19 05:57:15 PM PDT 24 Jul 19 05:59:43 PM PDT 24 54519775784 ps
T173 /workspace/coverage/default/31.sysrst_ctrl_stress_all.3896892102 Jul 19 05:58:04 PM PDT 24 Jul 19 05:58:48 PM PDT 24 18274841328 ps
T403 /workspace/coverage/default/43.sysrst_ctrl_smoke.1239174269 Jul 19 05:58:39 PM PDT 24 Jul 19 05:58:43 PM PDT 24 2126372710 ps
T117 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3998171782 Jul 19 05:58:28 PM PDT 24 Jul 19 05:58:58 PM PDT 24 46859724267 ps
T175 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.860926982 Jul 19 05:57:06 PM PDT 24 Jul 19 05:57:13 PM PDT 24 4036933033 ps
T76 /workspace/coverage/default/39.sysrst_ctrl_stress_all.937184785 Jul 19 05:58:32 PM PDT 24 Jul 19 05:59:09 PM PDT 24 15611693560 ps
T106 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.4052742317 Jul 19 05:58:35 PM PDT 24 Jul 19 05:58:40 PM PDT 24 3396822895 ps
T404 /workspace/coverage/default/29.sysrst_ctrl_alert_test.356813667 Jul 19 05:57:58 PM PDT 24 Jul 19 05:58:06 PM PDT 24 2018339466 ps
T405 /workspace/coverage/default/21.sysrst_ctrl_alert_test.544531091 Jul 19 05:57:41 PM PDT 24 Jul 19 05:57:45 PM PDT 24 2041985407 ps
T288 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2287723228 Jul 19 05:57:43 PM PDT 24 Jul 19 05:58:02 PM PDT 24 21351392220 ps
T406 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.2311124014 Jul 19 05:57:58 PM PDT 24 Jul 19 05:58:07 PM PDT 24 2616389380 ps
T202 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.3503809592 Jul 19 05:58:35 PM PDT 24 Jul 19 05:58:46 PM PDT 24 3468158159 ps
T291 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1052724247 Jul 19 05:58:06 PM PDT 24 Jul 19 05:59:22 PM PDT 24 107927886722 ps
T233 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.830788023 Jul 19 05:56:52 PM PDT 24 Jul 19 05:57:44 PM PDT 24 93388092758 ps
T407 /workspace/coverage/default/39.sysrst_ctrl_smoke.3562308332 Jul 19 05:58:29 PM PDT 24 Jul 19 05:58:33 PM PDT 24 2137483991 ps
T176 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2933254894 Jul 19 05:58:28 PM PDT 24 Jul 19 05:58:43 PM PDT 24 4670553619 ps
T177 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.4126680074 Jul 19 05:57:09 PM PDT 24 Jul 19 05:58:07 PM PDT 24 217524114227 ps
T292 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2837080938 Jul 19 05:58:59 PM PDT 24 Jul 19 06:01:18 PM PDT 24 108884384243 ps
T368 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.1118239256 Jul 19 05:58:27 PM PDT 24 Jul 19 05:59:47 PM PDT 24 103142914152 ps
T262 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.427931903 Jul 19 05:58:43 PM PDT 24 Jul 19 05:59:21 PM PDT 24 15150587735 ps
T77 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.531229860 Jul 19 05:57:56 PM PDT 24 Jul 19 05:58:03 PM PDT 24 4905909043 ps
T164 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2749291330 Jul 19 05:58:20 PM PDT 24 Jul 19 05:58:29 PM PDT 24 2609342234 ps
T165 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2055014877 Jul 19 05:58:32 PM PDT 24 Jul 19 05:58:36 PM PDT 24 2475493090 ps
T122 /workspace/coverage/default/41.sysrst_ctrl_stress_all.2700174565 Jul 19 05:58:32 PM PDT 24 Jul 19 05:58:59 PM PDT 24 97711718140 ps
T166 /workspace/coverage/default/25.sysrst_ctrl_alert_test.2810290058 Jul 19 05:57:49 PM PDT 24 Jul 19 05:57:59 PM PDT 24 2008283532 ps
T167 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3959426575 Jul 19 05:57:16 PM PDT 24 Jul 19 05:58:23 PM PDT 24 49694735908 ps
T168 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.3370014783 Jul 19 05:57:22 PM PDT 24 Jul 19 05:57:26 PM PDT 24 2539225230 ps
T169 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.2915532299 Jul 19 05:58:51 PM PDT 24 Jul 19 05:59:43 PM PDT 24 69288185880 ps
T170 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3820777448 Jul 19 05:56:58 PM PDT 24 Jul 19 05:57:07 PM PDT 24 2486868238 ps
T171 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2539373042 Jul 19 05:58:30 PM PDT 24 Jul 19 05:58:43 PM PDT 24 4259509656 ps
T315 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2467959461 Jul 19 05:56:54 PM PDT 24 Jul 19 05:59:10 PM PDT 24 249845998966 ps
T78 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.567154260 Jul 19 05:57:56 PM PDT 24 Jul 19 05:58:06 PM PDT 24 6062900423 ps
T259 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3550076556 Jul 19 05:58:38 PM PDT 24 Jul 19 05:58:49 PM PDT 24 3198518501 ps
T309 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2025247238 Jul 19 05:59:04 PM PDT 24 Jul 19 05:59:22 PM PDT 24 24353718589 ps
T208 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2516251908 Jul 19 05:58:54 PM PDT 24 Jul 19 05:59:13 PM PDT 24 22393069680 ps
T82 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.3121084742 Jul 19 05:56:34 PM PDT 24 Jul 19 05:57:33 PM PDT 24 42016388459 ps
T408 /workspace/coverage/default/15.sysrst_ctrl_smoke.3246602398 Jul 19 05:57:18 PM PDT 24 Jul 19 05:57:24 PM PDT 24 2120631784 ps
T318 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2302893912 Jul 19 05:57:14 PM PDT 24 Jul 19 06:01:04 PM PDT 24 127006146535 ps
T327 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2595365118 Jul 19 05:58:35 PM PDT 24 Jul 19 05:58:46 PM PDT 24 3403087234 ps
T328 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2747663622 Jul 19 05:58:35 PM PDT 24 Jul 19 05:58:40 PM PDT 24 5259470697 ps
T329 /workspace/coverage/default/28.sysrst_ctrl_alert_test.2965264569 Jul 19 05:57:56 PM PDT 24 Jul 19 05:58:07 PM PDT 24 2012943808 ps
T330 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.2809095978 Jul 19 05:57:47 PM PDT 24 Jul 19 05:58:18 PM PDT 24 49592280216 ps
T331 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1298221091 Jul 19 05:57:22 PM PDT 24 Jul 19 05:57:26 PM PDT 24 4038716523 ps
T332 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2429149386 Jul 19 05:57:00 PM PDT 24 Jul 19 05:57:04 PM PDT 24 2491670104 ps
T123 /workspace/coverage/default/46.sysrst_ctrl_stress_all.228194390 Jul 19 05:58:45 PM PDT 24 Jul 19 05:59:44 PM PDT 24 45047957154 ps
T312 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.1123959984 Jul 19 05:57:16 PM PDT 24 Jul 19 05:59:21 PM PDT 24 180381099976 ps
T333 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3589544873 Jul 19 05:57:11 PM PDT 24 Jul 19 05:57:20 PM PDT 24 2609754111 ps
T319 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.57069372 Jul 19 05:57:53 PM PDT 24 Jul 19 05:58:26 PM PDT 24 21216352366 ps
T310 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.2778114833 Jul 19 05:58:52 PM PDT 24 Jul 19 05:59:42 PM PDT 24 31495350396 ps
T409 /workspace/coverage/default/32.sysrst_ctrl_smoke.4250106892 Jul 19 05:58:05 PM PDT 24 Jul 19 05:58:12 PM PDT 24 2138889992 ps
T145 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2704920878 Jul 19 05:58:19 PM PDT 24 Jul 19 05:58:30 PM PDT 24 14006897784 ps
T410 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1589148682 Jul 19 05:57:10 PM PDT 24 Jul 19 05:57:14 PM PDT 24 2667228249 ps
T411 /workspace/coverage/default/20.sysrst_ctrl_alert_test.1115561985 Jul 19 05:57:41 PM PDT 24 Jul 19 05:57:50 PM PDT 24 2012547687 ps
T412 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.559251792 Jul 19 05:57:47 PM PDT 24 Jul 19 05:57:53 PM PDT 24 2251827207 ps
T413 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2011851739 Jul 19 05:58:33 PM PDT 24 Jul 19 05:58:39 PM PDT 24 2873225688 ps
T336 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1910798536 Jul 19 05:56:47 PM PDT 24 Jul 19 05:56:50 PM PDT 24 2465899520 ps
T414 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3879786915 Jul 19 05:57:53 PM PDT 24 Jul 19 05:58:01 PM PDT 24 2523565692 ps
T415 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3773079428 Jul 19 05:56:38 PM PDT 24 Jul 19 05:56:41 PM PDT 24 2072646358 ps
T416 /workspace/coverage/default/19.sysrst_ctrl_stress_all.655982694 Jul 19 05:57:33 PM PDT 24 Jul 19 05:57:40 PM PDT 24 8812467764 ps
T417 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.575120886 Jul 19 05:57:49 PM PDT 24 Jul 19 05:57:55 PM PDT 24 2648988128 ps
T342 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3936711682 Jul 19 05:57:12 PM PDT 24 Jul 19 05:57:20 PM PDT 24 2510682596 ps
T385 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.415785987 Jul 19 05:56:59 PM PDT 24 Jul 19 05:58:08 PM PDT 24 49206857968 ps
T398 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3256436654 Jul 19 05:58:35 PM PDT 24 Jul 19 06:01:31 PM PDT 24 70852178658 ps
T146 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.4228481004 Jul 19 05:56:33 PM PDT 24 Jul 19 05:56:40 PM PDT 24 5454241985 ps
T418 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2968091281 Jul 19 05:58:06 PM PDT 24 Jul 19 05:58:14 PM PDT 24 3963400210 ps
T419 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.1309440172 Jul 19 05:56:32 PM PDT 24 Jul 19 05:56:37 PM PDT 24 2462190237 ps
T420 /workspace/coverage/default/41.sysrst_ctrl_smoke.3353043282 Jul 19 05:58:28 PM PDT 24 Jul 19 05:58:32 PM PDT 24 2179764494 ps
T421 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.4138514531 Jul 19 05:58:37 PM PDT 24 Jul 19 05:58:47 PM PDT 24 2512793956 ps
T343 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1321087232 Jul 19 05:58:05 PM PDT 24 Jul 19 05:58:16 PM PDT 24 2512254849 ps
T207 /workspace/coverage/default/22.sysrst_ctrl_stress_all.2570508603 Jul 19 05:57:42 PM PDT 24 Jul 19 05:57:49 PM PDT 24 14951256457 ps
T422 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2295023775 Jul 19 05:58:29 PM PDT 24 Jul 19 05:58:40 PM PDT 24 3422532670 ps
T423 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3143730820 Jul 19 05:58:19 PM PDT 24 Jul 19 05:58:24 PM PDT 24 2176649694 ps
T424 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1648066080 Jul 19 05:58:07 PM PDT 24 Jul 19 05:58:13 PM PDT 24 2525195358 ps
T425 /workspace/coverage/default/6.sysrst_ctrl_smoke.3716302308 Jul 19 05:56:51 PM PDT 24 Jul 19 05:56:54 PM PDT 24 2130424006 ps
T426 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.130326109 Jul 19 05:57:00 PM PDT 24 Jul 19 05:57:04 PM PDT 24 2526741605 ps
T427 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2890735886 Jul 19 05:58:05 PM PDT 24 Jul 19 05:58:12 PM PDT 24 2622125606 ps
T428 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.222479740 Jul 19 05:57:48 PM PDT 24 Jul 19 05:57:59 PM PDT 24 2611911983 ps
T429 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3229550473 Jul 19 05:56:54 PM PDT 24 Jul 19 05:57:00 PM PDT 24 3920232433 ps
T311 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3835575495 Jul 19 05:56:55 PM PDT 24 Jul 19 05:57:35 PM PDT 24 29836686331 ps
T263 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.659815238 Jul 19 05:57:28 PM PDT 24 Jul 19 06:00:27 PM PDT 24 1508921468776 ps
T344 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.3183927688 Jul 19 05:58:29 PM PDT 24 Jul 19 05:58:38 PM PDT 24 2513889751 ps
T246 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.1282382164 Jul 19 05:58:46 PM PDT 24 Jul 19 05:58:56 PM PDT 24 3114928694 ps
T334 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.386982455 Jul 19 05:58:20 PM PDT 24 Jul 19 06:00:34 PM PDT 24 52149011920 ps
T295 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.3180397250 Jul 19 05:57:58 PM PDT 24 Jul 19 06:03:58 PM PDT 24 142082013273 ps
T320 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2460123801 Jul 19 05:57:59 PM PDT 24 Jul 19 05:58:06 PM PDT 24 3919327782 ps
T430 /workspace/coverage/default/4.sysrst_ctrl_stress_all.863574135 Jul 19 05:56:46 PM PDT 24 Jul 19 05:57:08 PM PDT 24 14992259172 ps
T289 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1389101492 Jul 19 05:58:52 PM PDT 24 Jul 19 05:59:13 PM PDT 24 23612325447 ps
T431 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.692695491 Jul 19 05:56:45 PM PDT 24 Jul 19 05:56:48 PM PDT 24 2102965458 ps
T370 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2833052250 Jul 19 05:57:25 PM PDT 24 Jul 19 06:03:28 PM PDT 24 137831335444 ps
T86 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1815160598 Jul 19 05:58:05 PM PDT 24 Jul 19 05:59:49 PM PDT 24 813547562869 ps
T432 /workspace/coverage/default/2.sysrst_ctrl_smoke.4071994889 Jul 19 05:56:28 PM PDT 24 Jul 19 05:56:36 PM PDT 24 2113052958 ps
T433 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2408162306 Jul 19 05:57:31 PM PDT 24 Jul 19 05:57:34 PM PDT 24 4028788581 ps
T434 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2688521061 Jul 19 05:57:58 PM PDT 24 Jul 19 05:58:10 PM PDT 24 2611928362 ps
T435 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.1577480863 Jul 19 05:56:42 PM PDT 24 Jul 19 05:56:45 PM PDT 24 2421521110 ps
T192 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.441724676 Jul 19 05:57:59 PM PDT 24 Jul 19 05:58:24 PM PDT 24 32647669091 ps
T436 /workspace/coverage/default/16.sysrst_ctrl_stress_all.2873688336 Jul 19 05:57:29 PM PDT 24 Jul 19 05:57:39 PM PDT 24 13974020313 ps
T437 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.661052368 Jul 19 05:57:59 PM PDT 24 Jul 19 05:59:51 PM PDT 24 83488346653 ps
T337 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1210798062 Jul 19 05:57:42 PM PDT 24 Jul 19 05:57:49 PM PDT 24 2472107073 ps
T438 /workspace/coverage/default/17.sysrst_ctrl_alert_test.2512957574 Jul 19 05:57:29 PM PDT 24 Jul 19 05:57:31 PM PDT 24 2102193118 ps
T264 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1405587056 Jul 19 05:56:53 PM PDT 24 Jul 19 05:57:57 PM PDT 24 51750405371 ps
T301 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.2769847557 Jul 19 05:57:57 PM PDT 24 Jul 19 06:01:01 PM PDT 24 68862350135 ps
T439 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1010226123 Jul 19 05:57:00 PM PDT 24 Jul 19 05:57:02 PM PDT 24 2137410115 ps
T440 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.139359150 Jul 19 05:57:11 PM PDT 24 Jul 19 05:57:19 PM PDT 24 2229077462 ps
T441 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.999051005 Jul 19 05:58:35 PM PDT 24 Jul 19 05:58:42 PM PDT 24 4619543547 ps
T442 /workspace/coverage/default/48.sysrst_ctrl_stress_all.1422306197 Jul 19 05:58:53 PM PDT 24 Jul 19 05:59:19 PM PDT 24 9559326671 ps
T108 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.534889192 Jul 19 05:59:01 PM PDT 24 Jul 19 06:04:30 PM PDT 24 124882877951 ps
T443 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1252638392 Jul 19 05:58:04 PM PDT 24 Jul 19 05:58:11 PM PDT 24 2528870664 ps
T444 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2319483915 Jul 19 05:58:50 PM PDT 24 Jul 19 06:00:05 PM PDT 24 28580652465 ps
T445 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.632032529 Jul 19 05:58:00 PM PDT 24 Jul 19 05:58:11 PM PDT 24 2611658507 ps
T446 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1079677256 Jul 19 05:58:53 PM PDT 24 Jul 19 05:59:02 PM PDT 24 3523856020 ps
T104 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.4149052669 Jul 19 05:56:29 PM PDT 24 Jul 19 05:56:51 PM PDT 24 36184594184 ps
T447 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.1467291785 Jul 19 05:57:44 PM PDT 24 Jul 19 05:57:54 PM PDT 24 2448137096 ps
T367 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1203288917 Jul 19 05:59:02 PM PDT 24 Jul 19 05:59:46 PM PDT 24 62219524553 ps
T381 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3666805626 Jul 19 05:58:31 PM PDT 24 Jul 19 06:00:41 PM PDT 24 50895567924 ps
T448 /workspace/coverage/default/49.sysrst_ctrl_alert_test.2713717491 Jul 19 05:58:50 PM PDT 24 Jul 19 05:59:00 PM PDT 24 2013189584 ps
T449 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.242597123 Jul 19 05:57:58 PM PDT 24 Jul 19 05:58:14 PM PDT 24 4439216893 ps
T450 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1525672132 Jul 19 05:58:44 PM PDT 24 Jul 19 05:58:53 PM PDT 24 2163627730 ps
T451 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.4111838976 Jul 19 05:58:45 PM PDT 24 Jul 19 05:58:49 PM PDT 24 2469733726 ps
T124 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.1124697659 Jul 19 05:58:21 PM PDT 24 Jul 19 05:58:31 PM PDT 24 3434939794 ps
T452 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1455359534 Jul 19 05:56:25 PM PDT 24 Jul 19 05:56:29 PM PDT 24 2292823683 ps
T116 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3771841289 Jul 19 05:57:18 PM PDT 24 Jul 19 05:57:26 PM PDT 24 3823798341 ps
T453 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.413608170 Jul 19 05:58:28 PM PDT 24 Jul 19 05:58:39 PM PDT 24 3193869118 ps
T454 /workspace/coverage/default/3.sysrst_ctrl_smoke.2314512345 Jul 19 05:56:42 PM PDT 24 Jul 19 05:56:44 PM PDT 24 2137962747 ps
T455 /workspace/coverage/default/34.sysrst_ctrl_smoke.789887117 Jul 19 05:58:12 PM PDT 24 Jul 19 05:58:21 PM PDT 24 2113500348 ps
T456 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.514193322 Jul 19 05:58:43 PM PDT 24 Jul 19 05:58:53 PM PDT 24 2510607000 ps
T457 /workspace/coverage/default/5.sysrst_ctrl_smoke.1716274142 Jul 19 05:56:45 PM PDT 24 Jul 19 05:56:50 PM PDT 24 2121754935 ps
T303 /workspace/coverage/default/33.sysrst_ctrl_stress_all.1473620708 Jul 19 05:58:03 PM PDT 24 Jul 19 06:00:45 PM PDT 24 117332387577 ps
T458 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.1357028502 Jul 19 05:58:10 PM PDT 24 Jul 19 05:58:42 PM PDT 24 12955969184 ps
T459 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2660664463 Jul 19 05:58:43 PM PDT 24 Jul 19 05:58:48 PM PDT 24 3105887543 ps
T390 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.933127305 Jul 19 05:57:57 PM PDT 24 Jul 19 06:00:08 PM PDT 24 50340597896 ps
T460 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1045999786 Jul 19 05:56:37 PM PDT 24 Jul 19 05:56:41 PM PDT 24 2023661760 ps
T371 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.454665654 Jul 19 05:58:41 PM PDT 24 Jul 19 06:01:08 PM PDT 24 120566417868 ps
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