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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.69 99.33 96.78 100.00 96.79 98.82 99.52 92.61


Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T614 /workspace/coverage/default/41.sysrst_ctrl_smoke.114885630 Jul 26 04:56:55 PM PDT 24 Jul 26 04:56:57 PM PDT 24 2127609453 ps
T119 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3003400864 Jul 26 04:55:26 PM PDT 24 Jul 26 04:55:33 PM PDT 24 4586789375 ps
T615 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.61328009 Jul 26 04:55:27 PM PDT 24 Jul 26 04:56:45 PM PDT 24 62863782870 ps
T616 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1728927035 Jul 26 04:56:06 PM PDT 24 Jul 26 04:56:10 PM PDT 24 2263135816 ps
T617 /workspace/coverage/default/3.sysrst_ctrl_alert_test.3133400077 Jul 26 04:55:16 PM PDT 24 Jul 26 04:55:18 PM PDT 24 2027041397 ps
T618 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.533798552 Jul 26 04:56:20 PM PDT 24 Jul 26 04:56:24 PM PDT 24 5784931684 ps
T619 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3401651083 Jul 26 04:56:42 PM PDT 24 Jul 26 04:56:48 PM PDT 24 2016343965 ps
T620 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.2920474103 Jul 26 04:56:00 PM PDT 24 Jul 26 04:56:06 PM PDT 24 2407323205 ps
T72 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.1730960692 Jul 26 04:55:56 PM PDT 24 Jul 26 04:56:06 PM PDT 24 3416390266 ps
T621 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.3610494243 Jul 26 04:55:50 PM PDT 24 Jul 26 04:55:53 PM PDT 24 3543073530 ps
T622 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2582668757 Jul 26 04:57:01 PM PDT 24 Jul 26 04:57:18 PM PDT 24 33212743434 ps
T623 /workspace/coverage/default/5.sysrst_ctrl_alert_test.1414140059 Jul 26 04:55:26 PM PDT 24 Jul 26 04:55:32 PM PDT 24 2015454581 ps
T94 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.2129468468 Jul 26 04:55:41 PM PDT 24 Jul 26 04:55:44 PM PDT 24 3681602574 ps
T624 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.1480533633 Jul 26 04:56:11 PM PDT 24 Jul 26 04:56:14 PM PDT 24 2974893396 ps
T625 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.2560555305 Jul 26 04:56:12 PM PDT 24 Jul 26 04:56:14 PM PDT 24 6366435269 ps
T626 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.2240410194 Jul 26 04:56:01 PM PDT 24 Jul 26 04:56:09 PM PDT 24 2613192862 ps
T126 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.733063429 Jul 26 04:55:59 PM PDT 24 Jul 26 04:56:02 PM PDT 24 3921239235 ps
T627 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.2269689247 Jul 26 04:56:58 PM PDT 24 Jul 26 04:57:05 PM PDT 24 2483057520 ps
T628 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2152199535 Jul 26 04:55:25 PM PDT 24 Jul 26 04:55:32 PM PDT 24 3185249701 ps
T629 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.3624983296 Jul 26 04:55:39 PM PDT 24 Jul 26 04:55:50 PM PDT 24 3889902472 ps
T630 /workspace/coverage/default/32.sysrst_ctrl_smoke.2280605705 Jul 26 04:56:14 PM PDT 24 Jul 26 04:56:15 PM PDT 24 2163663641 ps
T631 /workspace/coverage/default/0.sysrst_ctrl_alert_test.4134443829 Jul 26 04:55:13 PM PDT 24 Jul 26 04:55:18 PM PDT 24 2010435101 ps
T231 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.165028369 Jul 26 04:55:14 PM PDT 24 Jul 26 04:56:26 PM PDT 24 40142310825 ps
T130 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.2984313414 Jul 26 04:56:44 PM PDT 24 Jul 26 04:59:01 PM PDT 24 228811136463 ps
T632 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1597594540 Jul 26 04:56:13 PM PDT 24 Jul 26 04:56:20 PM PDT 24 2513961869 ps
T633 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1734766948 Jul 26 04:56:54 PM PDT 24 Jul 26 04:56:56 PM PDT 24 2481166109 ps
T634 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.2312246912 Jul 26 04:57:13 PM PDT 24 Jul 26 04:57:18 PM PDT 24 3472703403 ps
T635 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2748749073 Jul 26 04:56:11 PM PDT 24 Jul 26 04:56:12 PM PDT 24 2479293375 ps
T358 /workspace/coverage/default/17.sysrst_ctrl_stress_all.3735481051 Jul 26 04:55:49 PM PDT 24 Jul 26 05:00:59 PM PDT 24 113913116169 ps
T636 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.515809183 Jul 26 04:55:55 PM PDT 24 Jul 26 04:56:03 PM PDT 24 2614209438 ps
T637 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.1418917587 Jul 26 04:55:27 PM PDT 24 Jul 26 04:55:29 PM PDT 24 2473977292 ps
T638 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.594920537 Jul 26 04:56:34 PM PDT 24 Jul 26 04:56:37 PM PDT 24 2261153355 ps
T639 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.3589721461 Jul 26 04:55:44 PM PDT 24 Jul 26 04:55:49 PM PDT 24 2621341975 ps
T640 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.2156706979 Jul 26 04:55:27 PM PDT 24 Jul 26 04:55:33 PM PDT 24 3062238496 ps
T173 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1637926770 Jul 26 04:56:32 PM PDT 24 Jul 26 04:57:48 PM PDT 24 40374384304 ps
T162 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.524616746 Jul 26 04:56:41 PM PDT 24 Jul 26 04:56:43 PM PDT 24 4762894417 ps
T167 /workspace/coverage/default/24.sysrst_ctrl_alert_test.3434288998 Jul 26 04:56:03 PM PDT 24 Jul 26 04:56:05 PM PDT 24 2060397869 ps
T168 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.2012498635 Jul 26 04:56:24 PM PDT 24 Jul 26 04:56:30 PM PDT 24 2081510522 ps
T169 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3864633436 Jul 26 04:55:47 PM PDT 24 Jul 26 04:55:49 PM PDT 24 2483956594 ps
T95 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.1269797601 Jul 26 04:56:25 PM PDT 24 Jul 26 04:58:00 PM PDT 24 67130525599 ps
T96 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.1130610402 Jul 26 04:56:00 PM PDT 24 Jul 26 04:58:12 PM PDT 24 102088440189 ps
T120 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2926065818 Jul 26 04:56:41 PM PDT 24 Jul 26 04:56:44 PM PDT 24 5276140716 ps
T170 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3823517849 Jul 26 04:55:49 PM PDT 24 Jul 26 05:17:46 PM PDT 24 1010014404825 ps
T171 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.2570564876 Jul 26 04:55:59 PM PDT 24 Jul 26 04:56:06 PM PDT 24 2607533048 ps
T172 /workspace/coverage/default/43.sysrst_ctrl_alert_test.703793524 Jul 26 04:56:46 PM PDT 24 Jul 26 04:56:49 PM PDT 24 2034458298 ps
T641 /workspace/coverage/default/4.sysrst_ctrl_stress_all.4228274626 Jul 26 04:55:20 PM PDT 24 Jul 26 04:55:40 PM PDT 24 7059962560 ps
T642 /workspace/coverage/default/43.sysrst_ctrl_smoke.2119185259 Jul 26 04:56:59 PM PDT 24 Jul 26 04:57:00 PM PDT 24 2129058796 ps
T643 /workspace/coverage/default/35.sysrst_ctrl_stress_all.3450140158 Jul 26 04:56:29 PM PDT 24 Jul 26 04:56:48 PM PDT 24 17419867061 ps
T337 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3380793467 Jul 26 04:57:02 PM PDT 24 Jul 26 04:58:18 PM PDT 24 67846368731 ps
T121 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1948284254 Jul 26 04:55:39 PM PDT 24 Jul 26 04:55:49 PM PDT 24 11790833902 ps
T644 /workspace/coverage/default/28.sysrst_ctrl_alert_test.4115420785 Jul 26 04:56:03 PM PDT 24 Jul 26 04:56:07 PM PDT 24 2016150538 ps
T645 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1144788446 Jul 26 04:56:31 PM PDT 24 Jul 26 04:56:35 PM PDT 24 2615762339 ps
T646 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.4121859253 Jul 26 04:56:04 PM PDT 24 Jul 26 04:56:13 PM PDT 24 6615804997 ps
T647 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1211523348 Jul 26 04:55:53 PM PDT 24 Jul 26 04:55:55 PM PDT 24 2483569132 ps
T281 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.242558868 Jul 26 04:56:30 PM PDT 24 Jul 26 04:57:56 PM PDT 24 32685765271 ps
T648 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.281194337 Jul 26 04:55:18 PM PDT 24 Jul 26 04:55:28 PM PDT 24 3524227603 ps
T649 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.3410508428 Jul 26 04:56:33 PM PDT 24 Jul 26 04:56:35 PM PDT 24 2493172432 ps
T650 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3328757481 Jul 26 04:56:45 PM PDT 24 Jul 26 04:56:47 PM PDT 24 2251363244 ps
T651 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.136143401 Jul 26 04:56:34 PM PDT 24 Jul 26 04:56:37 PM PDT 24 5519182805 ps
T202 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.776697004 Jul 26 04:55:15 PM PDT 24 Jul 26 04:55:22 PM PDT 24 2584319479 ps
T652 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.2553962138 Jul 26 04:55:59 PM PDT 24 Jul 26 04:56:02 PM PDT 24 2527999737 ps
T653 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.499232052 Jul 26 04:56:22 PM PDT 24 Jul 26 05:01:52 PM PDT 24 124938142880 ps
T341 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.837537379 Jul 26 04:56:51 PM PDT 24 Jul 26 04:58:12 PM PDT 24 64352539497 ps
T654 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3499045067 Jul 26 04:56:00 PM PDT 24 Jul 26 04:56:05 PM PDT 24 3207661376 ps
T655 /workspace/coverage/default/33.sysrst_ctrl_alert_test.2092506148 Jul 26 04:56:23 PM PDT 24 Jul 26 04:56:29 PM PDT 24 2014099156 ps
T149 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.701725838 Jul 26 04:56:32 PM PDT 24 Jul 26 04:58:16 PM PDT 24 42917865224 ps
T656 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.94225744 Jul 26 04:56:07 PM PDT 24 Jul 26 04:56:14 PM PDT 24 2125415760 ps
T657 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.140945805 Jul 26 04:56:20 PM PDT 24 Jul 26 04:56:28 PM PDT 24 2610517696 ps
T658 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.74454529 Jul 26 04:56:46 PM PDT 24 Jul 26 04:56:52 PM PDT 24 3676994922 ps
T659 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.3601657347 Jul 26 04:57:12 PM PDT 24 Jul 26 04:58:20 PM PDT 24 25580948770 ps
T163 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.1678508763 Jul 26 04:56:13 PM PDT 24 Jul 26 04:56:16 PM PDT 24 6104949646 ps
T660 /workspace/coverage/default/42.sysrst_ctrl_smoke.3165083645 Jul 26 04:56:55 PM PDT 24 Jul 26 04:57:00 PM PDT 24 2112554633 ps
T661 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3200989859 Jul 26 04:55:48 PM PDT 24 Jul 26 04:55:50 PM PDT 24 13435691991 ps
T662 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3882898524 Jul 26 04:56:22 PM PDT 24 Jul 26 04:56:29 PM PDT 24 2609405961 ps
T663 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.113838589 Jul 26 04:56:38 PM PDT 24 Jul 26 04:56:45 PM PDT 24 3753665966 ps
T324 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.928639962 Jul 26 04:56:03 PM PDT 24 Jul 26 04:59:01 PM PDT 24 128112278157 ps
T664 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.884814873 Jul 26 04:55:14 PM PDT 24 Jul 26 04:55:21 PM PDT 24 2392981945 ps
T665 /workspace/coverage/default/6.sysrst_ctrl_alert_test.1391290298 Jul 26 04:55:29 PM PDT 24 Jul 26 04:55:35 PM PDT 24 2011380814 ps
T666 /workspace/coverage/default/5.sysrst_ctrl_smoke.2624590620 Jul 26 04:55:22 PM PDT 24 Jul 26 04:55:28 PM PDT 24 2110604719 ps
T667 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2452692789 Jul 26 04:55:04 PM PDT 24 Jul 26 04:55:07 PM PDT 24 2464261626 ps
T668 /workspace/coverage/default/23.sysrst_ctrl_alert_test.3686685866 Jul 26 04:56:01 PM PDT 24 Jul 26 04:56:04 PM PDT 24 2021862162 ps
T669 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.4084885779 Jul 26 04:56:12 PM PDT 24 Jul 26 04:56:16 PM PDT 24 4738935397 ps
T670 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2897775392 Jul 26 04:56:02 PM PDT 24 Jul 26 04:56:05 PM PDT 24 2622570607 ps
T671 /workspace/coverage/default/1.sysrst_ctrl_stress_all.299974183 Jul 26 04:55:16 PM PDT 24 Jul 26 04:55:21 PM PDT 24 8943681589 ps
T672 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2673543419 Jul 26 04:55:54 PM PDT 24 Jul 26 04:55:56 PM PDT 24 2232849623 ps
T673 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1411920773 Jul 26 04:56:42 PM PDT 24 Jul 26 04:56:48 PM PDT 24 2440434860 ps
T339 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3313447343 Jul 26 04:57:15 PM PDT 24 Jul 26 05:00:06 PM PDT 24 66336510134 ps
T674 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.2018782997 Jul 26 04:56:23 PM PDT 24 Jul 26 04:59:54 PM PDT 24 152470813637 ps
T675 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1140552535 Jul 26 04:56:11 PM PDT 24 Jul 26 04:56:20 PM PDT 24 3109570633 ps
T676 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.4269079616 Jul 26 04:56:10 PM PDT 24 Jul 26 04:56:13 PM PDT 24 2469642345 ps
T335 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3932238078 Jul 26 04:56:17 PM PDT 24 Jul 26 04:57:39 PM PDT 24 123192986804 ps
T677 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.468627493 Jul 26 04:56:14 PM PDT 24 Jul 26 04:56:16 PM PDT 24 2529998420 ps
T678 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1764754003 Jul 26 04:55:06 PM PDT 24 Jul 26 04:55:19 PM PDT 24 4684552845 ps
T679 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.2962045953 Jul 26 04:55:56 PM PDT 24 Jul 26 04:57:31 PM PDT 24 143935068546 ps
T680 /workspace/coverage/default/26.sysrst_ctrl_smoke.2861568362 Jul 26 04:56:03 PM PDT 24 Jul 26 04:56:09 PM PDT 24 2111766545 ps
T681 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.246335794 Jul 26 04:55:39 PM PDT 24 Jul 26 04:56:17 PM PDT 24 54327970964 ps
T346 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1311828270 Jul 26 04:55:15 PM PDT 24 Jul 26 04:59:20 PM PDT 24 206272969545 ps
T682 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.413976783 Jul 26 05:44:14 PM PDT 24 Jul 26 05:44:41 PM PDT 24 99827369764 ps
T323 /workspace/coverage/default/48.sysrst_ctrl_stress_all.4134707809 Jul 26 04:57:04 PM PDT 24 Jul 26 05:01:43 PM PDT 24 234194542205 ps
T683 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.526280939 Jul 26 04:56:13 PM PDT 24 Jul 26 04:56:50 PM PDT 24 56598754508 ps
T684 /workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3987677261 Jul 26 04:55:28 PM PDT 24 Jul 26 04:55:35 PM PDT 24 2514145672 ps
T685 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1555281048 Jul 26 04:57:10 PM PDT 24 Jul 26 04:57:12 PM PDT 24 2553159184 ps
T686 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3288371367 Jul 26 05:27:07 PM PDT 24 Jul 26 05:27:13 PM PDT 24 2102394868 ps
T687 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1521921313 Jul 26 04:56:44 PM PDT 24 Jul 26 04:56:48 PM PDT 24 2516284164 ps
T688 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.3548855512 Jul 26 04:55:46 PM PDT 24 Jul 26 04:55:49 PM PDT 24 2479474799 ps
T689 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.975865250 Jul 26 04:55:28 PM PDT 24 Jul 26 04:55:36 PM PDT 24 4694084964 ps
T207 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.226681931 Jul 26 04:57:00 PM PDT 24 Jul 26 04:57:52 PM PDT 24 41121278252 ps
T282 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1831321821 Jul 26 04:56:49 PM PDT 24 Jul 26 04:57:13 PM PDT 24 40483994055 ps
T690 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1149743767 Jul 26 04:55:57 PM PDT 24 Jul 26 04:55:59 PM PDT 24 2632102600 ps
T691 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1966963929 Jul 26 05:00:18 PM PDT 24 Jul 26 05:00:21 PM PDT 24 2535127485 ps
T692 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.2448981719 Jul 26 04:56:21 PM PDT 24 Jul 26 04:56:22 PM PDT 24 2257781876 ps
T360 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.134892231 Jul 26 04:56:49 PM PDT 24 Jul 26 04:58:39 PM PDT 24 41235956662 ps
T693 /workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.422087731 Jul 26 04:55:22 PM PDT 24 Jul 26 04:55:25 PM PDT 24 4009250088 ps
T694 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.54885115 Jul 26 04:55:58 PM PDT 24 Jul 26 04:56:08 PM PDT 24 3316698651 ps
T695 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.436654636 Jul 26 04:56:12 PM PDT 24 Jul 26 04:56:15 PM PDT 24 3255627839 ps
T696 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.2589465043 Jul 26 04:55:53 PM PDT 24 Jul 26 04:55:58 PM PDT 24 3296670580 ps
T697 /workspace/coverage/default/5.sysrst_ctrl_stress_all.3321351665 Jul 26 04:55:25 PM PDT 24 Jul 26 04:55:31 PM PDT 24 8384641200 ps
T698 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.266008958 Jul 26 04:55:15 PM PDT 24 Jul 26 04:55:23 PM PDT 24 4847575447 ps
T164 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.4059878857 Jul 26 04:55:51 PM PDT 24 Jul 26 04:55:58 PM PDT 24 3150637767 ps
T236 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.2169519741 Jul 26 04:55:42 PM PDT 24 Jul 26 04:56:11 PM PDT 24 47354128680 ps
T356 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3140584026 Jul 26 04:55:26 PM PDT 24 Jul 26 04:56:42 PM PDT 24 124921790439 ps
T699 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1793585025 Jul 26 04:56:59 PM PDT 24 Jul 26 04:57:06 PM PDT 24 6699722536 ps
T700 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2245617393 Jul 26 04:56:15 PM PDT 24 Jul 26 04:56:48 PM PDT 24 407082970938 ps
T701 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.1135631341 Jul 26 04:55:06 PM PDT 24 Jul 26 04:55:10 PM PDT 24 2620549518 ps
T702 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.3560333672 Jul 26 04:56:07 PM PDT 24 Jul 26 05:03:11 PM PDT 24 159032571562 ps
T703 /workspace/coverage/default/21.sysrst_ctrl_alert_test.1628695549 Jul 26 04:55:58 PM PDT 24 Jul 26 04:55:59 PM PDT 24 2070475986 ps
T704 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.72385365 Jul 26 04:55:35 PM PDT 24 Jul 26 04:55:39 PM PDT 24 2619945775 ps
T705 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.421047254 Jul 26 04:57:00 PM PDT 24 Jul 26 04:57:02 PM PDT 24 2522537579 ps
T706 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.361494806 Jul 26 04:56:47 PM PDT 24 Jul 26 04:56:50 PM PDT 24 4370650401 ps
T707 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.3779250949 Jul 26 04:55:50 PM PDT 24 Jul 26 04:55:59 PM PDT 24 3427038472 ps
T708 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.835662184 Jul 26 04:56:23 PM PDT 24 Jul 26 04:56:26 PM PDT 24 2448280146 ps
T709 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1832094760 Jul 26 04:55:40 PM PDT 24 Jul 26 04:55:43 PM PDT 24 2108044115 ps
T710 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1933708434 Jul 26 04:56:48 PM PDT 24 Jul 26 04:56:52 PM PDT 24 5159781689 ps
T272 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.773545938 Jul 26 04:55:38 PM PDT 24 Jul 26 04:56:34 PM PDT 24 322817025744 ps
T711 /workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.945399240 Jul 26 05:32:28 PM PDT 24 Jul 26 05:33:24 PM PDT 24 22905881838 ps
T355 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.1422641982 Jul 26 04:56:12 PM PDT 24 Jul 26 04:57:56 PM PDT 24 199294755916 ps
T712 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.543400296 Jul 26 04:56:25 PM PDT 24 Jul 26 04:56:29 PM PDT 24 2512779464 ps
T713 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3764202534 Jul 26 04:55:31 PM PDT 24 Jul 26 04:55:52 PM PDT 24 27850304309 ps
T714 /workspace/coverage/default/48.sysrst_ctrl_alert_test.37171311 Jul 26 04:56:49 PM PDT 24 Jul 26 04:56:52 PM PDT 24 2027203364 ps
T715 /workspace/coverage/default/46.sysrst_ctrl_alert_test.236563758 Jul 26 04:56:50 PM PDT 24 Jul 26 04:56:52 PM PDT 24 2041975667 ps
T716 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.3104516784 Jul 26 04:56:12 PM PDT 24 Jul 26 04:56:14 PM PDT 24 2062378000 ps
T717 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1366762006 Jul 26 04:55:58 PM PDT 24 Jul 26 04:56:02 PM PDT 24 5089985259 ps
T718 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3515246378 Jul 26 04:55:41 PM PDT 24 Jul 26 04:55:50 PM PDT 24 13584700075 ps
T719 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.218737264 Jul 26 04:55:13 PM PDT 24 Jul 26 04:55:15 PM PDT 24 2965808475 ps
T146 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1781261781 Jul 26 04:56:55 PM PDT 24 Jul 26 04:59:00 PM PDT 24 49761394177 ps
T720 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.2439739271 Jul 26 04:55:42 PM PDT 24 Jul 26 04:55:45 PM PDT 24 2612883420 ps
T721 /workspace/coverage/default/21.sysrst_ctrl_smoke.1142687810 Jul 26 04:55:56 PM PDT 24 Jul 26 04:56:01 PM PDT 24 2113848879 ps
T722 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2738710765 Jul 26 04:56:50 PM PDT 24 Jul 26 04:56:52 PM PDT 24 3525120488 ps
T293 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3519793065 Jul 26 04:55:57 PM PDT 24 Jul 26 04:58:58 PM PDT 24 74220181210 ps
T723 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2330474787 Jul 26 04:56:15 PM PDT 24 Jul 26 04:56:17 PM PDT 24 3371277050 ps
T724 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3294463616 Jul 26 04:56:03 PM PDT 24 Jul 26 04:56:27 PM PDT 24 29847542653 ps
T344 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.4272461458 Jul 26 04:55:49 PM PDT 24 Jul 26 04:56:40 PM PDT 24 86152015035 ps
T725 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.2701124319 Jul 26 04:56:53 PM PDT 24 Jul 26 04:57:36 PM PDT 24 71731910823 ps
T726 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1448601040 Jul 26 04:56:31 PM PDT 24 Jul 26 04:56:33 PM PDT 24 2628503010 ps
T357 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1565027914 Jul 26 04:56:52 PM PDT 24 Jul 26 05:00:37 PM PDT 24 113029342156 ps
T727 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.1440186885 Jul 26 04:55:22 PM PDT 24 Jul 26 04:55:29 PM PDT 24 2611205779 ps
T97 /workspace/coverage/default/8.sysrst_ctrl_stress_all.1230163588 Jul 26 04:55:25 PM PDT 24 Jul 26 04:55:47 PM PDT 24 7777933550 ps
T728 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.2685902946 Jul 26 04:55:15 PM PDT 24 Jul 26 04:55:18 PM PDT 24 2421653277 ps
T325 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.1114664992 Jul 26 04:56:14 PM PDT 24 Jul 26 04:59:15 PM PDT 24 111547805923 ps
T122 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3666916096 Jul 26 04:55:42 PM PDT 24 Jul 26 04:55:50 PM PDT 24 5736509981 ps
T729 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.1137220680 Jul 26 04:56:39 PM PDT 24 Jul 26 04:56:41 PM PDT 24 2694914030 ps
T730 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.4386014 Jul 26 04:56:55 PM PDT 24 Jul 26 04:56:58 PM PDT 24 2633348425 ps
T731 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2954734555 Jul 26 04:55:26 PM PDT 24 Jul 26 04:55:37 PM PDT 24 3798907124 ps
T732 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.902008256 Jul 26 04:56:46 PM PDT 24 Jul 26 04:56:55 PM PDT 24 4192209844 ps
T733 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3886234446 Jul 26 04:55:31 PM PDT 24 Jul 26 04:56:27 PM PDT 24 23103959374 ps
T734 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2525723796 Jul 26 04:55:55 PM PDT 24 Jul 26 04:56:08 PM PDT 24 26349500292 ps
T735 /workspace/coverage/default/40.sysrst_ctrl_smoke.3091355410 Jul 26 04:56:34 PM PDT 24 Jul 26 04:56:36 PM PDT 24 2135340838 ps
T736 /workspace/coverage/default/45.sysrst_ctrl_smoke.2878013695 Jul 26 04:56:56 PM PDT 24 Jul 26 04:56:58 PM PDT 24 2121817292 ps
T131 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1333087302 Jul 26 04:56:06 PM PDT 24 Jul 26 04:56:15 PM PDT 24 6201035843 ps
T353 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1000560405 Jul 26 04:56:43 PM PDT 24 Jul 26 04:57:16 PM PDT 24 118718808075 ps
T737 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3960729780 Jul 26 04:55:54 PM PDT 24 Jul 26 04:56:54 PM PDT 24 24182570017 ps
T738 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.1270182406 Jul 26 04:57:02 PM PDT 24 Jul 26 04:57:41 PM PDT 24 60005106876 ps
T331 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.3120450038 Jul 26 04:57:25 PM PDT 24 Jul 26 04:58:01 PM PDT 24 58653500083 ps
T739 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3616339734 Jul 26 04:56:14 PM PDT 24 Jul 26 04:56:19 PM PDT 24 2614122167 ps
T740 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.3593051484 Jul 26 04:56:27 PM PDT 24 Jul 26 04:56:34 PM PDT 24 2144511398 ps
T741 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.4029642741 Jul 26 04:55:11 PM PDT 24 Jul 26 04:55:18 PM PDT 24 2189333296 ps
T742 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1959691420 Jul 26 04:55:25 PM PDT 24 Jul 26 04:55:35 PM PDT 24 3401388468 ps
T743 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2618201103 Jul 26 04:55:59 PM PDT 24 Jul 26 04:56:00 PM PDT 24 2531735424 ps
T744 /workspace/coverage/default/11.sysrst_ctrl_smoke.3642944666 Jul 26 04:55:56 PM PDT 24 Jul 26 04:56:01 PM PDT 24 2108976152 ps
T745 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.354632834 Jul 26 04:55:55 PM PDT 24 Jul 26 04:55:56 PM PDT 24 2549636208 ps
T746 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3476243922 Jul 26 04:55:13 PM PDT 24 Jul 26 04:55:16 PM PDT 24 2538537994 ps
T268 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.3429553262 Jul 26 04:55:18 PM PDT 24 Jul 26 04:55:46 PM PDT 24 42115595315 ps
T747 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2692390888 Jul 26 04:56:48 PM PDT 24 Jul 26 04:57:49 PM PDT 24 50255587216 ps
T748 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.1196983480 Jul 26 04:55:58 PM PDT 24 Jul 26 04:56:00 PM PDT 24 2995448581 ps
T749 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.441526014 Jul 26 05:05:30 PM PDT 24 Jul 26 05:05:36 PM PDT 24 2712885099 ps
T750 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.240529503 Jul 26 04:56:08 PM PDT 24 Jul 26 05:07:05 PM PDT 24 250221386894 ps
T751 /workspace/coverage/default/29.sysrst_ctrl_smoke.3927613756 Jul 26 04:56:03 PM PDT 24 Jul 26 04:56:05 PM PDT 24 2138089512 ps
T752 /workspace/coverage/default/2.sysrst_ctrl_alert_test.4259339700 Jul 26 04:55:18 PM PDT 24 Jul 26 04:55:24 PM PDT 24 2015676646 ps
T753 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2861047781 Jul 26 05:29:58 PM PDT 24 Jul 26 05:30:25 PM PDT 24 36152235939 ps
T332 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.285985779 Jul 26 04:56:52 PM PDT 24 Jul 26 04:57:12 PM PDT 24 54002945348 ps
T754 /workspace/coverage/default/22.sysrst_ctrl_stress_all.1600371685 Jul 26 04:55:50 PM PDT 24 Jul 26 04:56:01 PM PDT 24 14786722744 ps
T755 /workspace/coverage/default/34.sysrst_ctrl_stress_all.639036931 Jul 26 04:56:41 PM PDT 24 Jul 26 04:58:41 PM PDT 24 185377101930 ps
T756 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2765225947 Jul 26 04:55:37 PM PDT 24 Jul 26 04:55:43 PM PDT 24 2011903440 ps
T757 /workspace/coverage/default/12.sysrst_ctrl_smoke.1881867705 Jul 26 04:55:40 PM PDT 24 Jul 26 04:55:44 PM PDT 24 2121803602 ps
T758 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2516313242 Jul 26 04:56:22 PM PDT 24 Jul 26 04:56:26 PM PDT 24 2516538012 ps
T759 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1171586847 Jul 26 04:56:21 PM PDT 24 Jul 26 04:56:26 PM PDT 24 6980249326 ps
T760 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3976092314 Jul 26 05:01:10 PM PDT 24 Jul 26 05:01:14 PM PDT 24 4722844767 ps
T761 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.738279152 Jul 26 04:58:08 PM PDT 24 Jul 26 04:58:20 PM PDT 24 4673340552 ps
T762 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.1250612374 Jul 26 04:55:39 PM PDT 24 Jul 26 04:55:43 PM PDT 24 2121881134 ps
T763 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1256589089 Jul 26 04:56:29 PM PDT 24 Jul 26 04:56:31 PM PDT 24 2524386845 ps
T334 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1054880450 Jul 26 04:55:27 PM PDT 24 Jul 26 04:58:16 PM PDT 24 62017396602 ps
T329 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3350129753 Jul 26 04:56:35 PM PDT 24 Jul 26 04:57:20 PM PDT 24 262795119613 ps
T764 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2210357824 Jul 26 04:57:13 PM PDT 24 Jul 26 05:00:12 PM PDT 24 94088253978 ps
T765 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2660857196 Jul 26 04:55:15 PM PDT 24 Jul 26 04:57:12 PM PDT 24 296039174501 ps
T766 /workspace/coverage/default/16.sysrst_ctrl_combo_detect.3777363267 Jul 26 04:55:51 PM PDT 24 Jul 26 04:57:22 PM PDT 24 70528000726 ps
T767 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.2517547301 Jul 26 04:56:50 PM PDT 24 Jul 26 04:56:54 PM PDT 24 2149460577 ps
T203 /workspace/coverage/default/37.sysrst_ctrl_stress_all.3824899247 Jul 26 04:56:23 PM PDT 24 Jul 26 04:56:42 PM PDT 24 7482034254 ps
T340 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.1593716145 Jul 26 04:56:50 PM PDT 24 Jul 26 04:57:14 PM PDT 24 45719588018 ps
T768 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.3343105127 Jul 26 04:56:33 PM PDT 24 Jul 26 04:57:06 PM PDT 24 48371762897 ps
T769 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2264357957 Jul 26 04:55:41 PM PDT 24 Jul 26 04:56:18 PM PDT 24 19831365216 ps
T770 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.33126774 Jul 26 04:55:40 PM PDT 24 Jul 26 04:58:07 PM PDT 24 55977110992 ps
T771 /workspace/coverage/default/18.sysrst_ctrl_smoke.3827050722 Jul 26 04:55:49 PM PDT 24 Jul 26 04:55:52 PM PDT 24 2118514879 ps
T772 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2702189554 Jul 26 04:55:33 PM PDT 24 Jul 26 04:55:35 PM PDT 24 4062293525 ps
T773 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.284256717 Jul 26 04:56:34 PM PDT 24 Jul 26 04:56:43 PM PDT 24 3319578092 ps
T774 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2700163534 Jul 26 04:56:31 PM PDT 24 Jul 26 04:56:39 PM PDT 24 2475111097 ps
T775 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.600048071 Jul 26 04:55:05 PM PDT 24 Jul 26 04:55:09 PM PDT 24 3097331119 ps
T776 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.163583407 Jul 26 04:56:04 PM PDT 24 Jul 26 04:56:05 PM PDT 24 3903143759 ps
T225 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1378221717 Jul 26 04:56:51 PM PDT 24 Jul 26 04:58:09 PM PDT 24 56622220312 ps
T777 /workspace/coverage/default/8.sysrst_ctrl_alert_test.2530650462 Jul 26 04:55:33 PM PDT 24 Jul 26 04:55:35 PM PDT 24 2042912081 ps
T132 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1085013016 Jul 26 04:55:42 PM PDT 24 Jul 26 04:55:48 PM PDT 24 9333744235 ps
T778 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1924379687 Jul 26 04:56:43 PM PDT 24 Jul 26 04:56:48 PM PDT 24 2182231840 ps
T779 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.4273122716 Jul 26 04:55:15 PM PDT 24 Jul 26 04:55:18 PM PDT 24 3221033494 ps
T780 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.2442563705 Jul 26 04:55:49 PM PDT 24 Jul 26 04:57:11 PM PDT 24 124069314636 ps
T781 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3103246851 Jul 26 04:55:26 PM PDT 24 Jul 26 04:55:33 PM PDT 24 2610685369 ps
T782 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3879287779 Jul 26 04:56:03 PM PDT 24 Jul 26 04:56:09 PM PDT 24 2105272053 ps
T783 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3368578385 Jul 26 04:56:39 PM PDT 24 Jul 26 04:56:43 PM PDT 24 2462613990 ps
T784 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.3634287965 Jul 26 04:55:04 PM PDT 24 Jul 26 04:55:07 PM PDT 24 2528227269 ps
T785 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1230717142 Jul 26 04:57:07 PM PDT 24 Jul 26 04:57:59 PM PDT 24 147112116768 ps
T786 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.3745608680 Jul 26 04:55:17 PM PDT 24 Jul 26 04:59:10 PM PDT 24 201175776022 ps
T787 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1201404136 Jul 26 04:56:14 PM PDT 24 Jul 26 04:56:21 PM PDT 24 3394254432 ps
T788 /workspace/coverage/default/38.sysrst_ctrl_smoke.559405920 Jul 26 04:56:24 PM PDT 24 Jul 26 04:56:30 PM PDT 24 2109948305 ps
T789 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.2920569757 Jul 26 04:56:29 PM PDT 24 Jul 26 04:58:51 PM PDT 24 52732838829 ps
T345 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.148535096 Jul 26 04:56:47 PM PDT 24 Jul 26 04:58:24 PM PDT 24 36409310989 ps
T790 /workspace/coverage/default/30.sysrst_ctrl_stress_all.983147808 Jul 26 04:56:22 PM PDT 24 Jul 26 04:56:32 PM PDT 24 13368516121 ps
T791 /workspace/coverage/default/19.sysrst_ctrl_stress_all.2350738195 Jul 26 04:55:57 PM PDT 24 Jul 26 04:56:26 PM PDT 24 13708038059 ps
T123 /workspace/coverage/default/18.sysrst_ctrl_stress_all.2574088415 Jul 26 04:56:01 PM PDT 24 Jul 26 04:56:09 PM PDT 24 20442239893 ps
T792 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1258163454 Jul 26 04:57:07 PM PDT 24 Jul 26 04:59:52 PM PDT 24 61858448311 ps
T793 /workspace/coverage/default/37.sysrst_ctrl_smoke.1356193736 Jul 26 04:56:22 PM PDT 24 Jul 26 04:56:28 PM PDT 24 2109411387 ps
T165 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.2391567396 Jul 26 04:55:22 PM PDT 24 Jul 26 04:55:34 PM PDT 24 5471834721 ps
T133 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.126824749 Jul 26 04:55:42 PM PDT 24 Jul 26 04:56:41 PM PDT 24 24739616136 ps
T794 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.4237246651 Jul 26 04:55:59 PM PDT 24 Jul 26 04:56:02 PM PDT 24 2457344014 ps
T795 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.2127918068 Jul 26 04:56:42 PM PDT 24 Jul 26 04:56:44 PM PDT 24 2560240335 ps
T796 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.296803291 Jul 26 04:55:58 PM PDT 24 Jul 26 04:56:00 PM PDT 24 2097030117 ps
T797 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1200379471 Jul 26 04:56:16 PM PDT 24 Jul 26 04:56:21 PM PDT 24 3371301784 ps
T798 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.617826442 Jul 26 04:56:53 PM PDT 24 Jul 26 04:59:49 PM PDT 24 70340393703 ps
T799 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.3616393747 Jul 26 04:56:45 PM PDT 24 Jul 26 04:57:23 PM PDT 24 74515996097 ps
T800 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1848997257 Jul 26 04:56:34 PM PDT 24 Jul 26 04:56:41 PM PDT 24 2614225297 ps
T801 /workspace/coverage/default/39.sysrst_ctrl_smoke.2800843416 Jul 26 04:56:54 PM PDT 24 Jul 26 04:57:00 PM PDT 24 2114507458 ps
T802 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2913327432 Jul 26 04:56:21 PM PDT 24 Jul 26 04:56:28 PM PDT 24 2457070803 ps
T803 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2526986637 Jul 26 04:55:07 PM PDT 24 Jul 26 04:55:13 PM PDT 24 2018044227 ps
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