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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.98 98.82 96.78 100.00 96.79 98.26 99.61 88.60


Total test records in report: 905
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T396 /workspace/coverage/default/40.sysrst_ctrl_stress_all.2821954643 Jul 29 07:31:41 PM PDT 24 Jul 29 07:32:33 PM PDT 24 150660969165 ps
T617 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.798974414 Jul 29 07:30:37 PM PDT 24 Jul 29 07:30:56 PM PDT 24 26356960123 ps
T131 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3534555425 Jul 29 07:31:55 PM PDT 24 Jul 29 07:39:00 PM PDT 24 2253553647329 ps
T618 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.2999542893 Jul 29 07:32:10 PM PDT 24 Jul 29 07:34:47 PM PDT 24 130955488566 ps
T619 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3252456734 Jul 29 07:31:54 PM PDT 24 Jul 29 07:31:57 PM PDT 24 3858288816 ps
T620 /workspace/coverage/default/33.sysrst_ctrl_smoke.897621626 Jul 29 07:31:28 PM PDT 24 Jul 29 07:31:32 PM PDT 24 2116174652 ps
T621 /workspace/coverage/default/1.sysrst_ctrl_smoke.267262562 Jul 29 07:29:52 PM PDT 24 Jul 29 07:29:53 PM PDT 24 2146484909 ps
T622 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.859177149 Jul 29 07:30:26 PM PDT 24 Jul 29 07:30:29 PM PDT 24 9094457212 ps
T623 /workspace/coverage/default/44.sysrst_ctrl_stress_all.271331264 Jul 29 07:31:52 PM PDT 24 Jul 29 07:32:20 PM PDT 24 11049881842 ps
T624 /workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.3903253080 Jul 29 07:30:38 PM PDT 24 Jul 29 07:30:46 PM PDT 24 2774853622 ps
T625 /workspace/coverage/default/49.sysrst_ctrl_smoke.1147060632 Jul 29 07:32:10 PM PDT 24 Jul 29 07:32:16 PM PDT 24 2110932283 ps
T216 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1649345812 Jul 29 07:30:07 PM PDT 24 Jul 29 07:31:30 PM PDT 24 70512986111 ps
T218 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.1815736982 Jul 29 07:31:55 PM PDT 24 Jul 29 07:32:02 PM PDT 24 2720089213 ps
T219 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.2920165152 Jul 29 07:31:18 PM PDT 24 Jul 29 07:31:20 PM PDT 24 3727689966 ps
T220 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4020756414 Jul 29 07:30:18 PM PDT 24 Jul 29 07:30:26 PM PDT 24 2481618447 ps
T221 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3116125837 Jul 29 07:31:03 PM PDT 24 Jul 29 07:31:09 PM PDT 24 2570926694 ps
T222 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.1571765953 Jul 29 07:31:03 PM PDT 24 Jul 29 07:31:06 PM PDT 24 2629016160 ps
T223 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1288866955 Jul 29 07:30:28 PM PDT 24 Jul 29 07:31:04 PM PDT 24 51872300218 ps
T224 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1359259368 Jul 29 07:31:58 PM PDT 24 Jul 29 07:32:00 PM PDT 24 3467244728 ps
T225 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.361444225 Jul 29 07:30:10 PM PDT 24 Jul 29 07:30:16 PM PDT 24 3783978112 ps
T226 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1507084690 Jul 29 07:31:28 PM PDT 24 Jul 29 07:31:44 PM PDT 24 26624904163 ps
T240 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2082443173 Jul 29 07:31:55 PM PDT 24 Jul 29 07:34:18 PM PDT 24 216936730337 ps
T626 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1999637309 Jul 29 07:30:23 PM PDT 24 Jul 29 07:30:26 PM PDT 24 3833659549 ps
T627 /workspace/coverage/default/16.sysrst_ctrl_smoke.2012438306 Jul 29 07:30:42 PM PDT 24 Jul 29 07:30:48 PM PDT 24 2109879755 ps
T628 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1690568352 Jul 29 07:30:08 PM PDT 24 Jul 29 07:30:10 PM PDT 24 2473682277 ps
T205 /workspace/coverage/default/17.sysrst_ctrl_stress_all.1491642413 Jul 29 07:30:48 PM PDT 24 Jul 29 07:37:52 PM PDT 24 345279573602 ps
T107 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3377623631 Jul 29 07:31:54 PM PDT 24 Jul 29 07:32:08 PM PDT 24 49962822429 ps
T206 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.2504061785 Jul 29 07:31:23 PM PDT 24 Jul 29 07:33:06 PM PDT 24 193282713935 ps
T629 /workspace/coverage/default/9.sysrst_ctrl_pin_override_test.205348674 Jul 29 07:30:28 PM PDT 24 Jul 29 07:30:35 PM PDT 24 2514698581 ps
T313 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.518188103 Jul 29 07:30:46 PM PDT 24 Jul 29 07:32:04 PM PDT 24 160523057876 ps
T630 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.10363819 Jul 29 07:31:46 PM PDT 24 Jul 29 07:31:57 PM PDT 24 3586029680 ps
T631 /workspace/coverage/default/36.sysrst_ctrl_alert_test.3732238709 Jul 29 07:31:36 PM PDT 24 Jul 29 07:31:39 PM PDT 24 2020871592 ps
T632 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.4120233803 Jul 29 07:31:31 PM PDT 24 Jul 29 07:31:38 PM PDT 24 2509564220 ps
T633 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.4088285867 Jul 29 07:31:20 PM PDT 24 Jul 29 07:31:28 PM PDT 24 2511619083 ps
T393 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2709454824 Jul 29 07:32:11 PM PDT 24 Jul 29 07:32:54 PM PDT 24 66830582863 ps
T634 /workspace/coverage/default/45.sysrst_ctrl_stress_all.2930406662 Jul 29 07:31:55 PM PDT 24 Jul 29 07:38:16 PM PDT 24 139767841468 ps
T635 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.3161155802 Jul 29 07:31:19 PM PDT 24 Jul 29 07:31:20 PM PDT 24 6957247549 ps
T636 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.156913271 Jul 29 07:30:37 PM PDT 24 Jul 29 07:30:39 PM PDT 24 2622382179 ps
T637 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.104593642 Jul 29 07:32:18 PM PDT 24 Jul 29 07:33:35 PM PDT 24 118642135817 ps
T638 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3483086180 Jul 29 07:31:16 PM PDT 24 Jul 29 07:31:26 PM PDT 24 4211042349 ps
T639 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.1292199291 Jul 29 07:30:02 PM PDT 24 Jul 29 07:30:05 PM PDT 24 3600490237 ps
T640 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2812272432 Jul 29 07:29:58 PM PDT 24 Jul 29 07:30:05 PM PDT 24 2507318526 ps
T641 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3268603424 Jul 29 07:29:50 PM PDT 24 Jul 29 07:29:59 PM PDT 24 3036520928 ps
T642 /workspace/coverage/default/30.sysrst_ctrl_alert_test.4020514204 Jul 29 07:31:24 PM PDT 24 Jul 29 07:31:25 PM PDT 24 2060735355 ps
T385 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1219322750 Jul 29 07:32:13 PM PDT 24 Jul 29 07:41:24 PM PDT 24 200130694184 ps
T643 /workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.4174575491 Jul 29 07:31:42 PM PDT 24 Jul 29 07:31:46 PM PDT 24 3793000473 ps
T644 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.1155898050 Jul 29 07:31:19 PM PDT 24 Jul 29 07:31:23 PM PDT 24 2616753879 ps
T645 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.4236755409 Jul 29 07:30:02 PM PDT 24 Jul 29 07:30:36 PM PDT 24 186464088573 ps
T646 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.753751847 Jul 29 07:31:30 PM PDT 24 Jul 29 07:31:32 PM PDT 24 4061842669 ps
T647 /workspace/coverage/default/16.sysrst_ctrl_pin_override_test.376917713 Jul 29 07:30:46 PM PDT 24 Jul 29 07:30:49 PM PDT 24 2526740610 ps
T648 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.2783237057 Jul 29 07:29:49 PM PDT 24 Jul 29 07:29:58 PM PDT 24 3553870955 ps
T188 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.1712776541 Jul 29 07:30:33 PM PDT 24 Jul 29 07:30:35 PM PDT 24 4846025883 ps
T190 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.1087269504 Jul 29 07:31:31 PM PDT 24 Jul 29 07:36:16 PM PDT 24 106827277861 ps
T191 /workspace/coverage/default/38.sysrst_ctrl_alert_test.3509366049 Jul 29 07:31:37 PM PDT 24 Jul 29 07:31:43 PM PDT 24 2014618451 ps
T192 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2552765212 Jul 29 07:31:52 PM PDT 24 Jul 29 07:31:55 PM PDT 24 4590655803 ps
T193 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2817228735 Jul 29 07:32:11 PM PDT 24 Jul 29 07:32:58 PM PDT 24 70535738458 ps
T194 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.2753516111 Jul 29 07:30:44 PM PDT 24 Jul 29 07:30:46 PM PDT 24 2486480370 ps
T195 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.871401270 Jul 29 07:32:15 PM PDT 24 Jul 29 07:33:00 PM PDT 24 36133424811 ps
T196 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.359344903 Jul 29 07:31:37 PM PDT 24 Jul 29 07:31:57 PM PDT 24 28825964108 ps
T197 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3713240622 Jul 29 07:31:41 PM PDT 24 Jul 29 07:31:50 PM PDT 24 3649069933 ps
T198 /workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2846965829 Jul 29 07:30:43 PM PDT 24 Jul 29 07:30:48 PM PDT 24 2613104572 ps
T649 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.378533226 Jul 29 07:31:54 PM PDT 24 Jul 29 07:32:08 PM PDT 24 34992402130 ps
T650 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.4180216415 Jul 29 07:31:42 PM PDT 24 Jul 29 07:31:46 PM PDT 24 2202349059 ps
T132 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1147661855 Jul 29 07:30:10 PM PDT 24 Jul 29 07:30:15 PM PDT 24 8787624272 ps
T651 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3124344403 Jul 29 07:31:40 PM PDT 24 Jul 29 07:31:47 PM PDT 24 2449342005 ps
T652 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.3197019766 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:31 PM PDT 24 2804191726 ps
T653 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2666590815 Jul 29 07:31:44 PM PDT 24 Jul 29 07:31:51 PM PDT 24 2611361301 ps
T140 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3424740097 Jul 29 07:31:23 PM PDT 24 Jul 29 07:32:14 PM PDT 24 55018549779 ps
T654 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.2912733944 Jul 29 07:31:31 PM PDT 24 Jul 29 07:31:37 PM PDT 24 2498624189 ps
T655 /workspace/coverage/default/12.sysrst_ctrl_alert_test.3437171975 Jul 29 07:30:35 PM PDT 24 Jul 29 07:30:41 PM PDT 24 2011119323 ps
T656 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2912797357 Jul 29 07:30:07 PM PDT 24 Jul 29 07:30:10 PM PDT 24 2100753949 ps
T228 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.1730887900 Jul 29 07:31:21 PM PDT 24 Jul 29 07:31:23 PM PDT 24 3678855875 ps
T229 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.3094517246 Jul 29 07:31:16 PM PDT 24 Jul 29 07:32:13 PM PDT 24 90394323973 ps
T230 /workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3018169851 Jul 29 07:30:48 PM PDT 24 Jul 29 07:30:50 PM PDT 24 2462339987 ps
T231 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1045311720 Jul 29 07:31:42 PM PDT 24 Jul 29 07:31:44 PM PDT 24 2682873131 ps
T232 /workspace/coverage/default/28.sysrst_ctrl_stress_all.2516442131 Jul 29 07:31:14 PM PDT 24 Jul 29 07:31:29 PM PDT 24 6605352578 ps
T233 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2422352060 Jul 29 07:30:52 PM PDT 24 Jul 29 07:30:53 PM PDT 24 2231059976 ps
T234 /workspace/coverage/default/25.sysrst_ctrl_stress_all.1590391831 Jul 29 07:31:13 PM PDT 24 Jul 29 07:31:37 PM PDT 24 9321250182 ps
T235 /workspace/coverage/default/26.sysrst_ctrl_stress_all.4056862705 Jul 29 07:31:13 PM PDT 24 Jul 29 07:34:39 PM PDT 24 75995972272 ps
T236 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.755241476 Jul 29 07:31:55 PM PDT 24 Jul 29 07:31:57 PM PDT 24 3410041566 ps
T237 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1694097883 Jul 29 07:31:53 PM PDT 24 Jul 29 07:31:59 PM PDT 24 2222755514 ps
T657 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1214199202 Jul 29 07:30:38 PM PDT 24 Jul 29 07:30:40 PM PDT 24 2559637601 ps
T658 /workspace/coverage/default/17.sysrst_ctrl_smoke.123940781 Jul 29 07:30:47 PM PDT 24 Jul 29 07:30:53 PM PDT 24 2111448185 ps
T659 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.2466220258 Jul 29 07:30:58 PM PDT 24 Jul 29 07:31:06 PM PDT 24 2847407488 ps
T660 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.4207712630 Jul 29 07:30:58 PM PDT 24 Jul 29 07:31:00 PM PDT 24 3769734389 ps
T661 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.3592911488 Jul 29 07:30:35 PM PDT 24 Jul 29 07:30:43 PM PDT 24 2610507600 ps
T662 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.2845496104 Jul 29 07:31:24 PM PDT 24 Jul 29 07:31:32 PM PDT 24 2815806565 ps
T384 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2381946271 Jul 29 07:32:14 PM PDT 24 Jul 29 07:37:47 PM PDT 24 127161246518 ps
T663 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.2854308179 Jul 29 07:31:07 PM PDT 24 Jul 29 07:31:14 PM PDT 24 2462119801 ps
T664 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.402428367 Jul 29 07:31:25 PM PDT 24 Jul 29 07:31:32 PM PDT 24 2610536518 ps
T297 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.3804019100 Jul 29 07:30:03 PM PDT 24 Jul 29 07:30:27 PM PDT 24 42132875728 ps
T665 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1775158167 Jul 29 07:31:57 PM PDT 24 Jul 29 07:31:58 PM PDT 24 2523053153 ps
T407 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1376612929 Jul 29 07:32:18 PM PDT 24 Jul 29 07:34:06 PM PDT 24 43062035627 ps
T378 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.3116946987 Jul 29 07:30:36 PM PDT 24 Jul 29 07:35:41 PM PDT 24 157153694574 ps
T666 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1619148466 Jul 29 07:32:11 PM PDT 24 Jul 29 07:34:06 PM PDT 24 43153827113 ps
T185 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.2696309456 Jul 29 07:30:43 PM PDT 24 Jul 29 07:30:46 PM PDT 24 4503044077 ps
T207 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1748544464 Jul 29 07:31:50 PM PDT 24 Jul 29 07:34:16 PM PDT 24 2608104421428 ps
T186 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.1029787105 Jul 29 07:31:14 PM PDT 24 Jul 29 07:31:17 PM PDT 24 4390957354 ps
T667 /workspace/coverage/default/43.sysrst_ctrl_stress_all.493799234 Jul 29 07:31:53 PM PDT 24 Jul 29 07:32:20 PM PDT 24 10452004271 ps
T668 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2349825302 Jul 29 07:30:27 PM PDT 24 Jul 29 07:30:31 PM PDT 24 3437457155 ps
T669 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.3636484905 Jul 29 07:31:05 PM PDT 24 Jul 29 07:31:07 PM PDT 24 2207539234 ps
T208 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.3178946358 Jul 29 07:32:00 PM PDT 24 Jul 29 07:32:02 PM PDT 24 4295600841 ps
T670 /workspace/coverage/default/13.sysrst_ctrl_smoke.1004876396 Jul 29 07:30:34 PM PDT 24 Jul 29 07:30:40 PM PDT 24 2113588288 ps
T671 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2424581328 Jul 29 07:30:18 PM PDT 24 Jul 29 07:30:26 PM PDT 24 2982069141 ps
T672 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.2708067434 Jul 29 07:30:52 PM PDT 24 Jul 29 07:31:00 PM PDT 24 2611448274 ps
T251 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3786304048 Jul 29 07:30:59 PM PDT 24 Jul 29 07:32:52 PM PDT 24 45409114103 ps
T379 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.3378623033 Jul 29 07:31:41 PM PDT 24 Jul 29 07:33:25 PM PDT 24 148666376566 ps
T673 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.4100164226 Jul 29 07:30:52 PM PDT 24 Jul 29 07:30:54 PM PDT 24 2633480943 ps
T674 /workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.3380800095 Jul 29 07:30:29 PM PDT 24 Jul 29 07:30:37 PM PDT 24 2458010630 ps
T675 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2054022828 Jul 29 07:30:26 PM PDT 24 Jul 29 07:30:29 PM PDT 24 2624062554 ps
T676 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2113188115 Jul 29 07:30:37 PM PDT 24 Jul 29 07:30:40 PM PDT 24 2275540930 ps
T677 /workspace/coverage/default/22.sysrst_ctrl_smoke.3713690321 Jul 29 07:30:59 PM PDT 24 Jul 29 07:31:05 PM PDT 24 2115367586 ps
T678 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1292221632 Jul 29 07:31:15 PM PDT 24 Jul 29 07:31:21 PM PDT 24 2048121123 ps
T679 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3397894342 Jul 29 07:30:29 PM PDT 24 Jul 29 07:30:31 PM PDT 24 4061659256 ps
T680 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1569036306 Jul 29 07:31:56 PM PDT 24 Jul 29 07:32:35 PM PDT 24 37261537739 ps
T681 /workspace/coverage/default/25.sysrst_ctrl_alert_test.285221384 Jul 29 07:31:21 PM PDT 24 Jul 29 07:31:23 PM PDT 24 2036661572 ps
T682 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.2117115261 Jul 29 07:31:26 PM PDT 24 Jul 29 07:32:38 PM PDT 24 25581538740 ps
T683 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1949073537 Jul 29 07:30:50 PM PDT 24 Jul 29 07:30:56 PM PDT 24 4447019295 ps
T684 /workspace/coverage/default/34.sysrst_ctrl_alert_test.1068524459 Jul 29 07:31:31 PM PDT 24 Jul 29 07:31:34 PM PDT 24 2016187829 ps
T685 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.332593624 Jul 29 07:31:21 PM PDT 24 Jul 29 07:32:52 PM PDT 24 108516891046 ps
T686 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.764507578 Jul 29 07:31:28 PM PDT 24 Jul 29 07:31:36 PM PDT 24 2609342529 ps
T687 /workspace/coverage/default/37.sysrst_ctrl_smoke.2911753390 Jul 29 07:31:40 PM PDT 24 Jul 29 07:31:44 PM PDT 24 2118028351 ps
T688 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1466523913 Jul 29 07:32:15 PM PDT 24 Jul 29 07:33:27 PM PDT 24 26832231541 ps
T689 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.635757107 Jul 29 07:31:17 PM PDT 24 Jul 29 07:31:25 PM PDT 24 2484711159 ps
T690 /workspace/coverage/default/13.sysrst_ctrl_alert_test.1118106479 Jul 29 07:30:36 PM PDT 24 Jul 29 07:30:38 PM PDT 24 2032621078 ps
T691 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2465818519 Jul 29 07:30:06 PM PDT 24 Jul 29 07:30:15 PM PDT 24 2478317098 ps
T692 /workspace/coverage/default/45.sysrst_ctrl_alert_test.1446345676 Jul 29 07:31:53 PM PDT 24 Jul 29 07:31:56 PM PDT 24 2023565201 ps
T693 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.3585689006 Jul 29 07:30:53 PM PDT 24 Jul 29 07:30:55 PM PDT 24 3206586264 ps
T694 /workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2107031877 Jul 29 07:30:58 PM PDT 24 Jul 29 07:31:00 PM PDT 24 2167801640 ps
T695 /workspace/coverage/default/2.sysrst_ctrl_stress_all.4082691390 Jul 29 07:30:05 PM PDT 24 Jul 29 07:30:13 PM PDT 24 6288927370 ps
T273 /workspace/coverage/default/48.sysrst_ctrl_stress_all.2387768612 Jul 29 07:32:09 PM PDT 24 Jul 29 07:33:32 PM PDT 24 36113596095 ps
T696 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3666804295 Jul 29 07:31:53 PM PDT 24 Jul 29 07:31:57 PM PDT 24 2612107236 ps
T697 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.519353556 Jul 29 07:31:52 PM PDT 24 Jul 29 07:31:54 PM PDT 24 2546297652 ps
T698 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2758858059 Jul 29 07:31:36 PM PDT 24 Jul 29 07:31:43 PM PDT 24 3352833936 ps
T187 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.4079173281 Jul 29 07:32:12 PM PDT 24 Jul 29 07:32:16 PM PDT 24 5955921739 ps
T699 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.58618037 Jul 29 07:31:56 PM PDT 24 Jul 29 07:31:58 PM PDT 24 3892886608 ps
T700 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.292268033 Jul 29 07:31:15 PM PDT 24 Jul 29 07:31:22 PM PDT 24 2612031565 ps
T701 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.2453524167 Jul 29 07:31:40 PM PDT 24 Jul 29 07:31:43 PM PDT 24 3832143485 ps
T702 /workspace/coverage/default/23.sysrst_ctrl_smoke.3491235249 Jul 29 07:31:08 PM PDT 24 Jul 29 07:31:12 PM PDT 24 2119878497 ps
T703 /workspace/coverage/default/44.sysrst_ctrl_alert_test.2836857077 Jul 29 07:31:59 PM PDT 24 Jul 29 07:32:01 PM PDT 24 2085740158 ps
T704 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.723596239 Jul 29 07:30:53 PM PDT 24 Jul 29 07:30:56 PM PDT 24 2468319313 ps
T705 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.1509513765 Jul 29 07:31:22 PM PDT 24 Jul 29 07:31:24 PM PDT 24 2577856224 ps
T391 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2169603726 Jul 29 07:31:09 PM PDT 24 Jul 29 07:36:53 PM PDT 24 128539440614 ps
T706 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4202430993 Jul 29 07:31:54 PM PDT 24 Jul 29 07:32:33 PM PDT 24 26836481108 ps
T707 /workspace/coverage/default/1.sysrst_ctrl_stress_all.2213529749 Jul 29 07:29:55 PM PDT 24 Jul 29 07:30:18 PM PDT 24 9156384939 ps
T708 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.876671498 Jul 29 07:30:38 PM PDT 24 Jul 29 07:30:45 PM PDT 24 2446972577 ps
T709 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2907101237 Jul 29 07:31:08 PM PDT 24 Jul 29 07:31:09 PM PDT 24 2049422666 ps
T710 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3814287197 Jul 29 07:31:06 PM PDT 24 Jul 29 07:31:08 PM PDT 24 2524865573 ps
T711 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.3337315094 Jul 29 07:30:57 PM PDT 24 Jul 29 07:30:59 PM PDT 24 2753128304 ps
T712 /workspace/coverage/default/14.sysrst_ctrl_smoke.1891052849 Jul 29 07:30:38 PM PDT 24 Jul 29 07:30:42 PM PDT 24 2114614397 ps
T713 /workspace/coverage/default/39.sysrst_ctrl_stress_all.3979153954 Jul 29 07:31:49 PM PDT 24 Jul 29 07:32:05 PM PDT 24 11890183448 ps
T714 /workspace/coverage/default/37.sysrst_ctrl_alert_test.3537551210 Jul 29 07:31:37 PM PDT 24 Jul 29 07:31:40 PM PDT 24 2029140523 ps
T715 /workspace/coverage/default/47.sysrst_ctrl_alert_test.1254435704 Jul 29 07:31:55 PM PDT 24 Jul 29 07:31:57 PM PDT 24 2036987606 ps
T716 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.673694071 Jul 29 07:31:54 PM PDT 24 Jul 29 07:31:58 PM PDT 24 3480543029 ps
T717 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.3302419611 Jul 29 07:29:57 PM PDT 24 Jul 29 07:30:00 PM PDT 24 2627681155 ps
T718 /workspace/coverage/default/34.sysrst_ctrl_smoke.2168602413 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:33 PM PDT 24 2111401912 ps
T387 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.376131461 Jul 29 07:32:10 PM PDT 24 Jul 29 07:33:24 PM PDT 24 55672202890 ps
T719 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2483438478 Jul 29 07:30:07 PM PDT 24 Jul 29 07:30:50 PM PDT 24 76814126478 ps
T720 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1403940567 Jul 29 07:30:06 PM PDT 24 Jul 29 07:30:09 PM PDT 24 2524946495 ps
T721 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.2424821152 Jul 29 07:30:27 PM PDT 24 Jul 29 07:32:05 PM PDT 24 36751493448 ps
T722 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3491053897 Jul 29 07:31:56 PM PDT 24 Jul 29 07:31:59 PM PDT 24 2634040481 ps
T723 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.4091346161 Jul 29 07:31:22 PM PDT 24 Jul 29 07:31:59 PM PDT 24 26587133379 ps
T724 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.1733012268 Jul 29 07:32:00 PM PDT 24 Jul 29 07:32:27 PM PDT 24 107131241961 ps
T314 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3740339670 Jul 29 07:30:26 PM PDT 24 Jul 29 07:32:59 PM PDT 24 64166650162 ps
T725 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.276765327 Jul 29 07:31:09 PM PDT 24 Jul 29 07:31:16 PM PDT 24 5643686073 ps
T298 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.526844373 Jul 29 07:29:54 PM PDT 24 Jul 29 07:30:28 PM PDT 24 22013586907 ps
T726 /workspace/coverage/default/20.sysrst_ctrl_smoke.2012833817 Jul 29 07:30:51 PM PDT 24 Jul 29 07:30:57 PM PDT 24 2112720937 ps
T727 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.926724230 Jul 29 07:31:53 PM PDT 24 Jul 29 07:32:11 PM PDT 24 214488945772 ps
T728 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.126758858 Jul 29 07:30:53 PM PDT 24 Jul 29 07:32:54 PM PDT 24 263286657533 ps
T729 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1906606773 Jul 29 07:30:17 PM PDT 24 Jul 29 07:31:01 PM PDT 24 39506451543 ps
T389 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1936341703 Jul 29 07:32:13 PM PDT 24 Jul 29 07:35:29 PM PDT 24 77624666934 ps
T730 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.2854629238 Jul 29 07:31:41 PM PDT 24 Jul 29 07:33:37 PM PDT 24 45576717218 ps
T731 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.3676715892 Jul 29 07:31:33 PM PDT 24 Jul 29 07:32:44 PM PDT 24 173389015768 ps
T274 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.2658923368 Jul 29 07:31:34 PM PDT 24 Jul 29 07:31:59 PM PDT 24 32218739609 ps
T732 /workspace/coverage/default/6.sysrst_ctrl_alert_test.2494244310 Jul 29 07:30:26 PM PDT 24 Jul 29 07:30:29 PM PDT 24 2021250633 ps
T733 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1986973185 Jul 29 07:29:55 PM PDT 24 Jul 29 07:30:02 PM PDT 24 2461599374 ps
T734 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.2498630782 Jul 29 07:30:08 PM PDT 24 Jul 29 07:30:12 PM PDT 24 2588166573 ps
T394 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.390833999 Jul 29 07:32:13 PM PDT 24 Jul 29 07:32:47 PM PDT 24 56222020190 ps
T735 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.2753208636 Jul 29 07:31:35 PM PDT 24 Jul 29 07:31:38 PM PDT 24 3957725973 ps
T736 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1944660236 Jul 29 07:30:43 PM PDT 24 Jul 29 07:30:44 PM PDT 24 2558392873 ps
T737 /workspace/coverage/default/39.sysrst_ctrl_smoke.45622150 Jul 29 07:31:33 PM PDT 24 Jul 29 07:31:39 PM PDT 24 2110877179 ps
T738 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.365024816 Jul 29 07:31:31 PM PDT 24 Jul 29 07:31:34 PM PDT 24 4417851541 ps
T739 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.1039303934 Jul 29 07:30:59 PM PDT 24 Jul 29 07:31:01 PM PDT 24 2053643948 ps
T740 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2932765788 Jul 29 07:29:51 PM PDT 24 Jul 29 07:29:55 PM PDT 24 2066093327 ps
T741 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.269056163 Jul 29 07:31:19 PM PDT 24 Jul 29 07:31:22 PM PDT 24 3167601010 ps
T405 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3719828602 Jul 29 07:32:12 PM PDT 24 Jul 29 07:32:24 PM PDT 24 34735605470 ps
T742 /workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3570365907 Jul 29 07:30:07 PM PDT 24 Jul 29 07:30:16 PM PDT 24 3421740183 ps
T743 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3742320865 Jul 29 07:31:49 PM PDT 24 Jul 29 07:31:56 PM PDT 24 2467492073 ps
T410 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.3090291168 Jul 29 07:31:05 PM PDT 24 Jul 29 07:31:41 PM PDT 24 172251992360 ps
T744 /workspace/coverage/default/33.sysrst_ctrl_alert_test.1523516008 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:30 PM PDT 24 2026330067 ps
T745 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1000164815 Jul 29 07:30:10 PM PDT 24 Jul 29 07:33:58 PM PDT 24 381628715905 ps
T746 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.227923114 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:30 PM PDT 24 2047405717 ps
T747 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2409649397 Jul 29 07:32:14 PM PDT 24 Jul 29 07:33:51 PM PDT 24 37588360984 ps
T174 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2755112977 Jul 29 07:31:14 PM PDT 24 Jul 29 07:32:41 PM PDT 24 36815641185 ps
T748 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.2774879250 Jul 29 07:30:43 PM PDT 24 Jul 29 07:30:52 PM PDT 24 3483349652 ps
T376 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.3468870475 Jul 29 07:31:45 PM PDT 24 Jul 29 07:32:38 PM PDT 24 78171551003 ps
T749 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1922515445 Jul 29 07:29:55 PM PDT 24 Jul 29 07:29:59 PM PDT 24 2697875195 ps
T750 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1934154151 Jul 29 07:30:49 PM PDT 24 Jul 29 07:30:51 PM PDT 24 3882340755 ps
T751 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3541187503 Jul 29 07:30:07 PM PDT 24 Jul 29 07:30:12 PM PDT 24 28828809494 ps
T752 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.55045608 Jul 29 07:31:04 PM PDT 24 Jul 29 07:35:16 PM PDT 24 104446540900 ps
T411 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2757854197 Jul 29 07:31:17 PM PDT 24 Jul 29 07:33:19 PM PDT 24 49925267466 ps
T333 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.418408573 Jul 29 07:29:56 PM PDT 24 Jul 29 07:31:27 PM PDT 24 36398664902 ps
T753 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.147933855 Jul 29 07:31:01 PM PDT 24 Jul 29 07:31:05 PM PDT 24 2121790117 ps
T754 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2665628645 Jul 29 07:29:44 PM PDT 24 Jul 29 07:29:46 PM PDT 24 2258809185 ps
T755 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.2405723589 Jul 29 07:31:07 PM PDT 24 Jul 29 07:31:16 PM PDT 24 3157571373 ps
T756 /workspace/coverage/default/5.sysrst_ctrl_stress_all.3622821080 Jul 29 07:30:26 PM PDT 24 Jul 29 07:36:54 PM PDT 24 157310387228 ps
T757 /workspace/coverage/default/26.sysrst_ctrl_alert_test.2835138003 Jul 29 07:31:24 PM PDT 24 Jul 29 07:31:26 PM PDT 24 2034320379 ps
T758 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.73594764 Jul 29 07:31:07 PM PDT 24 Jul 29 07:31:09 PM PDT 24 2535867807 ps
T759 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3797455508 Jul 29 07:32:17 PM PDT 24 Jul 29 07:32:36 PM PDT 24 135323081063 ps
T760 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.1260939393 Jul 29 07:31:23 PM PDT 24 Jul 29 07:44:06 PM PDT 24 322927195064 ps
T761 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.346877284 Jul 29 07:29:55 PM PDT 24 Jul 29 07:36:12 PM PDT 24 139043428374 ps
T762 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.3098597542 Jul 29 07:30:47 PM PDT 24 Jul 29 07:30:54 PM PDT 24 2474152690 ps
T763 /workspace/coverage/default/41.sysrst_ctrl_alert_test.3061130286 Jul 29 07:31:42 PM PDT 24 Jul 29 07:31:48 PM PDT 24 2010601892 ps
T764 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.2908718942 Jul 29 07:30:56 PM PDT 24 Jul 29 07:30:58 PM PDT 24 10412066293 ps
T765 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3199074913 Jul 29 07:31:58 PM PDT 24 Jul 29 07:32:05 PM PDT 24 2513899385 ps
T766 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3296219421 Jul 29 07:30:27 PM PDT 24 Jul 29 07:30:33 PM PDT 24 4101124784 ps
T767 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.1513682512 Jul 29 07:30:17 PM PDT 24 Jul 29 07:30:19 PM PDT 24 3634498696 ps
T768 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2689544611 Jul 29 07:31:03 PM PDT 24 Jul 29 07:31:10 PM PDT 24 2613164731 ps
T390 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3580930906 Jul 29 07:30:08 PM PDT 24 Jul 29 07:35:44 PM PDT 24 163079183384 ps
T769 /workspace/coverage/default/11.sysrst_ctrl_pin_access_test.977007024 Jul 29 07:30:26 PM PDT 24 Jul 29 07:30:28 PM PDT 24 2209642378 ps
T770 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.4116679265 Jul 29 07:32:18 PM PDT 24 Jul 29 07:33:32 PM PDT 24 115448460625 ps
T771 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3449607018 Jul 29 07:31:23 PM PDT 24 Jul 29 07:31:25 PM PDT 24 2520868388 ps
T772 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.246778297 Jul 29 07:31:18 PM PDT 24 Jul 29 07:31:21 PM PDT 24 4076238694 ps
T773 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1621478128 Jul 29 07:31:04 PM PDT 24 Jul 29 07:31:09 PM PDT 24 2155174714 ps
T150 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.558693647 Jul 29 07:31:30 PM PDT 24 Jul 29 07:33:45 PM PDT 24 62030708779 ps
T133 /workspace/coverage/default/49.sysrst_ctrl_stress_all.451161998 Jul 29 07:32:10 PM PDT 24 Jul 29 07:32:20 PM PDT 24 7532351867 ps
T774 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.286062297 Jul 29 07:31:18 PM PDT 24 Jul 29 07:32:01 PM PDT 24 68223929434 ps
T775 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1775633211 Jul 29 07:31:55 PM PDT 24 Jul 29 07:32:03 PM PDT 24 2612607018 ps
T776 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.967552032 Jul 29 07:30:37 PM PDT 24 Jul 29 07:30:45 PM PDT 24 3968252538 ps
T777 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2460964937 Jul 29 07:32:00 PM PDT 24 Jul 29 07:32:06 PM PDT 24 2184178165 ps
T778 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3402905843 Jul 29 07:32:11 PM PDT 24 Jul 29 07:32:13 PM PDT 24 2628945143 ps
T779 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.2459322924 Jul 29 07:31:33 PM PDT 24 Jul 29 07:31:34 PM PDT 24 2591049508 ps
T780 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3591999045 Jul 29 07:31:59 PM PDT 24 Jul 29 07:32:02 PM PDT 24 7366082164 ps
T781 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3953832366 Jul 29 07:31:55 PM PDT 24 Jul 29 07:31:58 PM PDT 24 3726258128 ps
T782 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.2267084081 Jul 29 07:31:40 PM PDT 24 Jul 29 07:32:10 PM PDT 24 1296189758892 ps
T783 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.634211998 Jul 29 07:31:50 PM PDT 24 Jul 29 07:32:00 PM PDT 24 14605679822 ps
T134 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1192666932 Jul 29 07:30:34 PM PDT 24 Jul 29 07:31:40 PM PDT 24 288394170035 ps
T784 /workspace/coverage/default/30.sysrst_ctrl_smoke.4289854304 Jul 29 07:31:14 PM PDT 24 Jul 29 07:31:21 PM PDT 24 2110122697 ps
T785 /workspace/coverage/default/24.sysrst_ctrl_smoke.3769209500 Jul 29 07:31:10 PM PDT 24 Jul 29 07:31:16 PM PDT 24 2108419932 ps
T786 /workspace/coverage/default/8.sysrst_ctrl_smoke.1622199084 Jul 29 07:30:27 PM PDT 24 Jul 29 07:30:33 PM PDT 24 2109525481 ps
T787 /workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.1483403920 Jul 29 07:10:49 PM PDT 24 Jul 29 07:10:50 PM PDT 24 2122566868 ps
T788 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1099395108 Jul 29 07:10:42 PM PDT 24 Jul 29 07:10:44 PM PDT 24 2042548826 ps
T789 /workspace/coverage/cover_reg_top/7.sysrst_ctrl_intr_test.3404011545 Jul 29 07:10:39 PM PDT 24 Jul 29 07:10:45 PM PDT 24 2009441589 ps
T790 /workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.3757101872 Jul 29 07:10:44 PM PDT 24 Jul 29 07:10:46 PM PDT 24 2044988664 ps
T19 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3813781888 Jul 29 07:10:27 PM PDT 24 Jul 29 07:10:44 PM PDT 24 5177279195 ps
T29 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.2108975256 Jul 29 07:10:43 PM PDT 24 Jul 29 07:12:35 PM PDT 24 42468946838 ps
T30 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_csr_mem_rw_with_rand_reset.2875738910 Jul 29 07:10:39 PM PDT 24 Jul 29 07:10:43 PM PDT 24 2071413711 ps
T791 /workspace/coverage/cover_reg_top/36.sysrst_ctrl_intr_test.1030431392 Jul 29 07:10:49 PM PDT 24 Jul 29 07:10:55 PM PDT 24 2010917794 ps
T22 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2516941472 Jul 29 07:10:39 PM PDT 24 Jul 29 07:10:56 PM PDT 24 5147397929 ps
T287 /workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.2468481355 Jul 29 07:10:37 PM PDT 24 Jul 29 07:10:43 PM PDT 24 2082709711 ps
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