Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.98 98.82 96.78 100.00 96.79 98.26 99.61 88.60


Total tests in report: 905
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
54.08 54.08 75.14 75.14 63.78 63.78 89.38 89.38 7.69 7.69 76.30 76.30 62.72 62.72 3.54 3.54 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1343332628
70.21 16.13 88.95 13.81 82.18 18.40 95.66 6.28 29.49 21.79 89.76 13.46 75.14 12.43 30.32 26.77 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3013429836
76.60 6.38 93.15 4.20 86.65 4.47 96.80 1.14 48.08 18.59 93.27 3.51 84.20 9.06 34.02 3.71 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.343066197
80.78 4.18 95.50 2.35 88.70 2.05 96.80 0.00 64.74 16.67 95.38 2.11 89.98 5.78 34.35 0.33 /workspace/coverage/default/33.sysrst_ctrl_stress_all.3974355221
83.61 2.83 96.36 0.86 89.94 1.24 96.80 0.00 69.87 5.13 95.86 0.48 93.83 3.85 42.58 8.23 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2336261517
85.40 1.79 96.47 0.11 90.02 0.08 96.80 0.00 71.79 1.92 95.97 0.11 94.12 0.29 52.62 10.03 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1649345812
87.15 1.75 97.22 0.75 92.11 2.10 96.80 0.00 80.13 8.33 96.82 0.85 94.32 0.19 52.62 0.00 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.1442636614
88.50 1.36 97.29 0.07 93.30 1.19 97.49 0.68 80.13 0.00 96.93 0.11 94.51 0.19 59.87 7.25 /workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.2108975256
89.73 1.23 97.70 0.41 93.76 0.46 97.95 0.46 82.69 2.56 97.30 0.37 97.21 2.70 61.50 1.64 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4150566167
90.72 0.99 97.87 0.17 94.01 0.25 98.17 0.23 83.33 0.64 97.34 0.04 97.30 0.10 67.01 5.51 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.593451208
91.38 0.66 97.91 0.04 94.06 0.05 98.17 0.00 84.62 1.28 97.41 0.07 97.40 0.10 70.07 3.05 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.4068725653
91.99 0.61 97.91 0.00 94.11 0.05 98.17 0.00 84.62 0.00 97.41 0.00 97.40 0.00 74.32 4.25 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1299566311
92.45 0.46 98.04 0.13 94.36 0.25 98.17 0.00 84.62 0.00 97.41 0.00 97.40 0.00 77.15 2.84 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2618298533
92.81 0.36 98.12 0.07 94.39 0.03 98.17 0.00 86.54 1.92 97.52 0.11 97.50 0.10 77.43 0.27 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3377623631
93.11 0.30 98.21 0.09 94.79 0.40 98.17 0.00 87.82 1.28 97.63 0.11 97.69 0.19 77.43 0.00 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3054640135
93.40 0.29 98.21 0.00 94.82 0.03 98.17 0.00 87.82 0.00 97.63 0.00 97.69 0.00 79.44 2.02 /workspace/coverage/default/15.sysrst_ctrl_stress_all.2845284609
93.68 0.28 98.21 0.00 94.84 0.03 99.77 1.60 87.82 0.00 97.63 0.00 97.78 0.10 79.72 0.27 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.1684130292
93.92 0.24 98.28 0.07 94.89 0.05 99.77 0.00 89.10 1.28 97.71 0.07 97.98 0.19 79.72 0.00 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1478741060
94.15 0.23 98.30 0.02 94.97 0.08 99.77 0.00 89.74 0.64 97.74 0.04 98.17 0.19 80.37 0.65 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1531366652
94.35 0.20 98.34 0.04 94.97 0.00 99.77 0.00 91.03 1.28 97.82 0.07 98.17 0.00 80.37 0.00 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.2617947039
94.55 0.20 98.38 0.04 94.99 0.03 99.77 0.00 91.67 0.64 97.86 0.04 98.27 0.10 80.92 0.55 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3424740097
94.74 0.19 98.38 0.00 94.99 0.00 99.77 0.00 92.95 1.28 97.86 0.00 98.27 0.00 80.97 0.05 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1158699023
94.93 0.19 98.43 0.06 95.02 0.03 99.77 0.00 92.95 0.00 97.86 0.00 98.27 0.00 82.22 1.25 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3538579127
95.09 0.16 98.43 0.00 95.98 0.96 99.77 0.00 92.95 0.00 97.86 0.00 98.27 0.00 82.39 0.16 /workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.2066795970
95.25 0.16 98.43 0.00 95.98 0.00 99.77 0.00 92.95 0.00 97.86 0.00 98.27 0.00 83.48 1.09 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.1924325118
95.40 0.15 98.47 0.04 96.18 0.20 99.77 0.00 92.95 0.00 97.93 0.07 99.04 0.77 83.48 0.00 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1927387611
95.53 0.13 98.51 0.04 96.21 0.03 99.77 0.00 93.59 0.64 97.97 0.04 99.13 0.10 83.53 0.05 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1748544464
95.65 0.12 98.53 0.02 96.26 0.05 99.77 0.00 94.23 0.64 98.04 0.07 99.13 0.00 83.59 0.05 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2817642030
95.77 0.12 98.56 0.04 96.28 0.03 99.77 0.00 94.87 0.64 98.08 0.04 99.23 0.10 83.59 0.00 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.1712776541
95.89 0.12 98.60 0.04 96.31 0.03 99.77 0.00 95.51 0.64 98.11 0.04 99.33 0.10 83.59 0.00 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.3380317218
96.01 0.12 98.64 0.04 96.33 0.03 99.77 0.00 96.15 0.64 98.15 0.04 99.42 0.10 83.59 0.00 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.1730887900
96.10 0.09 98.66 0.02 96.33 0.00 99.77 0.00 96.15 0.00 98.19 0.04 99.42 0.00 84.19 0.60 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1870942566
96.19 0.09 98.66 0.00 96.33 0.00 99.77 0.00 96.79 0.64 98.19 0.00 99.42 0.00 84.19 0.00 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.2755112977
96.28 0.09 98.68 0.02 96.33 0.00 99.77 0.00 96.79 0.00 98.19 0.00 99.42 0.00 84.79 0.60 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.305634754
96.36 0.07 98.69 0.02 96.36 0.03 99.77 0.00 96.79 0.00 98.19 0.00 99.52 0.10 85.17 0.38 /workspace/coverage/default/22.sysrst_ctrl_stress_all.1684437616
96.41 0.05 98.71 0.02 96.39 0.03 99.77 0.00 96.79 0.00 98.19 0.00 99.52 0.00 85.50 0.33 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1968811898
96.46 0.05 98.77 0.06 96.46 0.08 100.00 0.23 96.79 0.00 98.19 0.00 99.52 0.00 85.50 0.00 /workspace/coverage/default/1.sysrst_ctrl_alert_test.602949316
96.51 0.05 98.79 0.02 96.46 0.00 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 85.82 0.33 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4037036792
96.56 0.05 98.79 0.00 96.46 0.00 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 86.15 0.33 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1902985537
96.60 0.04 98.79 0.00 96.46 0.00 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 86.42 0.27 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.1068317176
96.63 0.03 98.79 0.00 96.46 0.00 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 86.64 0.22 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1546546424
96.65 0.03 98.79 0.00 96.49 0.03 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 86.80 0.16 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.309159532
96.68 0.02 98.79 0.00 96.49 0.00 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 86.97 0.16 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3194858963
96.70 0.02 98.79 0.00 96.49 0.00 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 87.13 0.16 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.1279722940
96.72 0.02 98.79 0.00 96.49 0.00 100.00 0.00 96.79 0.00 98.19 0.00 99.52 0.00 87.30 0.16 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.4083002586
96.75 0.02 98.81 0.02 96.49 0.00 100.00 0.00 96.79 0.00 98.23 0.04 99.61 0.10 87.30 0.00 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.4030347999
96.76 0.02 98.81 0.00 96.61 0.13 100.00 0.00 96.79 0.00 98.23 0.00 99.61 0.00 87.30 0.00 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.1416201101
96.78 0.02 98.81 0.00 96.61 0.00 100.00 0.00 96.79 0.00 98.23 0.00 99.61 0.00 87.40 0.11 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.2011335909
96.80 0.02 98.81 0.00 96.61 0.00 100.00 0.00 96.79 0.00 98.23 0.00 99.61 0.00 87.51 0.11 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1933519502
96.81 0.02 98.81 0.00 96.61 0.00 100.00 0.00 96.79 0.00 98.23 0.00 99.61 0.00 87.62 0.11 /workspace/coverage/default/40.sysrst_ctrl_stress_all.2821954643
96.83 0.02 98.81 0.00 96.61 0.00 100.00 0.00 96.79 0.00 98.23 0.00 99.61 0.00 87.73 0.11 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.991984841
96.84 0.01 98.81 0.00 96.69 0.08 100.00 0.00 96.79 0.00 98.23 0.00 99.61 0.00 87.73 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2616243712
96.85 0.01 98.82 0.02 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.04 99.61 0.00 87.73 0.00 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.558693647
96.85 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 87.79 0.05 /workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.885874151
96.86 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 87.84 0.05 /workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.3606448647
96.87 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 87.90 0.05 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.232833737
96.88 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 87.95 0.05 /workspace/coverage/default/13.sysrst_ctrl_stress_all.1365054470
96.88 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.00 0.05 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3434063775
96.89 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.06 0.05 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.2207125181
96.90 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.11 0.05 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.3451446336
96.91 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.17 0.05 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3284145868
96.92 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.22 0.05 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.327514405
96.92 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.28 0.05 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3580930906
96.93 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.33 0.05 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.390833999
96.94 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.39 0.05 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1936341703
96.95 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.44 0.05 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2381946271
96.95 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.50 0.05 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1219322750
96.96 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.55 0.05 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1376612929
96.97 0.01 98.82 0.00 96.69 0.00 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.60 0.05 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2709454824
96.98 0.01 98.82 0.00 96.74 0.05 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.60 0.00 /workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3813781888
96.98 0.01 98.82 0.00 96.76 0.03 100.00 0.00 96.79 0.00 98.26 0.00 99.61 0.00 88.60 0.00 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3900375915


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.4249722909
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3636698634
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1462859738
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.201635236
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.608049240
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3260657792
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1075778732
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1387574000
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.102362077
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2806082063
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1790096758
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.295145976
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.759781366
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2636908750
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2818288602
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.333027149
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.3229793477
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1036985900
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1561630435
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.3915497563
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2759265482
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3629624157
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3133090016
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.645389144
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.440953776
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.371229935
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.3162145050
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.2274483649
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2516941472
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2918340585
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2415586092
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.1947370133
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.2699435032
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2607597249
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.1621065461
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.2784438062
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3082798526
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.3602786286
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2893135340
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1099395108
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.582940416
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2866761380
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.2246504539
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.2389571797
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.1790818208
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.3954596979
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.4101416888
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1477373784
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2332407303
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1549460787
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.3095755045
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.2419666948
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.2501650671
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1118226887
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.3465528571
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.181505703
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.1529921019
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.2575638299
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.3456868663
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.589298773
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.249728276
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.3796173089
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.2473078746
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.4227337252
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.3734642836
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.223144576
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.3516667832
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.3781627900
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.2039945893
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.2452575024
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.332217418
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1570686065
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.847304103
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/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3280603634
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1692803927
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.835832053
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3943571689
/workspace/coverage/default/41.sysrst_ctrl_smoke.3869745200
/workspace/coverage/default/41.sysrst_ctrl_stress_all.1946446778
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1097298956
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.925206948
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1574940999
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3252456734
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2380913327
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.320472453
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1045311720
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2970616980
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.479979114
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.3124344403
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1694097883
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2582479869
/workspace/coverage/default/42.sysrst_ctrl_smoke.3499667406
/workspace/coverage/default/42.sysrst_ctrl_stress_all.1141972171
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2552765212
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2560319685
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3423106007
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3468870475
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.389404873
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.10363819
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.215927909
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3666804295
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1063868682
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.111561965
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.519353556
/workspace/coverage/default/43.sysrst_ctrl_smoke.2767934522
/workspace/coverage/default/43.sysrst_ctrl_stress_all.493799234
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.634211998
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2836857077
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.58618037
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.378533226
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.634489813
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.2480782514
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.1815736982
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1765191238
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.3742320865
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4140330330
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.906092549
/workspace/coverage/default/44.sysrst_ctrl_smoke.2693086
/workspace/coverage/default/44.sysrst_ctrl_stress_all.271331264
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.3534555425
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.926724230
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1446345676
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.1513535446
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.1733012268
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.673694071
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1403599514
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3491053897
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1775158167
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1064289080
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3841926983
/workspace/coverage/default/45.sysrst_ctrl_smoke.3042689056
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2930406662
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2082443173
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3591999045
/workspace/coverage/default/46.sysrst_ctrl_alert_test.3606950201
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1359259368
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1569036306
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4202430993
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1928209571
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.825731856
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.4257155043
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1030272820
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.67343654
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.1158673010
/workspace/coverage/default/46.sysrst_ctrl_smoke.509671347
/workspace/coverage/default/46.sysrst_ctrl_stress_all.2241106084
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1348203834
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1254435704
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3953832366
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3178946358
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.231901329
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3715832615
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2460964937
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.658873618
/workspace/coverage/default/47.sysrst_ctrl_smoke.682186462
/workspace/coverage/default/47.sysrst_ctrl_stress_all.4287467242
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1601192700
/workspace/coverage/default/48.sysrst_ctrl_alert_test.3659724881
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.755241476
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.2999542893
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4163412871
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3054740623
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.4079173281
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1775633211
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.3521336054
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1522078057
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3199074913
/workspace/coverage/default/48.sysrst_ctrl_smoke.4254491218
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2387768612
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.3816157320
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2919187143
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2279687681
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3473154043
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1517943502
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1852251951
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3402905843
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.375759797
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.482071964
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3387389196
/workspace/coverage/default/49.sysrst_ctrl_smoke.1147060632
/workspace/coverage/default/49.sysrst_ctrl_stress_all.451161998
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1538099993
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4138426270
/workspace/coverage/default/5.sysrst_ctrl_alert_test.2195727384
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.2181320186
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2483438478
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.4120201248
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.251365854
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1434502056
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1690568352
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3406348391
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1403940567
/workspace/coverage/default/5.sysrst_ctrl_smoke.1019428609
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3622821080
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.699149969
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.4247051196
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2278422811
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.376131461
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2817228735
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2540380317
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1580082550
/workspace/coverage/default/6.sysrst_ctrl_alert_test.2494244310
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2326684851
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.3134953780
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3023909013
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2833651819
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.1513682512
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3801895433
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.3242393827
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1522681423
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.2223533790
/workspace/coverage/default/6.sysrst_ctrl_smoke.526043110
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1703970505
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.1179037511
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.871401270
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.2037297411
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2992165547
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.888358086
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.3719828602
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1177544380
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1466523913
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1384860477
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.988166253
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2424821152
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1906606773
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1999637309
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2243577245
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.2054022828
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.350155838
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.3595620598
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1217314995
/workspace/coverage/default/7.sysrst_ctrl_smoke.2983419084
/workspace/coverage/default/7.sysrst_ctrl_stress_all.4114982555
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3740339670
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.859177149
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.931551452
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1305889641
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.2894305512
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3797455508
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1404461038
/workspace/coverage/default/8.sysrst_ctrl_alert_test.643294418
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2424581328
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3296219421
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2449628823
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.849900765
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4020756414
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.890380060
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2250804686
/workspace/coverage/default/8.sysrst_ctrl_smoke.1622199084
/workspace/coverage/default/8.sysrst_ctrl_stress_all.754278017
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.417381350
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.4016299464
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.224593878
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1619148466
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2065917537
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.4116679265
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.3851034293
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.559559032
/workspace/coverage/default/9.sysrst_ctrl_alert_test.965986718
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2349825302
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3116946987
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1288866955
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.4079776890
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2509917819
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2994851733
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.3759222099
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.585024954
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.205348674
/workspace/coverage/default/9.sysrst_ctrl_smoke.374862369
/workspace/coverage/default/9.sysrst_ctrl_stress_all.1536106931
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4207968552
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2409649397
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.282308261
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.205672872
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2363349163
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.319470739
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.3026955440
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.267280375
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.104593642




Total test records in report: 905
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T4 /workspace/coverage/default/8.sysrst_ctrl_alert_test.643294418 Jul 29 07:30:27 PM PDT 24 Jul 29 07:30:28 PM PDT 24 2136078430 ps
T1 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.1569445520 Jul 29 07:31:08 PM PDT 24 Jul 29 07:31:10 PM PDT 24 4949122083 ps
T5 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.2741425330 Jul 29 07:31:17 PM PDT 24 Jul 29 07:33:17 PM PDT 24 184483939126 ps
T2 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.215927909 Jul 29 07:31:49 PM PDT 24 Jul 29 07:31:59 PM PDT 24 3346611288 ps
T13 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.4079776890 Jul 29 07:30:27 PM PDT 24 Jul 29 07:30:40 PM PDT 24 4704983084 ps
T3 /workspace/coverage/default/21.sysrst_ctrl_stress_all.2554457167 Jul 29 07:30:57 PM PDT 24 Jul 29 07:31:04 PM PDT 24 11968588448 ps
T14 /workspace/coverage/default/35.sysrst_ctrl_alert_test.2586348081 Jul 29 07:31:45 PM PDT 24 Jul 29 07:31:47 PM PDT 24 2040167353 ps
T15 /workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1434502056 Jul 29 07:30:06 PM PDT 24 Jul 29 07:30:09 PM PDT 24 2629107200 ps
T16 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3741180867 Jul 29 07:31:08 PM PDT 24 Jul 29 07:31:17 PM PDT 24 3125536295 ps
T17 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1343332628 Jul 29 07:32:14 PM PDT 24 Jul 29 07:33:11 PM PDT 24 23833383963 ps
T18 /workspace/coverage/default/7.sysrst_ctrl_smoke.2983419084 Jul 29 07:30:28 PM PDT 24 Jul 29 07:30:35 PM PDT 24 2110701008 ps
T6 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.3900375915 Jul 29 07:30:48 PM PDT 24 Jul 29 07:30:52 PM PDT 24 6536032371 ps
T52 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3283335928 Jul 29 07:30:53 PM PDT 24 Jul 29 07:30:59 PM PDT 24 2211789743 ps
T7 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.593451208 Jul 29 07:31:54 PM PDT 24 Jul 29 07:35:30 PM PDT 24 100555894083 ps
T53 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.585024954 Jul 29 07:30:26 PM PDT 24 Jul 29 07:30:28 PM PDT 24 2074070574 ps
T26 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.988551812 Jul 29 07:31:21 PM PDT 24 Jul 29 07:32:28 PM PDT 24 25832218713 ps
T8 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3013429836 Jul 29 07:30:44 PM PDT 24 Jul 29 07:31:28 PM PDT 24 76501510406 ps
T54 /workspace/coverage/default/1.sysrst_ctrl_alert_test.602949316 Jul 29 07:29:55 PM PDT 24 Jul 29 07:29:59 PM PDT 24 2013686240 ps
T24 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.1816374250 Jul 29 07:31:20 PM PDT 24 Jul 29 07:31:28 PM PDT 24 2444890848 ps
T25 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2170081163 Jul 29 07:30:28 PM PDT 24 Jul 29 07:30:30 PM PDT 24 2517048805 ps
T55 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1267766190 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:30 PM PDT 24 3878809806 ps
T56 /workspace/coverage/default/47.sysrst_ctrl_smoke.682186462 Jul 29 07:31:54 PM PDT 24 Jul 29 07:31:56 PM PDT 24 2129561995 ps
T70 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1358725522 Jul 29 07:31:34 PM PDT 24 Jul 29 07:31:42 PM PDT 24 2514169477 ps
T71 /workspace/coverage/default/43.sysrst_ctrl_smoke.2767934522 Jul 29 07:31:51 PM PDT 24 Jul 29 07:31:57 PM PDT 24 2112694320 ps
T31 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3245830050 Jul 29 07:30:05 PM PDT 24 Jul 29 07:30:10 PM PDT 24 7510456332 ps
T9 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.151420778 Jul 29 07:30:48 PM PDT 24 Jul 29 07:30:51 PM PDT 24 4425717326 ps
T59 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.3054740623 Jul 29 07:32:00 PM PDT 24 Jul 29 07:32:03 PM PDT 24 3411684271 ps
T10 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3053617603 Jul 29 07:29:55 PM PDT 24 Jul 29 07:29:57 PM PDT 24 2416422809 ps
T60 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3808928490 Jul 29 07:31:41 PM PDT 24 Jul 29 07:31:44 PM PDT 24 3190442348 ps
T65 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.3395639847 Jul 29 07:31:07 PM PDT 24 Jul 29 07:31:09 PM PDT 24 2464691307 ps
T341 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.4096095638 Jul 29 07:30:06 PM PDT 24 Jul 29 07:30:14 PM PDT 24 2919473642 ps
T61 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.230198178 Jul 29 07:30:38 PM PDT 24 Jul 29 07:30:45 PM PDT 24 4369967688 ps
T11 /workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3054640135 Jul 29 07:29:50 PM PDT 24 Jul 29 07:29:55 PM PDT 24 7189474589 ps
T66 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.296017331 Jul 29 07:30:34 PM PDT 24 Jul 29 07:30:36 PM PDT 24 2476249318 ps
T135 /workspace/coverage/default/40.sysrst_ctrl_smoke.646325111 Jul 29 07:31:43 PM PDT 24 Jul 29 07:31:45 PM PDT 24 2126493101 ps
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T28 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.320472453 Jul 29 07:31:43 PM PDT 24 Jul 29 07:32:46 PM PDT 24 25578880517 ps
T46 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.4030347999 Jul 29 07:31:09 PM PDT 24 Jul 29 07:31:18 PM PDT 24 3185275306 ps
T47 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.3835947996 Jul 29 07:31:28 PM PDT 24 Jul 29 07:31:30 PM PDT 24 3008742532 ps
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T72 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3462362328 Jul 29 07:31:22 PM PDT 24 Jul 29 07:31:30 PM PDT 24 2610385149 ps
T73 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.3651312625 Jul 29 07:30:07 PM PDT 24 Jul 29 07:30:14 PM PDT 24 2512178889 ps
T177 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4140330330 Jul 29 07:31:42 PM PDT 24 Jul 29 07:31:48 PM PDT 24 2140710972 ps
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T37 /workspace/coverage/default/31.sysrst_ctrl_stress_all.685956884 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:56 PM PDT 24 12267514627 ps
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T67 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1523568165 Jul 29 07:30:59 PM PDT 24 Jul 29 07:31:03 PM PDT 24 2461629172 ps
T45 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1546546424 Jul 29 07:31:46 PM PDT 24 Jul 29 07:37:45 PM PDT 24 144921501518 ps
T79 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.2466653905 Jul 29 07:30:43 PM PDT 24 Jul 29 07:30:53 PM PDT 24 23372048290 ps
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T48 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2326684851 Jul 29 07:30:28 PM PDT 24 Jul 29 07:30:31 PM PDT 24 3204128306 ps
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T36 /workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2540380317 Jul 29 07:32:09 PM PDT 24 Jul 29 07:35:14 PM PDT 24 69113521141 ps
T49 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3590719072 Jul 29 07:31:42 PM PDT 24 Jul 29 07:32:45 PM PDT 24 22839393606 ps
T300 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.1811142335 Jul 29 07:31:34 PM PDT 24 Jul 29 07:31:36 PM PDT 24 2140192420 ps
T301 /workspace/coverage/default/48.sysrst_ctrl_alert_test.3659724881 Jul 29 07:32:20 PM PDT 24 Jul 29 07:32:26 PM PDT 24 2014045007 ps
T413 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.2328345886 Jul 29 07:31:07 PM PDT 24 Jul 29 07:31:09 PM PDT 24 2522410234 ps
T50 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.4087610572 Jul 29 07:30:46 PM PDT 24 Jul 29 07:30:56 PM PDT 24 3443402864 ps
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T33 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2336261517 Jul 29 07:32:12 PM PDT 24 Jul 29 07:33:53 PM PDT 24 147388160424 ps
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T63 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4207968552 Jul 29 07:30:33 PM PDT 24 Jul 29 07:30:35 PM PDT 24 6254686154 ps
T311 /workspace/coverage/default/18.sysrst_ctrl_stress_all.1213495422 Jul 29 07:31:00 PM PDT 24 Jul 29 07:31:17 PM PDT 24 6724496299 ps
T260 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.1959800087 Jul 29 07:31:26 PM PDT 24 Jul 29 07:37:44 PM PDT 24 162597397478 ps
T275 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2013094379 Jul 29 07:30:58 PM PDT 24 Jul 29 07:31:06 PM PDT 24 3081651131 ps
T276 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2994851733 Jul 29 07:30:27 PM PDT 24 Jul 29 07:30:29 PM PDT 24 2671963083 ps
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T97 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.1400006989 Jul 29 07:30:37 PM PDT 24 Jul 29 07:30:45 PM PDT 24 39446197561 ps
T278 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.232833737 Jul 29 07:30:34 PM PDT 24 Jul 29 07:30:41 PM PDT 24 2512288754 ps
T261 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2430298251 Jul 29 07:30:10 PM PDT 24 Jul 29 07:37:28 PM PDT 24 164036908118 ps
T125 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.305634754 Jul 29 07:30:47 PM PDT 24 Jul 29 07:34:32 PM PDT 24 87863644557 ps
T51 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2979766521 Jul 29 07:31:05 PM PDT 24 Jul 29 07:31:08 PM PDT 24 3779497184 ps
T38 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.343066197 Jul 29 07:31:18 PM PDT 24 Jul 29 07:31:48 PM PDT 24 54236837558 ps
T415 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3363788472 Jul 29 07:30:37 PM PDT 24 Jul 29 07:30:43 PM PDT 24 2061267916 ps
T253 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.327514405 Jul 29 07:32:09 PM PDT 24 Jul 29 07:32:30 PM PDT 24 39660161681 ps
T64 /workspace/coverage/default/22.sysrst_ctrl_stress_all.1684437616 Jul 29 07:31:03 PM PDT 24 Jul 29 07:35:54 PM PDT 24 118233022962 ps
T98 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.4083002586 Jul 29 07:30:29 PM PDT 24 Jul 29 07:30:45 PM PDT 24 109692989927 ps
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T417 /workspace/coverage/default/46.sysrst_ctrl_smoke.509671347 Jul 29 07:32:02 PM PDT 24 Jul 29 07:32:04 PM PDT 24 2133648091 ps
T254 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1902985537 Jul 29 07:32:10 PM PDT 24 Jul 29 07:32:33 PM PDT 24 98596675759 ps
T418 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1573902773 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:29 PM PDT 24 2189982795 ps
T419 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.231901329 Jul 29 07:31:54 PM PDT 24 Jul 29 07:32:01 PM PDT 24 2614870823 ps
T420 /workspace/coverage/default/46.sysrst_ctrl_alert_test.3606950201 Jul 29 07:31:55 PM PDT 24 Jul 29 07:32:01 PM PDT 24 2008991164 ps
T421 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2167837048 Jul 29 07:31:30 PM PDT 24 Jul 29 07:31:36 PM PDT 24 2014490957 ps
T266 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.625956160 Jul 29 07:31:40 PM PDT 24 Jul 29 07:31:59 PM PDT 24 34694203833 ps
T422 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.3812749151 Jul 29 07:30:38 PM PDT 24 Jul 29 07:30:41 PM PDT 24 7246317171 ps
T255 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.228998574 Jul 29 07:31:45 PM PDT 24 Jul 29 07:32:43 PM PDT 24 86215926991 ps
T423 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.3445170615 Jul 29 07:30:47 PM PDT 24 Jul 29 07:30:51 PM PDT 24 5017827170 ps
T96 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.2421779419 Jul 29 07:31:40 PM PDT 24 Jul 29 07:31:43 PM PDT 24 3018889293 ps
T80 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1968811898 Jul 29 07:30:07 PM PDT 24 Jul 29 07:31:14 PM PDT 24 28420370317 ps
T99 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.4232047706 Jul 29 07:31:25 PM PDT 24 Jul 29 07:37:04 PM PDT 24 131103191815 ps
T81 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.1299566311 Jul 29 07:30:17 PM PDT 24 Jul 29 07:30:56 PM PDT 24 577584014756 ps
T424 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.1872831111 Jul 29 07:30:27 PM PDT 24 Jul 29 07:30:30 PM PDT 24 3258177344 ps
T39 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2243577245 Jul 29 07:30:27 PM PDT 24 Jul 29 07:50:51 PM PDT 24 981562372682 ps
T425 /workspace/coverage/default/44.sysrst_ctrl_smoke.2693086 Jul 29 07:31:48 PM PDT 24 Jul 29 07:31:54 PM PDT 24 2115002161 ps
T82 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1248198300 Jul 29 07:31:46 PM PDT 24 Jul 29 07:31:55 PM PDT 24 7711778244 ps
T267 /workspace/coverage/default/47.sysrst_ctrl_stress_all.4287467242 Jul 29 07:32:00 PM PDT 24 Jul 29 07:33:58 PM PDT 24 86587999634 ps
T426 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1608682238 Jul 29 07:31:40 PM PDT 24 Jul 29 07:31:42 PM PDT 24 2085488770 ps
T427 /workspace/coverage/default/2.sysrst_ctrl_alert_test.4019646595 Jul 29 07:30:06 PM PDT 24 Jul 29 07:30:10 PM PDT 24 2021050590 ps
T395 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.3810665978 Jul 29 07:29:58 PM PDT 24 Jul 29 07:30:34 PM PDT 24 94925358653 ps
T364 /workspace/coverage/default/15.sysrst_ctrl_stress_all.2845284609 Jul 29 07:30:42 PM PDT 24 Jul 29 07:31:35 PM PDT 24 87572958659 ps
T83 /workspace/coverage/default/19.sysrst_ctrl_ultra_low_pwr.752327205 Jul 29 07:30:53 PM PDT 24 Jul 29 07:30:56 PM PDT 24 4951559568 ps
T100 /workspace/coverage/default/37.sysrst_ctrl_stress_all.170293382 Jul 29 07:31:34 PM PDT 24 Jul 29 08:11:20 PM PDT 24 2018360162598 ps
T428 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1692803927 Jul 29 07:31:50 PM PDT 24 Jul 29 07:31:54 PM PDT 24 2448818818 ps
T40 /workspace/coverage/default/14.sysrst_ctrl_stress_all.3315050412 Jul 29 07:30:44 PM PDT 24 Jul 29 07:31:18 PM PDT 24 12895630739 ps
T429 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1686104368 Jul 29 07:31:28 PM PDT 24 Jul 29 07:31:34 PM PDT 24 2514457147 ps
T322 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.3901305882 Jul 29 07:31:19 PM PDT 24 Jul 29 07:31:23 PM PDT 24 2520810517 ps
T77 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.2449628823 Jul 29 07:30:29 PM PDT 24 Jul 29 07:30:32 PM PDT 24 2697522152 ps
T430 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.1864872601 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:33 PM PDT 24 2610978319 ps
T431 /workspace/coverage/default/4.sysrst_ctrl_alert_test.1894181201 Jul 29 07:30:10 PM PDT 24 Jul 29 07:30:16 PM PDT 24 2015883555 ps
T432 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3949381479 Jul 29 07:31:26 PM PDT 24 Jul 29 07:31:28 PM PDT 24 2479056881 ps
T259 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.1804661392 Jul 29 07:30:50 PM PDT 24 Jul 29 07:31:50 PM PDT 24 93479193255 ps
T262 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.3529859926 Jul 29 07:31:51 PM PDT 24 Jul 29 07:33:44 PM PDT 24 82428949090 ps
T101 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.3538579127 Jul 29 07:31:41 PM PDT 24 Jul 29 07:34:57 PM PDT 24 73554827140 ps
T433 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1063868682 Jul 29 07:31:53 PM PDT 24 Jul 29 07:31:55 PM PDT 24 2474300298 ps
T92 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.2852657259 Jul 29 07:31:41 PM PDT 24 Jul 29 07:31:49 PM PDT 24 7783085867 ps
T303 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1771379903 Jul 29 07:31:33 PM PDT 24 Jul 29 07:31:42 PM PDT 24 3344321478 ps
T434 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.2936373859 Jul 29 07:31:17 PM PDT 24 Jul 29 07:31:20 PM PDT 24 2191208341 ps
T323 /workspace/coverage/default/38.sysrst_ctrl_stress_all.3161495081 Jul 29 07:31:33 PM PDT 24 Jul 29 07:31:39 PM PDT 24 7186302216 ps
T78 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.4150566167 Jul 29 07:31:52 PM PDT 24 Jul 29 07:33:56 PM PDT 24 52989512164 ps
T102 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.1511016721 Jul 29 07:30:56 PM PDT 24 Jul 29 07:32:05 PM PDT 24 27126382345 ps
T162 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.1236159419 Jul 29 07:31:41 PM PDT 24 Jul 29 07:31:43 PM PDT 24 5039970867 ps
T178 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.890380060 Jul 29 07:30:26 PM PDT 24 Jul 29 07:30:32 PM PDT 24 2147238021 ps
T179 /workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2065917537 Jul 29 07:32:13 PM PDT 24 Jul 29 07:33:24 PM PDT 24 102208438277 ps
T180 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.67343654 Jul 29 07:31:54 PM PDT 24 Jul 29 07:31:56 PM PDT 24 2200768322 ps
T181 /workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3943571689 Jul 29 07:31:40 PM PDT 24 Jul 29 07:31:48 PM PDT 24 2512767085 ps
T182 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.3114361080 Jul 29 07:30:53 PM PDT 24 Jul 29 07:30:56 PM PDT 24 2032070090 ps
T151 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.2425612064 Jul 29 07:30:51 PM PDT 24 Jul 29 07:30:54 PM PDT 24 2989689090 ps
T183 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.4280921699 Jul 29 07:31:13 PM PDT 24 Jul 29 07:31:15 PM PDT 24 2632619617 ps
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T152 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.825731856 Jul 29 07:32:00 PM PDT 24 Jul 29 07:32:10 PM PDT 24 4734034738 ps
T435 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.482071964 Jul 29 07:32:12 PM PDT 24 Jul 29 07:32:18 PM PDT 24 2065748343 ps
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T154 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.4187613934 Jul 29 07:31:21 PM PDT 24 Jul 29 07:31:23 PM PDT 24 4525529101 ps
T436 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.807930673 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:29 PM PDT 24 2530553469 ps
T268 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.1219973962 Jul 29 07:31:09 PM PDT 24 Jul 29 07:32:05 PM PDT 24 86011318423 ps
T302 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.1217232598 Jul 29 07:31:45 PM PDT 24 Jul 29 07:32:40 PM PDT 24 21310508908 ps
T283 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.1195875732 Jul 29 07:29:58 PM PDT 24 Jul 29 07:30:18 PM PDT 24 42372759086 ps
T127 /workspace/coverage/default/34.sysrst_ctrl_stress_all.3019617243 Jul 29 07:31:28 PM PDT 24 Jul 29 07:33:45 PM PDT 24 102106665154 ps
T437 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.2327545654 Jul 29 07:30:42 PM PDT 24 Jul 29 07:30:46 PM PDT 24 2516710309 ps
T408 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.111484595 Jul 29 07:31:40 PM PDT 24 Jul 29 07:38:57 PM PDT 24 350779023753 ps
T438 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.629574812 Jul 29 07:31:20 PM PDT 24 Jul 29 07:31:24 PM PDT 24 4537507258 ps
T257 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.267280375 Jul 29 07:32:19 PM PDT 24 Jul 29 07:34:10 PM PDT 24 89564523383 ps
T439 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.4291786196 Jul 29 07:31:27 PM PDT 24 Jul 29 07:31:30 PM PDT 24 2079763916 ps
T399 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.2380913327 Jul 29 07:31:40 PM PDT 24 Jul 29 07:33:17 PM PDT 24 160507031009 ps
T440 /workspace/coverage/default/7.sysrst_ctrl_alert_test.1384860477 Jul 29 07:30:28 PM PDT 24 Jul 29 07:30:30 PM PDT 24 2055062488 ps
T87 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1538099993 Jul 29 07:32:11 PM PDT 24 Jul 29 07:33:46 PM PDT 24 57715744427 ps
T141 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1044812534 Jul 29 07:29:57 PM PDT 24 Jul 29 07:36:40 PM PDT 24 312608494447 ps
T142 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1379765957 Jul 29 07:31:21 PM PDT 24 Jul 29 07:31:23 PM PDT 24 4519675152 ps
T143 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3900257171 Jul 29 07:31:11 PM PDT 24 Jul 29 07:31:16 PM PDT 24 4306544159 ps
T144 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.460727904 Jul 29 07:31:16 PM PDT 24 Jul 29 07:31:17 PM PDT 24 2189259149 ps
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T146 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.4201661830 Jul 29 07:29:55 PM PDT 24 Jul 29 07:29:56 PM PDT 24 2517939143 ps
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T441 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2493898296 Jul 29 07:31:38 PM PDT 24 Jul 29 07:31:45 PM PDT 24 2609282972 ps
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T475 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1412498490 Jul 29 07:31:15 PM PDT 24 Jul 29 07:31:19 PM PDT 24 2618551067 ps
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T270 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.1977335916 Jul 29 07:30:51 PM PDT 24 Jul 29 07:32:00 PM PDT 24 24583935272 ps
T477 /workspace/coverage/default/40.sysrst_ctrl_alert_test.1224199485 Jul 29 07:31:43 PM PDT 24 Jul 29 07:31:46 PM PDT 24 2035678118 ps
T383 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.634489813 Jul 29 07:31:57 PM PDT 24 Jul 29 07:32:17 PM PDT 24 85314253820 ps
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T271 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.4163412871 Jul 29 07:32:10 PM PDT 24 Jul 29 07:32:44 PM PDT 24 79845118065 ps
T377 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.1580082550 Jul 29 07:32:10 PM PDT 24 Jul 29 07:32:44 PM PDT 24 91306452102 ps
T479 /workspace/coverage/default/35.sysrst_ctrl_smoke.3313856854 Jul 29 07:31:35 PM PDT 24 Jul 29 07:31:37 PM PDT 24 2129344947 ps
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