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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.25 99.33 96.41 100.00 96.79 98.78 99.52 89.93


Total test records in report: 916
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T433 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3961059783 Jul 30 06:20:52 PM PDT 24 Jul 30 06:20:59 PM PDT 24 2610133433 ps
T434 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3918277936 Jul 30 06:20:11 PM PDT 24 Jul 30 06:20:18 PM PDT 24 2442117175 ps
T435 /workspace/coverage/default/6.sysrst_ctrl_alert_test.3442635185 Jul 30 06:20:04 PM PDT 24 Jul 30 06:20:06 PM PDT 24 2025731401 ps
T436 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.3872939093 Jul 30 06:21:10 PM PDT 24 Jul 30 06:21:11 PM PDT 24 2117127347 ps
T437 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1632048889 Jul 30 06:21:26 PM PDT 24 Jul 30 06:21:27 PM PDT 24 3428873001 ps
T438 /workspace/coverage/default/7.sysrst_ctrl_smoke.3225613247 Jul 30 06:20:05 PM PDT 24 Jul 30 06:20:08 PM PDT 24 2116211719 ps
T312 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.3142283335 Jul 30 06:20:40 PM PDT 24 Jul 30 06:26:16 PM PDT 24 138264623408 ps
T285 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.886220658 Jul 30 06:20:13 PM PDT 24 Jul 30 06:20:15 PM PDT 24 8324250505 ps
T439 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3658191984 Jul 30 06:21:27 PM PDT 24 Jul 30 06:21:34 PM PDT 24 2460803086 ps
T440 /workspace/coverage/default/35.sysrst_ctrl_alert_test.279496584 Jul 30 06:21:31 PM PDT 24 Jul 30 06:21:32 PM PDT 24 2101199843 ps
T202 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.2502172993 Jul 30 06:19:51 PM PDT 24 Jul 30 06:20:10 PM PDT 24 24844276596 ps
T81 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.572618194 Jul 30 06:19:51 PM PDT 24 Jul 30 06:20:38 PM PDT 24 32303606844 ps
T441 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1918656581 Jul 30 06:19:52 PM PDT 24 Jul 30 06:20:21 PM PDT 24 11432963299 ps
T442 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.4241579337 Jul 30 06:19:55 PM PDT 24 Jul 30 06:19:59 PM PDT 24 2613681087 ps
T443 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.220030170 Jul 30 06:21:22 PM PDT 24 Jul 30 06:21:28 PM PDT 24 2027020207 ps
T444 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.1925812825 Jul 30 06:20:52 PM PDT 24 Jul 30 06:20:56 PM PDT 24 2522014209 ps
T445 /workspace/coverage/default/31.sysrst_ctrl_smoke.1785271421 Jul 30 06:21:21 PM PDT 24 Jul 30 06:21:24 PM PDT 24 2121781299 ps
T446 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.94350833 Jul 30 06:19:54 PM PDT 24 Jul 30 06:19:58 PM PDT 24 2534796538 ps
T242 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.409016699 Jul 30 06:19:53 PM PDT 24 Jul 30 06:21:39 PM PDT 24 42011527760 ps
T167 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.4199327102 Jul 30 06:21:54 PM PDT 24 Jul 30 06:22:03 PM PDT 24 3281977489 ps
T447 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.411908626 Jul 30 06:20:38 PM PDT 24 Jul 30 06:20:40 PM PDT 24 2665303860 ps
T95 /workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.1792857414 Jul 30 06:19:43 PM PDT 24 Jul 30 06:20:31 PM PDT 24 77933063009 ps
T448 /workspace/coverage/default/4.sysrst_ctrl_smoke.4222559309 Jul 30 06:19:55 PM PDT 24 Jul 30 06:20:02 PM PDT 24 2114419799 ps
T206 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.599167793 Jul 30 06:22:16 PM PDT 24 Jul 30 06:23:28 PM PDT 24 26583369825 ps
T210 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.2416324641 Jul 30 06:22:06 PM PDT 24 Jul 30 06:28:27 PM PDT 24 147002398962 ps
T205 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1162575564 Jul 30 06:19:56 PM PDT 24 Jul 30 06:20:55 PM PDT 24 46972599785 ps
T449 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.1460478814 Jul 30 06:20:44 PM PDT 24 Jul 30 06:20:51 PM PDT 24 2461630857 ps
T207 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3476422979 Jul 30 06:21:27 PM PDT 24 Jul 30 06:22:37 PM PDT 24 27835088635 ps
T330 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1910978932 Jul 30 06:20:15 PM PDT 24 Jul 30 06:24:31 PM PDT 24 129926094014 ps
T450 /workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2437752544 Jul 30 06:21:04 PM PDT 24 Jul 30 06:21:16 PM PDT 24 4154030828 ps
T451 /workspace/coverage/default/0.sysrst_ctrl_alert_test.2764889112 Jul 30 06:19:46 PM PDT 24 Jul 30 06:19:52 PM PDT 24 2009507076 ps
T452 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3472438322 Jul 30 06:21:29 PM PDT 24 Jul 30 06:21:31 PM PDT 24 2520898454 ps
T453 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1614769302 Jul 30 06:22:07 PM PDT 24 Jul 30 06:22:15 PM PDT 24 2464755504 ps
T454 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.1744903975 Jul 30 06:21:35 PM PDT 24 Jul 30 06:21:42 PM PDT 24 2608948684 ps
T455 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.419946282 Jul 30 06:20:54 PM PDT 24 Jul 30 06:20:57 PM PDT 24 2479804452 ps
T456 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3330719388 Jul 30 06:21:02 PM PDT 24 Jul 30 06:21:05 PM PDT 24 3863966008 ps
T457 /workspace/coverage/default/45.sysrst_ctrl_alert_test.38733401 Jul 30 06:22:02 PM PDT 24 Jul 30 06:22:04 PM PDT 24 2044613895 ps
T458 /workspace/coverage/default/3.sysrst_ctrl_smoke.2787270975 Jul 30 06:19:53 PM PDT 24 Jul 30 06:19:55 PM PDT 24 2121121376 ps
T282 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.3836537673 Jul 30 06:20:16 PM PDT 24 Jul 30 06:20:18 PM PDT 24 2692800519 ps
T96 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.3409499161 Jul 30 06:20:42 PM PDT 24 Jul 30 06:23:06 PM PDT 24 60751238593 ps
T459 /workspace/coverage/default/6.sysrst_ctrl_smoke.2882033629 Jul 30 06:19:59 PM PDT 24 Jul 30 06:20:03 PM PDT 24 2115813225 ps
T168 /workspace/coverage/default/20.sysrst_ctrl_stress_all.2034918416 Jul 30 06:20:45 PM PDT 24 Jul 30 06:21:04 PM PDT 24 7931987525 ps
T460 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2719086860 Jul 30 06:22:28 PM PDT 24 Jul 30 06:23:04 PM PDT 24 25592014213 ps
T313 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.873310731 Jul 30 06:21:35 PM PDT 24 Jul 30 06:25:56 PM PDT 24 106545908521 ps
T461 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3867546843 Jul 30 06:21:28 PM PDT 24 Jul 30 06:21:35 PM PDT 24 2608945205 ps
T462 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.2054224106 Jul 30 06:21:32 PM PDT 24 Jul 30 06:21:33 PM PDT 24 2535945395 ps
T97 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.3894706694 Jul 30 06:22:09 PM PDT 24 Jul 30 06:24:58 PM PDT 24 63661640339 ps
T463 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2205465790 Jul 30 06:20:10 PM PDT 24 Jul 30 06:20:13 PM PDT 24 2623427036 ps
T464 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.2852211489 Jul 30 06:21:36 PM PDT 24 Jul 30 06:22:26 PM PDT 24 28833701813 ps
T465 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.3259901447 Jul 30 06:21:04 PM PDT 24 Jul 30 06:21:07 PM PDT 24 9034402097 ps
T283 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.184605365 Jul 30 06:21:48 PM PDT 24 Jul 30 06:21:49 PM PDT 24 2540667037 ps
T466 /workspace/coverage/default/9.sysrst_ctrl_alert_test.3423311638 Jul 30 06:20:14 PM PDT 24 Jul 30 06:20:19 PM PDT 24 2012140916 ps
T198 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.2777289887 Jul 30 06:22:12 PM PDT 24 Jul 30 06:22:16 PM PDT 24 2610346527 ps
T243 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.162208280 Jul 30 06:19:46 PM PDT 24 Jul 30 06:20:00 PM PDT 24 42244122542 ps
T467 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3075202249 Jul 30 06:20:46 PM PDT 24 Jul 30 06:20:48 PM PDT 24 3695864955 ps
T468 /workspace/coverage/default/49.sysrst_ctrl_stress_all.4269252993 Jul 30 06:22:14 PM PDT 24 Jul 30 06:22:17 PM PDT 24 7326722488 ps
T469 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2796625854 Jul 30 06:21:13 PM PDT 24 Jul 30 06:22:20 PM PDT 24 26579394271 ps
T470 /workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.761314905 Jul 30 06:20:59 PM PDT 24 Jul 30 06:21:05 PM PDT 24 2611457608 ps
T98 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.1703454545 Jul 30 06:20:41 PM PDT 24 Jul 30 06:22:55 PM PDT 24 54128891908 ps
T471 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.771187216 Jul 30 06:19:51 PM PDT 24 Jul 30 06:19:59 PM PDT 24 2610037715 ps
T472 /workspace/coverage/default/30.sysrst_ctrl_smoke.1072415026 Jul 30 06:21:14 PM PDT 24 Jul 30 06:21:20 PM PDT 24 2109370000 ps
T473 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1404131184 Jul 30 06:19:50 PM PDT 24 Jul 30 06:19:52 PM PDT 24 2393005565 ps
T474 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3593366501 Jul 30 06:20:02 PM PDT 24 Jul 30 06:20:07 PM PDT 24 3014681287 ps
T475 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.564287357 Jul 30 06:22:12 PM PDT 24 Jul 30 06:22:21 PM PDT 24 3300524491 ps
T370 /workspace/coverage/default/1.sysrst_ctrl_stress_all.21250648 Jul 30 06:19:48 PM PDT 24 Jul 30 06:20:05 PM PDT 24 1022566985247 ps
T476 /workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.912015798 Jul 30 06:20:40 PM PDT 24 Jul 30 06:20:45 PM PDT 24 3511722374 ps
T477 /workspace/coverage/default/2.sysrst_ctrl_alert_test.2802439044 Jul 30 06:19:53 PM PDT 24 Jul 30 06:19:54 PM PDT 24 2033692139 ps
T478 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.967072109 Jul 30 06:20:28 PM PDT 24 Jul 30 06:21:30 PM PDT 24 24340994115 ps
T479 /workspace/coverage/default/11.sysrst_ctrl_ultra_low_pwr.1075031697 Jul 30 06:20:17 PM PDT 24 Jul 30 06:24:19 PM PDT 24 1202926704389 ps
T286 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1447253639 Jul 30 06:21:53 PM PDT 24 Jul 30 06:23:13 PM PDT 24 31629596119 ps
T480 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.1806484116 Jul 30 06:21:15 PM PDT 24 Jul 30 06:21:20 PM PDT 24 3211497927 ps
T350 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3621690426 Jul 30 06:19:47 PM PDT 24 Jul 30 06:20:24 PM PDT 24 112005967402 ps
T481 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.853128997 Jul 30 06:20:23 PM PDT 24 Jul 30 06:23:23 PM PDT 24 273697517351 ps
T482 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.821980892 Jul 30 06:20:33 PM PDT 24 Jul 30 06:20:39 PM PDT 24 3817911640 ps
T483 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.1576271472 Jul 30 06:20:29 PM PDT 24 Jul 30 06:20:36 PM PDT 24 4910795409 ps
T484 /workspace/coverage/default/42.sysrst_ctrl_smoke.3688134729 Jul 30 06:21:50 PM PDT 24 Jul 30 06:21:52 PM PDT 24 2135848858 ps
T485 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2152953726 Jul 30 06:21:33 PM PDT 24 Jul 30 06:21:37 PM PDT 24 3344569247 ps
T486 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2222911738 Jul 30 06:21:49 PM PDT 24 Jul 30 06:21:52 PM PDT 24 2228296925 ps
T487 /workspace/coverage/default/36.sysrst_ctrl_smoke.3644953695 Jul 30 06:21:33 PM PDT 24 Jul 30 06:21:36 PM PDT 24 2116157244 ps
T165 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.2796667319 Jul 30 06:20:27 PM PDT 24 Jul 30 06:20:33 PM PDT 24 4191656422 ps
T194 /workspace/coverage/default/15.sysrst_ctrl_stress_all.396288827 Jul 30 06:20:32 PM PDT 24 Jul 30 06:21:01 PM PDT 24 13445025998 ps
T488 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.157578512 Jul 30 06:20:00 PM PDT 24 Jul 30 06:20:09 PM PDT 24 3132906540 ps
T310 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.3393996325 Jul 30 06:20:52 PM PDT 24 Jul 30 06:21:38 PM PDT 24 70048563119 ps
T489 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.4172133409 Jul 30 06:20:42 PM PDT 24 Jul 30 06:23:12 PM PDT 24 269919912148 ps
T490 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1549074924 Jul 30 06:21:03 PM PDT 24 Jul 30 06:21:05 PM PDT 24 2625361809 ps
T150 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.3468861348 Jul 30 06:21:56 PM PDT 24 Jul 30 06:21:57 PM PDT 24 3570466093 ps
T353 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.4030920582 Jul 30 06:19:51 PM PDT 24 Jul 30 06:27:22 PM PDT 24 166619294458 ps
T491 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.212016187 Jul 30 06:22:12 PM PDT 24 Jul 30 06:22:19 PM PDT 24 2508738028 ps
T492 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.2332420910 Jul 30 06:21:22 PM PDT 24 Jul 30 06:21:36 PM PDT 24 5340699727 ps
T493 /workspace/coverage/default/38.sysrst_ctrl_alert_test.2672531139 Jul 30 06:21:46 PM PDT 24 Jul 30 06:21:52 PM PDT 24 2012953165 ps
T494 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3908287387 Jul 30 06:20:16 PM PDT 24 Jul 30 06:21:32 PM PDT 24 28231720544 ps
T157 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.947445733 Jul 30 06:20:22 PM PDT 24 Jul 30 06:20:24 PM PDT 24 2809286253 ps
T495 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3429247766 Jul 30 06:20:37 PM PDT 24 Jul 30 06:20:39 PM PDT 24 2073394529 ps
T496 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.965704951 Jul 30 06:21:51 PM PDT 24 Jul 30 06:21:53 PM PDT 24 2465852816 ps
T316 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.1236920438 Jul 30 06:21:46 PM PDT 24 Jul 30 06:25:37 PM PDT 24 106997320940 ps
T326 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2319159620 Jul 30 06:21:08 PM PDT 24 Jul 30 06:24:19 PM PDT 24 78291471750 ps
T124 /workspace/coverage/default/21.sysrst_ctrl_stress_all.3570135042 Jul 30 06:20:49 PM PDT 24 Jul 30 06:20:58 PM PDT 24 18722370924 ps
T334 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3977621522 Jul 30 06:22:10 PM PDT 24 Jul 30 06:24:47 PM PDT 24 70298679167 ps
T497 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1170961484 Jul 30 06:22:18 PM PDT 24 Jul 30 06:22:32 PM PDT 24 21613038055 ps
T498 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1215409320 Jul 30 06:19:40 PM PDT 24 Jul 30 06:19:43 PM PDT 24 2228010382 ps
T367 /workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2734837048 Jul 30 06:21:57 PM PDT 24 Jul 30 06:26:23 PM PDT 24 110044561427 ps
T499 /workspace/coverage/default/19.sysrst_ctrl_alert_test.1575314490 Jul 30 06:20:39 PM PDT 24 Jul 30 06:20:45 PM PDT 24 2011300076 ps
T362 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.457910254 Jul 30 06:19:45 PM PDT 24 Jul 30 06:21:15 PM PDT 24 82338971354 ps
T500 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.933350767 Jul 30 06:21:09 PM PDT 24 Jul 30 06:21:15 PM PDT 24 2611440081 ps
T154 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3456693329 Jul 30 06:21:18 PM PDT 24 Jul 30 06:21:53 PM PDT 24 113850339415 ps
T501 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.566051659 Jul 30 06:19:57 PM PDT 24 Jul 30 06:20:04 PM PDT 24 2510583671 ps
T502 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2730755695 Jul 30 06:21:24 PM PDT 24 Jul 30 06:21:28 PM PDT 24 4460765304 ps
T503 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1896437240 Jul 30 06:20:06 PM PDT 24 Jul 30 06:20:08 PM PDT 24 2158313492 ps
T190 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3652742130 Jul 30 06:20:03 PM PDT 24 Jul 30 06:21:02 PM PDT 24 96272464008 ps
T504 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2083198753 Jul 30 06:21:05 PM PDT 24 Jul 30 06:21:09 PM PDT 24 2517164382 ps
T505 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3344058952 Jul 30 06:19:45 PM PDT 24 Jul 30 06:19:52 PM PDT 24 2468381804 ps
T506 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.2331290011 Jul 30 06:20:54 PM PDT 24 Jul 30 06:20:56 PM PDT 24 3803059098 ps
T229 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2604634790 Jul 30 06:22:11 PM PDT 24 Jul 30 06:25:05 PM PDT 24 71827802701 ps
T147 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.535946484 Jul 30 06:21:25 PM PDT 24 Jul 30 06:25:44 PM PDT 24 110736173142 ps
T507 /workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3651996178 Jul 30 06:21:01 PM PDT 24 Jul 30 06:21:04 PM PDT 24 2483725581 ps
T99 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.3393933994 Jul 30 06:20:28 PM PDT 24 Jul 30 06:21:59 PM PDT 24 34482530190 ps
T508 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.4266536032 Jul 30 06:20:04 PM PDT 24 Jul 30 06:20:06 PM PDT 24 2624834594 ps
T231 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.466866961 Jul 30 06:22:05 PM PDT 24 Jul 30 06:23:52 PM PDT 24 80567368494 ps
T509 /workspace/coverage/default/26.sysrst_ctrl_alert_test.2669521496 Jul 30 06:21:10 PM PDT 24 Jul 30 06:21:16 PM PDT 24 2011183812 ps
T510 /workspace/coverage/default/1.sysrst_ctrl_pin_access_test.2205864693 Jul 30 06:19:45 PM PDT 24 Jul 30 06:19:49 PM PDT 24 2072292763 ps
T511 /workspace/coverage/default/45.sysrst_ctrl_smoke.2337614445 Jul 30 06:22:00 PM PDT 24 Jul 30 06:22:03 PM PDT 24 2116095436 ps
T512 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1272885887 Jul 30 06:20:40 PM PDT 24 Jul 30 06:20:47 PM PDT 24 2457169453 ps
T314 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.1291349140 Jul 30 06:21:05 PM PDT 24 Jul 30 06:22:13 PM PDT 24 106109800018 ps
T321 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2217080038 Jul 30 06:22:03 PM PDT 24 Jul 30 06:25:22 PM PDT 24 81280223774 ps
T125 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3283577614 Jul 30 06:22:04 PM PDT 24 Jul 30 06:22:17 PM PDT 24 25798461234 ps
T513 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.737500244 Jul 30 06:20:17 PM PDT 24 Jul 30 06:20:26 PM PDT 24 3569053569 ps
T318 /workspace/coverage/default/1.sysrst_ctrl_combo_detect.3749541479 Jul 30 06:19:49 PM PDT 24 Jul 30 06:21:22 PM PDT 24 62198689765 ps
T514 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.1684741622 Jul 30 06:19:46 PM PDT 24 Jul 30 06:21:00 PM PDT 24 55090450754 ps
T515 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.339624795 Jul 30 06:21:47 PM PDT 24 Jul 30 06:21:49 PM PDT 24 2634215795 ps
T516 /workspace/coverage/default/36.sysrst_ctrl_stress_all.2581600437 Jul 30 06:21:34 PM PDT 24 Jul 30 06:21:42 PM PDT 24 11625531633 ps
T517 /workspace/coverage/default/10.sysrst_ctrl_alert_test.2487318553 Jul 30 06:20:15 PM PDT 24 Jul 30 06:20:21 PM PDT 24 2011538053 ps
T328 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1632967061 Jul 30 06:22:23 PM PDT 24 Jul 30 06:25:09 PM PDT 24 67039120141 ps
T518 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3390740518 Jul 30 06:21:55 PM PDT 24 Jul 30 06:22:02 PM PDT 24 2613669159 ps
T519 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.4179774186 Jul 30 06:20:45 PM PDT 24 Jul 30 06:20:49 PM PDT 24 2621139658 ps
T520 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.4036183262 Jul 30 06:21:10 PM PDT 24 Jul 30 06:21:12 PM PDT 24 2153375986 ps
T324 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.3279692518 Jul 30 06:21:01 PM PDT 24 Jul 30 06:24:47 PM PDT 24 96666831004 ps
T345 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1428879199 Jul 30 06:22:19 PM PDT 24 Jul 30 06:26:56 PM PDT 24 106205266263 ps
T521 /workspace/coverage/default/27.sysrst_ctrl_smoke.2364234001 Jul 30 06:21:06 PM PDT 24 Jul 30 06:21:09 PM PDT 24 2121256794 ps
T522 /workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.4071876748 Jul 30 06:20:59 PM PDT 24 Jul 30 06:21:00 PM PDT 24 2657626048 ps
T523 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2157107643 Jul 30 06:22:01 PM PDT 24 Jul 30 06:32:15 PM PDT 24 258359972941 ps
T524 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3070122468 Jul 30 06:21:52 PM PDT 24 Jul 30 06:21:56 PM PDT 24 3818818353 ps
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T560 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2156605657 Jul 30 06:20:00 PM PDT 24 Jul 30 06:20:02 PM PDT 24 6000259025 ps
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T564 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2243882796 Jul 30 06:20:18 PM PDT 24 Jul 30 06:20:25 PM PDT 24 2609852789 ps
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T565 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.933822655 Jul 30 06:21:33 PM PDT 24 Jul 30 06:21:36 PM PDT 24 2487233630 ps
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T567 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.2209042923 Jul 30 06:20:34 PM PDT 24 Jul 30 06:20:38 PM PDT 24 2461264937 ps
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T569 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.699314085 Jul 30 06:21:35 PM PDT 24 Jul 30 06:21:41 PM PDT 24 2459622277 ps
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T571 /workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3910289706 Jul 30 06:21:58 PM PDT 24 Jul 30 06:22:06 PM PDT 24 2510657588 ps
T572 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.2651760494 Jul 30 06:19:44 PM PDT 24 Jul 30 06:19:47 PM PDT 24 5777975993 ps
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T574 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2769082399 Jul 30 06:20:08 PM PDT 24 Jul 30 06:20:17 PM PDT 24 3112618372 ps
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T575 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.4011823487 Jul 30 06:19:47 PM PDT 24 Jul 30 06:19:54 PM PDT 24 2467058168 ps
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T577 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1676118342 Jul 30 06:20:18 PM PDT 24 Jul 30 06:20:20 PM PDT 24 2626713496 ps
T578 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1038075490 Jul 30 06:22:04 PM PDT 24 Jul 30 06:22:10 PM PDT 24 2111995455 ps
T137 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.696902972 Jul 30 06:20:42 PM PDT 24 Jul 30 06:20:50 PM PDT 24 6504202150 ps
T100 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.4022800862 Jul 30 06:21:48 PM PDT 24 Jul 30 06:21:52 PM PDT 24 3056963184 ps
T335 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1899408007 Jul 30 06:21:35 PM PDT 24 Jul 30 06:22:22 PM PDT 24 72019205245 ps
T579 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1778420834 Jul 30 06:21:49 PM PDT 24 Jul 30 06:21:56 PM PDT 24 2464742627 ps
T343 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.304660734 Jul 30 06:22:23 PM PDT 24 Jul 30 06:23:17 PM PDT 24 79640223048 ps
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T580 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2014427748 Jul 30 06:20:08 PM PDT 24 Jul 30 06:20:11 PM PDT 24 2732339664 ps
T581 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.957533726 Jul 30 06:19:53 PM PDT 24 Jul 30 06:19:56 PM PDT 24 2177968813 ps
T369 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.3660277954 Jul 30 06:21:35 PM PDT 24 Jul 30 06:29:52 PM PDT 24 2299499180949 ps
T582 /workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.2142273658 Jul 30 06:21:29 PM PDT 24 Jul 30 06:21:34 PM PDT 24 3160390809 ps
T583 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2561470775 Jul 30 06:20:25 PM PDT 24 Jul 30 06:20:32 PM PDT 24 2610448045 ps
T584 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2364618222 Jul 30 06:22:16 PM PDT 24 Jul 30 06:22:49 PM PDT 24 62800617585 ps
T368 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2572184818 Jul 30 06:22:12 PM PDT 24 Jul 30 06:23:19 PM PDT 24 490620550714 ps
T585 /workspace/coverage/default/1.sysrst_ctrl_alert_test.3696292103 Jul 30 06:19:46 PM PDT 24 Jul 30 06:19:47 PM PDT 24 2149346990 ps
T586 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1339013608 Jul 30 06:22:06 PM PDT 24 Jul 30 06:22:15 PM PDT 24 2991465300 ps
T587 /workspace/coverage/default/37.sysrst_ctrl_pin_override_test.176541115 Jul 30 06:21:37 PM PDT 24 Jul 30 06:21:42 PM PDT 24 2519831193 ps
T588 /workspace/coverage/default/44.sysrst_ctrl_smoke.3942536124 Jul 30 06:21:56 PM PDT 24 Jul 30 06:21:58 PM PDT 24 2130435040 ps
T589 /workspace/coverage/default/5.sysrst_ctrl_stress_all.1121203207 Jul 30 06:20:00 PM PDT 24 Jul 30 06:20:08 PM PDT 24 13269449934 ps
T320 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.952732994 Jul 30 06:21:53 PM PDT 24 Jul 30 06:25:52 PM PDT 24 202962193199 ps
T590 /workspace/coverage/default/14.sysrst_ctrl_alert_test.1326935653 Jul 30 06:20:27 PM PDT 24 Jul 30 06:20:29 PM PDT 24 2023366382 ps
T591 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2806361424 Jul 30 06:20:42 PM PDT 24 Jul 30 06:20:48 PM PDT 24 2159610752 ps
T592 /workspace/coverage/default/29.sysrst_ctrl_smoke.1331930067 Jul 30 06:21:14 PM PDT 24 Jul 30 06:21:16 PM PDT 24 2125908336 ps
T593 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.499949493 Jul 30 06:21:02 PM PDT 24 Jul 30 06:21:04 PM PDT 24 3601833787 ps
T594 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.622769408 Jul 30 06:21:53 PM PDT 24 Jul 30 06:22:31 PM PDT 24 31425551130 ps
T595 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3505494537 Jul 30 06:20:03 PM PDT 24 Jul 30 06:20:06 PM PDT 24 2631831444 ps
T138 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3567879470 Jul 30 06:20:55 PM PDT 24 Jul 30 06:20:59 PM PDT 24 6589572524 ps
T174 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2222127871 Jul 30 06:21:56 PM PDT 24 Jul 30 06:22:56 PM PDT 24 55576588498 ps
T596 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2096654001 Jul 30 06:20:50 PM PDT 24 Jul 30 06:20:52 PM PDT 24 11587553824 ps
T597 /workspace/coverage/default/48.sysrst_ctrl_smoke.2725401018 Jul 30 06:22:08 PM PDT 24 Jul 30 06:22:13 PM PDT 24 2110993047 ps
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