Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.25	99.33	96.41	100.00	96.79	98.78	99.52	89.93

Total tests in report: 916

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
56.93	56.93	79.16	79.16	65.70	65.70	65.64	65.64	20.51	20.51	79.59	79.59	69.36	69.36	18.54	18.54	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.265718575
68.36	11.43	87.48	8.32	75.28	9.58	67.47	1.83	54.49	33.97	87.84	8.24	83.72	14.35	22.22	3.69	/workspace/coverage/default/33.sysrst_ctrl_stress_all.3697988459
76.01	7.65	92.57	5.09	81.77	6.50	69.98	2.51	69.23	14.74	92.13	4.29	91.14	7.42	35.25	13.03	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.641972036
81.88	5.87	96.19	3.62	88.68	6.90	95.32	25.34	69.23	0.00	95.67	3.55	92.49	1.35	35.57	0.31	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.130828612
85.36	3.49	96.79	0.60	89.31	0.63	95.32	0.00	75.00	5.77	96.30	0.63	93.74	1.25	51.09	15.52	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3919778389
87.79	2.43	98.02	1.23	91.28	1.97	95.32	0.00	87.18	12.18	97.52	1.22	94.12	0.39	51.09	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2928599556
89.42	1.62	98.21	0.19	91.76	0.48	95.32	0.00	87.82	0.64	97.63	0.11	94.32	0.19	60.85	9.76	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2637518781
90.64	1.22	98.25	0.04	92.92	1.16	96.00	0.68	87.82	0.00	97.74	0.11	94.32	0.00	67.39	6.54	/workspace/coverage/cover_reg_top/9.sysrst_ctrl_tl_intg_err.4149990923
91.73	1.09	98.38	0.13	93.96	1.04	98.17	2.17	88.46	0.64	97.82	0.07	95.95	1.64	69.37	1.97	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2294919085
92.67	0.94	98.47	0.09	93.98	0.03	98.17	0.00	89.10	0.64	97.97	0.15	96.63	0.67	74.35	4.98	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3766661574
93.08	0.41	98.49	0.02	93.98	0.00	98.17	0.00	89.10	0.00	97.97	0.00	96.63	0.00	77.21	2.86	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.61292390
93.44	0.36	98.60	0.11	94.06	0.08	98.17	0.00	91.03	1.92	98.08	0.11	96.92	0.29	77.21	0.00	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2748279704
93.70	0.26	98.66	0.06	94.08	0.03	98.17	0.00	91.03	0.00	98.08	0.00	96.92	0.00	78.97	1.77	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2287014063
93.95	0.25	98.66	0.00	94.11	0.03	99.54	1.37	91.03	0.00	98.08	0.00	97.01	0.10	79.23	0.26	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.4211573256
94.19	0.24	98.73	0.07	94.16	0.05	99.54	0.00	92.31	1.28	98.15	0.07	97.21	0.19	79.23	0.00	/workspace/coverage/default/43.sysrst_ctrl_stress_all.1223386919
94.41	0.22	98.84	0.11	94.16	0.00	99.54	0.00	93.59	1.28	98.23	0.07	97.21	0.00	79.34	0.10	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3004904717
94.62	0.21	98.86	0.02	94.31	0.15	99.54	0.00	93.59	0.00	98.26	0.04	98.07	0.87	79.70	0.36	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1974483685
94.81	0.19	98.86	0.00	94.31	0.00	99.54	0.00	93.59	0.00	98.26	0.00	98.07	0.00	81.05	1.35	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.1604278483
94.98	0.17	98.90	0.04	94.67	0.35	99.54	0.00	94.23	0.64	98.30	0.04	98.17	0.10	81.05	0.00	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2015351087
95.14	0.17	98.94	0.04	95.58	0.91	99.54	0.00	94.23	0.00	98.30	0.00	98.17	0.00	81.26	0.21	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.443725557
95.31	0.16	98.97	0.04	95.58	0.00	99.54	0.00	94.23	0.00	98.37	0.07	98.17	0.00	82.29	1.04	/workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3456693329
95.46	0.15	99.03	0.06	95.65	0.08	99.54	0.00	94.87	0.64	98.45	0.07	98.36	0.19	82.29	0.00	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1316113726
95.61	0.15	99.03	0.00	95.75	0.10	99.54	0.00	94.87	0.00	98.45	0.00	99.04	0.67	82.55	0.26	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.143912872
95.74	0.13	99.07	0.04	95.78	0.03	99.54	0.00	95.51	0.64	98.48	0.04	99.13	0.10	82.66	0.10	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2976503426
95.87	0.13	99.12	0.06	95.80	0.03	99.54	0.00	96.15	0.64	98.56	0.07	99.23	0.10	82.66	0.00	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2367372380
95.99	0.13	99.12	0.00	95.80	0.00	99.54	0.00	96.15	0.00	98.56	0.00	99.23	0.00	83.54	0.88	/workspace/coverage/default/26.sysrst_ctrl_combo_detect.3279692518
96.11	0.12	99.16	0.04	95.83	0.03	99.54	0.00	96.79	0.64	98.60	0.04	99.33	0.10	83.54	0.00	/workspace/coverage/default/14.sysrst_ctrl_stress_all.4086252706
96.22	0.11	99.16	0.00	95.83	0.00	99.54	0.00	96.79	0.00	98.60	0.00	99.33	0.00	84.32	0.78	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.1632967061
96.31	0.08	99.22	0.06	95.90	0.08	100.00	0.46	96.79	0.00	98.60	0.00	99.33	0.00	84.32	0.00	/workspace/coverage/default/16.sysrst_ctrl_alert_test.1426059788
96.38	0.08	99.22	0.00	95.93	0.03	100.00	0.00	96.79	0.00	98.60	0.00	99.42	0.10	84.74	0.42	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.3861106837
96.45	0.07	99.22	0.00	95.93	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.42	0.00	85.20	0.47	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.4233723937
96.51	0.06	99.22	0.00	95.93	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.42	0.00	85.62	0.42	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.4196767847
96.57	0.06	99.22	0.00	95.93	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.42	0.00	86.03	0.42	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.4146126373
96.62	0.05	99.22	0.00	95.93	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.42	0.00	86.40	0.36	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.1291349140
96.67	0.05	99.22	0.00	95.93	0.00	100.00	0.00	96.79	0.00	98.60	0.00	99.42	0.00	86.76	0.36	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3652742130
96.73	0.05	99.25	0.04	96.08	0.15	100.00	0.00	96.79	0.00	98.67	0.07	99.52	0.10	86.76	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2564937527
96.77	0.04	99.25	0.00	96.08	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	87.07	0.31	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3421178
96.81	0.04	99.25	0.00	96.08	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	87.33	0.26	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.1240418386
96.84	0.03	99.25	0.00	96.08	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	87.54	0.21	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3565837871
96.87	0.03	99.25	0.00	96.08	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	87.75	0.21	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2319159620
96.90	0.03	99.25	0.00	96.28	0.20	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	87.75	0.00	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3599623107
96.92	0.02	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	87.90	0.16	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3749541479
96.94	0.02	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.06	0.16	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.1786245747
96.95	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.16	0.10	/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.2416837002
96.97	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.27	0.10	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.457910254
96.98	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.37	0.10	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1617012224
97.00	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.47	0.10	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.4030920582
97.01	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.58	0.10	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.288897978
97.03	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.68	0.10	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.1899408007
97.04	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.79	0.10	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2217080038
97.06	0.01	99.25	0.00	96.28	0.00	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.89	0.10	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.940087197
97.07	0.01	99.25	0.00	96.31	0.03	100.00	0.00	96.79	0.00	98.67	0.00	99.52	0.00	88.94	0.05	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.1442916784
97.08	0.01	99.27	0.02	96.31	0.00	100.00	0.00	96.79	0.00	98.71	0.04	99.52	0.00	88.94	0.00	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.535946484
97.09	0.01	99.29	0.02	96.31	0.00	100.00	0.00	96.79	0.00	98.74	0.04	99.52	0.00	88.94	0.00	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.3215001604
97.09	0.01	99.31	0.02	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.04	99.52	0.00	88.94	0.00	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2324652926
97.10	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	88.99	0.05	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.1791547363
97.11	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.04	0.05	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3342904572
97.12	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.10	0.05	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1429877962
97.12	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.15	0.05	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3684827479
97.13	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.20	0.05	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.3176378818
97.14	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.25	0.05	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.3142283335
97.15	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.30	0.05	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.1208686523
97.15	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.36	0.05	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2815953349
97.16	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.41	0.05	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2336716190
97.17	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.46	0.05	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.3363009297
97.17	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.51	0.05	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2480960033
97.18	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.56	0.05	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.527057285
97.19	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.62	0.05	/workspace/coverage/default/30.sysrst_ctrl_combo_detect.2626192213
97.20	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.67	0.05	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.873310731
97.20	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.72	0.05	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2037341841
97.21	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.77	0.05	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1296529009
97.22	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.82	0.05	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1904570857
97.23	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.88	0.05	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.501458773
97.23	0.01	99.31	0.00	96.31	0.00	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.93	0.05	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2077460930
97.24	0.01	99.33	0.02	96.33	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.93	0.00	/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2430503638
97.24	0.01	99.33	0.00	96.36	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.93	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.917945395
97.25	0.01	99.33	0.00	96.39	0.03	100.00	0.00	96.79	0.00	98.78	0.00	99.52	0.00	89.93	0.00	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.3148014929

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.333988809
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.85977333
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1255245018
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1091256997
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.561268837
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.1883552539
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.3880883168
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3806597281
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1750515495
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.734467202
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2623405504
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.680024132
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.3952730246
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2714855851
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3556286170
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.491286912
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.504333879
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1554608688
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2213778010
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1420539295
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.2174127244
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/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2441457147
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.339624795
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.4199225460
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2222911738
/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.746288749
/workspace/coverage/default/38.sysrst_ctrl_smoke.3334246567
/workspace/coverage/default/38.sysrst_ctrl_stress_all.2982724309
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3192756139
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2366030898
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.351454561
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.4025269510
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2927222080
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.24146271
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.117500506
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.1778420834
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.2809107376
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1959171058
/workspace/coverage/default/39.sysrst_ctrl_smoke.929421756
/workspace/coverage/default/39.sysrst_ctrl_stress_all.3820811113
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.2517485951
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2917096664
/workspace/coverage/default/4.sysrst_ctrl_alert_test.3595704882
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3017571753
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.2045138486
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.700813264
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.94350833
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1162575564
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.1987591821
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.4178066387
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.4241579337
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1614837357
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.2419113005
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.566051659
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.4071020898
/workspace/coverage/default/4.sysrst_ctrl_smoke.4222559309
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1019350130
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.3433448281
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.271517178
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3559171635
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3529653025
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.952732994
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2271262195
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3585065877
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.2064001420
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.979298558
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2222909923
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.725597624
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.184605365
/workspace/coverage/default/40.sysrst_ctrl_smoke.2542942305
/workspace/coverage/default/40.sysrst_ctrl_stress_all.867056019
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.3353773463
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2023173718
/workspace/coverage/default/41.sysrst_ctrl_alert_test.2757113592
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3981583556
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1177885193
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2405200332
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.2092683377
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.3468861348
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.43319326
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3347716928
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.377279562
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3774953123
/workspace/coverage/default/41.sysrst_ctrl_smoke.1803338026
/workspace/coverage/default/41.sysrst_ctrl_stress_all.2869938627
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.3693662827
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2790745204
/workspace/coverage/default/42.sysrst_ctrl_alert_test.4005843190
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2771134275
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.3484285972
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.622769408
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.4080416234
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3390740518
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2972952874
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3726668371
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.1982405838
/workspace/coverage/default/42.sysrst_ctrl_smoke.3688134729
/workspace/coverage/default/42.sysrst_ctrl_stress_all.510825270
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.1447253639
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2097006055
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.1543846555
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4120619219
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3607609467
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2867802128
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.4199327102
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4216124698
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.965704951
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1680044432
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3568961263
/workspace/coverage/default/43.sysrst_ctrl_smoke.1300114440
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3088735848
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1158654820
/workspace/coverage/default/44.sysrst_ctrl_alert_test.775771105
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2509557403
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2898426360
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2734837048
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1776763290
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.799277275
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3879045521
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1796564813
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2038005952
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4188349065
/workspace/coverage/default/44.sysrst_ctrl_smoke.3942536124
/workspace/coverage/default/44.sysrst_ctrl_stress_all.1024116599
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2222127871
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2898976738
/workspace/coverage/default/45.sysrst_ctrl_alert_test.38733401
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2157107643
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3483820533
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2948192554
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3104850511
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1672370231
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2308309858
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3910289706
/workspace/coverage/default/45.sysrst_ctrl_smoke.2337614445
/workspace/coverage/default/45.sysrst_ctrl_stress_all.924881845
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3487014773
/workspace/coverage/default/46.sysrst_ctrl_alert_test.436080720
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.602154
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.466866961
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.21267354
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1501088919
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2588131848
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3823911693
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1052380393
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1271609186
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.171545847
/workspace/coverage/default/46.sysrst_ctrl_smoke.3180547796
/workspace/coverage/default/46.sysrst_ctrl_stress_all.493159443
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3283577614
/workspace/coverage/default/47.sysrst_ctrl_alert_test.311862104
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2029351643
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2416324641
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.681393175
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1339013608
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.4080599852
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2770624182
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2935064428
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1038075490
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2762884373
/workspace/coverage/default/47.sysrst_ctrl_smoke.1120016316
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1649307887
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2572184818
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3003781636
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1573483343
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2776017385
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.3894706694
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1644175351
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.566321418
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2777289887
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.684316389
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1614769302
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.4228210297
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.4266041829
/workspace/coverage/default/48.sysrst_ctrl_smoke.2725401018
/workspace/coverage/default/48.sysrst_ctrl_stress_all.41782445
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2905417579
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2818456863
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.564287357
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1569264448
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3040089980
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1113021029
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3963360394
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3253558251
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.212016187
/workspace/coverage/default/49.sysrst_ctrl_smoke.1664574619
/workspace/coverage/default/49.sysrst_ctrl_stress_all.4269252993
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3593832710
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3155120821
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3929841242
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2602867835
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1762511384
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.510849420
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3636522985
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.4043753620
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.677111709
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3449336963
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.752621356
/workspace/coverage/default/5.sysrst_ctrl_smoke.3902389524
/workspace/coverage/default/5.sysrst_ctrl_stress_all.1121203207
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2156605657
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3843223098
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.126347153
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3066317660
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.2604634790
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.719248686
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3977621522
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3020365114
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3442635185
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1540943655
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.427355756
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.157578512
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.936654460
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1808481232
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3902621575
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3759794134
/workspace/coverage/default/6.sysrst_ctrl_smoke.2882033629
/workspace/coverage/default/6.sysrst_ctrl_stress_all.1159160336
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.886220658
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.690874107
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2683813283
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.797275829
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3604592945
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2364618222
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1170961484
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3367929876
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1551300448
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3593366501
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.608581359
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.1910978932
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3377212954
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.821941243
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3505494537
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2554665788
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.572742205
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2699121949
/workspace/coverage/default/7.sysrst_ctrl_smoke.3225613247
/workspace/coverage/default/7.sysrst_ctrl_stress_all.2343310593
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4140894987
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3582787351
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3601309478
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.2278321868
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.826262879
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.599167793
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.382124232
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.4268661923
/workspace/coverage/default/8.sysrst_ctrl_alert_test.3791631330
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2268768011
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2040395585
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.862978240
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2769082399
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2600261698
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.4266536032
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3188476429
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2931073950
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1687724871
/workspace/coverage/default/8.sysrst_ctrl_smoke.3994918818
/workspace/coverage/default/8.sysrst_ctrl_stress_all.2724982339
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1469559284
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.4049888961
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2356704415
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2570937858
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1606972479
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2960071046
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1428879199
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1320627947
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1426244112
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3181515394
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3423311638
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2785616413
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4031227112
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2956892441
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2014427748
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.414687843
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2205465790
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.330336196
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1896437240
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2359556592
/workspace/coverage/default/9.sysrst_ctrl_smoke.3002973029
/workspace/coverage/default/9.sysrst_ctrl_stress_all.526227133
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3194113668
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.1826237897
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1457343243
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2016679917
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.4275759359
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1305222614
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3430746820
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2719086860
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.488635235
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.304660734

Total test records in report: 916

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.3162559538	Jul 30 06:20:14 PM PDT 24	Jul 30 06:20:17 PM PDT 24	5168493397 ps
T5	/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3402405449	Jul 30 06:21:13 PM PDT 24	Jul 30 06:21:18 PM PDT 24	3681572752 ps
T6	/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.130828612	Jul 30 06:22:12 PM PDT 24	Jul 30 06:22:16 PM PDT 24	2615807688 ps
T2	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.2080325468	Jul 30 06:20:21 PM PDT 24	Jul 30 06:23:16 PM PDT 24	72567264806 ps
T3	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.2588899320	Jul 30 06:20:41 PM PDT 24	Jul 30 06:20:49 PM PDT 24	4792164126 ps
T13	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2570937858	Jul 30 06:22:21 PM PDT 24	Jul 30 06:22:36 PM PDT 24	24857639111 ps
T7	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.265718575	Jul 30 06:20:32 PM PDT 24	Jul 30 06:23:52 PM PDT 24	82051735665 ps
T14	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.3421178	Jul 30 06:20:42 PM PDT 24	Jul 30 06:20:44 PM PDT 24	2539699852 ps
T15	/workspace/coverage/default/20.sysrst_ctrl_alert_test.1819472385	Jul 30 06:20:47 PM PDT 24	Jul 30 06:20:49 PM PDT 24	2038160280 ps
T4	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.799277275	Jul 30 06:21:57 PM PDT 24	Jul 30 06:22:02 PM PDT 24	4650841545 ps
T22	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.1567206872	Jul 30 06:21:09 PM PDT 24	Jul 30 06:21:11 PM PDT 24	2477949054 ps
T29	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3915528581	Jul 30 06:19:44 PM PDT 24	Jul 30 06:19:46 PM PDT 24	2345424884 ps
T26	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.1742759141	Jul 30 06:20:20 PM PDT 24	Jul 30 06:20:24 PM PDT 24	3480306927 ps
T23	/workspace/coverage/default/11.sysrst_ctrl_stress_all.3079442594	Jul 30 06:20:23 PM PDT 24	Jul 30 06:20:33 PM PDT 24	6930648230 ps
T24	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3963360394	Jul 30 06:22:09 PM PDT 24	Jul 30 06:22:11 PM PDT 24	2482594638 ps
T47	/workspace/coverage/default/39.sysrst_ctrl_alert_test.2366030898	Jul 30 06:21:48 PM PDT 24	Jul 30 06:21:53 PM PDT 24	2016705419 ps
T48	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1680044432	Jul 30 06:21:52 PM PDT 24	Jul 30 06:21:58 PM PDT 24	2095239821 ps
T8	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.1623356529	Jul 30 06:19:37 PM PDT 24	Jul 30 06:19:44 PM PDT 24	2463133886 ps
T9	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.2294919085	Jul 30 06:20:13 PM PDT 24	Jul 30 06:24:27 PM PDT 24	93425882532 ps
T10	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.4196767847	Jul 30 06:19:51 PM PDT 24	Jul 30 06:22:48 PM PDT 24	128304358684 ps
T49	/workspace/coverage/default/10.sysrst_ctrl_smoke.3677247354	Jul 30 06:20:23 PM PDT 24	Jul 30 06:20:30 PM PDT 24	2109692387 ps
T50	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.3347716928	Jul 30 06:21:50 PM PDT 24	Jul 30 06:21:56 PM PDT 24	2464223246 ps
T11	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.826262879	Jul 30 06:22:17 PM PDT 24	Jul 30 06:25:35 PM PDT 24	75526510132 ps
T237	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1100305480	Jul 30 06:20:29 PM PDT 24	Jul 30 06:20:31 PM PDT 24	2337437251 ps
T25	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3104850511	Jul 30 06:22:00 PM PDT 24	Jul 30 06:22:08 PM PDT 24	2610205852 ps
T27	/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2771134275	Jul 30 06:21:52 PM PDT 24	Jul 30 06:35:37 PM PDT 24	309911546164 ps
T12	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.3135451843	Jul 30 06:21:23 PM PDT 24	Jul 30 06:21:30 PM PDT 24	3412894816 ps
T28	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.388307146	Jul 30 06:20:53 PM PDT 24	Jul 30 06:21:27 PM PDT 24	106833949617 ps
T19	/workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.1617012224	Jul 30 06:20:34 PM PDT 24	Jul 30 06:21:40 PM PDT 24	4068171602230 ps
T58	/workspace/coverage/default/28.sysrst_ctrl_smoke.3700289480	Jul 30 06:21:08 PM PDT 24	Jul 30 06:21:10 PM PDT 24	2126491119 ps
T59	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1959171058	Jul 30 06:21:46 PM PDT 24	Jul 30 06:21:48 PM PDT 24	2590485054 ps
T60	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.684316389	Jul 30 06:22:09 PM PDT 24	Jul 30 06:22:12 PM PDT 24	2630261815 ps
T31	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.501458773	Jul 30 06:22:20 PM PDT 24	Jul 30 06:24:38 PM PDT 24	56857234796 ps
T40	/workspace/coverage/default/7.sysrst_ctrl_stress_all.2343310593	Jul 30 06:20:06 PM PDT 24	Jul 30 06:20:38 PM PDT 24	12602937477 ps
T61	/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.3726668371	Jul 30 06:21:56 PM PDT 24	Jul 30 06:22:02 PM PDT 24	2128384194 ps
T32	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.61292390	Jul 30 06:21:33 PM PDT 24	Jul 30 06:24:21 PM PDT 24	140068493318 ps
T62	/workspace/coverage/default/17.sysrst_ctrl_smoke.2961609882	Jul 30 06:20:33 PM PDT 24	Jul 30 06:20:37 PM PDT 24	2116172244 ps
T63	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3246131515	Jul 30 06:19:51 PM PDT 24	Jul 30 06:19:57 PM PDT 24	2012494194 ps
T290	/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1582743532	Jul 30 06:21:47 PM PDT 24	Jul 30 06:21:49 PM PDT 24	3233864642 ps
T33	/workspace/coverage/default/33.sysrst_ctrl_stress_all.3697988459	Jul 30 06:21:27 PM PDT 24	Jul 30 06:21:51 PM PDT 24	19162884689 ps
T151	/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.593417204	Jul 30 06:20:41 PM PDT 24	Jul 30 06:20:48 PM PDT 24	2696029021 ps
T152	/workspace/coverage/default/49.sysrst_ctrl_smoke.1664574619	Jul 30 06:22:09 PM PDT 24	Jul 30 06:22:11 PM PDT 24	2138795177 ps
T41	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.375654717	Jul 30 06:21:33 PM PDT 24	Jul 30 06:27:06 PM PDT 24	131664519724 ps
T66	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.2300532538	Jul 30 06:20:25 PM PDT 24	Jul 30 06:20:29 PM PDT 24	2517279471 ps
T42	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2405200332	Jul 30 06:21:51 PM PDT 24	Jul 30 06:23:04 PM PDT 24	28582625801 ps
T67	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3160603935	Jul 30 06:21:32 PM PDT 24	Jul 30 06:21:40 PM PDT 24	2608658615 ps
T43	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.1417677196	Jul 30 06:20:45 PM PDT 24	Jul 30 06:20:49 PM PDT 24	3528891096 ps
T64	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.4144209394	Jul 30 06:19:39 PM PDT 24	Jul 30 06:19:46 PM PDT 24	2459493058 ps
T44	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.1974483685	Jul 30 06:21:37 PM PDT 24	Jul 30 06:22:14 PM PDT 24	59101129882 ps
T68	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1070260163	Jul 30 06:21:16 PM PDT 24	Jul 30 06:21:23 PM PDT 24	2612005449 ps
T39	/workspace/coverage/default/25.sysrst_ctrl_stress_all.914588369	Jul 30 06:21:02 PM PDT 24	Jul 30 06:21:39 PM PDT 24	13992207421 ps
T20	/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3003781636	Jul 30 06:22:03 PM PDT 24	Jul 30 06:22:10 PM PDT 24	3620208714 ps
T130	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.1329669637	Jul 30 06:19:47 PM PDT 24	Jul 30 06:19:51 PM PDT 24	3705897110 ps
T131	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.785177262	Jul 30 06:21:03 PM PDT 24	Jul 30 06:21:06 PM PDT 24	2529079063 ps
T38	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2637518781	Jul 30 06:21:20 PM PDT 24	Jul 30 06:22:03 PM PDT 24	193324754234 ps
T45	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.3342904572	Jul 30 06:20:13 PM PDT 24	Jul 30 06:20:14 PM PDT 24	3756784651 ps
T132	/workspace/coverage/default/31.sysrst_ctrl_alert_test.319524726	Jul 30 06:21:23 PM PDT 24	Jul 30 06:21:25 PM PDT 24	2043154822 ps
T133	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.445852801	Jul 30 06:20:58 PM PDT 24	Jul 30 06:21:35 PM PDT 24	14409265772 ps
T134	/workspace/coverage/default/24.sysrst_ctrl_smoke.804510133	Jul 30 06:20:53 PM PDT 24	Jul 30 06:21:00 PM PDT 24	2113719911 ps
T135	/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3568961263	Jul 30 06:21:53 PM PDT 24	Jul 30 06:22:00 PM PDT 24	2509669926 ps
T34	/workspace/coverage/default/43.sysrst_ctrl_stress_all.1223386919	Jul 30 06:21:55 PM PDT 24	Jul 30 06:22:06 PM PDT 24	8397140322 ps
T158	/workspace/coverage/default/48.sysrst_ctrl_alert_test.1573483343	Jul 30 06:22:08 PM PDT 24	Jul 30 06:22:14 PM PDT 24	2012479994 ps
T35	/workspace/coverage/default/22.sysrst_ctrl_edge_detect.3003516828	Jul 30 06:20:52 PM PDT 24	Jul 30 06:20:59 PM PDT 24	3371979171 ps
T69	/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.2430503638	Jul 30 06:22:22 PM PDT 24	Jul 30 06:23:41 PM PDT 24	31998081916 ps
T65	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3188476429	Jul 30 06:20:04 PM PDT 24	Jul 30 06:20:07 PM PDT 24	2454182660 ps
T46	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3981583556	Jul 30 06:21:50 PM PDT 24	Jul 30 06:21:53 PM PDT 24	3388708958 ps
T161	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.2844718583	Jul 30 06:20:22 PM PDT 24	Jul 30 06:20:30 PM PDT 24	2976944884 ps
T21	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.641972036	Jul 30 06:20:36 PM PDT 24	Jul 30 06:21:47 PM PDT 24	130405935634 ps
T70	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.3066317660	Jul 30 06:22:14 PM PDT 24	Jul 30 06:22:50 PM PDT 24	26335536283 ps
T51	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.1517234535	Jul 30 06:20:46 PM PDT 24	Jul 30 06:20:56 PM PDT 24	12276756108 ps
T117	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.85213100	Jul 30 06:20:18 PM PDT 24	Jul 30 06:20:25 PM PDT 24	2508024068 ps
T118	/workspace/coverage/default/7.sysrst_ctrl_alert_test.1551300448	Jul 30 06:20:03 PM PDT 24	Jul 30 06:20:09 PM PDT 24	2009237372 ps
T119	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2600261698	Jul 30 06:20:10 PM PDT 24	Jul 30 06:20:13 PM PDT 24	5078745272 ps
T52	/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1158654820	Jul 30 06:21:55 PM PDT 24	Jul 30 06:22:56 PM PDT 24	328557439300 ps
T120	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.3505251319	Jul 30 06:20:20 PM PDT 24	Jul 30 06:20:22 PM PDT 24	2529812098 ps
T121	/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1983900201	Jul 30 06:19:48 PM PDT 24	Jul 30 06:19:50 PM PDT 24	2260824530 ps
T53	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.3487014773	Jul 30 06:22:01 PM PDT 24	Jul 30 06:22:07 PM PDT 24	4212135818 ps
T54	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.2015351087	Jul 30 06:21:54 PM PDT 24	Jul 30 06:22:01 PM PDT 24	8244806571 ps
T143	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.746288749	Jul 30 06:21:50 PM PDT 24	Jul 30 06:21:57 PM PDT 24	2511957530 ps
T55	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.31573253	Jul 30 06:20:30 PM PDT 24	Jul 30 06:20:35 PM PDT 24	4983782994 ps
T56	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.617400424	Jul 30 06:19:53 PM PDT 24	Jul 30 06:19:57 PM PDT 24	6145249263 ps
T114	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.2269974788	Jul 30 06:21:08 PM PDT 24	Jul 30 06:21:43 PM PDT 24	65993594456 ps
T144	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.4028877892	Jul 30 06:20:50 PM PDT 24	Jul 30 06:20:52 PM PDT 24	3687597389 ps
T88	/workspace/coverage/default/22.sysrst_ctrl_stress_all.1155777065	Jul 30 06:20:51 PM PDT 24	Jul 30 06:21:31 PM PDT 24	15183069274 ps
T145	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2475964720	Jul 30 06:20:15 PM PDT 24	Jul 30 06:20:17 PM PDT 24	2117525446 ps
T146	/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.979298558	Jul 30 06:21:46 PM PDT 24	Jul 30 06:21:50 PM PDT 24	2618303956 ps
T71	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3020365114	Jul 30 06:22:12 PM PDT 24	Jul 30 06:22:29 PM PDT 24	25851891890 ps
T373	/workspace/coverage/default/5.sysrst_ctrl_smoke.3902389524	Jul 30 06:19:56 PM PDT 24	Jul 30 06:20:03 PM PDT 24	2110157977 ps
T57	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.537069466	Jul 30 06:21:18 PM PDT 24	Jul 30 06:21:22 PM PDT 24	8590395564 ps
T89	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.678516841	Jul 30 06:20:52 PM PDT 24	Jul 30 06:21:00 PM PDT 24	25884215993 ps
T374	/workspace/coverage/default/13.sysrst_ctrl_smoke.166943045	Jul 30 06:20:20 PM PDT 24	Jul 30 06:20:23 PM PDT 24	2118995262 ps
T375	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.117500506	Jul 30 06:21:47 PM PDT 24	Jul 30 06:21:55 PM PDT 24	2612175934 ps
T238	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.2445346807	Jul 30 06:21:36 PM PDT 24	Jul 30 06:26:47 PM PDT 24	120585985081 ps
T111	/workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.2413816291	Jul 30 06:21:18 PM PDT 24	Jul 30 06:23:35 PM PDT 24	56159241071 ps
T122	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.234093567	Jul 30 06:20:35 PM PDT 24	Jul 30 06:20:38 PM PDT 24	3645736384 ps
T72	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.3192756139	Jul 30 06:21:42 PM PDT 24	Jul 30 06:21:49 PM PDT 24	8939723571 ps
T376	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.3430302880	Jul 30 06:20:45 PM PDT 24	Jul 30 06:20:51 PM PDT 24	2143865198 ps
T269	/workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.2351558427	Jul 30 06:19:50 PM PDT 24	Jul 30 06:20:00 PM PDT 24	3411572522 ps
T377	/workspace/coverage/default/34.sysrst_ctrl_stress_all.741636655	Jul 30 06:21:29 PM PDT 24	Jul 30 06:22:05 PM PDT 24	54412477491 ps
T378	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.311346649	Jul 30 06:21:27 PM PDT 24	Jul 30 06:21:29 PM PDT 24	2199874792 ps
T379	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1052380393	Jul 30 06:22:01 PM PDT 24	Jul 30 06:22:07 PM PDT 24	2454751766 ps
T36	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.1390737582	Jul 30 06:20:36 PM PDT 24	Jul 30 06:20:45 PM PDT 24	4941952993 ps
T182	/workspace/coverage/default/32.sysrst_ctrl_pin_override_test.2587336037	Jul 30 06:21:23 PM PDT 24	Jul 30 06:21:25 PM PDT 24	2537233410 ps
T78	/workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.3004904717	Jul 30 06:20:57 PM PDT 24	Jul 30 06:21:42 PM PDT 24	34183739528 ps
T183	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1429877962	Jul 30 06:20:15 PM PDT 24	Jul 30 06:20:49 PM PDT 24	11973065141 ps
T184	/workspace/coverage/default/0.sysrst_ctrl_smoke.4155939543	Jul 30 06:19:45 PM PDT 24	Jul 30 06:19:50 PM PDT 24	2112693524 ps
T185	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1243719564	Jul 30 06:20:37 PM PDT 24	Jul 30 06:20:39 PM PDT 24	2174159004 ps
T186	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3017571753	Jul 30 06:19:55 PM PDT 24	Jul 30 06:20:05 PM PDT 24	3518786083 ps
T187	/workspace/coverage/default/36.sysrst_ctrl_pin_access_test.2440960781	Jul 30 06:21:31 PM PDT 24	Jul 30 06:21:37 PM PDT 24	2212082201 ps
T188	/workspace/coverage/default/31.sysrst_ctrl_combo_detect.901404342	Jul 30 06:21:17 PM PDT 24	Jul 30 06:21:57 PM PDT 24	68838671825 ps
T112	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1001450907	Jul 30 06:20:39 PM PDT 24	Jul 30 06:21:06 PM PDT 24	39266612627 ps
T221	/workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.1272589467	Jul 30 06:19:52 PM PDT 24	Jul 30 06:20:02 PM PDT 24	3590141413 ps
T222	/workspace/coverage/default/9.sysrst_ctrl_stress_all.526227133	Jul 30 06:20:10 PM PDT 24	Jul 30 06:20:16 PM PDT 24	8882413219 ps
T223	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2051651288	Jul 30 06:19:54 PM PDT 24	Jul 30 06:19:56 PM PDT 24	2471856055 ps
T224	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2558462809	Jul 30 06:20:17 PM PDT 24	Jul 30 06:20:19 PM PDT 24	2467240489 ps
T225	/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3823911693	Jul 30 06:22:04 PM PDT 24	Jul 30 06:22:06 PM PDT 24	2625772276 ps
T226	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1271609186	Jul 30 06:22:00 PM PDT 24	Jul 30 06:22:02 PM PDT 24	2237524884 ps
T227	/workspace/coverage/default/22.sysrst_ctrl_alert_test.89410953	Jul 30 06:20:50 PM PDT 24	Jul 30 06:20:56 PM PDT 24	2012303709 ps
T228	/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.602154	Jul 30 06:22:06 PM PDT 24	Jul 30 06:22:15 PM PDT 24	3321901727 ps
T113	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2287014063	Jul 30 06:22:16 PM PDT 24	Jul 30 06:24:44 PM PDT 24	60028985242 ps
T371	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1187279096	Jul 30 06:19:45 PM PDT 24	Jul 30 06:19:47 PM PDT 24	2537742775 ps
T90	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.2960071046	Jul 30 06:22:20 PM PDT 24	Jul 30 06:22:40 PM PDT 24	29604638178 ps
T211	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4031227112	Jul 30 06:20:13 PM PDT 24	Jul 30 06:20:53 PM PDT 24	63703380277 ps
T73	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.3869101679	Jul 30 06:21:13 PM PDT 24	Jul 30 06:21:15 PM PDT 24	6494454759 ps
T380	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.24146271	Jul 30 06:21:46 PM PDT 24	Jul 30 06:21:48 PM PDT 24	3109080358 ps
T381	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2023173718	Jul 30 06:21:51 PM PDT 24	Jul 30 06:21:58 PM PDT 24	6660518156 ps
T382	/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.377279562	Jul 30 06:21:51 PM PDT 24	Jul 30 06:21:57 PM PDT 24	2066955384 ps
T383	/workspace/coverage/default/20.sysrst_ctrl_smoke.3483962346	Jul 30 06:20:41 PM PDT 24	Jul 30 06:20:43 PM PDT 24	2137826986 ps
T91	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2602867835	Jul 30 06:20:00 PM PDT 24	Jul 30 06:21:13 PM PDT 24	121205833205 ps
T384	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2931073950	Jul 30 06:20:04 PM PDT 24	Jul 30 06:20:06 PM PDT 24	2076443424 ps
T276	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.4199225460	Jul 30 06:21:50 PM PDT 24	Jul 30 06:21:57 PM PDT 24	2473285351 ps
T270	/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3529653025	Jul 30 06:21:50 PM PDT 24	Jul 30 06:33:49 PM PDT 24	293859607795 ps
T385	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.427273387	Jul 30 06:19:47 PM PDT 24	Jul 30 06:19:49 PM PDT 24	2235093569 ps
T84	/workspace/coverage/default/23.sysrst_ctrl_stress_all.2850044852	Jul 30 06:20:55 PM PDT 24	Jul 30 06:21:14 PM PDT 24	17361464482 ps
T386	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.145318270	Jul 30 06:20:29 PM PDT 24	Jul 30 06:20:36 PM PDT 24	2464334085 ps
T387	/workspace/coverage/default/40.sysrst_ctrl_stress_all.867056019	Jul 30 06:21:54 PM PDT 24	Jul 30 06:22:03 PM PDT 24	6316529494 ps
T115	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2480960033	Jul 30 06:21:02 PM PDT 24	Jul 30 06:22:34 PM PDT 24	3505006545223 ps
T116	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3593832710	Jul 30 06:22:14 PM PDT 24	Jul 30 06:22:20 PM PDT 24	3156767799 ps
T388	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.1005020757	Jul 30 06:21:09 PM PDT 24	Jul 30 06:21:14 PM PDT 24	3966634498 ps
T267	/workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3355739529	Jul 30 06:20:33 PM PDT 24	Jul 30 06:23:06 PM PDT 24	60239874146 ps
T271	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1464710865	Jul 30 06:20:29 PM PDT 24	Jul 30 06:20:32 PM PDT 24	3488893389 ps
T204	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.3582787351	Jul 30 06:22:17 PM PDT 24	Jul 30 06:29:25 PM PDT 24	159995792734 ps
T277	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.637345521	Jul 30 06:20:47 PM PDT 24	Jul 30 06:20:54 PM PDT 24	2453773317 ps
T389	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3803072290	Jul 30 06:19:45 PM PDT 24	Jul 30 06:19:53 PM PDT 24	2611339576 ps
T390	/workspace/coverage/default/21.sysrst_ctrl_smoke.379928409	Jul 30 06:20:42 PM PDT 24	Jul 30 06:20:47 PM PDT 24	2109966994 ps
T372	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2762884373	Jul 30 06:22:10 PM PDT 24	Jul 30 06:22:16 PM PDT 24	2510017795 ps
T391	/workspace/coverage/default/48.sysrst_ctrl_stress_all.41782445	Jul 30 06:22:09 PM PDT 24	Jul 30 06:22:29 PM PDT 24	8790040224 ps
T392	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3827750313	Jul 30 06:20:45 PM PDT 24	Jul 30 06:20:52 PM PDT 24	2513372681 ps
T86	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1642074987	Jul 30 06:19:44 PM PDT 24	Jul 30 06:19:48 PM PDT 24	7426781524 ps
T278	/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2222909923	Jul 30 06:21:47 PM PDT 24	Jul 30 06:21:51 PM PDT 24	2467173011 ps
T393	/workspace/coverage/default/18.sysrst_ctrl_alert_test.1784778803	Jul 30 06:20:38 PM PDT 24	Jul 30 06:20:39 PM PDT 24	2102059576 ps
T394	/workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.690520033	Jul 30 06:21:37 PM PDT 24	Jul 30 06:21:44 PM PDT 24	2610282549 ps
T212	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.584260001	Jul 30 06:20:32 PM PDT 24	Jul 30 06:21:37 PM PDT 24	137818390128 ps
T279	/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.1672370231	Jul 30 06:22:01 PM PDT 24	Jul 30 06:22:09 PM PDT 24	2472814034 ps
T155	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3636522985	Jul 30 06:19:59 PM PDT 24	Jul 30 06:20:09 PM PDT 24	4134352270 ps
T395	/workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.246502681	Jul 30 06:19:48 PM PDT 24	Jul 30 06:19:55 PM PDT 24	2607876097 ps
T396	/workspace/coverage/default/19.sysrst_ctrl_pin_access_test.802227956	Jul 30 06:20:39 PM PDT 24	Jul 30 06:20:41 PM PDT 24	2269586488 ps
T92	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.622434226	Jul 30 06:20:43 PM PDT 24	Jul 30 06:24:14 PM PDT 24	81499368275 ps
T93	/workspace/coverage/default/33.sysrst_ctrl_combo_detect.1604278483	Jul 30 06:21:24 PM PDT 24	Jul 30 06:24:10 PM PDT 24	68236952891 ps
T268	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.1257586039	Jul 30 06:19:56 PM PDT 24	Jul 30 06:20:35 PM PDT 24	17869235189 ps
T311	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1689200813	Jul 30 06:21:14 PM PDT 24	Jul 30 06:23:58 PM PDT 24	80649928860 ps
T397	/workspace/coverage/default/25.sysrst_ctrl_alert_test.1156267676	Jul 30 06:21:01 PM PDT 24	Jul 30 06:21:07 PM PDT 24	2011729639 ps
T398	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2151558225	Jul 30 06:20:48 PM PDT 24	Jul 30 06:20:51 PM PDT 24	3370412683 ps
T399	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4140894987	Jul 30 06:20:05 PM PDT 24	Jul 30 06:20:07 PM PDT 24	4364268764 ps
T209	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1061094771	Jul 30 06:20:25 PM PDT 24	Jul 30 06:23:31 PM PDT 24	72895057126 ps
T208	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2683813283	Jul 30 06:22:14 PM PDT 24	Jul 30 06:23:04 PM PDT 24	75688507924 ps
T400	/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1687724871	Jul 30 06:20:04 PM PDT 24	Jul 30 06:20:11 PM PDT 24	2507614869 ps
T401	/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.566321418	Jul 30 06:22:09 PM PDT 24	Jul 30 06:22:11 PM PDT 24	3235360684 ps
T402	/workspace/coverage/default/16.sysrst_ctrl_alert_test.1426059788	Jul 30 06:20:33 PM PDT 24	Jul 30 06:20:35 PM PDT 24	2040605081 ps
T403	/workspace/coverage/default/4.sysrst_ctrl_alert_test.3595704882	Jul 30 06:19:56 PM PDT 24	Jul 30 06:20:02 PM PDT 24	2009842524 ps
T280	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2145713052	Jul 30 06:21:20 PM PDT 24	Jul 30 06:21:23 PM PDT 24	2455825292 ps
T404	/workspace/coverage/default/9.sysrst_ctrl_smoke.3002973029	Jul 30 06:20:10 PM PDT 24	Jul 30 06:20:17 PM PDT 24	2111736360 ps
T405	/workspace/coverage/default/38.sysrst_ctrl_stress_all.2982724309	Jul 30 06:21:50 PM PDT 24	Jul 30 06:22:02 PM PDT 24	8129135941 ps
T241	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.4211573256	Jul 30 06:19:50 PM PDT 24	Jul 30 06:21:29 PM PDT 24	42007698800 ps
T260	/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3652941007	Jul 30 06:20:32 PM PDT 24	Jul 30 06:28:55 PM PDT 24	195080813979 ps
T261	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.4080416234	Jul 30 06:21:56 PM PDT 24	Jul 30 06:22:00 PM PDT 24	2812394846 ps
T170	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.1705737632	Jul 30 06:20:41 PM PDT 24	Jul 30 06:20:43 PM PDT 24	2814385763 ps
T262	/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3929841242	Jul 30 06:19:58 PM PDT 24	Jul 30 06:20:03 PM PDT 24	3335049652 ps
T263	/workspace/coverage/default/16.sysrst_ctrl_smoke.1219747955	Jul 30 06:20:34 PM PDT 24	Jul 30 06:20:40 PM PDT 24	2110814809 ps
T264	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3449336963	Jul 30 06:19:58 PM PDT 24	Jul 30 06:20:04 PM PDT 24	2190120677 ps
T37	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3919778389	Jul 30 06:20:14 PM PDT 24	Jul 30 06:21:38 PM PDT 24	130896227846 ps
T265	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.4233723937	Jul 30 06:19:43 PM PDT 24	Jul 30 06:19:46 PM PDT 24	2528024509 ps
T85	/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2367372380	Jul 30 06:22:10 PM PDT 24	Jul 30 06:22:12 PM PDT 24	4997583632 ps
T406	/workspace/coverage/default/33.sysrst_ctrl_alert_test.3696276446	Jul 30 06:21:26 PM PDT 24	Jul 30 06:21:31 PM PDT 24	2013953815 ps
T281	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3759794134	Jul 30 06:19:59 PM PDT 24	Jul 30 06:20:07 PM PDT 24	2508045985 ps
T266	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.3766483106	Jul 30 06:21:33 PM PDT 24	Jul 30 06:23:42 PM PDT 24	206447257564 ps
T407	/workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1705050123	Jul 30 06:20:51 PM PDT 24	Jul 30 06:20:58 PM PDT 24	2463618873 ps
T201	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.4015708970	Jul 30 06:21:46 PM PDT 24	Jul 30 06:22:18 PM PDT 24	24335814280 ps
T166	/workspace/coverage/default/28.sysrst_ctrl_edge_detect.1811992995	Jul 30 06:21:09 PM PDT 24	Jul 30 06:21:13 PM PDT 24	2905761190 ps
T408	/workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.1413686587	Jul 30 06:20:46 PM PDT 24	Jul 30 06:20:54 PM PDT 24	4807013142 ps
T409	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3459000501	Jul 30 06:20:27 PM PDT 24	Jul 30 06:20:34 PM PDT 24	4193782420 ps
T410	/workspace/coverage/default/41.sysrst_ctrl_stress_all.2869938627	Jul 30 06:21:57 PM PDT 24	Jul 30 06:22:16 PM PDT 24	14311289646 ps
T82	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.1316113726	Jul 30 06:22:01 PM PDT 24	Jul 30 06:22:03 PM PDT 24	5619857526 ps
T87	/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2790745204	Jul 30 06:21:56 PM PDT 24	Jul 30 06:22:00 PM PDT 24	3520505984 ps
T175	/workspace/coverage/default/40.sysrst_ctrl_alert_test.3559171635	Jul 30 06:21:50 PM PDT 24	Jul 30 06:21:51 PM PDT 24	2063355442 ps
T80	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.664716066	Jul 30 06:21:09 PM PDT 24	Jul 30 06:21:16 PM PDT 24	7433783686 ps
T94	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.916627136	Jul 30 06:20:23 PM PDT 24	Jul 30 06:24:16 PM PDT 24	91334759633 ps
T176	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.2077460930	Jul 30 06:22:24 PM PDT 24	Jul 30 06:26:29 PM PDT 24	90269971327 ps
T177	/workspace/coverage/default/34.sysrst_ctrl_smoke.3089677961	Jul 30 06:21:26 PM PDT 24	Jul 30 06:21:29 PM PDT 24	2118369428 ps
T178	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.496659597	Jul 30 06:21:22 PM PDT 24	Jul 30 06:23:37 PM PDT 24	48893976153 ps
T160	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.2508308157	Jul 30 06:20:56 PM PDT 24	Jul 30 06:30:48 PM PDT 24	652373701106 ps
T123	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3261607309	Jul 30 06:21:05 PM PDT 24	Jul 30 06:21:12 PM PDT 24	30854443448 ps
T411	/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.3402808023	Jul 30 06:21:05 PM PDT 24	Jul 30 06:21:11 PM PDT 24	2614541336 ps
T284	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.542123883	Jul 30 06:21:20 PM PDT 24	Jul 30 06:21:27 PM PDT 24	4197446873 ps
T412	/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.4216124698	Jul 30 06:21:55 PM PDT 24	Jul 30 06:22:03 PM PDT 24	2610275898 ps
T214	/workspace/coverage/default/8.sysrst_ctrl_stress_all.2724982339	Jul 30 06:20:11 PM PDT 24	Jul 30 06:22:31 PM PDT 24	225778831998 ps
T230	/workspace/coverage/default/46.sysrst_ctrl_stress_all.493159443	Jul 30 06:22:06 PM PDT 24	Jul 30 06:25:04 PM PDT 24	141301142742 ps
T413	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.318649413	Jul 30 06:20:27 PM PDT 24	Jul 30 06:20:29 PM PDT 24	2540811733 ps
T414	/workspace/coverage/default/18.sysrst_ctrl_smoke.1608271792	Jul 30 06:20:35 PM PDT 24	Jul 30 06:20:41 PM PDT 24	2111708702 ps
T415	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.3245118455	Jul 30 06:19:54 PM PDT 24	Jul 30 06:19:57 PM PDT 24	8079830101 ps
T156	/workspace/coverage/default/13.sysrst_ctrl_stress_all.2006415855	Jul 30 06:20:23 PM PDT 24	Jul 30 06:24:40 PM PDT 24	96795210328 ps
T416	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.552375148	Jul 30 06:21:22 PM PDT 24	Jul 30 06:21:24 PM PDT 24	2627933855 ps
T417	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.1289237422	Jul 30 06:20:13 PM PDT 24	Jul 30 06:20:19 PM PDT 24	3973237400 ps
T180	/workspace/coverage/default/30.sysrst_ctrl_stress_all.4242416756	Jul 30 06:21:19 PM PDT 24	Jul 30 06:21:29 PM PDT 24	14593594888 ps
T83	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2748279704	Jul 30 06:20:13 PM PDT 24	Jul 30 06:20:40 PM PDT 24	20284196814 ps
T169	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.3669225713	Jul 30 06:20:28 PM PDT 24	Jul 30 06:22:24 PM PDT 24	85805765271 ps
T77	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.2020325802	Jul 30 06:21:01 PM PDT 24	Jul 30 06:22:15 PM PDT 24	252237374151 ps
T102	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2976503426	Jul 30 06:20:41 PM PDT 24	Jul 30 06:21:31 PM PDT 24	20274486900 ps
T103	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.774031262	Jul 30 06:21:10 PM PDT 24	Jul 30 06:21:14 PM PDT 24	3647985662 ps
T104	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.305362508	Jul 30 06:20:47 PM PDT 24	Jul 30 06:20:50 PM PDT 24	3741705481 ps
T105	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.354069239	Jul 30 06:20:48 PM PDT 24	Jul 30 06:20:55 PM PDT 24	2609545604 ps
T106	/workspace/coverage/default/6.sysrst_ctrl_stress_all.1159160336	Jul 30 06:20:03 PM PDT 24	Jul 30 06:20:25 PM PDT 24	325957946171 ps
T107	/workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.3148014929	Jul 30 06:20:20 PM PDT 24	Jul 30 06:20:27 PM PDT 24	6014550549 ps
T108	/workspace/coverage/default/43.sysrst_ctrl_smoke.1300114440	Jul 30 06:21:52 PM PDT 24	Jul 30 06:21:59 PM PDT 24	2109987141 ps
T109	/workspace/coverage/default/21.sysrst_ctrl_alert_test.3222427622	Jul 30 06:20:48 PM PDT 24	Jul 30 06:20:51 PM PDT 24	2018384668 ps
T110	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.910064288	Jul 30 06:20:25 PM PDT 24	Jul 30 06:20:27 PM PDT 24	2037824685 ps
T148	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2614313271	Jul 30 06:20:50 PM PDT 24	Jul 30 06:20:57 PM PDT 24	2510214445 ps
T418	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2681100409	Jul 30 06:20:55 PM PDT 24	Jul 30 06:20:57 PM PDT 24	2267963934 ps
T419	/workspace/coverage/default/40.sysrst_ctrl_smoke.2542942305	Jul 30 06:21:48 PM PDT 24	Jul 30 06:21:53 PM PDT 24	2109742773 ps
T192	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1354267378	Jul 30 06:21:35 PM PDT 24	Jul 30 06:21:39 PM PDT 24	3280069792 ps
T171	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.914218850	Jul 30 06:20:22 PM PDT 24	Jul 30 06:20:25 PM PDT 24	4974101487 ps
T420	/workspace/coverage/default/45.sysrst_ctrl_stress_all.924881845	Jul 30 06:22:00 PM PDT 24	Jul 30 06:22:10 PM PDT 24	7378786726 ps
T421	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2099061879	Jul 30 06:20:40 PM PDT 24	Jul 30 06:20:46 PM PDT 24	2082090877 ps
T422	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2770624182	Jul 30 06:22:06 PM PDT 24	Jul 30 06:22:08 PM PDT 24	2635068225 ps
T423	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.342860388	Jul 30 06:21:37 PM PDT 24	Jul 30 06:21:40 PM PDT 24	3636534507 ps
T74	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2928599556	Jul 30 06:19:47 PM PDT 24	Jul 30 06:20:32 PM PDT 24	33820392221 ps
T424	/workspace/coverage/default/28.sysrst_ctrl_stress_all.2719651962	Jul 30 06:21:08 PM PDT 24	Jul 30 06:21:14 PM PDT 24	9071709571 ps
T425	/workspace/coverage/default/8.sysrst_ctrl_alert_test.3791631330	Jul 30 06:20:09 PM PDT 24	Jul 30 06:20:14 PM PDT 24	2017041221 ps
T426	/workspace/coverage/default/14.sysrst_ctrl_smoke.406088847	Jul 30 06:20:22 PM PDT 24	Jul 30 06:20:24 PM PDT 24	2132490353 ps
T272	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2153670889	Jul 30 06:20:53 PM PDT 24	Jul 30 06:21:14 PM PDT 24	37966359715 ps
T427	/workspace/coverage/default/34.sysrst_ctrl_alert_test.3555036036	Jul 30 06:21:29 PM PDT 24	Jul 30 06:21:33 PM PDT 24	2021807832 ps
T149	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.4037500111	Jul 30 06:19:51 PM PDT 24	Jul 30 06:20:03 PM PDT 24	5149400448 ps
T428	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1812518843	Jul 30 06:21:00 PM PDT 24	Jul 30 06:21:02 PM PDT 24	2556806451 ps
T429	/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.2478423137	Jul 30 06:21:19 PM PDT 24	Jul 30 06:21:21 PM PDT 24	2107474610 ps
T203	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2927222080	Jul 30 06:21:48 PM PDT 24	Jul 30 06:26:04 PM PDT 24	103135248660 ps
T430	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2038005952	Jul 30 06:21:58 PM PDT 24	Jul 30 06:22:04 PM PDT 24	2110297316 ps
T172	/workspace/coverage/default/24.sysrst_ctrl_stress_all.1468978481	Jul 30 06:21:05 PM PDT 24	Jul 30 06:23:27 PM PDT 24	155274422405 ps
T431	/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2268768011	Jul 30 06:20:09 PM PDT 24	Jul 30 06:20:12 PM PDT 24	3387774566 ps
T432	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1816043918	Jul 30 06:20:16 PM PDT 24	Jul 30 06:20:27 PM PDT 24	4279700770 ps
T344	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1762511384	Jul 30 06:20:00 PM PDT 24	Jul 30 06:22:54 PM PDT 24	69129836408 ps