Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.04 99.38 96.46 100.00 98.08 98.82 99.71 93.84


Total test records in report: 909
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T384 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.3805199857 Aug 03 05:05:22 PM PDT 24 Aug 03 05:06:11 PM PDT 24 54019781493 ps
T280 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1955187766 Aug 03 05:05:39 PM PDT 24 Aug 03 05:06:59 PM PDT 24 126449697833 ps
T606 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.1857365793 Aug 03 05:04:55 PM PDT 24 Aug 03 05:05:04 PM PDT 24 4111785488 ps
T90 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.4038619637 Aug 03 05:05:15 PM PDT 24 Aug 03 05:10:30 PM PDT 24 1775592048130 ps
T607 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2192856061 Aug 03 05:05:45 PM PDT 24 Aug 03 05:05:52 PM PDT 24 2612918756 ps
T132 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2956805127 Aug 03 05:05:39 PM PDT 24 Aug 03 05:05:43 PM PDT 24 5096256755 ps
T608 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4247192882 Aug 03 05:05:57 PM PDT 24 Aug 03 05:06:31 PM PDT 24 26087007634 ps
T609 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3602273011 Aug 03 05:04:42 PM PDT 24 Aug 03 05:06:23 PM PDT 24 40473907347 ps
T610 /workspace/coverage/default/17.sysrst_ctrl_alert_test.1171381774 Aug 03 05:04:47 PM PDT 24 Aug 03 05:04:51 PM PDT 24 2018444619 ps
T371 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.11399025 Aug 03 05:05:54 PM PDT 24 Aug 03 05:07:48 PM PDT 24 47569529193 ps
T103 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.1551403357 Aug 03 05:05:40 PM PDT 24 Aug 03 05:08:18 PM PDT 24 62653726472 ps
T611 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.626328207 Aug 03 05:05:13 PM PDT 24 Aug 03 05:05:20 PM PDT 24 2253592637 ps
T612 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3964439412 Aug 03 05:04:43 PM PDT 24 Aug 03 05:04:45 PM PDT 24 3310413796 ps
T613 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2623274335 Aug 03 05:04:29 PM PDT 24 Aug 03 05:04:39 PM PDT 24 6231404854 ps
T614 /workspace/coverage/default/40.sysrst_ctrl_pin_access_test.604301484 Aug 03 05:05:37 PM PDT 24 Aug 03 05:05:39 PM PDT 24 2232435824 ps
T615 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2185177141 Aug 03 05:04:24 PM PDT 24 Aug 03 05:05:07 PM PDT 24 65101628493 ps
T616 /workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3641976625 Aug 03 05:05:53 PM PDT 24 Aug 03 05:06:00 PM PDT 24 6322471936 ps
T617 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.137175515 Aug 03 05:05:45 PM PDT 24 Aug 03 05:05:48 PM PDT 24 4238437470 ps
T399 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1397479860 Aug 03 05:06:01 PM PDT 24 Aug 03 05:06:05 PM PDT 24 24218588027 ps
T287 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.2129899372 Aug 03 05:04:51 PM PDT 24 Aug 03 05:05:40 PM PDT 24 82007629674 ps
T618 /workspace/coverage/default/34.sysrst_ctrl_smoke.2523100410 Aug 03 05:05:20 PM PDT 24 Aug 03 05:05:23 PM PDT 24 2119675979 ps
T619 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.87001247 Aug 03 05:04:48 PM PDT 24 Aug 03 05:04:56 PM PDT 24 2990371188 ps
T620 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.2250083212 Aug 03 05:05:38 PM PDT 24 Aug 03 05:05:40 PM PDT 24 2451719837 ps
T621 /workspace/coverage/default/0.sysrst_ctrl_smoke.1153534823 Aug 03 05:04:01 PM PDT 24 Aug 03 05:04:07 PM PDT 24 2110681315 ps
T622 /workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.2433475494 Aug 03 05:04:38 PM PDT 24 Aug 03 05:04:40 PM PDT 24 4799192595 ps
T623 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3235414258 Aug 03 05:04:20 PM PDT 24 Aug 03 05:09:51 PM PDT 24 125178160065 ps
T337 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3675305405 Aug 03 05:04:24 PM PDT 24 Aug 03 05:06:10 PM PDT 24 88536182242 ps
T624 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.849155024 Aug 03 05:05:41 PM PDT 24 Aug 03 05:05:43 PM PDT 24 2039267835 ps
T104 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.4217597565 Aug 03 05:05:19 PM PDT 24 Aug 03 05:05:46 PM PDT 24 109275865107 ps
T625 /workspace/coverage/default/39.sysrst_ctrl_smoke.3833120600 Aug 03 05:05:32 PM PDT 24 Aug 03 05:05:38 PM PDT 24 2111195653 ps
T626 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1588650399 Aug 03 05:04:59 PM PDT 24 Aug 03 05:05:06 PM PDT 24 2614197323 ps
T105 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.592122385 Aug 03 05:05:42 PM PDT 24 Aug 03 05:06:51 PM PDT 24 103284607521 ps
T627 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3752563462 Aug 03 05:06:00 PM PDT 24 Aug 03 05:06:49 PM PDT 24 38274616660 ps
T239 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.3960325617 Aug 03 05:04:07 PM PDT 24 Aug 03 05:04:10 PM PDT 24 5622918666 ps
T628 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1946255119 Aug 03 05:06:11 PM PDT 24 Aug 03 05:07:17 PM PDT 24 116323930284 ps
T629 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.1556814770 Aug 03 05:05:40 PM PDT 24 Aug 03 05:05:54 PM PDT 24 5451987517 ps
T630 /workspace/coverage/default/10.sysrst_ctrl_alert_test.1826825277 Aug 03 05:04:39 PM PDT 24 Aug 03 05:04:45 PM PDT 24 2010151522 ps
T631 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3970955133 Aug 03 05:04:06 PM PDT 24 Aug 03 05:04:07 PM PDT 24 2429787217 ps
T632 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3109830650 Aug 03 05:04:26 PM PDT 24 Aug 03 05:04:28 PM PDT 24 3906314725 ps
T633 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3713852614 Aug 03 05:04:30 PM PDT 24 Aug 03 05:04:31 PM PDT 24 3363735247 ps
T634 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1535711582 Aug 03 05:05:44 PM PDT 24 Aug 03 05:05:51 PM PDT 24 2512209441 ps
T635 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2754239350 Aug 03 05:05:34 PM PDT 24 Aug 03 05:05:43 PM PDT 24 3250040235 ps
T636 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3932998901 Aug 03 05:04:43 PM PDT 24 Aug 03 05:04:46 PM PDT 24 2229817053 ps
T142 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.509882180 Aug 03 05:04:30 PM PDT 24 Aug 03 05:05:28 PM PDT 24 1050882282061 ps
T637 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2397309290 Aug 03 05:04:54 PM PDT 24 Aug 03 05:04:57 PM PDT 24 2188709615 ps
T638 /workspace/coverage/default/20.sysrst_ctrl_alert_test.3231466322 Aug 03 05:04:51 PM PDT 24 Aug 03 05:04:53 PM PDT 24 2028717129 ps
T639 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3150331455 Aug 03 05:05:57 PM PDT 24 Aug 03 05:06:54 PM PDT 24 84576698873 ps
T640 /workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4290149565 Aug 03 05:05:44 PM PDT 24 Aug 03 05:05:46 PM PDT 24 3208117519 ps
T263 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.2588230725 Aug 03 05:05:34 PM PDT 24 Aug 03 05:05:43 PM PDT 24 4722992415 ps
T370 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3114649764 Aug 03 05:04:47 PM PDT 24 Aug 03 05:05:39 PM PDT 24 78903646582 ps
T641 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.3261815783 Aug 03 05:04:51 PM PDT 24 Aug 03 05:04:53 PM PDT 24 2523721876 ps
T642 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.504962746 Aug 03 05:04:49 PM PDT 24 Aug 03 05:04:52 PM PDT 24 3995899934 ps
T643 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1371681824 Aug 03 05:05:15 PM PDT 24 Aug 03 05:05:21 PM PDT 24 4681046655 ps
T644 /workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3929175421 Aug 03 05:04:37 PM PDT 24 Aug 03 05:04:46 PM PDT 24 3418298550 ps
T645 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1997285939 Aug 03 05:05:57 PM PDT 24 Aug 03 05:06:21 PM PDT 24 37025422570 ps
T646 /workspace/coverage/default/11.sysrst_ctrl_smoke.2512238119 Aug 03 05:04:34 PM PDT 24 Aug 03 05:04:36 PM PDT 24 2125578540 ps
T647 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2469272968 Aug 03 05:04:54 PM PDT 24 Aug 03 05:05:01 PM PDT 24 2609224934 ps
T648 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.1775385059 Aug 03 05:04:58 PM PDT 24 Aug 03 05:05:02 PM PDT 24 2521155024 ps
T649 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.4093627602 Aug 03 05:04:06 PM PDT 24 Aug 03 05:04:13 PM PDT 24 2464866341 ps
T133 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.115201432 Aug 03 05:04:35 PM PDT 24 Aug 03 05:04:39 PM PDT 24 4697734867 ps
T650 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.4046730317 Aug 03 05:04:53 PM PDT 24 Aug 03 05:04:59 PM PDT 24 2045249197 ps
T651 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.2657915866 Aug 03 05:04:00 PM PDT 24 Aug 03 05:04:02 PM PDT 24 6711934288 ps
T652 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.2843732044 Aug 03 05:05:40 PM PDT 24 Aug 03 05:05:49 PM PDT 24 3936003446 ps
T281 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.2105029866 Aug 03 05:05:40 PM PDT 24 Aug 03 05:05:46 PM PDT 24 28571877346 ps
T653 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.3570836905 Aug 03 05:04:06 PM PDT 24 Aug 03 05:04:13 PM PDT 24 2510806946 ps
T654 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.4181378769 Aug 03 05:05:26 PM PDT 24 Aug 03 05:05:31 PM PDT 24 3337892058 ps
T655 /workspace/coverage/default/17.sysrst_ctrl_smoke.566194319 Aug 03 05:04:36 PM PDT 24 Aug 03 05:04:39 PM PDT 24 2115283983 ps
T656 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3050611354 Aug 03 05:04:05 PM PDT 24 Aug 03 05:04:06 PM PDT 24 2230504927 ps
T657 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2518993384 Aug 03 05:04:39 PM PDT 24 Aug 03 05:05:20 PM PDT 24 64403055672 ps
T106 /workspace/coverage/default/43.sysrst_ctrl_stress_all.1375290132 Aug 03 05:05:38 PM PDT 24 Aug 03 05:06:12 PM PDT 24 15298801841 ps
T658 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2289221837 Aug 03 05:04:35 PM PDT 24 Aug 03 05:04:42 PM PDT 24 2889600853 ps
T659 /workspace/coverage/default/46.sysrst_ctrl_smoke.3710313010 Aug 03 05:05:47 PM PDT 24 Aug 03 05:05:49 PM PDT 24 2132313824 ps
T660 /workspace/coverage/default/36.sysrst_ctrl_alert_test.1274389504 Aug 03 05:05:32 PM PDT 24 Aug 03 05:05:38 PM PDT 24 2012085300 ps
T661 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2723787845 Aug 03 05:04:13 PM PDT 24 Aug 03 05:04:18 PM PDT 24 2045744944 ps
T143 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3866419073 Aug 03 05:04:35 PM PDT 24 Aug 03 05:04:38 PM PDT 24 6438720464 ps
T662 /workspace/coverage/default/17.sysrst_ctrl_stress_all.1463915595 Aug 03 05:04:43 PM PDT 24 Aug 03 05:05:09 PM PDT 24 11778369850 ps
T663 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3061650705 Aug 03 05:04:49 PM PDT 24 Aug 03 05:04:50 PM PDT 24 3496104578 ps
T176 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.735429977 Aug 03 05:05:29 PM PDT 24 Aug 03 05:06:18 PM PDT 24 41719924660 ps
T664 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.963008420 Aug 03 05:04:53 PM PDT 24 Aug 03 05:05:13 PM PDT 24 69672349985 ps
T665 /workspace/coverage/default/45.sysrst_ctrl_alert_test.1200236353 Aug 03 05:05:46 PM PDT 24 Aug 03 05:05:48 PM PDT 24 2050131919 ps
T666 /workspace/coverage/default/47.sysrst_ctrl_alert_test.2567111574 Aug 03 05:05:46 PM PDT 24 Aug 03 05:05:48 PM PDT 24 2028335186 ps
T667 /workspace/coverage/default/19.sysrst_ctrl_stress_all.3754083577 Aug 03 05:04:52 PM PDT 24 Aug 03 05:05:01 PM PDT 24 12421637414 ps
T668 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3928081555 Aug 03 05:05:35 PM PDT 24 Aug 03 05:05:39 PM PDT 24 2618135129 ps
T669 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.878919323 Aug 03 05:05:29 PM PDT 24 Aug 03 05:05:38 PM PDT 24 3492011906 ps
T282 /workspace/coverage/default/34.sysrst_ctrl_combo_detect.943943447 Aug 03 05:05:20 PM PDT 24 Aug 03 05:06:01 PM PDT 24 59745361678 ps
T670 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.183801841 Aug 03 05:04:07 PM PDT 24 Aug 03 05:04:09 PM PDT 24 2636351948 ps
T266 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3517220110 Aug 03 05:05:36 PM PDT 24 Aug 03 05:06:52 PM PDT 24 59647564278 ps
T671 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1029784180 Aug 03 05:04:24 PM PDT 24 Aug 03 05:04:31 PM PDT 24 2465714234 ps
T288 /workspace/coverage/default/25.sysrst_ctrl_stress_all.3788270982 Aug 03 05:05:00 PM PDT 24 Aug 03 05:07:02 PM PDT 24 46884267476 ps
T672 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2646279952 Aug 03 05:05:01 PM PDT 24 Aug 03 05:06:20 PM PDT 24 117765659618 ps
T144 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3272283971 Aug 03 05:05:34 PM PDT 24 Aug 03 05:05:41 PM PDT 24 4440057677 ps
T673 /workspace/coverage/default/29.sysrst_ctrl_stress_all.877199697 Aug 03 05:05:11 PM PDT 24 Aug 03 05:05:21 PM PDT 24 7412171425 ps
T674 /workspace/coverage/default/28.sysrst_ctrl_stress_all.3769799387 Aug 03 05:05:06 PM PDT 24 Aug 03 05:10:29 PM PDT 24 118690868344 ps
T185 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2988684445 Aug 03 05:05:26 PM PDT 24 Aug 03 05:05:32 PM PDT 24 4433593415 ps
T675 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3617028891 Aug 03 05:05:27 PM PDT 24 Aug 03 05:06:12 PM PDT 24 15728626397 ps
T676 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.2287835041 Aug 03 05:05:00 PM PDT 24 Aug 03 05:05:07 PM PDT 24 4593390928 ps
T677 /workspace/coverage/default/32.sysrst_ctrl_alert_test.3873818242 Aug 03 05:05:21 PM PDT 24 Aug 03 05:05:26 PM PDT 24 2014274477 ps
T678 /workspace/coverage/default/8.sysrst_ctrl_stress_all.4192222189 Aug 03 05:04:24 PM PDT 24 Aug 03 05:05:00 PM PDT 24 14857228713 ps
T679 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.3347365450 Aug 03 05:05:15 PM PDT 24 Aug 03 05:05:19 PM PDT 24 2519442891 ps
T680 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.1975321240 Aug 03 05:05:04 PM PDT 24 Aug 03 05:05:08 PM PDT 24 3708548464 ps
T681 /workspace/coverage/default/11.sysrst_ctrl_stress_all.393387733 Aug 03 05:04:33 PM PDT 24 Aug 03 05:04:58 PM PDT 24 68074219592 ps
T682 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.2536162015 Aug 03 05:05:32 PM PDT 24 Aug 03 05:06:14 PM PDT 24 69121168044 ps
T683 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3649292346 Aug 03 05:04:54 PM PDT 24 Aug 03 05:05:01 PM PDT 24 2512414101 ps
T684 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1282871771 Aug 03 05:06:10 PM PDT 24 Aug 03 05:08:48 PM PDT 24 121477568141 ps
T685 /workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2258279514 Aug 03 05:05:58 PM PDT 24 Aug 03 05:07:30 PM PDT 24 142001899390 ps
T153 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.1630653194 Aug 03 05:05:09 PM PDT 24 Aug 03 05:05:13 PM PDT 24 4848379402 ps
T107 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2766413081 Aug 03 05:05:22 PM PDT 24 Aug 03 05:07:39 PM PDT 24 55062563777 ps
T158 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2988304419 Aug 03 05:05:36 PM PDT 24 Aug 03 05:06:27 PM PDT 24 48122585752 ps
T159 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1579533633 Aug 03 05:05:27 PM PDT 24 Aug 03 05:42:07 PM PDT 24 915145995509 ps
T160 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2266057387 Aug 03 05:05:20 PM PDT 24 Aug 03 05:05:27 PM PDT 24 2611510080 ps
T161 /workspace/coverage/default/49.sysrst_ctrl_stress_all.1966700777 Aug 03 05:05:52 PM PDT 24 Aug 03 05:06:04 PM PDT 24 17766225997 ps
T162 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.4096419894 Aug 03 05:04:31 PM PDT 24 Aug 03 05:04:33 PM PDT 24 2117959475 ps
T163 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2752701154 Aug 03 05:04:34 PM PDT 24 Aug 03 05:04:55 PM PDT 24 20948681009 ps
T164 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.661692838 Aug 03 05:05:05 PM PDT 24 Aug 03 05:07:58 PM PDT 24 129778007325 ps
T165 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.148766655 Aug 03 05:04:47 PM PDT 24 Aug 03 05:04:55 PM PDT 24 2613472776 ps
T686 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1211477350 Aug 03 05:04:36 PM PDT 24 Aug 03 05:05:11 PM PDT 24 15000910358 ps
T368 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2369655748 Aug 03 05:04:41 PM PDT 24 Aug 03 05:06:09 PM PDT 24 106157734070 ps
T687 /workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2073050850 Aug 03 05:05:48 PM PDT 24 Aug 03 05:05:52 PM PDT 24 2473106751 ps
T688 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3632139659 Aug 03 05:04:42 PM PDT 24 Aug 03 05:04:44 PM PDT 24 5165815353 ps
T689 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.2162708140 Aug 03 05:04:06 PM PDT 24 Aug 03 05:04:07 PM PDT 24 2550040293 ps
T690 /workspace/coverage/default/6.sysrst_ctrl_smoke.540470645 Aug 03 05:04:26 PM PDT 24 Aug 03 05:04:29 PM PDT 24 2133623909 ps
T691 /workspace/coverage/default/42.sysrst_ctrl_smoke.842390368 Aug 03 05:05:37 PM PDT 24 Aug 03 05:05:43 PM PDT 24 2109141529 ps
T692 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.3810983792 Aug 03 05:05:46 PM PDT 24 Aug 03 05:05:49 PM PDT 24 3170428538 ps
T693 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3445499012 Aug 03 05:05:53 PM PDT 24 Aug 03 05:06:03 PM PDT 24 3399261706 ps
T694 /workspace/coverage/default/14.sysrst_ctrl_alert_test.636455907 Aug 03 05:04:37 PM PDT 24 Aug 03 05:04:43 PM PDT 24 2015301627 ps
T695 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.3323870209 Aug 03 05:04:43 PM PDT 24 Aug 03 05:04:49 PM PDT 24 2208264153 ps
T289 /workspace/coverage/default/4.sysrst_ctrl_stress_all.1185755978 Aug 03 05:04:12 PM PDT 24 Aug 03 05:07:09 PM PDT 24 152635990991 ps
T696 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.1135631041 Aug 03 05:04:43 PM PDT 24 Aug 03 05:04:47 PM PDT 24 2518300673 ps
T697 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.2228218655 Aug 03 05:04:02 PM PDT 24 Aug 03 05:04:06 PM PDT 24 2374714841 ps
T698 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2631801024 Aug 03 05:04:50 PM PDT 24 Aug 03 05:06:13 PM PDT 24 30766044507 ps
T699 /workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2688209213 Aug 03 05:04:24 PM PDT 24 Aug 03 05:06:13 PM PDT 24 44063380814 ps
T700 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.980305478 Aug 03 05:04:26 PM PDT 24 Aug 03 05:04:32 PM PDT 24 3605847930 ps
T389 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2233895754 Aug 03 05:05:39 PM PDT 24 Aug 03 05:06:18 PM PDT 24 60956909545 ps
T701 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.500232690 Aug 03 05:05:41 PM PDT 24 Aug 03 05:05:44 PM PDT 24 2631217238 ps
T702 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.341449338 Aug 03 05:05:50 PM PDT 24 Aug 03 05:05:52 PM PDT 24 2633833428 ps
T703 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2495042683 Aug 03 05:04:53 PM PDT 24 Aug 03 05:04:56 PM PDT 24 2030844318 ps
T704 /workspace/coverage/default/10.sysrst_ctrl_stress_all.3444563603 Aug 03 05:04:34 PM PDT 24 Aug 03 05:04:39 PM PDT 24 6677103308 ps
T193 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1413065366 Aug 03 05:04:48 PM PDT 24 Aug 03 05:27:45 PM PDT 24 1136198565148 ps
T145 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2326215535 Aug 03 05:04:29 PM PDT 24 Aug 03 05:04:31 PM PDT 24 8923466480 ps
T705 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2360994536 Aug 03 05:05:19 PM PDT 24 Aug 03 05:05:28 PM PDT 24 3240193590 ps
T706 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.331025340 Aug 03 05:05:16 PM PDT 24 Aug 03 05:05:23 PM PDT 24 2462366435 ps
T707 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.66687016 Aug 03 05:05:57 PM PDT 24 Aug 03 05:06:26 PM PDT 24 69826438877 ps
T708 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1376820492 Aug 03 05:05:38 PM PDT 24 Aug 03 05:05:45 PM PDT 24 2613165804 ps
T709 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.907589482 Aug 03 05:05:20 PM PDT 24 Aug 03 05:05:22 PM PDT 24 6639071004 ps
T710 /workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.2271031727 Aug 03 05:04:01 PM PDT 24 Aug 03 05:17:54 PM PDT 24 305220479769 ps
T711 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.1239220918 Aug 03 05:04:39 PM PDT 24 Aug 03 05:04:41 PM PDT 24 2630239126 ps
T712 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2367673641 Aug 03 05:05:38 PM PDT 24 Aug 03 05:05:40 PM PDT 24 2640034823 ps
T713 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1458829800 Aug 03 05:05:46 PM PDT 24 Aug 03 05:05:49 PM PDT 24 2044368139 ps
T154 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.1505220412 Aug 03 05:05:43 PM PDT 24 Aug 03 05:05:49 PM PDT 24 3245588770 ps
T714 /workspace/coverage/default/13.sysrst_ctrl_smoke.2011294693 Aug 03 05:04:32 PM PDT 24 Aug 03 05:04:39 PM PDT 24 2112536123 ps
T715 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2546749620 Aug 03 05:04:13 PM PDT 24 Aug 03 05:04:15 PM PDT 24 2564408238 ps
T716 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.887186659 Aug 03 05:05:43 PM PDT 24 Aug 03 05:05:45 PM PDT 24 10543087452 ps
T717 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.855079097 Aug 03 05:05:14 PM PDT 24 Aug 03 05:05:18 PM PDT 24 2513929538 ps
T718 /workspace/coverage/default/24.sysrst_ctrl_stress_all.93433923 Aug 03 05:04:59 PM PDT 24 Aug 03 05:05:21 PM PDT 24 8905524537 ps
T719 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.2636375761 Aug 03 05:05:41 PM PDT 24 Aug 03 05:05:43 PM PDT 24 3452830676 ps
T720 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.6030746 Aug 03 05:03:58 PM PDT 24 Aug 03 05:04:02 PM PDT 24 2529764037 ps
T721 /workspace/coverage/default/40.sysrst_ctrl_smoke.1058722667 Aug 03 05:05:42 PM PDT 24 Aug 03 05:05:44 PM PDT 24 2128618264 ps
T722 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.830135997 Aug 03 05:05:26 PM PDT 24 Aug 03 05:05:28 PM PDT 24 2523081634 ps
T170 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.592037031 Aug 03 05:04:36 PM PDT 24 Aug 03 05:04:38 PM PDT 24 2493230804 ps
T723 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2645891867 Aug 03 05:05:02 PM PDT 24 Aug 03 05:05:04 PM PDT 24 7900385383 ps
T724 /workspace/coverage/default/7.sysrst_ctrl_alert_test.2554888353 Aug 03 05:04:19 PM PDT 24 Aug 03 05:04:21 PM PDT 24 2032093192 ps
T725 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.2438077575 Aug 03 05:05:00 PM PDT 24 Aug 03 05:05:04 PM PDT 24 2474756471 ps
T726 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.3527778924 Aug 03 05:04:39 PM PDT 24 Aug 03 05:04:44 PM PDT 24 4319621968 ps
T727 /workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1577750145 Aug 03 05:04:47 PM PDT 24 Aug 03 05:04:48 PM PDT 24 2154971988 ps
T728 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1684218436 Aug 03 05:04:23 PM PDT 24 Aug 03 05:04:24 PM PDT 24 2154626517 ps
T729 /workspace/coverage/default/9.sysrst_ctrl_smoke.2805308065 Aug 03 05:04:26 PM PDT 24 Aug 03 05:04:30 PM PDT 24 2114020627 ps
T171 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.4028058584 Aug 03 05:04:50 PM PDT 24 Aug 03 05:04:53 PM PDT 24 2703291396 ps
T730 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1691033179 Aug 03 05:05:57 PM PDT 24 Aug 03 05:09:19 PM PDT 24 76655325765 ps
T108 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3467770567 Aug 03 05:04:10 PM PDT 24 Aug 03 05:06:45 PM PDT 24 256558098165 ps
T227 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.308621179 Aug 03 05:05:30 PM PDT 24 Aug 03 05:05:33 PM PDT 24 6115208821 ps
T228 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.1029969287 Aug 03 05:04:32 PM PDT 24 Aug 03 05:04:38 PM PDT 24 3514033243 ps
T229 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4206624759 Aug 03 05:05:53 PM PDT 24 Aug 03 05:06:02 PM PDT 24 11442340217 ps
T230 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.517656931 Aug 03 05:05:58 PM PDT 24 Aug 03 05:07:47 PM PDT 24 39533285450 ps
T231 /workspace/coverage/default/6.sysrst_ctrl_alert_test.1419644041 Aug 03 05:04:18 PM PDT 24 Aug 03 05:04:21 PM PDT 24 2015601422 ps
T232 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1102853827 Aug 03 05:05:59 PM PDT 24 Aug 03 05:06:27 PM PDT 24 39106837334 ps
T233 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3270574121 Aug 03 05:04:37 PM PDT 24 Aug 03 05:04:44 PM PDT 24 5077436551 ps
T234 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.993474591 Aug 03 05:05:39 PM PDT 24 Aug 03 05:05:43 PM PDT 24 2456853345 ps
T235 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.3861624464 Aug 03 05:05:41 PM PDT 24 Aug 03 05:05:50 PM PDT 24 3778078450 ps
T236 /workspace/coverage/default/41.sysrst_ctrl_stress_all.3813963350 Aug 03 05:05:39 PM PDT 24 Aug 03 05:11:45 PM PDT 24 339221803884 ps
T731 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2933310610 Aug 03 05:05:06 PM PDT 24 Aug 03 05:05:07 PM PDT 24 2700012438 ps
T732 /workspace/coverage/default/3.sysrst_ctrl_alert_test.414183978 Aug 03 05:04:14 PM PDT 24 Aug 03 05:04:16 PM PDT 24 2029462080 ps
T733 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.605855021 Aug 03 05:05:44 PM PDT 24 Aug 03 05:05:51 PM PDT 24 2465989610 ps
T311 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.4108574653 Aug 03 05:04:07 PM PDT 24 Aug 03 05:04:22 PM PDT 24 22061073524 ps
T734 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3406049532 Aug 03 05:04:05 PM PDT 24 Aug 03 05:04:13 PM PDT 24 2866945415 ps
T735 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.246164041 Aug 03 05:04:24 PM PDT 24 Aug 03 05:04:26 PM PDT 24 3012359452 ps
T736 /workspace/coverage/default/4.sysrst_ctrl_smoke.3728094005 Aug 03 05:04:19 PM PDT 24 Aug 03 05:04:21 PM PDT 24 2163587225 ps
T737 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.4028625960 Aug 03 05:05:42 PM PDT 24 Aug 03 05:05:46 PM PDT 24 2458592077 ps
T738 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2181044419 Aug 03 05:05:08 PM PDT 24 Aug 03 05:05:09 PM PDT 24 2491246254 ps
T739 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.2756203054 Aug 03 05:04:48 PM PDT 24 Aug 03 05:04:55 PM PDT 24 2461194624 ps
T740 /workspace/coverage/default/3.sysrst_ctrl_smoke.4150446733 Aug 03 05:04:10 PM PDT 24 Aug 03 05:04:12 PM PDT 24 2136287482 ps
T400 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1324626332 Aug 03 05:05:17 PM PDT 24 Aug 03 05:05:58 PM PDT 24 69751406815 ps
T741 /workspace/coverage/default/8.sysrst_ctrl_smoke.4050073150 Aug 03 05:04:20 PM PDT 24 Aug 03 05:04:26 PM PDT 24 2112022487 ps
T146 /workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.243987547 Aug 03 05:05:33 PM PDT 24 Aug 03 05:05:40 PM PDT 24 5515353678 ps
T742 /workspace/coverage/default/18.sysrst_ctrl_stress_all.2678688461 Aug 03 05:04:49 PM PDT 24 Aug 03 05:04:55 PM PDT 24 9240133040 ps
T743 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.627075772 Aug 03 05:05:52 PM PDT 24 Aug 03 05:05:59 PM PDT 24 2511387980 ps
T744 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3662274534 Aug 03 05:05:36 PM PDT 24 Aug 03 05:05:46 PM PDT 24 4006205281 ps
T745 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2409816909 Aug 03 05:05:54 PM PDT 24 Aug 03 05:05:58 PM PDT 24 3271012274 ps
T746 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.2304326050 Aug 03 05:04:01 PM PDT 24 Aug 03 05:04:05 PM PDT 24 2438584854 ps
T747 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.20043057 Aug 03 05:05:08 PM PDT 24 Aug 03 05:05:09 PM PDT 24 2249137729 ps
T748 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.2799257844 Aug 03 05:04:32 PM PDT 24 Aug 03 05:04:35 PM PDT 24 4007670879 ps
T749 /workspace/coverage/default/45.sysrst_ctrl_stress_all.147183313 Aug 03 05:05:40 PM PDT 24 Aug 03 05:10:50 PM PDT 24 133142067819 ps
T750 /workspace/coverage/default/23.sysrst_ctrl_smoke.1674274351 Aug 03 05:05:00 PM PDT 24 Aug 03 05:05:06 PM PDT 24 2107775429 ps
T751 /workspace/coverage/default/14.sysrst_ctrl_smoke.844452032 Aug 03 05:04:37 PM PDT 24 Aug 03 05:04:41 PM PDT 24 2115391221 ps
T752 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.4158995975 Aug 03 05:04:48 PM PDT 24 Aug 03 05:04:52 PM PDT 24 2458121918 ps
T753 /workspace/coverage/default/27.sysrst_ctrl_smoke.4290123728 Aug 03 05:05:01 PM PDT 24 Aug 03 05:05:03 PM PDT 24 2123314458 ps
T754 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1629178964 Aug 03 05:05:38 PM PDT 24 Aug 03 05:06:00 PM PDT 24 42691760270 ps
T755 /workspace/coverage/default/19.sysrst_ctrl_smoke.3974879779 Aug 03 05:04:46 PM PDT 24 Aug 03 05:04:52 PM PDT 24 2110488668 ps
T756 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.2290896125 Aug 03 05:04:55 PM PDT 24 Aug 03 05:04:59 PM PDT 24 2457341545 ps
T757 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.3214469788 Aug 03 05:05:26 PM PDT 24 Aug 03 05:06:41 PM PDT 24 118008061197 ps
T758 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3061215781 Aug 03 05:05:52 PM PDT 24 Aug 03 05:07:53 PM PDT 24 111001412180 ps
T759 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.432927450 Aug 03 05:05:45 PM PDT 24 Aug 03 05:05:48 PM PDT 24 3416301447 ps
T372 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.224311371 Aug 03 05:05:27 PM PDT 24 Aug 03 05:07:49 PM PDT 24 273543504183 ps
T760 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.4262541636 Aug 03 05:05:44 PM PDT 24 Aug 03 05:05:46 PM PDT 24 2184838854 ps
T761 /workspace/coverage/default/35.sysrst_ctrl_smoke.1282248416 Aug 03 05:05:22 PM PDT 24 Aug 03 05:05:29 PM PDT 24 2112257968 ps
T762 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.288192536 Aug 03 05:04:11 PM PDT 24 Aug 03 05:04:15 PM PDT 24 2514577646 ps
T763 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.4084133023 Aug 03 05:04:30 PM PDT 24 Aug 03 05:04:36 PM PDT 24 3799430605 ps
T764 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1605736631 Aug 03 05:05:47 PM PDT 24 Aug 03 05:05:53 PM PDT 24 3970592290 ps
T765 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.4277941864 Aug 03 05:04:41 PM PDT 24 Aug 03 05:04:45 PM PDT 24 2720632852 ps
T766 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2137269332 Aug 03 05:05:32 PM PDT 24 Aug 03 05:05:37 PM PDT 24 3572817239 ps
T767 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1270879184 Aug 03 05:05:20 PM PDT 24 Aug 03 05:05:29 PM PDT 24 3179739774 ps
T768 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.534659718 Aug 03 05:04:47 PM PDT 24 Aug 03 05:04:49 PM PDT 24 2274441597 ps
T769 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3114962579 Aug 03 05:05:53 PM PDT 24 Aug 03 05:06:49 PM PDT 24 42564144783 ps
T770 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.818590260 Aug 03 05:04:36 PM PDT 24 Aug 03 05:04:38 PM PDT 24 2527193199 ps
T771 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3160640978 Aug 03 05:05:46 PM PDT 24 Aug 03 05:05:50 PM PDT 24 2613556457 ps
T772 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3185106497 Aug 03 05:05:12 PM PDT 24 Aug 03 05:10:04 PM PDT 24 117868050412 ps
T382 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3420457421 Aug 03 05:04:08 PM PDT 24 Aug 03 05:06:43 PM PDT 24 115361636163 ps
T265 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.1094764742 Aug 03 05:06:00 PM PDT 24 Aug 03 05:06:05 PM PDT 24 5605022509 ps
T773 /workspace/coverage/default/42.sysrst_ctrl_pin_override_test.170634676 Aug 03 05:05:38 PM PDT 24 Aug 03 05:05:40 PM PDT 24 2522840305 ps
T774 /workspace/coverage/default/45.sysrst_ctrl_smoke.3228437386 Aug 03 05:05:39 PM PDT 24 Aug 03 05:05:45 PM PDT 24 2109578589 ps
T775 /workspace/coverage/default/9.sysrst_ctrl_alert_test.2623682759 Aug 03 05:04:27 PM PDT 24 Aug 03 05:04:33 PM PDT 24 2015145313 ps
T776 /workspace/coverage/default/40.sysrst_ctrl_alert_test.82757295 Aug 03 05:05:37 PM PDT 24 Aug 03 05:05:39 PM PDT 24 2046525534 ps
T338 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3488873149 Aug 03 05:05:07 PM PDT 24 Aug 03 05:06:04 PM PDT 24 108445895413 ps
T777 /workspace/coverage/default/13.sysrst_ctrl_stress_all.2241655013 Aug 03 05:04:32 PM PDT 24 Aug 03 05:04:41 PM PDT 24 6736952394 ps
T778 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1344854713 Aug 03 05:04:48 PM PDT 24 Aug 03 05:04:52 PM PDT 24 2614160556 ps
T779 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3766165557 Aug 03 05:04:48 PM PDT 24 Aug 03 05:05:31 PM PDT 24 56194588669 ps
T780 /workspace/coverage/default/28.sysrst_ctrl_alert_test.1860174518 Aug 03 05:05:11 PM PDT 24 Aug 03 05:05:17 PM PDT 24 2009794558 ps
T781 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.879627113 Aug 03 05:04:33 PM PDT 24 Aug 03 05:04:36 PM PDT 24 3726627165 ps
T782 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.3422360233 Aug 03 05:05:42 PM PDT 24 Aug 03 05:05:49 PM PDT 24 2440264579 ps
T783 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.3899795155 Aug 03 05:05:07 PM PDT 24 Aug 03 05:05:08 PM PDT 24 3007926685 ps
T784 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.120550140 Aug 03 05:05:31 PM PDT 24 Aug 03 05:05:35 PM PDT 24 2468734437 ps
T785 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1086156703 Aug 03 05:05:47 PM PDT 24 Aug 03 05:05:56 PM PDT 24 3118727270 ps
T786 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.538374422 Aug 03 05:05:00 PM PDT 24 Aug 03 05:05:04 PM PDT 24 2472568386 ps
T787 /workspace/coverage/default/46.sysrst_ctrl_alert_test.436413440 Aug 03 05:05:53 PM PDT 24 Aug 03 05:05:59 PM PDT 24 2014784588 ps
T788 /workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.166844593 Aug 03 05:05:28 PM PDT 24 Aug 03 05:07:02 PM PDT 24 36928612456 ps
T789 /workspace/coverage/cover_reg_top/38.sysrst_ctrl_intr_test.3310832352 Aug 03 04:41:20 PM PDT 24 Aug 03 04:41:24 PM PDT 24 2014568879 ps
T19 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.4155780462 Aug 03 04:41:13 PM PDT 24 Aug 03 04:41:21 PM PDT 24 7491110273 ps
T28 /workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.3956528128 Aug 03 04:40:59 PM PDT 24 Aug 03 04:42:52 PM PDT 24 42430599457 ps
T29 /workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.3115083047 Aug 03 04:41:14 PM PDT 24 Aug 03 04:41:28 PM PDT 24 11811598839 ps
T299 /workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.1058499733 Aug 03 04:41:22 PM PDT 24 Aug 03 04:41:24 PM PDT 24 2056566323 ps
T290 /workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.588847822 Aug 03 04:41:13 PM PDT 24 Aug 03 04:41:16 PM PDT 24 2104817835 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%