Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.04	99.38	96.46	100.00	98.08	98.82	99.71	93.84

Total tests in report: 909

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
55.70	55.70	78.56	78.56	64.86	64.86	65.18	65.18	17.31	17.31	79.00	79.00	67.92	67.92	17.07	17.07	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1195035151
66.48	10.78	86.08	7.52	73.79	8.92	67.01	1.83	46.79	29.49	86.65	7.65	80.64	12.72	24.43	7.36	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.922958416
74.85	8.36	91.32	5.24	84.28	10.49	95.89	28.88	46.79	0.00	91.72	5.06	82.47	1.83	31.46	7.03	/workspace/coverage/default/30.sysrst_ctrl_stress_all.2166866056
79.25	4.40	92.82	1.49	86.58	2.30	96.58	0.68	48.72	1.92	92.64	0.92	87.86	5.39	49.56	18.10	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1597705071
81.87	2.62	93.94	1.12	88.27	1.69	96.58	0.00	62.82	14.10	93.86	1.22	88.05	0.19	49.56	0.00	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1123381931
84.35	2.48	95.52	1.59	90.22	1.95	97.03	0.46	71.15	8.33	95.34	1.48	91.52	3.47	49.67	0.11	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1027854589
86.44	2.09	96.70	1.18	91.18	0.96	97.03	0.00	79.49	8.33	96.30	0.96	94.22	2.70	50.16	0.49	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1909337759
88.51	2.07	97.42	0.73	92.01	0.83	97.03	0.00	83.33	3.85	96.82	0.52	95.18	0.96	57.80	7.63	/workspace/coverage/default/27.sysrst_ctrl_stress_all.2796164096
90.00	1.49	97.42	0.00	92.04	0.03	97.03	0.00	83.33	0.00	96.86	0.04	95.18	0.00	68.16	10.36	/workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3488873149
91.23	1.23	97.50	0.07	93.28	1.24	97.72	0.68	83.33	0.00	96.97	0.11	95.18	0.00	74.65	6.49	/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.3956528128
92.36	1.12	97.93	0.43	93.58	0.30	97.72	0.00	87.18	3.85	97.34	0.37	96.15	0.96	76.61	1.96	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2426672053
93.10	0.75	98.23	0.30	93.86	0.28	97.72	0.00	89.10	1.92	97.49	0.15	96.82	0.67	78.52	1.91	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3902751529
93.70	0.60	98.23	0.00	93.98	0.13	97.72	0.00	89.10	0.00	97.49	0.00	96.92	0.10	82.50	3.98	/workspace/coverage/default/38.sysrst_ctrl_stress_all.2439246297
94.29	0.59	98.38	0.15	94.16	0.18	97.72	0.00	91.03	1.92	97.67	0.18	97.40	0.48	83.70	1.20	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.970947395
94.60	0.30	98.51	0.13	94.31	0.15	97.72	0.00	92.31	1.28	97.86	0.18	97.78	0.39	83.70	0.00	/workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.1453317998
94.88	0.28	98.51	0.00	94.34	0.03	99.32	1.60	92.31	0.00	97.86	0.00	97.88	0.10	83.97	0.27	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.2414428249
95.16	0.28	98.60	0.09	94.39	0.05	99.32	0.00	93.59	1.28	97.97	0.11	98.07	0.19	84.19	0.22	/workspace/coverage/default/1.sysrst_ctrl_stress_all.360831060
95.42	0.25	98.73	0.13	94.44	0.05	99.32	0.00	94.87	1.28	98.04	0.07	98.27	0.19	84.24	0.05	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3223537789
95.63	0.21	98.73	0.00	94.44	0.00	99.32	0.00	94.87	0.00	98.04	0.00	98.27	0.00	85.71	1.47	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2265939017
95.81	0.19	98.73	0.00	95.30	0.86	99.32	0.00	94.87	0.00	98.04	0.00	98.27	0.00	86.15	0.44	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_errors.588847822
95.99	0.18	98.81	0.07	95.58	0.28	99.66	0.34	94.87	0.00	98.15	0.11	98.36	0.10	86.48	0.33	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2008579811
96.16	0.17	98.81	0.00	95.68	0.10	99.66	0.00	94.87	0.00	98.15	0.00	99.04	0.67	86.91	0.44	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_aliasing.2499160924
96.31	0.15	98.88	0.07	95.73	0.05	99.66	0.00	95.51	0.64	98.26	0.11	99.23	0.19	86.91	0.00	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1559078016
96.46	0.15	98.96	0.07	95.78	0.05	99.66	0.00	95.51	0.00	98.26	0.00	99.23	0.00	87.84	0.93	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.378408604
96.59	0.13	99.01	0.06	95.80	0.03	99.66	0.00	96.15	0.64	98.34	0.07	99.33	0.10	87.84	0.00	/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1505220412
96.72	0.13	99.05	0.04	95.83	0.03	99.66	0.00	96.79	0.64	98.37	0.04	99.42	0.10	87.90	0.05	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.3796606755
96.84	0.12	99.09	0.04	95.85	0.03	99.66	0.00	97.44	0.64	98.41	0.04	99.52	0.10	87.90	0.00	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.308621179
96.96	0.12	99.12	0.04	95.88	0.03	99.66	0.00	98.08	0.64	98.45	0.04	99.61	0.10	87.90	0.00	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3926842937
97.06	0.10	99.14	0.02	95.88	0.00	99.66	0.00	98.08	0.00	98.45	0.00	99.61	0.00	88.60	0.71	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3263776399
97.15	0.09	99.14	0.00	95.88	0.00	99.66	0.00	98.08	0.00	98.45	0.00	99.61	0.00	89.20	0.60	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2842039601
97.22	0.08	99.14	0.00	95.88	0.00	99.66	0.00	98.08	0.00	98.45	0.00	99.61	0.00	89.75	0.55	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2833083554
97.28	0.06	99.20	0.06	95.96	0.08	99.89	0.23	98.08	0.00	98.48	0.04	99.61	0.00	89.75	0.00	/workspace/coverage/default/15.sysrst_ctrl_alert_test.335034489
97.34	0.05	99.20	0.00	95.96	0.00	99.89	0.00	98.08	0.00	98.48	0.00	99.61	0.00	90.13	0.38	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.224311371
97.39	0.05	99.20	0.00	95.96	0.00	99.89	0.00	98.08	0.00	98.48	0.00	99.61	0.00	90.51	0.38	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.866541214
97.44	0.05	99.23	0.04	96.06	0.10	99.89	0.00	98.08	0.00	98.56	0.07	99.71	0.10	90.57	0.05	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.3871780335
97.49	0.05	99.23	0.00	96.06	0.00	99.89	0.00	98.08	0.00	98.56	0.00	99.71	0.00	90.89	0.33	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1026850326
97.53	0.04	99.23	0.00	96.06	0.00	99.89	0.00	98.08	0.00	98.56	0.00	99.71	0.00	91.17	0.27	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3675305405
97.56	0.03	99.23	0.00	96.06	0.00	99.89	0.00	98.08	0.00	98.56	0.00	99.71	0.00	91.38	0.22	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.1311897418
97.59	0.03	99.23	0.00	96.06	0.00	99.89	0.00	98.08	0.00	98.56	0.00	99.71	0.00	91.60	0.22	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.1994046395
97.62	0.03	99.27	0.04	96.08	0.03	99.89	0.00	98.08	0.00	98.60	0.04	99.71	0.00	91.71	0.11	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.128511543
97.65	0.03	99.27	0.00	96.11	0.03	99.89	0.00	98.08	0.00	98.60	0.00	99.71	0.00	91.88	0.16	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.1873908865
97.67	0.02	99.27	0.00	96.11	0.00	99.89	0.00	98.08	0.00	98.60	0.00	99.71	0.00	92.04	0.16	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.2536162015
97.69	0.02	99.27	0.00	96.11	0.00	99.89	0.00	98.08	0.00	98.60	0.00	99.71	0.00	92.20	0.16	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2633389058
97.72	0.02	99.29	0.02	96.16	0.05	99.89	0.00	98.08	0.00	98.63	0.04	99.71	0.00	92.26	0.05	/workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2917297142
97.74	0.02	99.29	0.00	96.18	0.03	99.89	0.00	98.08	0.00	98.63	0.00	99.71	0.00	92.37	0.11	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.4019042397
97.75	0.02	99.29	0.00	96.18	0.00	100.00	0.11	98.08	0.00	98.63	0.00	99.71	0.00	92.37	0.00	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2469153206
97.77	0.02	99.33	0.04	96.18	0.00	100.00	0.00	98.08	0.00	98.71	0.07	99.71	0.00	92.37	0.00	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.4028058584
97.78	0.02	99.37	0.04	96.18	0.00	100.00	0.00	98.08	0.00	98.78	0.07	99.71	0.00	92.37	0.00	/workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.3383680450
97.80	0.02	99.37	0.00	96.18	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.48	0.11	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3420457421
97.81	0.02	99.37	0.00	96.18	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.58	0.11	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.2369655748
97.83	0.02	99.37	0.00	96.18	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.69	0.11	/workspace/coverage/default/25.sysrst_ctrl_stress_all.3788270982
97.85	0.02	99.37	0.00	96.18	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.80	0.11	/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.11399025
97.86	0.02	99.37	0.00	96.18	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	92.91	0.11	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.845237391
97.88	0.02	99.37	0.00	96.18	0.00	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	93.02	0.11	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.4175628516
97.89	0.01	99.37	0.00	96.28	0.10	100.00	0.00	98.08	0.00	98.78	0.00	99.71	0.00	93.02	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3849161224
97.90	0.01	99.38	0.02	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.04	99.71	0.00	93.02	0.00	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2689784868
97.91	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.08	0.05	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_hw_reset.746612460
97.91	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.13	0.05	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.1806826621
97.92	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.18	0.05	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2333889741
97.93	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.24	0.05	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3011012897
97.94	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.29	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.382708522
97.95	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.35	0.05	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3114649764
97.95	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.40	0.05	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.326246181
97.96	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.46	0.05	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1987924719
97.97	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.51	0.05	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.4217597565
97.98	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.57	0.05	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.1283810092
97.98	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.62	0.05	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.509882180
97.99	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.68	0.05	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3304911999
98.00	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.73	0.05	/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.258909696
98.01	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.78	0.05	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3364457939
98.02	0.01	99.38	0.00	96.28	0.00	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.84	0.05	/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.2528966512
98.02	0.01	99.38	0.00	96.33	0.05	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.84	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2684473351
98.03	0.01	99.38	0.00	96.39	0.05	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.84	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.4255153919
98.03	0.01	99.38	0.00	96.41	0.03	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.84	0.00	/workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.398589251
98.04	0.01	99.38	0.00	96.44	0.03	100.00	0.00	98.08	0.00	98.82	0.00	99.71	0.00	93.84	0.00	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3517220110

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.344198302
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.974630915
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1550317531
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.460163588
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2464956725
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.828562630
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.3797580450
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.127030984
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2505167523
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.539943288
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.277378230
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.376596922
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3894217125
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.2358696060
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1999273167
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.2094243548
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1631842725
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.2434516883
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2691207636
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.466993288
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.556363669
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1143983868
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.3057732064
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.4077134063
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.1129725063
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.932341276
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/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.212192913
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2259234925
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2137269332
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.1551403357
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1629178964
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1723158174
/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2588230725
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3268026425
/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2220325667
/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.980543849
/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.291823957
/workspace/coverage/default/39.sysrst_ctrl_smoke.3833120600
/workspace/coverage/default/39.sysrst_ctrl_stress_all.1424756137
/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.957517688
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.887186659
/workspace/coverage/default/4.sysrst_ctrl_alert_test.2088751741
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.995380466
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3699364543
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1182747948
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2546749620
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2659436537
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.842871993
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.132938771
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2650972371
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1218954720
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.288192536
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2008667942
/workspace/coverage/default/4.sysrst_ctrl_smoke.3728094005
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1185755978
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1476757922
/workspace/coverage/default/40.sysrst_ctrl_alert_test.82757295
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.432927450
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1817578361
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.2988304419
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2650320737
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.2192856061
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.605855021
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.604301484
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1065262241
/workspace/coverage/default/40.sysrst_ctrl_smoke.1058722667
/workspace/coverage/default/40.sysrst_ctrl_stress_all.1707777746
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.4252476276
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2578507817
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1183508211
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.727493571
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.592122385
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.31690046
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.3928081555
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.2356820091
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.557203716
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2294758431
/workspace/coverage/default/41.sysrst_ctrl_smoke.3029103296
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3813963350
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2188066147
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3272283971
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2238636144
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.3662274534
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.1584312802
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2233895754
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.137175515
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2843732044
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.1669613000
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1886880588
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.4262541636
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.170634676
/workspace/coverage/default/42.sysrst_ctrl_smoke.842390368
/workspace/coverage/default/42.sysrst_ctrl_stress_all.264718278
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.243987547
/workspace/coverage/default/43.sysrst_ctrl_alert_test.4166902485
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.114476404
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2583430075
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1430965881
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2440455452
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2250083212
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1376820492
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1861971211
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.643464779
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.2833155450
/workspace/coverage/default/43.sysrst_ctrl_smoke.934390528
/workspace/coverage/default/43.sysrst_ctrl_stress_all.1375290132
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3990896622
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2956805127
/workspace/coverage/default/44.sysrst_ctrl_alert_test.2162481576
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.4290149565
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2522111225
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3726989639
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.253531737
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2636375761
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3955389134
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.4028625960
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.703627822
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.1535711582
/workspace/coverage/default/44.sysrst_ctrl_smoke.75333578
/workspace/coverage/default/44.sysrst_ctrl_stress_all.545947035
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1955187766
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.646425684
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1200236353
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3334859047
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.2105029866
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2003242976
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3778470493
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.3861624464
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.500232690
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.993474591
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.849155024
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.45143833
/workspace/coverage/default/45.sysrst_ctrl_smoke.3228437386
/workspace/coverage/default/45.sysrst_ctrl_stress_all.147183313
/workspace/coverage/default/46.sysrst_ctrl_alert_test.436413440
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1086156703
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1182084569
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.3348679543
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.3810983792
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.341449338
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2681001789
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1458829800
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3631881082
/workspace/coverage/default/46.sysrst_ctrl_smoke.3710313010
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3061215781
/workspace/coverage/default/47.sysrst_ctrl_alert_test.2567111574
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.184166928
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2923220094
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.449512404
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2409816909
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3142352032
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3160640978
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3201102938
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.903822488
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4217225134
/workspace/coverage/default/47.sysrst_ctrl_smoke.3935815940
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1315910027
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1466040088
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.3641976625
/workspace/coverage/default/48.sysrst_ctrl_alert_test.2931028899
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2996998084
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.314081724
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3244556651
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1605736631
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2543553920
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2558095019
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2073050850
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1200940647
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3010273557
/workspace/coverage/default/48.sysrst_ctrl_smoke.2312658824
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2131850855
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.4206624759
/workspace/coverage/default/49.sysrst_ctrl_alert_test.930235401
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3445499012
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1206249240
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.221800095
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3823795980
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1094764742
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.3277693135
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3874914210
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1701639010
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.627075772
/workspace/coverage/default/49.sysrst_ctrl_smoke.2772028986
/workspace/coverage/default/49.sysrst_ctrl_stress_all.1966700777
/workspace/coverage/default/5.sysrst_ctrl_alert_test.1467806473
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.281115899
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2262419574
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.4293745264
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2439107417
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3443599271
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.152593424
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2803978111
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.2723787845
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1306610713
/workspace/coverage/default/5.sysrst_ctrl_smoke.566361261
/workspace/coverage/default/5.sysrst_ctrl_stress_all.1910252072
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2292479599
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3114962579
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4216389069
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3318238656
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.695111702
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.1038009065
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.628139346
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1419644041
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3235414258
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1846235809
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2185177141
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.3713852614
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3899364458
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.412831832
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1221792292
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.1684218436
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1166018366
/workspace/coverage/default/6.sysrst_ctrl_smoke.540470645
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2623274335
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.85793661
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.208583189
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.951148473
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3924848917
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.4172647328
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4247192882
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.4162513023
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1282871771
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.517656931
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2554888353
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.980305478
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.919025031
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.887601598
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1604839160
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3551357748
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2740322589
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.377435674
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.2823110516
/workspace/coverage/default/7.sysrst_ctrl_smoke.1191668859
/workspace/coverage/default/7.sysrst_ctrl_stress_all.3226353778
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.115395421
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4218368079
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.93087210
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1864173174
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.185638311
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3585886760
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1691033179
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2632217689
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.1339405729
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3150331455
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2288784662
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.246164041
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.3980130921
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.1103864030
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.3854489609
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.684480306
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2241768960
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.878350432
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1753587739
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.4261246946
/workspace/coverage/default/8.sysrst_ctrl_smoke.4050073150
/workspace/coverage/default/8.sysrst_ctrl_stress_all.4192222189
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.3109830650
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.1102853827
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2258279514
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.1397479860
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.886245691
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2768942574
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1997285939
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3012026181
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2623682759
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.22703993
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1364213381
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2688209213
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.2962052800
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2799257844
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.4246902292
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1029784180
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.263122054
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1286429090
/workspace/coverage/default/9.sysrst_ctrl_smoke.2805308065
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3953440014
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.404310098
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.2027081414
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2597971960
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3009520121
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1946255119
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3752563462
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.66687016

Total test records in report: 909

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1195035151	Aug 03 05:05:07 PM PDT 24	Aug 03 05:05:42 PM PDT 24	65323040018 ps
T6	/workspace/coverage/default/20.sysrst_ctrl_stress_all.4022398965	Aug 03 05:04:51 PM PDT 24	Aug 03 05:12:05 PM PDT 24	184472266461 ps
T7	/workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.2071492384	Aug 03 05:05:14 PM PDT 24	Aug 03 05:05:17 PM PDT 24	2480600793 ps
T13	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3822389900	Aug 03 05:04:31 PM PDT 24	Aug 03 05:04:36 PM PDT 24	2520807136 ps
T14	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3298075009	Aug 03 05:04:49 PM PDT 24	Aug 03 05:05:06 PM PDT 24	26113043489 ps
T15	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2469153206	Aug 03 05:04:34 PM PDT 24	Aug 03 05:04:36 PM PDT 24	2096815464 ps
T16	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.214180950	Aug 03 05:04:36 PM PDT 24	Aug 03 05:04:40 PM PDT 24	2452397508 ps
T17	/workspace/coverage/default/35.sysrst_ctrl_pin_override_test.2008579811	Aug 03 05:05:26 PM PDT 24	Aug 03 05:05:28 PM PDT 24	2528404633 ps
T2	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.2445532838	Aug 03 05:04:53 PM PDT 24	Aug 03 05:04:59 PM PDT 24	3273697873 ps
T18	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.702060268	Aug 03 05:05:32 PM PDT 24	Aug 03 05:08:28 PM PDT 24	275720642872 ps
T27	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.2583430075	Aug 03 05:05:43 PM PDT 24	Aug 03 05:06:22 PM PDT 24	27808983757 ps
T30	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1127585210	Aug 03 05:04:54 PM PDT 24	Aug 03 05:04:57 PM PDT 24	5747361773 ps
T52	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.842871993	Aug 03 05:04:14 PM PDT 24	Aug 03 05:04:22 PM PDT 24	3181439150 ps
T3	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.1266039055	Aug 03 05:05:22 PM PDT 24	Aug 03 05:05:24 PM PDT 24	3213573257 ps
T53	/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.1351924533	Aug 03 05:05:30 PM PDT 24	Aug 03 05:05:32 PM PDT 24	2664032742 ps
T25	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3471387251	Aug 03 05:04:49 PM PDT 24	Aug 03 05:04:52 PM PDT 24	3469067634 ps
T24	/workspace/coverage/default/30.sysrst_ctrl_stress_all.2166866056	Aug 03 05:05:13 PM PDT 24	Aug 03 05:05:26 PM PDT 24	9118289260 ps
T8	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.3686445954	Aug 03 05:04:47 PM PDT 24	Aug 03 05:04:53 PM PDT 24	3020814524 ps
T26	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3223537789	Aug 03 05:04:56 PM PDT 24	Aug 03 05:05:55 PM PDT 24	22831791883 ps
T54	/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.2234242726	Aug 03 05:05:32 PM PDT 24	Aug 03 05:05:39 PM PDT 24	2610530770 ps
T4	/workspace/coverage/default/27.sysrst_ctrl_edge_detect.2888718084	Aug 03 05:05:05 PM PDT 24	Aug 03 05:06:16 PM PDT 24	230268117234 ps
T65	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1306610713	Aug 03 05:04:12 PM PDT 24	Aug 03 05:04:14 PM PDT 24	2532993126 ps
T5	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.3304911999	Aug 03 05:05:55 PM PDT 24	Aug 03 05:12:45 PM PDT 24	161987601580 ps
T124	/workspace/coverage/default/22.sysrst_ctrl_smoke.58296494	Aug 03 05:04:54 PM PDT 24	Aug 03 05:05:01 PM PDT 24	2111383125 ps
T9	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.1148261891	Aug 03 05:04:40 PM PDT 24	Aug 03 05:04:45 PM PDT 24	6908073893 ps
T10	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.2626657595	Aug 03 05:04:00 PM PDT 24	Aug 03 05:04:05 PM PDT 24	3145441928 ps
T11	/workspace/coverage/default/26.sysrst_ctrl_edge_detect.2902659240	Aug 03 05:05:00 PM PDT 24	Aug 03 05:05:06 PM PDT 24	2675464357 ps
T45	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3726989639	Aug 03 05:05:38 PM PDT 24	Aug 03 05:06:16 PM PDT 24	27335513693 ps
T62	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3874914210	Aug 03 05:05:54 PM PDT 24	Aug 03 05:05:56 PM PDT 24	2467215928 ps
T76	/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.377435674	Aug 03 05:04:19 PM PDT 24	Aug 03 05:04:22 PM PDT 24	2103709526 ps
T77	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1753587739	Aug 03 05:04:23 PM PDT 24	Aug 03 05:04:25 PM PDT 24	2249844741 ps
T46	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.22703993	Aug 03 05:04:25 PM PDT 24	Aug 03 05:04:35 PM PDT 24	3747501176 ps
T66	/workspace/coverage/default/27.sysrst_ctrl_pin_override_test.553167533	Aug 03 05:04:59 PM PDT 24	Aug 03 05:05:06 PM PDT 24	2512983459 ps
T12	/workspace/coverage/default/27.sysrst_ctrl_stress_all.2796164096	Aug 03 05:05:06 PM PDT 24	Aug 03 05:19:05 PM PDT 24	303261673167 ps
T226	/workspace/coverage/default/15.sysrst_ctrl_alert_test.335034489	Aug 03 05:04:39 PM PDT 24	Aug 03 05:04:45 PM PDT 24	2015719545 ps
T57	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.789701743	Aug 03 05:05:31 PM PDT 24	Aug 03 05:05:34 PM PDT 24	3425641126 ps
T33	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3263776399	Aug 03 05:04:49 PM PDT 24	Aug 03 05:06:57 PM PDT 24	106000286778 ps
T47	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2925373457	Aug 03 05:04:52 PM PDT 24	Aug 03 05:05:29 PM PDT 24	28281706892 ps
T22	/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.404310098	Aug 03 05:04:36 PM PDT 24	Aug 03 05:04:40 PM PDT 24	6571989849 ps
T58	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2549239215	Aug 03 05:04:51 PM PDT 24	Aug 03 05:05:42 PM PDT 24	78189081183 ps
T23	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1027854589	Aug 03 05:05:46 PM PDT 24	Aug 03 05:05:48 PM PDT 24	5108267281 ps
T129	/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.898585830	Aug 03 05:05:30 PM PDT 24	Aug 03 05:05:33 PM PDT 24	4773403677 ps
T34	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2440662723	Aug 03 05:04:37 PM PDT 24	Aug 03 05:09:22 PM PDT 24	141387020079 ps
T93	/workspace/coverage/default/29.sysrst_ctrl_combo_detect.1114832678	Aug 03 05:05:15 PM PDT 24	Aug 03 05:06:23 PM PDT 24	87154393791 ps
T31	/workspace/coverage/default/15.sysrst_ctrl_stress_all.3664009091	Aug 03 05:04:41 PM PDT 24	Aug 03 05:05:07 PM PDT 24	10096081588 ps
T36	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.128511543	Aug 03 05:04:11 PM PDT 24	Aug 03 05:04:17 PM PDT 24	4377878649 ps
T48	/workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3552011684	Aug 03 05:05:15 PM PDT 24	Aug 03 05:05:25 PM PDT 24	3567040477 ps
T67	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1286429090	Aug 03 05:04:24 PM PDT 24	Aug 03 05:04:27 PM PDT 24	2532819232 ps
T49	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.2659436537	Aug 03 05:04:10 PM PDT 24	Aug 03 05:04:22 PM PDT 24	31862811305 ps
T134	/workspace/coverage/default/5.sysrst_ctrl_smoke.566361261	Aug 03 05:04:12 PM PDT 24	Aug 03 05:04:15 PM PDT 24	2116153964 ps
T195	/workspace/coverage/default/11.sysrst_ctrl_alert_test.912125438	Aug 03 05:04:32 PM PDT 24	Aug 03 05:04:34 PM PDT 24	2037285767 ps
T196	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1969206873	Aug 03 05:05:01 PM PDT 24	Aug 03 05:05:06 PM PDT 24	2517238754 ps
T197	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3081345138	Aug 03 05:04:04 PM PDT 24	Aug 03 05:04:10 PM PDT 24	2084036863 ps
T198	/workspace/coverage/default/7.sysrst_ctrl_smoke.1191668859	Aug 03 05:04:20 PM PDT 24	Aug 03 05:04:26 PM PDT 24	2112301531 ps
T199	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4217225134	Aug 03 05:05:47 PM PDT 24	Aug 03 05:05:50 PM PDT 24	2538992844 ps
T56	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.4204408925	Aug 03 05:04:36 PM PDT 24	Aug 03 05:04:39 PM PDT 24	10108866118 ps
T35	/workspace/coverage/default/24.sysrst_ctrl_combo_detect.3629397259	Aug 03 05:04:55 PM PDT 24	Aug 03 05:05:12 PM PDT 24	46120198005 ps
T109	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.2825831042	Aug 03 05:04:53 PM PDT 24	Aug 03 05:04:54 PM PDT 24	2326897556 ps
T32	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.4005329105	Aug 03 05:05:14 PM PDT 24	Aug 03 05:06:40 PM PDT 24	49439902700 ps
T94	/workspace/coverage/default/48.sysrst_ctrl_combo_detect.314081724	Aug 03 05:05:47 PM PDT 24	Aug 03 05:10:01 PM PDT 24	96559369664 ps
T68	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3443599271	Aug 03 05:04:21 PM PDT 24	Aug 03 05:04:23 PM PDT 24	3245275185 ps
T110	/workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.2709375320	Aug 03 05:05:12 PM PDT 24	Aug 03 05:05:15 PM PDT 24	2625377363 ps
T69	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.378408604	Aug 03 05:06:00 PM PDT 24	Aug 03 05:10:47 PM PDT 24	178158736030 ps
T78	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.2987980500	Aug 03 05:05:08 PM PDT 24	Aug 03 05:05:33 PM PDT 24	123317037337 ps
T111	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.651297384	Aug 03 05:04:41 PM PDT 24	Aug 03 05:04:48 PM PDT 24	2515993336 ps
T112	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2923220094	Aug 03 05:05:46 PM PDT 24	Aug 03 05:09:03 PM PDT 24	75937767424 ps
T70	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2842039601	Aug 03 05:04:53 PM PDT 24	Aug 03 05:05:49 PM PDT 24	87595633969 ps
T285	/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.54288474	Aug 03 05:05:19 PM PDT 24	Aug 03 05:05:21 PM PDT 24	2567192337 ps
T63	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2220325667	Aug 03 05:05:29 PM PDT 24	Aug 03 05:05:31 PM PDT 24	2492289972 ps
T122	/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3902751529	Aug 03 05:06:12 PM PDT 24	Aug 03 05:08:55 PM PDT 24	60599233541 ps
T269	/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.2768942574	Aug 03 05:05:57 PM PDT 24	Aug 03 05:09:40 PM PDT 24	86202216741 ps
T64	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.2250452010	Aug 03 05:05:20 PM PDT 24	Aug 03 05:05:25 PM PDT 24	2487355178 ps
T286	/workspace/coverage/default/35.sysrst_ctrl_pin_access_test.1739279121	Aug 03 05:05:22 PM PDT 24	Aug 03 05:05:26 PM PDT 24	2112020746 ps
T59	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.1597705071	Aug 03 05:04:07 PM PDT 24	Aug 03 05:06:55 PM PDT 24	127522351949 ps
T60	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.652200823	Aug 03 05:05:29 PM PDT 24	Aug 03 05:05:32 PM PDT 24	4254554417 ps
T50	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.4252476276	Aug 03 05:05:37 PM PDT 24	Aug 03 05:06:24 PM PDT 24	38528412653 ps
T51	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.866541214	Aug 03 05:04:11 PM PDT 24	Aug 03 05:04:46 PM PDT 24	51882749288 ps
T38	/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.922958416	Aug 03 05:04:26 PM PDT 24	Aug 03 05:05:55 PM PDT 24	37398386008 ps
T186	/workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.3209139458	Aug 03 05:04:53 PM PDT 24	Aug 03 05:04:55 PM PDT 24	2655268244 ps
T187	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.3113750858	Aug 03 05:04:58 PM PDT 24	Aug 03 05:05:07 PM PDT 24	3184340886 ps
T188	/workspace/coverage/default/27.sysrst_ctrl_alert_test.883120604	Aug 03 05:05:06 PM PDT 24	Aug 03 05:05:09 PM PDT 24	2031915512 ps
T189	/workspace/coverage/default/34.sysrst_ctrl_alert_test.48327649	Aug 03 05:05:23 PM PDT 24	Aug 03 05:05:25 PM PDT 24	2031539152 ps
T190	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1969511097	Aug 03 05:05:03 PM PDT 24	Aug 03 05:05:05 PM PDT 24	2227732410 ps
T191	/workspace/coverage/default/38.sysrst_ctrl_stress_all.2439246297	Aug 03 05:05:34 PM PDT 24	Aug 03 05:09:18 PM PDT 24	278423906985 ps
T192	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1960066430	Aug 03 05:04:06 PM PDT 24	Aug 03 05:04:10 PM PDT 24	2272715698 ps
T61	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1212486661	Aug 03 05:04:59 PM PDT 24	Aug 03 05:05:07 PM PDT 24	3643585029 ps
T71	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.631357642	Aug 03 05:04:59 PM PDT 24	Aug 03 05:05:31 PM PDT 24	52481862913 ps
T277	/workspace/coverage/default/3.sysrst_ctrl_stress_all.1538677406	Aug 03 05:04:12 PM PDT 24	Aug 03 05:06:41 PM PDT 24	247737288136 ps
T404	/workspace/coverage/default/31.sysrst_ctrl_smoke.2785700226	Aug 03 05:05:13 PM PDT 24	Aug 03 05:05:14 PM PDT 24	2229556944 ps
T405	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.2978236576	Aug 03 05:05:14 PM PDT 24	Aug 03 05:05:18 PM PDT 24	2615998870 ps
T406	/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1861971211	Aug 03 05:05:34 PM PDT 24	Aug 03 05:05:36 PM PDT 24	2505954441 ps
T407	/workspace/coverage/default/44.sysrst_ctrl_smoke.75333578	Aug 03 05:05:41 PM PDT 24	Aug 03 05:05:42 PM PDT 24	2126306431 ps
T44	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.724395742	Aug 03 05:05:21 PM PDT 24	Aug 03 05:05:29 PM PDT 24	2770372831 ps
T85	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3012026181	Aug 03 05:06:00 PM PDT 24	Aug 03 05:07:29 PM PDT 24	34506320797 ps
T393	/workspace/coverage/default/12.sysrst_ctrl_combo_detect.982743360	Aug 03 05:04:33 PM PDT 24	Aug 03 05:05:23 PM PDT 24	40741452104 ps
T408	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2812777678	Aug 03 05:05:21 PM PDT 24	Aug 03 05:05:27 PM PDT 24	3677471265 ps
T354	/workspace/coverage/default/39.sysrst_ctrl_stress_all.1424756137	Aug 03 05:05:39 PM PDT 24	Aug 03 05:11:33 PM PDT 24	134268605754 ps
T409	/workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.840096271	Aug 03 05:04:49 PM PDT 24	Aug 03 05:04:53 PM PDT 24	2482807107 ps
T410	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3513087948	Aug 03 05:05:21 PM PDT 24	Aug 03 05:05:26 PM PDT 24	3379709712 ps
T324	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2681001789	Aug 03 05:05:47 PM PDT 24	Aug 03 05:05:52 PM PDT 24	2471642778 ps
T321	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.4170912828	Aug 03 05:05:32 PM PDT 24	Aug 03 05:08:03 PM PDT 24	56939442103 ps
T411	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.387915347	Aug 03 05:04:39 PM PDT 24	Aug 03 05:04:41 PM PDT 24	2490564339 ps
T412	/workspace/coverage/default/37.sysrst_ctrl_alert_test.3187110364	Aug 03 05:05:37 PM PDT 24	Aug 03 05:05:39 PM PDT 24	2042213764 ps
T40	/workspace/coverage/default/37.sysrst_ctrl_stress_all.2907385124	Aug 03 05:05:42 PM PDT 24	Aug 03 05:06:14 PM PDT 24	15073578209 ps
T394	/workspace/coverage/default/21.sysrst_ctrl_stress_all.2734383645	Aug 03 05:04:52 PM PDT 24	Aug 03 05:04:55 PM PDT 24	18133097582 ps
T413	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.5332218	Aug 03 05:05:33 PM PDT 24	Aug 03 05:05:43 PM PDT 24	3903803100 ps
T414	/workspace/coverage/default/39.sysrst_ctrl_pin_override_test.291823957	Aug 03 05:05:29 PM PDT 24	Aug 03 05:05:31 PM PDT 24	2542411031 ps
T415	/workspace/coverage/default/26.sysrst_ctrl_alert_test.2961038308	Aug 03 05:05:08 PM PDT 24	Aug 03 05:05:14 PM PDT 24	2011421404 ps
T416	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.159150153	Aug 03 05:04:49 PM PDT 24	Aug 03 05:04:53 PM PDT 24	2517335509 ps
T417	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.4021122420	Aug 03 05:05:33 PM PDT 24	Aug 03 05:05:38 PM PDT 24	2766450758 ps
T418	/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.1834947486	Aug 03 05:05:16 PM PDT 24	Aug 03 05:05:23 PM PDT 24	2250775923 ps
T331	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2578507817	Aug 03 05:05:45 PM PDT 24	Aug 03 05:05:47 PM PDT 24	6820996715 ps
T419	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3955389134	Aug 03 05:05:45 PM PDT 24	Aug 03 05:05:52 PM PDT 24	2610520909 ps
T72	/workspace/coverage/default/36.sysrst_ctrl_stress_all.36142847	Aug 03 05:05:26 PM PDT 24	Aug 03 05:05:51 PM PDT 24	14332575329 ps
T420	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1318476696	Aug 03 05:05:28 PM PDT 24	Aug 03 05:05:35 PM PDT 24	2507308128 ps
T41	/workspace/coverage/default/3.sysrst_ctrl_edge_detect.1762274723	Aug 03 05:04:12 PM PDT 24	Aug 03 05:04:17 PM PDT 24	5434824748 ps
T240	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.2333889741	Aug 03 05:03:58 PM PDT 24	Aug 03 05:03:59 PM PDT 24	2561501843 ps
T97	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.3499217542	Aug 03 05:05:25 PM PDT 24	Aug 03 05:05:33 PM PDT 24	25396302473 ps
T241	/workspace/coverage/default/29.sysrst_ctrl_smoke.2261199384	Aug 03 05:05:18 PM PDT 24	Aug 03 05:05:20 PM PDT 24	2125864207 ps
T242	/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.643464779	Aug 03 05:05:43 PM PDT 24	Aug 03 05:05:49 PM PDT 24	2159536327 ps
T243	/workspace/coverage/default/24.sysrst_ctrl_smoke.2124323543	Aug 03 05:04:55 PM PDT 24	Aug 03 05:04:57 PM PDT 24	2134901300 ps
T73	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.3796606755	Aug 03 05:05:32 PM PDT 24	Aug 03 05:06:13 PM PDT 24	522667118449 ps
T98	/workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.1987924719	Aug 03 05:05:05 PM PDT 24	Aug 03 05:06:54 PM PDT 24	86480148329 ps
T147	/workspace/coverage/default/30.sysrst_ctrl_alert_test.4119751854	Aug 03 05:05:13 PM PDT 24	Aug 03 05:05:18 PM PDT 24	2016156225 ps
T148	/workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.202337222	Aug 03 05:05:28 PM PDT 24	Aug 03 05:05:29 PM PDT 24	2495727836 ps
T149	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.3831206595	Aug 03 05:04:59 PM PDT 24	Aug 03 05:05:05 PM PDT 24	3826250372 ps
T150	/workspace/coverage/default/48.sysrst_ctrl_alert_test.2931028899	Aug 03 05:05:49 PM PDT 24	Aug 03 05:05:54 PM PDT 24	2012252388 ps
T151	/workspace/coverage/default/33.sysrst_ctrl_stress_all.274352683	Aug 03 05:05:28 PM PDT 24	Aug 03 05:05:31 PM PDT 24	11963009266 ps
T37	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.1909337759	Aug 03 05:05:45 PM PDT 24	Aug 03 05:06:41 PM PDT 24	21795712463 ps
T99	/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1846235809	Aug 03 05:04:20 PM PDT 24	Aug 03 05:05:28 PM PDT 24	42624277454 ps
T152	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.2120344241	Aug 03 05:04:04 PM PDT 24	Aug 03 05:04:11 PM PDT 24	2474960892 ps
T421	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.135155995	Aug 03 05:05:24 PM PDT 24	Aug 03 05:05:28 PM PDT 24	2619732255 ps
T422	/workspace/coverage/default/38.sysrst_ctrl_alert_test.4277508628	Aug 03 05:05:28 PM PDT 24	Aug 03 05:05:30 PM PDT 24	2040650027 ps
T283	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2522111225	Aug 03 05:05:38 PM PDT 24	Aug 03 05:06:16 PM PDT 24	59579136122 ps
T423	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3778470493	Aug 03 05:05:40 PM PDT 24	Aug 03 05:05:41 PM PDT 24	2790412903 ps
T95	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.2889019477	Aug 03 05:05:20 PM PDT 24	Aug 03 05:05:24 PM PDT 24	3545466716 ps
T424	/workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.3868299155	Aug 03 05:04:04 PM PDT 24	Aug 03 05:04:12 PM PDT 24	2453422760 ps
T316	/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1466040088	Aug 03 05:05:49 PM PDT 24	Aug 03 05:06:04 PM PDT 24	11213980118 ps
T425	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.646425684	Aug 03 05:05:40 PM PDT 24	Aug 03 05:05:47 PM PDT 24	5210540367 ps
T390	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.3016691001	Aug 03 05:04:40 PM PDT 24	Aug 03 05:06:59 PM PDT 24	57067149608 ps
T42	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1870369793	Aug 03 05:05:22 PM PDT 24	Aug 03 05:05:24 PM PDT 24	3846664950 ps
T426	/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1886880588	Aug 03 05:05:39 PM PDT 24	Aug 03 05:05:41 PM PDT 24	2479747051 ps
T427	/workspace/coverage/default/20.sysrst_ctrl_pin_override_test.3539682216	Aug 03 05:04:48 PM PDT 24	Aug 03 05:04:52 PM PDT 24	2513507108 ps
T292	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.2414428249	Aug 03 05:04:00 PM PDT 24	Aug 03 05:05:45 PM PDT 24	42012203810 ps
T312	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.1636298464	Aug 03 05:05:01 PM PDT 24	Aug 03 05:05:03 PM PDT 24	2762357404 ps
T313	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3201102938	Aug 03 05:05:53 PM PDT 24	Aug 03 05:05:59 PM PDT 24	2445700113 ps
T314	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.2833083554	Aug 03 05:04:50 PM PDT 24	Aug 03 05:14:10 PM PDT 24	208573797800 ps
T315	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.152593424	Aug 03 05:04:18 PM PDT 24	Aug 03 05:04:22 PM PDT 24	2615359249 ps
T39	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2689784868	Aug 03 05:05:36 PM PDT 24	Aug 03 05:05:46 PM PDT 24	4028532308 ps
T217	/workspace/coverage/default/19.sysrst_ctrl_pin_override_test.195699010	Aug 03 05:04:43 PM PDT 24	Aug 03 05:04:47 PM PDT 24	2517247442 ps
T218	/workspace/coverage/default/21.sysrst_ctrl_smoke.4092324963	Aug 03 05:04:56 PM PDT 24	Aug 03 05:05:02 PM PDT 24	2110026295 ps
T100	/workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2107792395	Aug 03 05:05:28 PM PDT 24	Aug 03 05:07:53 PM PDT 24	108067053338 ps
T219	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2597971960	Aug 03 05:05:58 PM PDT 24	Aug 03 05:07:35 PM PDT 24	74336744265 ps
T220	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.3535957726	Aug 03 05:04:35 PM PDT 24	Aug 03 05:04:37 PM PDT 24	2475532086 ps
T221	/workspace/coverage/default/7.sysrst_ctrl_stress_all.3226353778	Aug 03 05:04:20 PM PDT 24	Aug 03 05:04:55 PM PDT 24	14360102170 ps
T222	/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.263122054	Aug 03 05:04:24 PM PDT 24	Aug 03 05:04:26 PM PDT 24	2091970998 ps
T223	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.45143833	Aug 03 05:05:45 PM PDT 24	Aug 03 05:05:53 PM PDT 24	2537704976 ps
T224	/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1206249240	Aug 03 05:05:52 PM PDT 24	Aug 03 05:06:58 PM PDT 24	49148613058 ps
T428	/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.703627822	Aug 03 05:05:40 PM PDT 24	Aug 03 05:05:41 PM PDT 24	2231734860 ps
T429	/workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3158601509	Aug 03 05:04:47 PM PDT 24	Aug 03 05:04:49 PM PDT 24	2683393929 ps
T327	/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3116266005	Aug 03 05:04:37 PM PDT 24	Aug 03 05:04:39 PM PDT 24	2531184113 ps
T332	/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4218368079	Aug 03 05:04:21 PM PDT 24	Aug 03 05:04:24 PM PDT 24	3255267145 ps
T293	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.2525918344	Aug 03 05:04:12 PM PDT 24	Aug 03 05:05:06 PM PDT 24	22012677650 ps
T430	/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2422183872	Aug 03 05:04:51 PM PDT 24	Aug 03 05:04:58 PM PDT 24	2116131243 ps
T431	/workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3091891426	Aug 03 05:05:24 PM PDT 24	Aug 03 05:05:27 PM PDT 24	2625515482 ps
T432	/workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.525297378	Aug 03 05:05:01 PM PDT 24	Aug 03 05:05:08 PM PDT 24	2610833854 ps
T270	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.887601598	Aug 03 05:04:24 PM PDT 24	Aug 03 05:06:12 PM PDT 24	41863126386 ps
T96	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3401196014	Aug 03 05:04:49 PM PDT 24	Aug 03 05:04:53 PM PDT 24	3145241052 ps
T174	/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.115395421	Aug 03 05:04:20 PM PDT 24	Aug 03 05:06:22 PM PDT 24	46884995706 ps
T433	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.878350432	Aug 03 05:04:19 PM PDT 24	Aug 03 05:04:27 PM PDT 24	2460073724 ps
T434	/workspace/coverage/default/1.sysrst_ctrl_smoke.904179625	Aug 03 05:03:59 PM PDT 24	Aug 03 05:04:05 PM PDT 24	2111287975 ps
T268	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.4216389069	Aug 03 05:05:52 PM PDT 24	Aug 03 05:06:46 PM PDT 24	20833256300 ps
T328	/workspace/coverage/default/0.sysrst_ctrl_pin_override_test.303053274	Aug 03 05:03:59 PM PDT 24	Aug 03 05:04:06 PM PDT 24	2513702210 ps
T435	/workspace/coverage/default/13.sysrst_ctrl_alert_test.2974851824	Aug 03 05:04:36 PM PDT 24	Aug 03 05:04:39 PM PDT 24	2046551790 ps
T436	/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.2380169627	Aug 03 05:05:26 PM PDT 24	Aug 03 05:05:28 PM PDT 24	2488412253 ps
T437	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.2839534229	Aug 03 05:04:33 PM PDT 24	Aug 03 05:04:36 PM PDT 24	2496133907 ps
T317	/workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.2845541733	Aug 03 05:05:10 PM PDT 24	Aug 03 05:05:12 PM PDT 24	3017332558 ps
T329	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.804952566	Aug 03 05:05:21 PM PDT 24	Aug 03 05:05:24 PM PDT 24	2532699824 ps
T271	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3318238656	Aug 03 05:05:52 PM PDT 24	Aug 03 05:07:40 PM PDT 24	43308532024 ps
T284	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.1817578361	Aug 03 05:05:33 PM PDT 24	Aug 03 05:06:37 PM PDT 24	100365499982 ps
T396	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3822260160	Aug 03 05:04:37 PM PDT 24	Aug 03 05:04:55 PM PDT 24	59127195332 ps
T438	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3629616405	Aug 03 05:03:58 PM PDT 24	Aug 03 05:04:00 PM PDT 24	2548911519 ps
T439	/workspace/coverage/default/1.sysrst_ctrl_alert_test.3470876566	Aug 03 05:04:05 PM PDT 24	Aug 03 05:04:11 PM PDT 24	2010243077 ps
T440	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.2386258826	Aug 03 05:05:03 PM PDT 24	Aug 03 05:05:08 PM PDT 24	3113266112 ps
T441	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1182747948	Aug 03 05:04:13 PM PDT 24	Aug 03 05:04:15 PM PDT 24	2211712789 ps
T442	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.112502102	Aug 03 05:05:20 PM PDT 24	Aug 03 05:05:22 PM PDT 24	2627813841 ps
T294	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.3097941845	Aug 03 05:04:08 PM PDT 24	Aug 03 05:05:03 PM PDT 24	22014228360 ps
T443	/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1200940647	Aug 03 05:05:49 PM PDT 24	Aug 03 05:05:51 PM PDT 24	2128417490 ps
T444	/workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.577373409	Aug 03 05:05:01 PM PDT 24	Aug 03 05:05:05 PM PDT 24	2619994217 ps
T123	/workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.605951074	Aug 03 05:04:59 PM PDT 24	Aug 03 05:08:00 PM PDT 24	290149044452 ps
T272	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.886245691	Aug 03 05:05:58 PM PDT 24	Aug 03 05:06:34 PM PDT 24	44669566139 ps
T445	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.456493166	Aug 03 05:04:40 PM PDT 24	Aug 03 05:04:43 PM PDT 24	2522472515 ps
T43	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.109936412	Aug 03 05:04:43 PM PDT 24	Aug 03 05:04:47 PM PDT 24	3865275095 ps
T446	/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.3823795980	Aug 03 05:05:52 PM PDT 24	Aug 03 05:05:55 PM PDT 24	4044842068 ps
T125	/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2503489501	Aug 03 05:05:30 PM PDT 24	Aug 03 05:07:22 PM PDT 24	43515769465 ps
T447	/workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.2135872366	Aug 03 05:05:00 PM PDT 24	Aug 03 05:05:04 PM PDT 24	3166211615 ps
T74	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1559078016	Aug 03 05:05:53 PM PDT 24	Aug 03 05:06:00 PM PDT 24	6807409860 ps
T135	/workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.651331033	Aug 03 05:04:59 PM PDT 24	Aug 03 05:06:10 PM PDT 24	27265617123 ps
T136	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.684480306	Aug 03 05:04:24 PM PDT 24	Aug 03 05:04:26 PM PDT 24	3203372664 ps
T137	/workspace/coverage/default/33.sysrst_ctrl_smoke.4052535754	Aug 03 05:05:19 PM PDT 24	Aug 03 05:05:22 PM PDT 24	2120004648 ps
T138	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.633749373	Aug 03 05:05:13 PM PDT 24	Aug 03 05:05:16 PM PDT 24	2174911771 ps
T139	/workspace/coverage/default/42.sysrst_ctrl_alert_test.2238636144	Aug 03 05:05:38 PM PDT 24	Aug 03 05:05:41 PM PDT 24	2021222884 ps
T75	/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1910957738	Aug 03 05:05:15 PM PDT 24	Aug 03 05:05:18 PM PDT 24	5885644355 ps
T140	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1701639010	Aug 03 05:05:55 PM PDT 24	Aug 03 05:05:57 PM PDT 24	2230021155 ps
T141	/workspace/coverage/default/37.sysrst_ctrl_smoke.1052572856	Aug 03 05:05:37 PM PDT 24	Aug 03 05:05:43 PM PDT 24	2112876832 ps
T82	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3926842937	Aug 03 05:04:20 PM PDT 24	Aug 03 05:06:30 PM PDT 24	365662442678 ps
T209	/workspace/coverage/default/38.sysrst_ctrl_smoke.3901845661	Aug 03 05:05:36 PM PDT 24	Aug 03 05:05:38 PM PDT 24	2131325283 ps
T210	/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.208583189	Aug 03 05:05:53 PM PDT 24	Aug 03 05:07:17 PM PDT 24	36142723047 ps
T211	/workspace/coverage/default/49.sysrst_ctrl_smoke.2772028986	Aug 03 05:05:53 PM PDT 24	Aug 03 05:05:55 PM PDT 24	2122860566 ps
T212	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.628139346	Aug 03 05:05:59 PM PDT 24	Aug 03 05:07:03 PM PDT 24	51749051711 ps
T213	/workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.1537597282	Aug 03 05:04:42 PM PDT 24	Aug 03 05:04:49 PM PDT 24	2618864345 ps
T214	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.221800095	Aug 03 05:05:52 PM PDT 24	Aug 03 05:06:09 PM PDT 24	25100893922 ps
T215	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1166018366	Aug 03 05:04:20 PM PDT 24	Aug 03 05:04:24 PM PDT 24	2515903806 ps
T194	/workspace/coverage/default/9.sysrst_ctrl_stress_all.3953440014	Aug 03 05:04:26 PM PDT 24	Aug 03 05:04:35 PM PDT 24	13606001481 ps
T126	/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.212192913	Aug 03 05:05:34 PM PDT 24	Aug 03 05:05:38 PM PDT 24	7582079805 ps
T448	/workspace/coverage/default/15.sysrst_ctrl_smoke.1698624324	Aug 03 05:04:43 PM PDT 24	Aug 03 05:04:45 PM PDT 24	2123402448 ps
T318	/workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.3919178733	Aug 03 05:04:42 PM PDT 24	Aug 03 05:04:47 PM PDT 24	3621708471 ps
T449	/workspace/coverage/default/43.sysrst_ctrl_smoke.934390528	Aug 03 05:05:47 PM PDT 24	Aug 03 05:05:49 PM PDT 24	2121382064 ps
T450	/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2050577178	Aug 03 05:03:59 PM PDT 24	Aug 03 05:04:00 PM PDT 24	2157643174 ps
T359	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.382708522	Aug 03 05:04:46 PM PDT 24	Aug 03 05:06:13 PM PDT 24	132819188378 ps
T451	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1851893243	Aug 03 05:04:49 PM PDT 24	Aug 03 05:04:50 PM PDT 24	2530648137 ps
T155	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.2292479599	Aug 03 05:04:21 PM PDT 24	Aug 03 05:05:46 PM PDT 24	35205480581 ps
T452	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1992412099	Aug 03 05:05:20 PM PDT 24	Aug 03 05:05:22 PM PDT 24	2272826249 ps
T156	/workspace/coverage/default/16.sysrst_ctrl_edge_detect.1343545610	Aug 03 05:04:37 PM PDT 24	Aug 03 05:04:44 PM PDT 24	3107775895 ps
T453	/workspace/coverage/default/26.sysrst_ctrl_stress_all.4206576742	Aug 03 05:05:00 PM PDT 24	Aug 03 05:05:07 PM PDT 24	9105567318 ps
T454	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.3527360197	Aug 03 05:04:47 PM PDT 24	Aug 03 05:04:48 PM PDT 24	2792862786 ps
T455	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.1754221644	Aug 03 05:05:21 PM PDT 24	Aug 03 05:05:24 PM PDT 24	2141360093 ps
T323	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3142352032	Aug 03 05:05:48 PM PDT 24	Aug 03 05:23:03 PM PDT 24	395524179570 ps
T456	/workspace/coverage/default/30.sysrst_ctrl_smoke.4169124357	Aug 03 05:05:21 PM PDT 24	Aug 03 05:05:27 PM PDT 24	2114807850 ps
T101	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1642014110	Aug 03 05:04:54 PM PDT 24	Aug 03 05:08:12 PM PDT 24	168133141113 ps
T457	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3268026425	Aug 03 05:05:34 PM PDT 24	Aug 03 05:05:37 PM PDT 24	2631686874 ps
T91	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1476757922	Aug 03 05:04:12 PM PDT 24	Aug 03 05:04:17 PM PDT 24	9901330713 ps
T207	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2543553920	Aug 03 05:05:47 PM PDT 24	Aug 03 05:05:56 PM PDT 24	5127118974 ps
T458	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.2882395282	Aug 03 05:04:42 PM PDT 24	Aug 03 05:04:48 PM PDT 24	2612015252 ps
T274	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.1072249347	Aug 03 05:04:10 PM PDT 24	Aug 03 05:04:45 PM PDT 24	26585337307 ps
T459	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2241768960	Aug 03 05:04:24 PM PDT 24	Aug 03 05:04:26 PM PDT 24	2646440180 ps
T460	/workspace/coverage/default/2.sysrst_ctrl_stress_all.2533108094	Aug 03 05:04:05 PM PDT 24	Aug 03 05:04:11 PM PDT 24	13772752331 ps
T127	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.3618171784	Aug 03 05:04:31 PM PDT 24	Aug 03 05:04:33 PM PDT 24	6745835751 ps
T461	/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3909739243	Aug 03 05:05:28 PM PDT 24	Aug 03 05:05:34 PM PDT 24	2229535966 ps
T356	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2262419574	Aug 03 05:04:19 PM PDT 24	Aug 03 05:08:34 PM PDT 24	201101581324 ps
T92	/workspace/coverage/default/23.sysrst_ctrl_stress_all.3458254459	Aug 03 05:05:00 PM PDT 24	Aug 03 05:12:28 PM PDT 24	1150584193935 ps
T462	/workspace/coverage/default/2.sysrst_ctrl_smoke.3693061184	Aug 03 05:04:08 PM PDT 24	Aug 03 05:04:14 PM PDT 24	2111981795 ps
T463	/workspace/coverage/default/19.sysrst_ctrl_alert_test.3126210349	Aug 03 05:04:49 PM PDT 24	Aug 03 05:04:52 PM PDT 24	2016811307 ps
T464	/workspace/coverage/default/12.sysrst_ctrl_ec_pwr_on_rst.2335011555	Aug 03 05:04:36 PM PDT 24	Aug 03 05:04:45 PM PDT 24	3421463231 ps
T391	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.3259734671	Aug 03 05:04:51 PM PDT 24	Aug 03 05:09:48 PM PDT 24	126336724523 ps
T355	/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3699364543	Aug 03 05:04:14 PM PDT 24	Aug 03 05:09:49 PM PDT 24	131305916477 ps
T465	/workspace/coverage/default/18.sysrst_ctrl_alert_test.915999675	Aug 03 05:04:41 PM PDT 24	Aug 03 05:04:48 PM PDT 24	2011961420 ps
T278	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.1364213381	Aug 03 05:04:30 PM PDT 24	Aug 03 05:05:37 PM PDT 24	104466105777 ps
T157	/workspace/coverage/default/14.sysrst_ctrl_stress_all.196803366	Aug 03 05:04:36 PM PDT 24	Aug 03 05:04:47 PM PDT 24	18406012508 ps
T466	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1221792292	Aug 03 05:04:28 PM PDT 24	Aug 03 05:04:31 PM PDT 24	2464485348 ps