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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.78 99.29 96.78 100.00 96.79 98.71 99.52 93.40


Total test records in report: 911
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T191 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.3420320469 Aug 10 04:58:31 PM PDT 24 Aug 10 04:58:38 PM PDT 24 2610140388 ps
T192 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.1256988485 Aug 10 04:59:52 PM PDT 24 Aug 10 04:59:58 PM PDT 24 2618975147 ps
T444 /workspace/coverage/default/9.sysrst_ctrl_alert_test.3187008719 Aug 10 04:59:06 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2014530255 ps
T445 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2344485813 Aug 10 04:58:31 PM PDT 24 Aug 10 04:58:32 PM PDT 24 2743481211 ps
T346 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.2881236120 Aug 10 04:59:52 PM PDT 24 Aug 10 05:03:02 PM PDT 24 78380134383 ps
T347 /workspace/coverage/default/18.sysrst_ctrl_stress_all.555850243 Aug 10 04:59:16 PM PDT 24 Aug 10 05:03:05 PM PDT 24 93945227637 ps
T446 /workspace/coverage/default/36.sysrst_ctrl_smoke.750032841 Aug 10 05:00:09 PM PDT 24 Aug 10 05:00:15 PM PDT 24 2108541126 ps
T447 /workspace/coverage/default/18.sysrst_ctrl_pin_override_test.264806050 Aug 10 04:59:21 PM PDT 24 Aug 10 04:59:27 PM PDT 24 2512235109 ps
T448 /workspace/coverage/default/25.sysrst_ctrl_pin_override_test.1186680049 Aug 10 04:59:44 PM PDT 24 Aug 10 04:59:51 PM PDT 24 2515359949 ps
T225 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.371670181 Aug 10 04:59:08 PM PDT 24 Aug 10 05:00:16 PM PDT 24 118754108880 ps
T170 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.1762571423 Aug 10 04:59:19 PM PDT 24 Aug 10 05:01:19 PM PDT 24 97358351567 ps
T449 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2348675569 Aug 10 04:59:11 PM PDT 24 Aug 10 04:59:12 PM PDT 24 2557682870 ps
T450 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2901226896 Aug 10 05:00:46 PM PDT 24 Aug 10 05:00:54 PM PDT 24 2614059365 ps
T93 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3344141429 Aug 10 04:59:27 PM PDT 24 Aug 10 05:05:47 PM PDT 24 146606426549 ps
T451 /workspace/coverage/default/39.sysrst_ctrl_stress_all.847594503 Aug 10 05:01:26 PM PDT 24 Aug 10 05:01:43 PM PDT 24 7040453995 ps
T452 /workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.2797314906 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2477664350 ps
T453 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3480966217 Aug 10 04:59:11 PM PDT 24 Aug 10 04:59:15 PM PDT 24 3259578743 ps
T454 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3790767281 Aug 10 04:59:46 PM PDT 24 Aug 10 04:59:54 PM PDT 24 2482454617 ps
T455 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.2431951410 Aug 10 04:59:14 PM PDT 24 Aug 10 04:59:21 PM PDT 24 7077264871 ps
T94 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1099325285 Aug 10 05:01:06 PM PDT 24 Aug 10 05:01:21 PM PDT 24 23100638616 ps
T456 /workspace/coverage/default/3.sysrst_ctrl_stress_all.2530914663 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:06 PM PDT 24 14357275399 ps
T457 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.2353207809 Aug 10 04:59:45 PM PDT 24 Aug 10 04:59:49 PM PDT 24 3769833868 ps
T262 /workspace/coverage/default/16.sysrst_ctrl_stress_all.726731634 Aug 10 04:59:20 PM PDT 24 Aug 10 05:02:41 PM PDT 24 85900017074 ps
T256 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.4157951515 Aug 10 04:58:38 PM PDT 24 Aug 10 05:01:46 PM PDT 24 71716486896 ps
T263 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.157670751 Aug 10 05:01:00 PM PDT 24 Aug 10 05:01:21 PM PDT 24 57823482231 ps
T81 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3246373504 Aug 10 04:59:25 PM PDT 24 Aug 10 05:04:11 PM PDT 24 607617725828 ps
T108 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.1613643845 Aug 10 04:59:10 PM PDT 24 Aug 10 04:59:12 PM PDT 24 2072251277 ps
T109 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.3387220806 Aug 10 04:58:31 PM PDT 24 Aug 10 04:58:33 PM PDT 24 2512099211 ps
T110 /workspace/coverage/default/3.sysrst_ctrl_smoke.2861479439 Aug 10 04:58:42 PM PDT 24 Aug 10 04:58:48 PM PDT 24 2110920240 ps
T111 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.383281716 Aug 10 05:00:27 PM PDT 24 Aug 10 05:00:30 PM PDT 24 3981912844 ps
T112 /workspace/coverage/default/37.sysrst_ctrl_alert_test.335482705 Aug 10 05:00:18 PM PDT 24 Aug 10 05:00:20 PM PDT 24 2023161881 ps
T95 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.3710297479 Aug 10 04:58:45 PM PDT 24 Aug 10 05:01:54 PM PDT 24 81917591952 ps
T113 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.316537221 Aug 10 05:01:00 PM PDT 24 Aug 10 05:01:05 PM PDT 24 30812718009 ps
T114 /workspace/coverage/default/26.sysrst_ctrl_flash_wr_prot_out.1999693901 Aug 10 04:59:52 PM PDT 24 Aug 10 05:00:00 PM PDT 24 2610770750 ps
T115 /workspace/coverage/default/34.sysrst_ctrl_smoke.3456871675 Aug 10 05:00:10 PM PDT 24 Aug 10 05:00:14 PM PDT 24 2114332724 ps
T273 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.643322373 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:25 PM PDT 24 22021648479 ps
T458 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.4111585065 Aug 10 05:00:25 PM PDT 24 Aug 10 05:00:28 PM PDT 24 2630657209 ps
T146 /workspace/coverage/default/32.sysrst_ctrl_stress_all.2213366025 Aug 10 05:00:07 PM PDT 24 Aug 10 05:00:26 PM PDT 24 15334662921 ps
T131 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.452193925 Aug 10 04:59:22 PM PDT 24 Aug 10 04:59:30 PM PDT 24 148755458078 ps
T459 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.846141892 Aug 10 05:00:50 PM PDT 24 Aug 10 05:00:57 PM PDT 24 2513488401 ps
T172 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.3609824128 Aug 10 05:00:47 PM PDT 24 Aug 10 05:00:49 PM PDT 24 2849963199 ps
T368 /workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.3841716369 Aug 10 04:59:14 PM PDT 24 Aug 10 05:00:47 PM PDT 24 71503305190 ps
T147 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1274078402 Aug 10 05:00:42 PM PDT 24 Aug 10 05:02:40 PM PDT 24 53719379981 ps
T460 /workspace/coverage/default/19.sysrst_ctrl_alert_test.540686648 Aug 10 04:59:25 PM PDT 24 Aug 10 04:59:31 PM PDT 24 2012435358 ps
T265 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2095086973 Aug 10 05:00:10 PM PDT 24 Aug 10 05:02:05 PM PDT 24 82344337942 ps
T461 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.3060167375 Aug 10 04:59:45 PM PDT 24 Aug 10 04:59:51 PM PDT 24 3984553633 ps
T462 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.321430856 Aug 10 05:00:48 PM PDT 24 Aug 10 05:00:50 PM PDT 24 2513245509 ps
T82 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.1404081278 Aug 10 05:00:46 PM PDT 24 Aug 10 05:00:49 PM PDT 24 4474031868 ps
T227 /workspace/coverage/default/47.sysrst_ctrl_smoke.2407750265 Aug 10 05:00:48 PM PDT 24 Aug 10 05:00:54 PM PDT 24 2114794672 ps
T96 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2400404921 Aug 10 04:58:32 PM PDT 24 Aug 10 04:59:24 PM PDT 24 212215372956 ps
T228 /workspace/coverage/default/5.sysrst_ctrl_stress_all.3184187453 Aug 10 04:58:54 PM PDT 24 Aug 10 04:59:16 PM PDT 24 8518405778 ps
T229 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.368719594 Aug 10 05:00:22 PM PDT 24 Aug 10 05:00:27 PM PDT 24 3143908011 ps
T230 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.3972139589 Aug 10 05:00:00 PM PDT 24 Aug 10 05:02:37 PM PDT 24 117395549100 ps
T231 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3161776314 Aug 10 04:58:31 PM PDT 24 Aug 10 04:58:35 PM PDT 24 2949498710 ps
T97 /workspace/coverage/default/17.sysrst_ctrl_combo_detect.283022902 Aug 10 04:59:17 PM PDT 24 Aug 10 05:00:36 PM PDT 24 61830628904 ps
T232 /workspace/coverage/default/25.sysrst_ctrl_stress_all.480092486 Aug 10 04:59:46 PM PDT 24 Aug 10 04:59:59 PM PDT 24 13081829797 ps
T233 /workspace/coverage/default/25.sysrst_ctrl_smoke.3306974289 Aug 10 04:59:42 PM PDT 24 Aug 10 04:59:44 PM PDT 24 2137034511 ps
T463 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.2173659894 Aug 10 04:59:21 PM PDT 24 Aug 10 05:06:40 PM PDT 24 169398633634 ps
T464 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3290352733 Aug 10 04:59:09 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2625252244 ps
T465 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1534172607 Aug 10 05:00:54 PM PDT 24 Aug 10 05:00:57 PM PDT 24 3279196239 ps
T241 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.181901707 Aug 10 05:00:55 PM PDT 24 Aug 10 05:04:01 PM PDT 24 76418530241 ps
T302 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.2480227651 Aug 10 04:59:19 PM PDT 24 Aug 10 04:59:33 PM PDT 24 41386039069 ps
T351 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.4227808500 Aug 10 04:59:56 PM PDT 24 Aug 10 05:01:11 PM PDT 24 61844027027 ps
T466 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1332008301 Aug 10 04:59:46 PM PDT 24 Aug 10 04:59:50 PM PDT 24 2158909833 ps
T207 /workspace/coverage/default/4.sysrst_ctrl_stress_all.461261355 Aug 10 04:58:54 PM PDT 24 Aug 10 04:59:01 PM PDT 24 13536640278 ps
T467 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.3909418059 Aug 10 05:00:28 PM PDT 24 Aug 10 05:12:59 PM PDT 24 304276120230 ps
T468 /workspace/coverage/default/40.sysrst_ctrl_alert_test.884327608 Aug 10 05:00:26 PM PDT 24 Aug 10 05:00:27 PM PDT 24 2094614811 ps
T373 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.3317899191 Aug 10 05:00:19 PM PDT 24 Aug 10 05:00:42 PM PDT 24 148171119445 ps
T357 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2663199515 Aug 10 04:59:55 PM PDT 24 Aug 10 05:01:45 PM PDT 24 206038515205 ps
T469 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.35708156 Aug 10 05:00:36 PM PDT 24 Aug 10 05:00:45 PM PDT 24 3379125344 ps
T314 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.3361387053 Aug 10 04:59:23 PM PDT 24 Aug 10 04:59:27 PM PDT 24 6153511919 ps
T470 /workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1825487958 Aug 10 05:00:46 PM PDT 24 Aug 10 05:01:16 PM PDT 24 207589701251 ps
T366 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2515495649 Aug 10 04:59:55 PM PDT 24 Aug 10 05:00:55 PM PDT 24 49685395123 ps
T249 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1208428559 Aug 10 05:01:07 PM PDT 24 Aug 10 05:01:34 PM PDT 24 58040991890 ps
T126 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.3130731844 Aug 10 04:59:23 PM PDT 24 Aug 10 04:59:30 PM PDT 24 5545633894 ps
T471 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1818931157 Aug 10 05:00:00 PM PDT 24 Aug 10 05:00:07 PM PDT 24 2611349989 ps
T472 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3816113664 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:05 PM PDT 24 3111038775 ps
T473 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2426311210 Aug 10 05:00:18 PM PDT 24 Aug 10 05:00:37 PM PDT 24 7475100615 ps
T474 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.53585407 Aug 10 04:59:24 PM PDT 24 Aug 10 04:59:32 PM PDT 24 2602068185 ps
T475 /workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.3656114236 Aug 10 05:00:02 PM PDT 24 Aug 10 05:00:09 PM PDT 24 2496478090 ps
T266 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.2188044433 Aug 10 04:59:47 PM PDT 24 Aug 10 05:00:07 PM PDT 24 28598769006 ps
T476 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.1028693588 Aug 10 05:00:30 PM PDT 24 Aug 10 05:00:32 PM PDT 24 2529862359 ps
T257 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4083624628 Aug 10 05:00:45 PM PDT 24 Aug 10 05:02:05 PM PDT 24 123439114572 ps
T477 /workspace/coverage/default/1.sysrst_ctrl_stress_all.3040523705 Aug 10 04:58:43 PM PDT 24 Aug 10 04:58:46 PM PDT 24 17848934121 ps
T478 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1574032234 Aug 10 05:00:29 PM PDT 24 Aug 10 05:00:31 PM PDT 24 2631496021 ps
T167 /workspace/coverage/default/21.sysrst_ctrl_stress_all.3774992444 Aug 10 04:59:34 PM PDT 24 Aug 10 04:59:44 PM PDT 24 15696981598 ps
T267 /workspace/coverage/default/45.sysrst_ctrl_combo_detect.753643622 Aug 10 05:00:46 PM PDT 24 Aug 10 05:04:08 PM PDT 24 146733923102 ps
T362 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_with_pre_cond.3599984721 Aug 10 04:58:54 PM PDT 24 Aug 10 04:59:24 PM PDT 24 60878722383 ps
T254 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.2165284630 Aug 10 04:59:55 PM PDT 24 Aug 10 05:02:14 PM PDT 24 195984972426 ps
T479 /workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.3701317855 Aug 10 04:59:29 PM PDT 24 Aug 10 04:59:36 PM PDT 24 2483824854 ps
T480 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.869997091 Aug 10 04:59:47 PM PDT 24 Aug 10 04:59:51 PM PDT 24 3444954067 ps
T481 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.3311633980 Aug 10 04:59:11 PM PDT 24 Aug 10 04:59:13 PM PDT 24 2497298490 ps
T482 /workspace/coverage/default/28.sysrst_ctrl_combo_detect.1472242001 Aug 10 04:59:57 PM PDT 24 Aug 10 05:08:55 PM PDT 24 219414135851 ps
T483 /workspace/coverage/default/22.sysrst_ctrl_smoke.4141886036 Aug 10 04:59:34 PM PDT 24 Aug 10 04:59:40 PM PDT 24 2109269014 ps
T484 /workspace/coverage/default/45.sysrst_ctrl_smoke.4056544742 Aug 10 05:00:47 PM PDT 24 Aug 10 05:00:49 PM PDT 24 2134372110 ps
T485 /workspace/coverage/default/28.sysrst_ctrl_stress_all.535432139 Aug 10 04:59:56 PM PDT 24 Aug 10 04:59:59 PM PDT 24 9802571410 ps
T380 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_with_pre_cond.1811513730 Aug 10 04:58:33 PM PDT 24 Aug 10 05:00:54 PM PDT 24 54282634214 ps
T98 /workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2015427608 Aug 10 05:00:54 PM PDT 24 Aug 10 05:03:51 PM PDT 24 74384483816 ps
T79 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.349144260 Aug 10 04:59:08 PM PDT 24 Aug 10 05:00:01 PM PDT 24 42932400922 ps
T486 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.784078588 Aug 10 04:58:57 PM PDT 24 Aug 10 04:59:03 PM PDT 24 2514260570 ps
T349 /workspace/coverage/default/45.sysrst_ctrl_stress_all.3166095212 Aug 10 05:00:46 PM PDT 24 Aug 10 05:02:52 PM PDT 24 206241978561 ps
T85 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.3458977716 Aug 10 04:59:22 PM PDT 24 Aug 10 04:59:50 PM PDT 24 44220210263 ps
T487 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.1193665846 Aug 10 05:00:47 PM PDT 24 Aug 10 05:01:43 PM PDT 24 84421641688 ps
T488 /workspace/coverage/default/38.sysrst_ctrl_alert_test.200675551 Aug 10 05:00:18 PM PDT 24 Aug 10 05:00:20 PM PDT 24 2042078531 ps
T489 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.851350320 Aug 10 05:00:50 PM PDT 24 Aug 10 05:00:53 PM PDT 24 2536300423 ps
T490 /workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2013072491 Aug 10 04:59:25 PM PDT 24 Aug 10 04:59:33 PM PDT 24 2785801105 ps
T491 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.3871863332 Aug 10 04:59:46 PM PDT 24 Aug 10 05:02:39 PM PDT 24 136109600497 ps
T151 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.801323141 Aug 10 04:59:05 PM PDT 24 Aug 10 04:59:16 PM PDT 24 4324537793 ps
T158 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1669882596 Aug 10 04:58:57 PM PDT 24 Aug 10 04:59:07 PM PDT 24 3511225491 ps
T159 /workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4031844714 Aug 10 05:00:57 PM PDT 24 Aug 10 05:02:48 PM PDT 24 81469127428 ps
T160 /workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4203432098 Aug 10 05:01:04 PM PDT 24 Aug 10 05:01:14 PM PDT 24 28455385066 ps
T161 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.684337857 Aug 10 04:59:57 PM PDT 24 Aug 10 05:01:12 PM PDT 24 50923887041 ps
T162 /workspace/coverage/default/49.sysrst_ctrl_smoke.3843087195 Aug 10 05:00:55 PM PDT 24 Aug 10 05:01:01 PM PDT 24 2108320436 ps
T163 /workspace/coverage/default/40.sysrst_ctrl_smoke.3081164311 Aug 10 05:00:27 PM PDT 24 Aug 10 05:00:29 PM PDT 24 2123229598 ps
T164 /workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.1175451243 Aug 10 05:00:20 PM PDT 24 Aug 10 05:00:22 PM PDT 24 2608114053 ps
T165 /workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.4243129601 Aug 10 04:59:24 PM PDT 24 Aug 10 04:59:31 PM PDT 24 2455254214 ps
T166 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.4103211931 Aug 10 04:58:33 PM PDT 24 Aug 10 04:58:35 PM PDT 24 2538470264 ps
T492 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2819287699 Aug 10 05:00:10 PM PDT 24 Aug 10 05:00:14 PM PDT 24 6844021338 ps
T493 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.1823935003 Aug 10 04:58:43 PM PDT 24 Aug 10 04:58:47 PM PDT 24 2890204931 ps
T350 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.724238197 Aug 10 04:58:59 PM PDT 24 Aug 10 05:02:43 PM PDT 24 81824263784 ps
T494 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3043622757 Aug 10 04:58:31 PM PDT 24 Aug 10 04:58:33 PM PDT 24 2553789694 ps
T345 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1884140466 Aug 10 05:00:48 PM PDT 24 Aug 10 05:02:11 PM PDT 24 66337449737 ps
T495 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3744987271 Aug 10 05:00:26 PM PDT 24 Aug 10 05:00:35 PM PDT 24 9165460928 ps
T496 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3331064367 Aug 10 05:00:50 PM PDT 24 Aug 10 05:01:11 PM PDT 24 9094886453 ps
T497 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.3128813614 Aug 10 04:59:44 PM PDT 24 Aug 10 04:59:46 PM PDT 24 3322467628 ps
T498 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.3328625297 Aug 10 05:00:07 PM PDT 24 Aug 10 05:00:15 PM PDT 24 2472113688 ps
T499 /workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1348760004 Aug 10 04:58:43 PM PDT 24 Aug 10 04:58:47 PM PDT 24 2464542547 ps
T500 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.1506666159 Aug 10 04:58:43 PM PDT 24 Aug 10 04:58:45 PM PDT 24 2408348199 ps
T501 /workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.3985188580 Aug 10 05:00:00 PM PDT 24 Aug 10 05:00:08 PM PDT 24 2461334714 ps
T502 /workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1999245955 Aug 10 04:58:55 PM PDT 24 Aug 10 04:58:58 PM PDT 24 2104408343 ps
T234 /workspace/coverage/default/18.sysrst_ctrl_edge_detect.1438989225 Aug 10 04:59:20 PM PDT 24 Aug 10 04:59:29 PM PDT 24 3467046081 ps
T503 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1596040189 Aug 10 04:58:34 PM PDT 24 Aug 10 05:15:00 PM PDT 24 3420447232863 ps
T504 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.2147046429 Aug 10 05:00:25 PM PDT 24 Aug 10 05:05:16 PM PDT 24 219963584650 ps
T505 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.667438994 Aug 10 05:01:04 PM PDT 24 Aug 10 05:01:40 PM PDT 24 26588996344 ps
T506 /workspace/coverage/default/41.sysrst_ctrl_alert_test.3575142035 Aug 10 05:00:38 PM PDT 24 Aug 10 05:00:40 PM PDT 24 2027996856 ps
T148 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.1808818934 Aug 10 05:00:03 PM PDT 24 Aug 10 05:00:10 PM PDT 24 5165200971 ps
T348 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3979887678 Aug 10 05:00:00 PM PDT 24 Aug 10 05:07:01 PM PDT 24 166140700523 ps
T168 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1776582135 Aug 10 05:00:36 PM PDT 24 Aug 10 05:01:36 PM PDT 24 22661548395 ps
T507 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.3775151237 Aug 10 04:59:36 PM PDT 24 Aug 10 04:59:41 PM PDT 24 3297523336 ps
T274 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.690946667 Aug 10 04:58:43 PM PDT 24 Aug 10 04:59:37 PM PDT 24 22011623191 ps
T155 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.1452206430 Aug 10 04:59:36 PM PDT 24 Aug 10 05:03:16 PM PDT 24 239065939188 ps
T195 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1981778417 Aug 10 04:59:57 PM PDT 24 Aug 10 05:00:19 PM PDT 24 31370266757 ps
T196 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.627571852 Aug 10 04:59:34 PM PDT 24 Aug 10 04:59:42 PM PDT 24 2613639643 ps
T197 /workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3248098808 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:00 PM PDT 24 2463346805 ps
T198 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.1671742229 Aug 10 05:00:17 PM PDT 24 Aug 10 05:01:02 PM PDT 24 21688861995 ps
T199 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.831638901 Aug 10 05:00:36 PM PDT 24 Aug 10 05:00:44 PM PDT 24 8473588280 ps
T200 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.3507201188 Aug 10 04:58:37 PM PDT 24 Aug 10 04:58:41 PM PDT 24 2048756101 ps
T201 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.1922917394 Aug 10 04:59:12 PM PDT 24 Aug 10 05:00:31 PM PDT 24 1300309258504 ps
T202 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1798635972 Aug 10 04:59:07 PM PDT 24 Aug 10 04:59:09 PM PDT 24 5257894036 ps
T149 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2305505174 Aug 10 04:58:56 PM PDT 24 Aug 10 05:00:22 PM PDT 24 518556684511 ps
T298 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.3985035116 Aug 10 04:59:06 PM PDT 24 Aug 10 05:00:56 PM PDT 24 43852890917 ps
T508 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.412969319 Aug 10 04:59:34 PM PDT 24 Aug 10 04:59:37 PM PDT 24 2529895066 ps
T509 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1566715189 Aug 10 04:58:31 PM PDT 24 Aug 10 04:58:34 PM PDT 24 2566846346 ps
T173 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.2854774602 Aug 10 05:00:10 PM PDT 24 Aug 10 05:00:15 PM PDT 24 4498101043 ps
T510 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.959635925 Aug 10 05:00:14 PM PDT 24 Aug 10 05:00:40 PM PDT 24 46928520763 ps
T248 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.919926059 Aug 10 05:00:36 PM PDT 24 Aug 10 05:01:15 PM PDT 24 57229782359 ps
T511 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.249622342 Aug 10 04:59:55 PM PDT 24 Aug 10 05:00:05 PM PDT 24 4033484552 ps
T143 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.2798814641 Aug 10 04:59:22 PM PDT 24 Aug 10 04:59:25 PM PDT 24 4149742554 ps
T512 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.1831211650 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:12 PM PDT 24 2614426621 ps
T513 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1651727267 Aug 10 05:00:13 PM PDT 24 Aug 10 05:00:23 PM PDT 24 4066548124 ps
T514 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.3784439642 Aug 10 04:59:06 PM PDT 24 Aug 10 04:59:12 PM PDT 24 4915516018 ps
T354 /workspace/coverage/default/30.sysrst_ctrl_stress_all.1673762867 Aug 10 04:59:59 PM PDT 24 Aug 10 05:01:16 PM PDT 24 150514995817 ps
T290 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.2334262133 Aug 10 04:58:54 PM PDT 24 Aug 10 04:59:23 PM PDT 24 22016198476 ps
T515 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2038728389 Aug 10 04:59:23 PM PDT 24 Aug 10 04:59:26 PM PDT 24 3604788834 ps
T516 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.2595361540 Aug 10 04:59:48 PM PDT 24 Aug 10 04:59:51 PM PDT 24 2183214124 ps
T517 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1422331832 Aug 10 04:58:55 PM PDT 24 Aug 10 05:00:12 PM PDT 24 31471841787 ps
T291 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.256004508 Aug 10 04:58:43 PM PDT 24 Aug 10 04:59:08 PM PDT 24 22091112238 ps
T518 /workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.3774529084 Aug 10 05:00:18 PM PDT 24 Aug 10 05:00:21 PM PDT 24 3771025092 ps
T519 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1501234965 Aug 10 05:00:00 PM PDT 24 Aug 10 05:00:03 PM PDT 24 2534034693 ps
T99 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.3516605054 Aug 10 04:59:56 PM PDT 24 Aug 10 05:00:41 PM PDT 24 31544460556 ps
T520 /workspace/coverage/default/17.sysrst_ctrl_alert_test.2361030014 Aug 10 04:59:22 PM PDT 24 Aug 10 04:59:24 PM PDT 24 2049563432 ps
T521 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.2023116616 Aug 10 04:59:35 PM PDT 24 Aug 10 05:00:23 PM PDT 24 82493014622 ps
T522 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2795272122 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2621399459 ps
T523 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.3421484765 Aug 10 04:58:57 PM PDT 24 Aug 10 05:07:20 PM PDT 24 196453761190 ps
T524 /workspace/coverage/default/38.sysrst_ctrl_pin_override_test.153669154 Aug 10 05:00:17 PM PDT 24 Aug 10 05:00:24 PM PDT 24 2513582136 ps
T525 /workspace/coverage/default/13.sysrst_ctrl_alert_test.4024905147 Aug 10 04:59:11 PM PDT 24 Aug 10 04:59:16 PM PDT 24 2012654658 ps
T526 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.890209517 Aug 10 04:59:07 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2478315857 ps
T205 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.1830884905 Aug 10 04:58:55 PM PDT 24 Aug 10 04:58:57 PM PDT 24 2488489644 ps
T174 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.553247087 Aug 10 04:59:10 PM PDT 24 Aug 10 05:01:15 PM PDT 24 100397786977 ps
T527 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2019805193 Aug 10 05:00:29 PM PDT 24 Aug 10 05:00:36 PM PDT 24 2609787590 ps
T175 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.3270899724 Aug 10 04:58:55 PM PDT 24 Aug 10 04:59:00 PM PDT 24 3448564120 ps
T528 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2891919869 Aug 10 04:58:56 PM PDT 24 Aug 10 04:58:59 PM PDT 24 2468683191 ps
T529 /workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2557358659 Aug 10 05:01:06 PM PDT 24 Aug 10 05:01:37 PM PDT 24 23583528922 ps
T176 /workspace/coverage/default/8.sysrst_ctrl_stress_all.3819827695 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:03 PM PDT 24 12096045683 ps
T530 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.2153279912 Aug 10 04:59:14 PM PDT 24 Aug 10 04:59:17 PM PDT 24 2138416772 ps
T531 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.4160442376 Aug 10 04:58:56 PM PDT 24 Aug 10 04:58:58 PM PDT 24 2625445278 ps
T532 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.1362457284 Aug 10 04:59:34 PM PDT 24 Aug 10 04:59:41 PM PDT 24 133386578687 ps
T533 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.762751419 Aug 10 05:00:35 PM PDT 24 Aug 10 05:00:37 PM PDT 24 2622415148 ps
T534 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.71216346 Aug 10 04:59:59 PM PDT 24 Aug 10 05:00:05 PM PDT 24 6164075075 ps
T535 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3635130133 Aug 10 04:59:47 PM PDT 24 Aug 10 05:05:28 PM PDT 24 130320760399 ps
T360 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3784811989 Aug 10 05:00:54 PM PDT 24 Aug 10 05:01:18 PM PDT 24 68973374584 ps
T536 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.4244098533 Aug 10 04:59:57 PM PDT 24 Aug 10 05:00:06 PM PDT 24 2611195680 ps
T379 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2481620670 Aug 10 05:01:05 PM PDT 24 Aug 10 05:01:22 PM PDT 24 23856153282 ps
T537 /workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.730667959 Aug 10 05:00:09 PM PDT 24 Aug 10 05:00:12 PM PDT 24 3470980265 ps
T538 /workspace/coverage/default/11.sysrst_ctrl_stress_all.2686547817 Aug 10 04:59:05 PM PDT 24 Aug 10 04:59:14 PM PDT 24 6426022260 ps
T539 /workspace/coverage/default/33.sysrst_ctrl_smoke.2036956037 Aug 10 05:00:10 PM PDT 24 Aug 10 05:00:16 PM PDT 24 2107873544 ps
T540 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.824856480 Aug 10 05:00:18 PM PDT 24 Aug 10 05:00:23 PM PDT 24 3578482685 ps
T541 /workspace/coverage/default/8.sysrst_ctrl_edge_detect.1012261227 Aug 10 04:58:58 PM PDT 24 Aug 10 04:59:00 PM PDT 24 2945221101 ps
T542 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.477302320 Aug 10 04:59:47 PM PDT 24 Aug 10 04:59:49 PM PDT 24 2489813561 ps
T543 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2154903745 Aug 10 05:00:53 PM PDT 24 Aug 10 05:04:03 PM PDT 24 74753475277 ps
T320 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.2980844133 Aug 10 05:00:06 PM PDT 24 Aug 10 05:00:53 PM PDT 24 35618623574 ps
T381 /workspace/coverage/default/20.sysrst_ctrl_stress_all.568349474 Aug 10 04:59:26 PM PDT 24 Aug 10 04:59:49 PM PDT 24 240500644160 ps
T544 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2788796656 Aug 10 04:58:43 PM PDT 24 Aug 10 04:58:50 PM PDT 24 2509644606 ps
T545 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2826655135 Aug 10 05:00:56 PM PDT 24 Aug 10 05:01:26 PM PDT 24 24336323553 ps
T546 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.303516770 Aug 10 05:00:09 PM PDT 24 Aug 10 05:00:12 PM PDT 24 3662808149 ps
T547 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3504417710 Aug 10 05:00:54 PM PDT 24 Aug 10 05:02:09 PM PDT 24 34668073205 ps
T548 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1980430237 Aug 10 05:00:35 PM PDT 24 Aug 10 05:00:42 PM PDT 24 2468629153 ps
T549 /workspace/coverage/default/23.sysrst_ctrl_smoke.2016247951 Aug 10 04:59:47 PM PDT 24 Aug 10 04:59:50 PM PDT 24 2121170566 ps
T550 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.1613555353 Aug 10 05:00:35 PM PDT 24 Aug 10 05:00:37 PM PDT 24 2842758148 ps
T551 /workspace/coverage/default/20.sysrst_ctrl_alert_test.2662443038 Aug 10 04:59:26 PM PDT 24 Aug 10 04:59:28 PM PDT 24 2043373838 ps
T552 /workspace/coverage/default/22.sysrst_ctrl_alert_test.3518797291 Aug 10 04:59:45 PM PDT 24 Aug 10 04:59:46 PM PDT 24 2037078601 ps
T553 /workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.822530145 Aug 10 05:01:04 PM PDT 24 Aug 10 05:01:50 PM PDT 24 46109731959 ps
T554 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.1222785875 Aug 10 05:00:35 PM PDT 24 Aug 10 05:00:37 PM PDT 24 3249680490 ps
T555 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.440900542 Aug 10 04:58:57 PM PDT 24 Aug 10 04:58:58 PM PDT 24 2756612281 ps
T370 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1470664330 Aug 10 05:00:55 PM PDT 24 Aug 10 05:01:40 PM PDT 24 63975196039 ps
T556 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2171733705 Aug 10 04:59:11 PM PDT 24 Aug 10 04:59:13 PM PDT 24 2222404534 ps
T557 /workspace/coverage/default/2.sysrst_ctrl_alert_test.3723555184 Aug 10 04:58:44 PM PDT 24 Aug 10 04:58:47 PM PDT 24 2022964967 ps
T558 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.301768659 Aug 10 04:59:11 PM PDT 24 Aug 10 04:59:13 PM PDT 24 2630477468 ps
T559 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.306086073 Aug 10 04:59:55 PM PDT 24 Aug 10 05:00:04 PM PDT 24 3298754341 ps
T560 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2855765087 Aug 10 05:00:55 PM PDT 24 Aug 10 05:01:03 PM PDT 24 2509470751 ps
T236 /workspace/coverage/default/30.sysrst_ctrl_edge_detect.1992992679 Aug 10 05:00:00 PM PDT 24 Aug 10 05:00:01 PM PDT 24 3737096653 ps
T150 /workspace/coverage/default/49.sysrst_ctrl_stress_all.574422005 Aug 10 05:01:00 PM PDT 24 Aug 10 05:01:07 PM PDT 24 10433066133 ps
T561 /workspace/coverage/default/46.sysrst_ctrl_alert_test.495753440 Aug 10 05:00:48 PM PDT 24 Aug 10 05:00:54 PM PDT 24 2009031377 ps
T383 /workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.3524075704 Aug 10 04:59:56 PM PDT 24 Aug 10 05:04:15 PM PDT 24 1849780262028 ps
T255 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.2000190702 Aug 10 05:00:39 PM PDT 24 Aug 10 05:03:17 PM PDT 24 57712160623 ps
T562 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.1507205650 Aug 10 04:59:58 PM PDT 24 Aug 10 05:10:08 PM PDT 24 253506066955 ps
T563 /workspace/coverage/default/18.sysrst_ctrl_alert_test.3427051117 Aug 10 04:59:28 PM PDT 24 Aug 10 04:59:31 PM PDT 24 2019913099 ps
T564 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.2925812724 Aug 10 04:59:15 PM PDT 24 Aug 10 04:59:23 PM PDT 24 4428243982 ps
T565 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3263869362 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:02 PM PDT 24 3411050447 ps
T566 /workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1245277586 Aug 10 04:58:43 PM PDT 24 Aug 10 04:58:50 PM PDT 24 2509401061 ps
T567 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.4120802426 Aug 10 04:59:10 PM PDT 24 Aug 10 04:59:17 PM PDT 24 4526367462 ps
T568 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.449050779 Aug 10 05:01:37 PM PDT 24 Aug 10 05:01:40 PM PDT 24 3256274889 ps
T569 /workspace/coverage/default/25.sysrst_ctrl_stress_all_with_rand_reset.529689460 Aug 10 04:59:46 PM PDT 24 Aug 10 05:00:30 PM PDT 24 62767895757 ps
T570 /workspace/coverage/default/26.sysrst_ctrl_smoke.594935462 Aug 10 04:59:46 PM PDT 24 Aug 10 04:59:48 PM PDT 24 2132169359 ps
T571 /workspace/coverage/default/46.sysrst_ctrl_smoke.2872053338 Aug 10 05:00:50 PM PDT 24 Aug 10 05:00:52 PM PDT 24 2137658133 ps
T322 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.952433027 Aug 10 05:00:47 PM PDT 24 Aug 10 05:01:12 PM PDT 24 19091894822 ps
T572 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.820084231 Aug 10 05:00:10 PM PDT 24 Aug 10 05:00:18 PM PDT 24 2464887224 ps
T573 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.996310193 Aug 10 04:59:57 PM PDT 24 Aug 10 05:00:04 PM PDT 24 2612717718 ps
T574 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.1928257327 Aug 10 05:00:09 PM PDT 24 Aug 10 05:00:12 PM PDT 24 2813480713 ps
T575 /workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.1286342703 Aug 10 05:00:10 PM PDT 24 Aug 10 05:03:06 PM PDT 24 68759214210 ps
T576 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2552048244 Aug 10 05:00:49 PM PDT 24 Aug 10 05:00:52 PM PDT 24 2677798094 ps
T127 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3896200824 Aug 10 04:59:00 PM PDT 24 Aug 10 05:00:00 PM PDT 24 45314481770 ps
T156 /workspace/coverage/default/6.sysrst_ctrl_stress_all.2740529196 Aug 10 04:58:56 PM PDT 24 Aug 10 05:00:51 PM PDT 24 151308854474 ps
T577 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.313520156 Aug 10 04:58:38 PM PDT 24 Aug 10 04:58:45 PM PDT 24 2459339143 ps
T578 /workspace/coverage/default/1.sysrst_ctrl_pin_override_test.159073819 Aug 10 04:58:37 PM PDT 24 Aug 10 04:58:45 PM PDT 24 2511240637 ps
T579 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.80042612 Aug 10 04:59:24 PM PDT 24 Aug 10 04:59:27 PM PDT 24 2050199978 ps
T580 /workspace/coverage/default/30.sysrst_ctrl_alert_test.1941333661 Aug 10 04:59:55 PM PDT 24 Aug 10 04:59:57 PM PDT 24 2034300315 ps
T581 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.3940145248 Aug 10 04:58:43 PM PDT 24 Aug 10 04:58:45 PM PDT 24 2178071414 ps
T582 /workspace/coverage/default/14.sysrst_ctrl_smoke.3632306667 Aug 10 04:59:14 PM PDT 24 Aug 10 04:59:16 PM PDT 24 2127374952 ps
T583 /workspace/coverage/default/48.sysrst_ctrl_smoke.1381287864 Aug 10 05:00:54 PM PDT 24 Aug 10 05:00:56 PM PDT 24 2124424644 ps
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