Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.78 99.29 96.78 100.00 96.79 98.71 99.52 93.40


Total tests in report: 911
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
52.28 52.28 73.22 73.22 55.94 55.94 63.01 63.01 20.51 20.51 76.12 76.12 60.31 60.31 16.88 16.88 /workspace/coverage/default/38.sysrst_ctrl_stress_all.4192000731
68.91 16.63 89.16 15.94 79.65 23.71 68.26 5.25 41.03 20.51 89.83 13.72 81.50 21.19 32.95 16.07 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2926049585
76.51 7.60 94.20 5.04 86.00 6.34 72.37 4.11 55.13 14.10 94.12 4.29 89.60 8.09 44.14 11.19 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.795290738
81.11 4.60 96.66 2.46 89.41 3.41 72.37 0.00 75.00 19.87 96.45 2.33 93.45 3.85 44.43 0.29 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2731067339
85.07 3.96 96.77 0.11 91.15 1.74 96.23 23.86 76.28 1.28 96.60 0.15 93.93 0.48 44.55 0.11 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2721884385
87.07 2.00 96.88 0.11 91.51 0.35 96.23 0.00 76.92 0.64 96.78 0.18 94.51 0.58 56.66 12.11 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1004662843
88.72 1.65 97.46 0.58 92.29 0.78 96.23 0.00 80.13 3.21 97.15 0.37 95.57 1.06 62.23 5.57 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2176330471
90.16 1.44 97.98 0.52 92.37 0.08 96.23 0.00 89.10 8.97 97.67 0.52 95.57 0.00 62.23 0.00 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.2169700595
91.48 1.32 98.06 0.07 93.55 1.19 96.92 0.68 89.10 0.00 97.78 0.11 95.57 0.00 69.40 7.18 /workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_intg_err.1818466902
92.59 1.11 98.34 0.28 94.14 0.58 96.92 0.00 89.10 0.00 97.82 0.04 95.76 0.19 76.06 6.66 /workspace/coverage/default/35.sysrst_ctrl_stress_all.1725762995
93.10 0.51 98.34 0.00 94.19 0.05 96.92 0.00 89.10 0.00 97.82 0.00 95.86 0.10 79.51 3.44 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.2400404921
93.61 0.51 98.51 0.17 94.34 0.15 96.92 0.00 91.67 2.56 98.00 0.18 96.34 0.48 79.51 0.00 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.801323141
94.08 0.47 98.71 0.21 94.39 0.05 96.92 0.00 93.59 1.92 98.11 0.11 96.34 0.00 80.48 0.98 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1923374965
94.46 0.38 98.82 0.11 94.64 0.25 98.17 1.26 93.59 0.00 98.11 0.00 96.34 0.00 81.52 1.03 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.3576951514
94.79 0.33 98.82 0.00 94.82 0.18 98.17 0.00 93.59 0.00 98.11 0.00 96.72 0.39 83.30 1.78 /workspace/coverage/default/47.sysrst_ctrl_stress_all.629394547
95.06 0.26 98.90 0.07 94.87 0.05 98.17 0.00 94.87 1.28 98.19 0.07 96.92 0.19 83.47 0.17 /workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.787764352
95.31 0.26 98.92 0.02 94.87 0.00 98.17 0.00 94.87 0.00 98.23 0.04 97.98 1.06 84.16 0.69 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1582125727
95.57 0.25 98.92 0.00 94.87 0.00 98.17 0.00 94.87 0.00 98.23 0.00 97.98 0.00 85.94 1.78 /workspace/coverage/default/18.sysrst_ctrl_stress_all.555850243
95.82 0.25 98.97 0.06 95.02 0.15 99.54 1.37 94.87 0.00 98.23 0.00 97.98 0.00 86.11 0.17 /workspace/coverage/default/5.sysrst_ctrl_alert_test.1313897769
96.03 0.21 99.03 0.06 95.05 0.03 99.54 0.00 95.51 0.64 98.30 0.07 98.07 0.10 86.68 0.57 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.3246373504
96.20 0.17 99.07 0.04 95.30 0.25 99.54 0.00 95.51 0.00 98.37 0.07 98.84 0.77 86.74 0.06 /workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1006651462
96.36 0.16 99.07 0.00 96.31 1.01 99.54 0.00 95.51 0.00 98.37 0.00 98.84 0.00 86.85 0.11 /workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.221027486
96.50 0.14 99.10 0.04 96.41 0.10 99.54 0.00 96.15 0.64 98.41 0.04 99.04 0.19 86.85 0.00 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.2937793130
96.64 0.14 99.14 0.04 96.49 0.08 99.54 0.00 96.79 0.64 98.45 0.04 99.23 0.19 86.85 0.00 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.1404081278
96.78 0.13 99.16 0.02 96.49 0.00 99.54 0.00 96.79 0.00 98.45 0.00 99.23 0.00 87.77 0.92 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.3708314372
96.88 0.10 99.16 0.00 96.51 0.03 100.00 0.46 96.79 0.00 98.45 0.00 99.33 0.10 87.89 0.11 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1622214350
96.97 0.10 99.16 0.00 96.51 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 88.58 0.69 /workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2196542547
97.06 0.09 99.16 0.00 96.51 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 89.21 0.63 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.4107424574
97.15 0.08 99.16 0.00 96.51 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 89.78 0.57 /workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.1518787822
97.22 0.07 99.16 0.00 96.51 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 90.30 0.52 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.2258612689
97.28 0.06 99.16 0.00 96.51 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 90.70 0.40 /workspace/coverage/cover_reg_top/6.sysrst_ctrl_tl_intg_err.2971312127
97.33 0.05 99.16 0.00 96.51 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.33 0.00 91.04 0.34 /workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.2663199515
97.37 0.05 99.16 0.00 96.56 0.05 100.00 0.00 96.79 0.00 98.45 0.00 99.42 0.10 91.22 0.17 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.2817658083
97.41 0.04 99.16 0.00 96.56 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.42 0.00 91.50 0.29 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.2135766040
97.45 0.04 99.16 0.00 96.56 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.42 0.00 91.79 0.29 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2147718136
97.49 0.04 99.16 0.00 96.56 0.00 100.00 0.00 96.79 0.00 98.45 0.00 99.42 0.00 92.08 0.29 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.1278187707
97.52 0.03 99.18 0.02 96.61 0.05 100.00 0.00 96.79 0.00 98.48 0.04 99.52 0.10 92.08 0.00 /workspace/coverage/default/32.sysrst_ctrl_edge_detect.2854774602
97.55 0.02 99.18 0.00 96.61 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 92.25 0.17 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1714466093
97.57 0.02 99.18 0.00 96.61 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 92.42 0.17 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.4083624628
97.60 0.02 99.18 0.00 96.61 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 92.59 0.17 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.2621178514
97.62 0.02 99.18 0.00 96.66 0.05 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 92.71 0.11 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.4095560807
97.64 0.02 99.18 0.00 96.66 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 92.82 0.11 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.2158698003
97.65 0.02 99.18 0.00 96.66 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 92.94 0.11 /workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2111425896
97.67 0.01 99.18 0.00 96.69 0.03 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.00 0.06 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3442987685
97.68 0.01 99.18 0.00 96.76 0.08 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.00 0.00 /workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.2964412788
97.68 0.01 99.18 0.00 96.76 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.05 0.06 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.349144260
97.69 0.01 99.18 0.00 96.76 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.11 0.06 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.371670181
97.70 0.01 99.18 0.00 96.76 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.17 0.06 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.3710297479
97.71 0.01 99.18 0.00 96.76 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.23 0.06 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.2165284630
97.72 0.01 99.18 0.00 96.76 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.28 0.06 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.2095086973
97.73 0.01 99.18 0.00 96.76 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.34 0.06 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.1470664330
97.73 0.01 99.18 0.00 96.76 0.00 100.00 0.00 96.79 0.00 98.48 0.00 99.52 0.00 93.40 0.06 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.181901707
97.74 0.01 99.20 0.02 96.76 0.00 100.00 0.00 96.79 0.00 98.52 0.04 99.52 0.00 93.40 0.00 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3440137862
97.75 0.01 99.22 0.02 96.76 0.00 100.00 0.00 96.79 0.00 98.56 0.04 99.52 0.00 93.40 0.00 /workspace/coverage/default/17.sysrst_ctrl_edge_detect.175666809
97.76 0.01 99.23 0.02 96.76 0.00 100.00 0.00 96.79 0.00 98.60 0.04 99.52 0.00 93.40 0.00 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.2798814641
97.77 0.01 99.25 0.02 96.76 0.00 100.00 0.00 96.79 0.00 98.63 0.04 99.52 0.00 93.40 0.00 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.1256988485
97.77 0.01 99.27 0.02 96.76 0.00 100.00 0.00 96.79 0.00 98.67 0.04 99.52 0.00 93.40 0.00 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.3696359849
97.78 0.01 99.29 0.02 96.76 0.00 100.00 0.00 96.79 0.00 98.71 0.04 99.52 0.00 93.40 0.00 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.4014898558


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.4007496460
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.4276165655
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.344934167
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.3531367129
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.38052434
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2484274062
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.1471219214
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.3653694992
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.3048762259
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2025179755
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.3642815535
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.3049784964
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.730692644
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.2841592119
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.2349913507
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.4176067464
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.3755066121
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3692716503
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2670783950
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.252639263
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1171095315
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.57783845
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.15983894
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.1114524840
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2193334328
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.2198448185
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2225472989
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.4005032741
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.2023938715
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.725376377
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.900764011
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.1348219857
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.3555058768
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.215791141
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.320794918
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.2316835478
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.2174413093
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.990942577
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.1971672807
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2015232663
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.3433739016
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.3522771997
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.1146361959
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.439289599
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1897450861
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.3551665300
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.4272853078
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.4008900454
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.2494019690
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3027022542
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.2316090977
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.2681078509
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.3753157819
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2398056618
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_same_csr_outstanding.160053471
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_errors.309881241
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.1718494872
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_mem_rw_with_rand_reset.2005608549
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_csr_rw.196098748
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_intr_test.2442294948
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_same_csr_outstanding.664337955
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_errors.1048836163
/workspace/coverage/cover_reg_top/17.sysrst_ctrl_tl_intg_err.2597483475
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_mem_rw_with_rand_reset.3414079161
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_csr_rw.2273141837
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_intr_test.706818692
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_same_csr_outstanding.1678489395
/workspace/coverage/cover_reg_top/18.sysrst_ctrl_tl_errors.3751925924
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_mem_rw_with_rand_reset.3542878937
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_csr_rw.2036564401
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_intr_test.4059396204
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_same_csr_outstanding.3504766011
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.381318977
/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_intg_err.1819063533
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_aliasing.2273930552
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_bit_bash.1598103924
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_hw_reset.4088719038
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_mem_rw_with_rand_reset.1612757671
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_csr_rw.3227134388
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_intr_test.208246493
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_same_csr_outstanding.2096031821
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_errors.1980495195
/workspace/coverage/cover_reg_top/2.sysrst_ctrl_tl_intg_err.3097017724
/workspace/coverage/cover_reg_top/20.sysrst_ctrl_intr_test.2347937929
/workspace/coverage/cover_reg_top/21.sysrst_ctrl_intr_test.372467211
/workspace/coverage/cover_reg_top/22.sysrst_ctrl_intr_test.544659353
/workspace/coverage/cover_reg_top/23.sysrst_ctrl_intr_test.3798051760
/workspace/coverage/cover_reg_top/24.sysrst_ctrl_intr_test.494453252
/workspace/coverage/cover_reg_top/25.sysrst_ctrl_intr_test.4271925663
/workspace/coverage/cover_reg_top/26.sysrst_ctrl_intr_test.2791910850
/workspace/coverage/cover_reg_top/27.sysrst_ctrl_intr_test.1775478583
/workspace/coverage/cover_reg_top/28.sysrst_ctrl_intr_test.1685824563
/workspace/coverage/cover_reg_top/29.sysrst_ctrl_intr_test.2002357533
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_aliasing.3011721246
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.704961959
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2751430212
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_mem_rw_with_rand_reset.1909553288
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_rw.1238228179
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_intr_test.2077685733
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_same_csr_outstanding.4243432634
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_errors.3840980250
/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.3406641715
/workspace/coverage/cover_reg_top/30.sysrst_ctrl_intr_test.329957183
/workspace/coverage/cover_reg_top/31.sysrst_ctrl_intr_test.566815386
/workspace/coverage/cover_reg_top/32.sysrst_ctrl_intr_test.4195316902
/workspace/coverage/cover_reg_top/33.sysrst_ctrl_intr_test.2325231983
/workspace/coverage/cover_reg_top/34.sysrst_ctrl_intr_test.2132369998
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/workspace/coverage/default/43.sysrst_ctrl_edge_detect.2171662198
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.3109255498
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1980430237
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.735219732
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3927969846
/workspace/coverage/default/43.sysrst_ctrl_smoke.3428523386
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.1776582135
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.831638901
/workspace/coverage/default/44.sysrst_ctrl_alert_test.334223795
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3905058052
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2000190702
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.3882942914
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3608714421
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.789678267
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.222144482
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1548175269
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.3932935820
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.930082452
/workspace/coverage/default/44.sysrst_ctrl_smoke.2262535908
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.1274078402
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1697971482
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2232200386
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3015921090
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.753643622
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1797876696
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2552048244
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2203802510
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.4182569005
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.708646135
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.212770481
/workspace/coverage/default/45.sysrst_ctrl_smoke.4056544742
/workspace/coverage/default/45.sysrst_ctrl_stress_all.3166095212
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.952433027
/workspace/coverage/default/46.sysrst_ctrl_alert_test.495753440
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.1116114821
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.1884140466
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2819271105
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2066171227
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2901226896
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.1712035395
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.441173970
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.846141892
/workspace/coverage/default/46.sysrst_ctrl_smoke.2872053338
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3331064367
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1825487958
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1624803207
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2621471500
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1193665846
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.1801180892
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1329959917
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3609824128
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3276624417
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.321430856
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3213228977
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.851350320
/workspace/coverage/default/47.sysrst_ctrl_smoke.2407750265
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1054343544
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.2048799269
/workspace/coverage/default/48.sysrst_ctrl_alert_test.325211067
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1058921596
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.4204169122
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.1534172607
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1561159145
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3694636768
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2392591860
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2547264242
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1095392105
/workspace/coverage/default/48.sysrst_ctrl_smoke.1381287864
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2803626361
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.157670751
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2410540780
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3717432473
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.3186837304
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.1368863958
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.316537221
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2569264795
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.4145108026
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.626855571
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.3877353183
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1801388307
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.2855765087
/workspace/coverage/default/49.sysrst_ctrl_smoke.3843087195
/workspace/coverage/default/49.sysrst_ctrl_stress_all.574422005
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.2015427608
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.352424656
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1749486417
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2599472500
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.3735830778
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.3358466327
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3642698987
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.2419837316
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2891919869
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.1999245955
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1326438698
/workspace/coverage/default/5.sysrst_ctrl_smoke.3077022001
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3184187453
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.3896200824
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3072662814
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.2826655135
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3770408719
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3504417710
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1966852738
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.2154903745
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3784811989
/workspace/coverage/default/6.sysrst_ctrl_alert_test.319609762
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.3816113664
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2501694626
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.718311798
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.988898
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.4160442376
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1156273052
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3484134732
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.784078588
/workspace/coverage/default/6.sysrst_ctrl_smoke.3578473348
/workspace/coverage/default/6.sysrst_ctrl_stress_all.2740529196
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.2305505174
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.83661485
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.988484855
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.666734732
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.4289660373
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.46844619
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1461074938
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.4031844714
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.2913757354
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1890980375
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3263869362
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3421484765
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.729144900
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3270899724
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.602699301
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.3248098808
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.2404211337
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.456253930
/workspace/coverage/default/7.sysrst_ctrl_smoke.3879654670
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1695556516
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2242179297
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1020190295
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1950719559
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.974660130
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.1072196609
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3644018472
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.4203432098
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.51269382
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3243909135
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1293410473
/workspace/coverage/default/8.sysrst_ctrl_alert_test.147110268
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3541925415
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.724238197
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.752252657
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1669882596
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1012261227
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.3126821771
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.3318927609
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1307672524
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1275687197
/workspace/coverage/default/8.sysrst_ctrl_smoke.2267608673
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3819827695
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.3689075372
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.1807419948
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.4226613354
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.629725208
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4095098380
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.667438994
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.822530145
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.1099325285
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.2557358659
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2738762849
/workspace/coverage/default/9.sysrst_ctrl_alert_test.3187008719
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2094884716
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.2831972466
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2964404201
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.1798635972
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3290352733
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1093561000
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1634384569
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.70197147
/workspace/coverage/default/9.sysrst_ctrl_smoke.4212291515
/workspace/coverage/default/9.sysrst_ctrl_stress_all.3480008520
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.754875947
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4158353951
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2481620670
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1208428559
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.2783735972
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1498064923
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1583048485
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2714899629
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2442378504
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.4164070302




Total test records in report: 911
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/38.sysrst_ctrl_stress_all.4192000731 Aug 10 05:00:29 PM PDT 24 Aug 10 05:00:42 PM PDT 24 19120266436 ps
T4 /workspace/coverage/default/35.sysrst_ctrl_pin_override_test.488774009 Aug 10 05:00:16 PM PDT 24 Aug 10 05:00:20 PM PDT 24 2513704269 ps
T5 /workspace/coverage/default/13.sysrst_ctrl_smoke.2212299321 Aug 10 04:59:07 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2117543179 ps
T13 /workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2443367697 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:14 PM PDT 24 4005877990 ps
T14 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.1959080646 Aug 10 05:00:10 PM PDT 24 Aug 10 05:00:17 PM PDT 24 2511968561 ps
T15 /workspace/coverage/default/10.sysrst_ctrl_alert_test.1227882468 Aug 10 04:59:06 PM PDT 24 Aug 10 04:59:08 PM PDT 24 2031878032 ps
T16 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.4122089705 Aug 10 04:59:24 PM PDT 24 Aug 10 04:59:26 PM PDT 24 2637127239 ps
T17 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.913987842 Aug 10 04:59:16 PM PDT 24 Aug 10 04:59:19 PM PDT 24 3916750658 ps
T18 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3644018472 Aug 10 05:01:06 PM PDT 24 Aug 10 05:01:19 PM PDT 24 50968146468 ps
T19 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.4005066766 Aug 10 04:59:36 PM PDT 24 Aug 10 04:59:39 PM PDT 24 3801665598 ps
T43 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.2712965534 Aug 10 05:00:09 PM PDT 24 Aug 10 05:00:12 PM PDT 24 3685215643 ps
T2 /workspace/coverage/default/13.sysrst_ctrl_combo_detect.2817658083 Aug 10 04:59:13 PM PDT 24 Aug 10 05:02:42 PM PDT 24 76250477056 ps
T50 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.1677257537 Aug 10 04:59:16 PM PDT 24 Aug 10 04:59:19 PM PDT 24 4490903026 ps
T3 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.2926049585 Aug 10 05:00:59 PM PDT 24 Aug 10 05:01:37 PM PDT 24 128253583695 ps
T6 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.2066171227 Aug 10 05:00:48 PM PDT 24 Aug 10 05:00:51 PM PDT 24 3432527385 ps
T51 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2848659571 Aug 10 04:58:44 PM PDT 24 Aug 10 04:58:51 PM PDT 24 2613915341 ps
T52 /workspace/coverage/default/21.sysrst_ctrl_smoke.515589082 Aug 10 04:59:24 PM PDT 24 Aug 10 04:59:26 PM PDT 24 2121609018 ps
T53 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3425066892 Aug 10 05:00:00 PM PDT 24 Aug 10 05:00:02 PM PDT 24 2123721280 ps
T44 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.4095560807 Aug 10 04:59:10 PM PDT 24 Aug 10 05:05:36 PM PDT 24 280142538130 ps
T55 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.586046841 Aug 10 04:59:45 PM PDT 24 Aug 10 04:59:47 PM PDT 24 2535158128 ps
T7 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.2158698003 Aug 10 04:59:00 PM PDT 24 Aug 10 04:59:40 PM PDT 24 88883344967 ps
T169 /workspace/coverage/default/7.sysrst_ctrl_smoke.3879654670 Aug 10 04:58:55 PM PDT 24 Aug 10 04:59:00 PM PDT 24 2113597543 ps
T8 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.1854898510 Aug 10 04:58:57 PM PDT 24 Aug 10 04:58:58 PM PDT 24 2447450887 ps
T70 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4044230129 Aug 10 04:58:56 PM PDT 24 Aug 10 04:58:58 PM PDT 24 2533873048 ps
T25 /workspace/coverage/default/47.sysrst_ctrl_stress_all.629394547 Aug 10 05:00:53 PM PDT 24 Aug 10 05:01:12 PM PDT 24 14199314122 ps
T28 /workspace/coverage/default/15.sysrst_ctrl_pin_override_test.3916054172 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:10 PM PDT 24 2538287924 ps
T9 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.3442987685 Aug 10 05:00:55 PM PDT 24 Aug 10 05:04:55 PM PDT 24 101734243297 ps
T45 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1749486417 Aug 10 04:58:54 PM PDT 24 Aug 10 04:59:03 PM PDT 24 3252374995 ps
T56 /workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.4260646686 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:10 PM PDT 24 3241112320 ps
T46 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2621471500 Aug 10 05:00:49 PM PDT 24 Aug 10 05:00:52 PM PDT 24 3393131325 ps
T47 /workspace/coverage/default/23.sysrst_ctrl_auto_blk_key_output.4275202719 Aug 10 04:59:52 PM PDT 24 Aug 10 04:59:55 PM PDT 24 3430524100 ps
T68 /workspace/coverage/default/11.sysrst_ctrl_smoke.169579955 Aug 10 04:59:07 PM PDT 24 Aug 10 04:59:13 PM PDT 24 2110223116 ps
T10 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.433331906 Aug 10 04:58:58 PM PDT 24 Aug 10 04:59:43 PM PDT 24 46744868061 ps
T69 /workspace/coverage/default/17.sysrst_ctrl_pin_override_test.3103673140 Aug 10 04:59:19 PM PDT 24 Aug 10 04:59:21 PM PDT 24 2532761066 ps
T11 /workspace/coverage/default/12.sysrst_ctrl_stress_all.3440137862 Aug 10 04:59:11 PM PDT 24 Aug 10 05:02:25 PM PDT 24 80656960456 ps
T57 /workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.433048732 Aug 10 05:01:38 PM PDT 24 Aug 10 05:01:41 PM PDT 24 3898884890 ps
T23 /workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1368648248 Aug 10 04:58:57 PM PDT 24 Aug 10 04:59:03 PM PDT 24 7135003507 ps
T26 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2132381050 Aug 10 05:00:22 PM PDT 24 Aug 10 05:00:24 PM PDT 24 2493144062 ps
T32 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.2113743279 Aug 10 04:59:57 PM PDT 24 Aug 10 05:00:03 PM PDT 24 183004212363 ps
T62 /workspace/coverage/default/42.sysrst_ctrl_pin_access_test.1738111660 Aug 10 05:00:37 PM PDT 24 Aug 10 05:00:39 PM PDT 24 2118334639 ps
T42 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2714899629 Aug 10 05:01:07 PM PDT 24 Aug 10 05:01:57 PM PDT 24 75910287744 ps
T12 /workspace/coverage/default/41.sysrst_ctrl_stress_all.4108302062 Aug 10 05:00:33 PM PDT 24 Aug 10 05:10:53 PM PDT 24 225625390675 ps
T24 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2721884385 Aug 10 05:00:45 PM PDT 24 Aug 10 05:00:58 PM PDT 24 1166704791339 ps
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T58 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.902314832 Aug 10 05:00:16 PM PDT 24 Aug 10 05:00:20 PM PDT 24 6227894433 ps
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T392 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3299157950 Aug 10 04:59:46 PM PDT 24 Aug 10 04:59:50 PM PDT 24 2617321313 ps
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T89 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.988484855 Aug 10 05:00:55 PM PDT 24 Aug 10 05:02:57 PM PDT 24 89157257159 ps
T90 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2497559602 Aug 10 05:00:29 PM PDT 24 Aug 10 05:01:39 PM PDT 24 37167906834 ps
T83 /workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.791772883 Aug 10 05:00:13 PM PDT 24 Aug 10 05:00:41 PM PDT 24 42329328126 ps
T117 /workspace/coverage/default/40.sysrst_ctrl_stress_all.846317767 Aug 10 05:00:24 PM PDT 24 Aug 10 05:00:58 PM PDT 24 11901876098 ps
T397 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.626855571 Aug 10 05:00:56 PM PDT 24 Aug 10 05:01:03 PM PDT 24 2614950486 ps
T387 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1218632667 Aug 10 04:59:44 PM PDT 24 Aug 10 04:59:45 PM PDT 24 2602291376 ps
T76 /workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1697971482 Aug 10 05:00:37 PM PDT 24 Aug 10 05:00:44 PM PDT 24 2979568353 ps
T312 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.3072662814 Aug 10 04:58:55 PM PDT 24 Aug 10 04:59:01 PM PDT 24 4651741813 ps
T385 /workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3927969846 Aug 10 05:00:37 PM PDT 24 Aug 10 05:00:39 PM PDT 24 2530479621 ps
T36 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.497937338 Aug 10 05:00:26 PM PDT 24 Aug 10 05:00:39 PM PDT 24 81268220164 ps
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T399 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.859996224 Aug 10 04:58:29 PM PDT 24 Aug 10 04:59:29 PM PDT 24 147972259839 ps
T400 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1329959917 Aug 10 05:00:45 PM PDT 24 Aug 10 05:00:46 PM PDT 24 3484135827 ps
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T388 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3478618201 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2541941820 ps
T402 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3888965107 Aug 10 04:59:14 PM PDT 24 Aug 10 04:59:18 PM PDT 24 4736181565 ps
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T313 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3411736915 Aug 10 04:59:04 PM PDT 24 Aug 10 04:59:06 PM PDT 24 4325460321 ps
T251 /workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.4289660373 Aug 10 05:00:55 PM PDT 24 Aug 10 05:01:29 PM PDT 24 50417595449 ps
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T259 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.2819280559 Aug 10 04:58:39 PM PDT 24 Aug 10 05:01:43 PM PDT 24 66156107239 ps
T408 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1542750773 Aug 10 05:00:26 PM PDT 24 Aug 10 05:00:33 PM PDT 24 2459317318 ps
T409 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.3663634044 Aug 10 04:59:59 PM PDT 24 Aug 10 05:00:02 PM PDT 24 3256868389 ps
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T250 /workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1923374965 Aug 10 04:59:55 PM PDT 24 Aug 10 05:00:05 PM PDT 24 49254276035 ps
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T307 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.2057786770 Aug 10 04:59:29 PM PDT 24 Aug 10 04:59:33 PM PDT 24 2466640196 ps
T386 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.2147718136 Aug 10 04:59:58 PM PDT 24 Aug 10 05:00:02 PM PDT 24 2514153267 ps
T412 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.1073239609 Aug 10 05:00:10 PM PDT 24 Aug 10 05:00:17 PM PDT 24 2615308989 ps
T413 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.522346034 Aug 10 04:59:56 PM PDT 24 Aug 10 04:59:57 PM PDT 24 2568732006 ps
T153 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.86347094 Aug 10 05:00:09 PM PDT 24 Aug 10 05:00:18 PM PDT 24 55148886007 ps
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T247 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2501694626 Aug 10 04:58:56 PM PDT 24 Aug 10 05:00:20 PM PDT 24 36045066442 ps
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T91 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.4158353951 Aug 10 05:01:05 PM PDT 24 Aug 10 05:01:17 PM PDT 24 36824404841 ps
T258 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.2744434223 Aug 10 04:59:14 PM PDT 24 Aug 10 04:59:44 PM PDT 24 57585236178 ps
T92 /workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1293410473 Aug 10 05:01:04 PM PDT 24 Aug 10 05:01:24 PM PDT 24 28599842659 ps
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T239 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.222144482 Aug 10 05:00:37 PM PDT 24 Aug 10 05:00:39 PM PDT 24 2626932301 ps
T240 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.3191338857 Aug 10 04:59:58 PM PDT 24 Aug 10 05:00:05 PM PDT 24 2512236640 ps
T86 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.2937793130 Aug 10 04:59:55 PM PDT 24 Aug 10 04:59:58 PM PDT 24 4084552048 ps
T208 /workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1326438698 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:00 PM PDT 24 2518684204 ps
T209 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.3590867010 Aug 10 05:00:17 PM PDT 24 Aug 10 05:00:22 PM PDT 24 2613599844 ps
T210 /workspace/coverage/default/49.sysrst_ctrl_pin_access_test.1801388307 Aug 10 05:00:55 PM PDT 24 Aug 10 05:00:58 PM PDT 24 2247388755 ps
T211 /workspace/coverage/default/15.sysrst_ctrl_smoke.2619096058 Aug 10 04:59:09 PM PDT 24 Aug 10 04:59:11 PM PDT 24 2128423622 ps
T212 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3646255351 Aug 10 04:59:21 PM PDT 24 Aug 10 04:59:42 PM PDT 24 37618540535 ps
T213 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.3015921090 Aug 10 05:00:50 PM PDT 24 Aug 10 05:00:57 PM PDT 24 3617275740 ps
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T215 /workspace/coverage/default/26.sysrst_ctrl_alert_test.2136222001 Aug 10 04:59:56 PM PDT 24 Aug 10 04:59:59 PM PDT 24 2019346146 ps
T216 /workspace/coverage/default/8.sysrst_ctrl_pin_access_test.1307672524 Aug 10 04:58:56 PM PDT 24 Aug 10 04:59:00 PM PDT 24 2200991539 ps
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T416 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.3640877341 Aug 10 04:59:08 PM PDT 24 Aug 10 04:59:14 PM PDT 24 2135484779 ps
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T419 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.2569264795 Aug 10 05:00:57 PM PDT 24 Aug 10 05:01:00 PM PDT 24 3617559078 ps
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T421 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2009814320 Aug 10 04:59:56 PM PDT 24 Aug 10 05:00:00 PM PDT 24 2037192569 ps
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T309 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2662737969 Aug 10 04:59:33 PM PDT 24 Aug 10 04:59:40 PM PDT 24 2513227485 ps
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T310 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.2345935745 Aug 10 04:59:05 PM PDT 24 Aug 10 04:59:07 PM PDT 24 2530730209 ps
T423 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3276624417 Aug 10 05:00:50 PM PDT 24 Aug 10 05:00:52 PM PDT 24 2631152113 ps
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T217 /workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1156273052 Aug 10 04:58:55 PM PDT 24 Aug 10 04:58:57 PM PDT 24 2473103628 ps
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T118 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.2236192545 Aug 10 04:59:35 PM PDT 24 Aug 10 05:01:34 PM PDT 24 59578062475 ps
T219 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.735219732 Aug 10 05:00:37 PM PDT 24 Aug 10 05:00:38 PM PDT 24 2326937699 ps
T220 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.877192706 Aug 10 04:59:09 PM PDT 24 Aug 10 04:59:19 PM PDT 24 3339450773 ps
T221 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.2101783127 Aug 10 04:58:42 PM PDT 24 Aug 10 04:58:47 PM PDT 24 2115670616 ps
T222 /workspace/coverage/default/39.sysrst_ctrl_combo_detect.4254326424 Aug 10 05:00:28 PM PDT 24 Aug 10 05:06:06 PM PDT 24 129683415906 ps
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T125 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.1004662843 Aug 10 05:00:14 PM PDT 24 Aug 10 05:01:15 PM PDT 24 102039200228 ps
T190 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.708646135 Aug 10 05:00:44 PM PDT 24 Aug 10 05:00:45 PM PDT 24 2283081656 ps
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