Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
96.55	98.58	96.66	100.00	90.38	97.97	99.13	93.09

Total tests in report: 913

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
49.53	49.53	66.13	66.13	53.34	53.34	81.51	81.51	2.56	2.56	69.80	69.80	55.20	55.20	18.18	18.18	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.484772458
70.52	20.98	82.25	16.12	72.90	19.57	84.36	2.85	67.95	65.38	84.73	14.94	80.64	25.43	20.78	2.60	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3551012009
81.23	10.72	94.48	12.22	87.56	14.66	96.23	11.87	72.44	4.49	94.34	9.61	92.00	11.37	31.58	10.80	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1746150288
84.40	3.16	96.19	1.72	90.39	2.83	96.46	0.23	72.44	0.00	95.97	1.63	92.87	0.87	46.46	14.88	/workspace/coverage/default/39.sysrst_ctrl_stress_all.1375565315
87.15	2.75	96.83	0.63	90.87	0.48	96.69	0.23	76.28	3.85	96.45	0.48	94.22	1.35	58.68	12.22	/workspace/coverage/default/32.sysrst_ctrl_stress_all.4109106126
88.40	1.25	96.90	0.07	91.99	1.11	97.37	0.68	76.28	0.00	96.56	0.11	94.22	0.00	65.47	6.79	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_tl_intg_err.118889603
89.45	1.05	97.14	0.24	92.47	0.48	98.17	0.80	76.92	0.64	96.82	0.26	94.89	0.67	69.72	4.25	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.299801736
90.35	0.90	97.46	0.32	92.97	0.51	98.17	0.00	80.77	3.85	97.15	0.33	96.05	1.16	69.83	0.12	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2325948954
91.10	0.76	97.57	0.11	93.10	0.13	98.17	0.00	80.77	0.00	97.15	0.00	96.05	0.00	74.91	5.08	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.1124357950
91.56	0.45	97.65	0.07	93.43	0.33	98.17	0.00	82.69	1.92	97.26	0.11	96.72	0.67	74.97	0.06	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3928461789
91.93	0.37	97.84	0.19	93.86	0.43	98.17	0.00	82.69	0.00	97.26	0.00	96.82	0.10	76.86	1.89	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3752315308
92.28	0.35	97.84	0.00	93.86	0.00	98.17	0.00	82.69	0.00	97.26	0.00	96.82	0.00	79.34	2.48	/workspace/coverage/default/9.sysrst_ctrl_stress_all.1281961909
92.58	0.29	97.91	0.07	94.26	0.40	98.17	0.00	83.33	0.64	97.38	0.11	97.59	0.77	79.40	0.06	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.3567396833
92.87	0.29	98.00	0.09	94.64	0.38	98.17	0.00	84.62	1.28	97.49	0.11	97.78	0.19	79.40	0.00	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3101140045
93.16	0.29	98.00	0.00	94.67	0.03	99.77	1.60	84.62	0.00	97.49	0.00	97.88	0.10	79.69	0.30	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1478447904
93.42	0.26	98.00	0.00	94.67	0.00	99.77	0.00	84.62	0.00	97.49	0.00	97.88	0.00	81.52	1.83	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.1269656584
93.68	0.26	98.06	0.06	94.74	0.08	99.77	0.00	85.90	1.28	97.60	0.11	97.98	0.10	81.70	0.18	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.244848390
93.92	0.24	98.06	0.00	94.84	0.10	99.77	0.00	85.90	0.00	97.60	0.00	98.36	0.39	82.88	1.18	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_bit_bash.3268014354
94.13	0.21	98.19	0.13	95.02	0.18	99.77	0.00	85.90	0.00	97.60	0.00	98.36	0.00	84.06	1.18	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3190826265
94.33	0.20	98.23	0.04	95.02	0.00	99.77	0.00	87.18	1.28	97.67	0.07	98.36	0.00	84.06	0.00	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.1624271815
94.50	0.17	98.25	0.02	95.05	0.03	99.77	0.00	87.18	0.00	97.67	0.00	98.46	0.10	85.12	1.06	/workspace/coverage/default/36.sysrst_ctrl_stress_all.2249946902
94.64	0.14	98.25	0.00	95.98	0.94	99.77	0.00	87.18	0.00	97.67	0.00	98.46	0.00	85.18	0.06	/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_errors.3351707132
94.78	0.14	98.26	0.02	95.98	0.00	99.77	0.00	87.82	0.64	97.71	0.04	98.46	0.00	85.48	0.30	/workspace/coverage/default/4.sysrst_ctrl_stress_all.4263044791
94.92	0.13	98.26	0.00	95.98	0.00	99.77	0.00	87.82	0.00	97.71	0.00	98.46	0.00	86.42	0.94	/workspace/coverage/default/0.sysrst_ctrl_stress_all.681063301
95.05	0.13	98.28	0.02	95.98	0.00	99.77	0.00	87.82	0.00	97.71	0.00	98.46	0.00	87.31	0.89	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1565625806
95.18	0.13	98.32	0.04	96.01	0.03	99.77	0.00	88.46	0.64	97.74	0.04	98.55	0.10	87.37	0.06	/workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.3050587894
95.30	0.12	98.36	0.04	96.06	0.05	99.77	0.00	89.10	0.64	97.78	0.04	98.65	0.10	87.37	0.00	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.3156323971
95.42	0.12	98.40	0.04	96.08	0.03	99.77	0.00	89.74	0.64	97.82	0.04	98.75	0.10	87.37	0.00	/workspace/coverage/default/36.sysrst_ctrl_edge_detect.1433158250
95.53	0.11	98.40	0.00	96.08	0.00	99.77	0.00	89.74	0.00	97.82	0.00	98.75	0.00	88.13	0.77	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1675116272
95.63	0.10	98.41	0.02	96.08	0.00	99.77	0.00	90.38	0.64	97.86	0.04	98.75	0.00	88.13	0.00	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.3879180514
95.73	0.10	98.45	0.04	96.08	0.00	99.77	0.00	90.38	0.00	97.86	0.00	98.75	0.00	88.78	0.65	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1078584882
95.82	0.09	98.49	0.04	96.23	0.15	99.77	0.00	90.38	0.00	97.93	0.07	99.13	0.39	88.78	0.00	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_rw.1438133655
95.89	0.08	98.49	0.00	96.23	0.00	99.77	0.00	90.38	0.00	97.93	0.00	99.13	0.00	89.32	0.53	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1339818158
95.97	0.08	98.49	0.00	96.23	0.00	99.77	0.00	90.38	0.00	97.93	0.00	99.13	0.00	89.85	0.53	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3121520781
96.03	0.06	98.49	0.00	96.23	0.00	99.77	0.00	90.38	0.00	97.93	0.00	99.13	0.00	90.26	0.41	/workspace/coverage/default/43.sysrst_ctrl_stress_all.4003169098
96.08	0.05	98.54	0.06	96.31	0.08	100.00	0.23	90.38	0.00	97.93	0.00	99.13	0.00	90.26	0.00	/workspace/coverage/default/11.sysrst_ctrl_alert_test.3738446679
96.13	0.05	98.54	0.00	96.31	0.00	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	90.61	0.35	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.658126172
96.17	0.04	98.54	0.00	96.31	0.00	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	90.91	0.30	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.3714020447
96.21	0.03	98.54	0.00	96.31	0.00	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	91.15	0.24	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1232850197
96.24	0.03	98.54	0.00	96.31	0.00	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	91.38	0.24	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.1756236316
96.27	0.03	98.54	0.00	96.31	0.00	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	91.56	0.18	/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.3307770390
96.29	0.03	98.54	0.00	96.31	0.00	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	91.74	0.18	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3214097307
96.32	0.03	98.54	0.00	96.31	0.00	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	91.91	0.18	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1668316245
96.34	0.02	98.54	0.00	96.41	0.10	100.00	0.00	90.38	0.00	97.93	0.00	99.13	0.00	91.97	0.06	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1279171097
96.36	0.02	98.58	0.04	96.49	0.08	100.00	0.00	90.38	0.00	97.97	0.04	99.13	0.00	91.97	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.484400361
96.38	0.02	98.58	0.00	96.49	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.09	0.12	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.1539008965
96.39	0.02	98.58	0.00	96.49	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.21	0.12	/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.342254646
96.41	0.01	98.58	0.00	96.56	0.08	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.21	0.00	/workspace/coverage/default/1.sysrst_ctrl_stress_all.1299601235
96.41	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.27	0.06	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.1519192298
96.42	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.33	0.06	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3424719671
96.43	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.38	0.06	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2514423977
96.44	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.44	0.06	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.603777837
96.45	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.50	0.06	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.799878456
96.46	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.56	0.06	/workspace/coverage/default/18.sysrst_ctrl_combo_detect.3334657213
96.46	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.62	0.06	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1143933382
96.47	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.68	0.06	/workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.1497327233
96.48	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.74	0.06	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.336679959
96.49	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.80	0.06	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1430092106
96.50	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.86	0.06	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.3219504808
96.51	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.92	0.06	/workspace/coverage/default/33.sysrst_ctrl_stress_all.1190446436
96.51	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	92.98	0.06	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.4089611679
96.52	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	93.03	0.06	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2759394294
96.53	0.01	98.58	0.00	96.56	0.00	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	93.09	0.06	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.1986991908
96.54	0.01	98.58	0.00	96.59	0.03	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	93.09	0.00	/workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2599729342
96.54	0.01	98.58	0.00	96.61	0.03	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	93.09	0.00	/workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.217944543
96.54	0.01	98.58	0.00	96.64	0.03	100.00	0.00	90.38	0.00	97.97	0.00	99.13	0.00	93.09	0.00	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3994391753

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.1938936248
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1268001400
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.862763692
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.260313470
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1004855557
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2921177776
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.283798363
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.2368736042
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2014818830
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2976605355
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1134462625
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2576681796
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.1245314616
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.3927546282
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.553097402
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2214897205
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1648645422
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.1317623108
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.803646192
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.3195152439
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2027628432
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.528278022
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.672630380
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.2357379613
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.4108033081
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.3243559842
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.3421289329
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.48046782
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.1573745229
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.1438085128
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.3687946569
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2400856698
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.3790640191
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.2137869309
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_mem_rw_with_rand_reset.2593818761
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_csr_rw.621284614
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_intr_test.1941020337
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_same_csr_outstanding.2463482485
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.3752787849
/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.3577961802
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_mem_rw_with_rand_reset.2128958600
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_csr_rw.2852646114
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_intr_test.1440656769
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_same_csr_outstanding.874511431
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_errors.2889403254
/workspace/coverage/cover_reg_top/14.sysrst_ctrl_tl_intg_err.1596822482
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_mem_rw_with_rand_reset.1398318564
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_csr_rw.3489453011
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_intr_test.2013361035
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_same_csr_outstanding.151981166
/workspace/coverage/cover_reg_top/15.sysrst_ctrl_tl_intg_err.1552707913
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_csr_mem_rw_with_rand_reset.3215391391
/workspace/coverage/cover_reg_top/16.sysrst_ctrl_intr_test.2211799581
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/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.1531674139
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.1830239746
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3948916526
/workspace/coverage/default/4.sysrst_ctrl_smoke.2964389777
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.978704249
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.1816322316
/workspace/coverage/default/40.sysrst_ctrl_alert_test.3354138480
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.941605466
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.2712768108
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2452847424
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1178197262
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1011990299
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.686274318
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.1001472119
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1751988619
/workspace/coverage/default/40.sysrst_ctrl_smoke.2186108427
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2420658575
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.4294857907
/workspace/coverage/default/41.sysrst_ctrl_alert_test.179133841
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.3470872845
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3107360350
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.523747983
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.203909872
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.324162578
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.130071599
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.478698657
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.3718309642
/workspace/coverage/default/41.sysrst_ctrl_smoke.163036787
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3618371765
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2907441600
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.2592077342
/workspace/coverage/default/42.sysrst_ctrl_alert_test.1984439919
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2013715560
/workspace/coverage/default/42.sysrst_ctrl_combo_detect.212998084
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.1373613002
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3308631367
/workspace/coverage/default/42.sysrst_ctrl_edge_detect.1681647446
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.3833314043
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.1121500881
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.658491762
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2886367348
/workspace/coverage/default/42.sysrst_ctrl_smoke.3619318350
/workspace/coverage/default/42.sysrst_ctrl_stress_all.164535409
/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3075580711
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.58154651
/workspace/coverage/default/43.sysrst_ctrl_alert_test.2862484539
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.190774617
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3380104104
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.1879800630
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.1042745094
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.4222511873
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.1889858761
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.4134565610
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.4233972207
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3830306229
/workspace/coverage/default/43.sysrst_ctrl_smoke.1777648540
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1600146540
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.3650113465
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.2210382037
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1623694732
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.4219115230
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.379227109
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1006338903
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.1209505400
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2968451266
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4168571710
/workspace/coverage/default/44.sysrst_ctrl_smoke.2199696481
/workspace/coverage/default/44.sysrst_ctrl_stress_all.177045666
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.390504783
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2762312824
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1427371056
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.4098637267
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3881219340
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.1193911209
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.2597774769
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2482160143
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.3039280646
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.523651803
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.2096987469
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3104857808
/workspace/coverage/default/45.sysrst_ctrl_smoke.1952168502
/workspace/coverage/default/45.sysrst_ctrl_stress_all.1262660350
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.1392960506
/workspace/coverage/default/46.sysrst_ctrl_alert_test.1311722730
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3785552920
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.307677342
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2757911100
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.2891970287
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.507886953
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2116509413
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.3506277361
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.3754543604
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3165955557
/workspace/coverage/default/46.sysrst_ctrl_smoke.3323745328
/workspace/coverage/default/46.sysrst_ctrl_stress_all.150852106
/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3532454006
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.818581378
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1834931264
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.3082579711
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.915713350
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.4179271718
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1965697065
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.236580074
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2773029117
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.3898476964
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1683996236
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.4232868663
/workspace/coverage/default/47.sysrst_ctrl_smoke.2995312630
/workspace/coverage/default/47.sysrst_ctrl_stress_all.4112491302
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.2300622203
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1713426759
/workspace/coverage/default/48.sysrst_ctrl_alert_test.1737506684
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.255529967
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.1459165772
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.4069812336
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.3225377697
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.41231910
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1495144524
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.1060728547
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2530688987
/workspace/coverage/default/48.sysrst_ctrl_smoke.267313492
/workspace/coverage/default/48.sysrst_ctrl_stress_all.2845167353
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1270305785
/workspace/coverage/default/49.sysrst_ctrl_alert_test.3985289174
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.1869224293
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.2401525089
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.678048043
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.4115862540
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3457080298
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.1608133805
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1015871870
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.2913539921
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3952069364
/workspace/coverage/default/49.sysrst_ctrl_smoke.1616299179
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3956580534
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.3473370072
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1805391218
/workspace/coverage/default/5.sysrst_ctrl_alert_test.3973035110
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.1872686967
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1542746771
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2268023761
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1077768406
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.593685979
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1467240593
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.1276209657
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.3379879193
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.101803314
/workspace/coverage/default/5.sysrst_ctrl_smoke.2700379717
/workspace/coverage/default/5.sysrst_ctrl_stress_all.3218291149
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1630434619
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.275772793
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3740231533
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.43619946
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.3397104482
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.4067307053
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.189018790
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.1608924496
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.2243415021
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3738193637
/workspace/coverage/default/6.sysrst_ctrl_alert_test.3524094436
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2252581522
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.1996399023
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2475007231
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.562426578
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2371050577
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3342845185
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.35434312
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2720886564
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3754363044
/workspace/coverage/default/6.sysrst_ctrl_smoke.3366248409
/workspace/coverage/default/6.sysrst_ctrl_stress_all.600168368
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4007109187
/workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.281887798
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1283275598
/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.1940760344
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.1388035196
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2337534540
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.40476018
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.2697637212
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.489544184
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1768446285
/workspace/coverage/default/7.sysrst_ctrl_alert_test.1727634002
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.4195822845
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1114505898
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3601427237
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3165705149
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.173806780
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1717575617
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.683769769
/workspace/coverage/default/7.sysrst_ctrl_smoke.561797481
/workspace/coverage/default/7.sysrst_ctrl_stress_all.4264027116
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.250313578
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.2283814004
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.2358463072
/workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.914397603
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3647628663
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.2130966654
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.1472350031
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2101771398
/workspace/coverage/default/8.sysrst_ctrl_alert_test.1189693025
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.3640859612
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.647982942
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.842502094
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.908007695
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2420767504
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.119921302
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.117037072
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.238920519
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.1449918737
/workspace/coverage/default/8.sysrst_ctrl_smoke.1622192406
/workspace/coverage/default/8.sysrst_ctrl_stress_all.4121992330
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.2596792222
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.2054909251
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2979244673
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.4209793849
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.370993484
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.4239689792
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.1520997456
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1554950092
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.695330344
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1012845967
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3489613237
/workspace/coverage/default/9.sysrst_ctrl_alert_test.4228655285
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3719348437
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3997850014
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.811456928
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.725196599
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.2877737317
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3552896045
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1510127460
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.1208999286
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.9587026
/workspace/coverage/default/9.sysrst_ctrl_smoke.2451497154
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.3588345564
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3202797330
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2161495075
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3816358089
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.319139789
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.3268977591
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1999735151
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.2337809287
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.726052476

Total test records in report: 913

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.725196599	Aug 13 04:54:29 PM PDT 24	Aug 13 04:54:31 PM PDT 24	2957640475 ps
T1	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.3567396833	Aug 13 04:55:07 PM PDT 24	Aug 13 04:55:17 PM PDT 24	4582021937 ps
T5	/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.484772458	Aug 13 04:56:06 PM PDT 24	Aug 13 04:56:11 PM PDT 24	18214386031 ps
T13	/workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.1979936624	Aug 13 04:55:38 PM PDT 24	Aug 13 04:55:45 PM PDT 24	2461546450 ps
T2	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.1636476506	Aug 13 04:55:06 PM PDT 24	Aug 13 04:55:10 PM PDT 24	2575514454 ps
T14	/workspace/coverage/default/15.sysrst_ctrl_stress_all.3450839417	Aug 13 04:54:49 PM PDT 24	Aug 13 04:54:59 PM PDT 24	7091879253 ps
T15	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1378521049	Aug 13 04:55:42 PM PDT 24	Aug 13 04:55:46 PM PDT 24	5021407383 ps
T16	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2872441614	Aug 13 04:53:53 PM PDT 24	Aug 13 04:53:54 PM PDT 24	2219604788 ps
T3	/workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3558759414	Aug 13 04:54:34 PM PDT 24	Aug 13 05:00:16 PM PDT 24	1402680480713 ps
T17	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2294982676	Aug 13 04:54:42 PM PDT 24	Aug 13 04:54:45 PM PDT 24	2102531339 ps
T6	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3601427237	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:29 PM PDT 24	4486241709 ps
T26	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.45783741	Aug 13 04:55:37 PM PDT 24	Aug 13 04:55:47 PM PDT 24	3893018207 ps
T7	/workspace/coverage/default/7.sysrst_ctrl_stress_all.4264027116	Aug 13 04:54:18 PM PDT 24	Aug 13 04:57:44 PM PDT 24	83413855798 ps
T57	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.390504783	Aug 13 04:56:11 PM PDT 24	Aug 13 04:56:27 PM PDT 24	5777272251 ps
T50	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.244848390	Aug 13 04:55:02 PM PDT 24	Aug 13 04:55:07 PM PDT 24	3111864887 ps
T58	/workspace/coverage/default/33.sysrst_ctrl_pin_access_test.3245349306	Aug 13 04:55:41 PM PDT 24	Aug 13 04:55:47 PM PDT 24	2053083704 ps
T25	/workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.2383018933	Aug 13 04:55:04 PM PDT 24	Aug 13 04:55:11 PM PDT 24	2611107892 ps
T59	/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.1403030565	Aug 13 04:56:01 PM PDT 24	Aug 13 04:56:09 PM PDT 24	2610668629 ps
T60	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.830930516	Aug 13 04:56:00 PM PDT 24	Aug 13 04:56:06 PM PDT 24	2015697641 ps
T61	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.1114505898	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:24 PM PDT 24	2583476034 ps
T62	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.1339818158	Aug 13 04:55:05 PM PDT 24	Aug 13 04:55:12 PM PDT 24	2511578512 ps
T63	/workspace/coverage/default/38.sysrst_ctrl_alert_test.3000524604	Aug 13 04:55:57 PM PDT 24	Aug 13 04:55:59 PM PDT 24	2036459648 ps
T76	/workspace/coverage/default/31.sysrst_ctrl_pin_override_test.1408902035	Aug 13 04:55:34 PM PDT 24	Aug 13 04:55:42 PM PDT 24	2514586988 ps
T8	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.1542746771	Aug 13 04:54:19 PM PDT 24	Aug 13 04:56:28 PM PDT 24	97017794055 ps
T65	/workspace/coverage/default/10.sysrst_ctrl_ec_pwr_on_rst.2514423977	Aug 13 04:54:30 PM PDT 24	Aug 13 04:54:33 PM PDT 24	3547126499 ps
T27	/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.3489613237	Aug 13 04:56:37 PM PDT 24	Aug 13 04:58:44 PM PDT 24	45770865224 ps
T32	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2163613840	Aug 13 04:55:38 PM PDT 24	Aug 13 04:55:42 PM PDT 24	5657940177 ps
T81	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3107280924	Aug 13 04:53:56 PM PDT 24	Aug 13 04:54:04 PM PDT 24	8417867382 ps
T82	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.1385089524	Aug 13 04:55:39 PM PDT 24	Aug 13 04:55:41 PM PDT 24	2267944913 ps
T83	/workspace/coverage/default/25.sysrst_ctrl_smoke.342196519	Aug 13 04:55:06 PM PDT 24	Aug 13 04:55:10 PM PDT 24	2116076151 ps
T24	/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.299801736	Aug 13 04:56:24 PM PDT 24	Aug 13 04:56:38 PM PDT 24	34246916266 ps
T9	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.1746150288	Aug 13 04:55:17 PM PDT 24	Aug 13 04:57:06 PM PDT 24	118081753366 ps
T10	/workspace/coverage/default/44.sysrst_ctrl_stress_all.177045666	Aug 13 04:56:09 PM PDT 24	Aug 13 04:56:33 PM PDT 24	11811742273 ps
T84	/workspace/coverage/default/18.sysrst_ctrl_smoke.3818859737	Aug 13 04:54:48 PM PDT 24	Aug 13 04:54:51 PM PDT 24	2118172567 ps
T85	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3621365943	Aug 13 04:54:52 PM PDT 24	Aug 13 05:07:44 PM PDT 24	1139393150975 ps
T217	/workspace/coverage/default/35.sysrst_ctrl_alert_test.457957634	Aug 13 04:55:45 PM PDT 24	Aug 13 04:55:47 PM PDT 24	2028692565 ps
T11	/workspace/coverage/default/0.sysrst_ctrl_edge_detect.3527820151	Aug 13 04:53:59 PM PDT 24	Aug 13 05:16:28 PM PDT 24	851646559317 ps
T51	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.4215056989	Aug 13 04:54:38 PM PDT 24	Aug 13 04:54:48 PM PDT 24	3588304504 ps
T218	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.1683996236	Aug 13 04:56:16 PM PDT 24	Aug 13 04:56:18 PM PDT 24	2144190401 ps
T219	/workspace/coverage/default/29.sysrst_ctrl_pin_access_test.38841929	Aug 13 04:55:24 PM PDT 24	Aug 13 04:55:27 PM PDT 24	2072982129 ps
T77	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2212315475	Aug 13 04:55:38 PM PDT 24	Aug 13 04:55:41 PM PDT 24	2633075229 ps
T270	/workspace/coverage/default/34.sysrst_ctrl_alert_test.2161837161	Aug 13 04:55:41 PM PDT 24	Aug 13 04:55:44 PM PDT 24	2027383519 ps
T285	/workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.2688147651	Aug 13 04:54:31 PM PDT 24	Aug 13 04:54:41 PM PDT 24	3207923363 ps
T12	/workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.658126172	Aug 13 04:55:46 PM PDT 24	Aug 13 04:59:01 PM PDT 24	74380961773 ps
T78	/workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.4174633005	Aug 13 04:55:47 PM PDT 24	Aug 13 04:55:53 PM PDT 24	8725794769 ps
T52	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.3594068730	Aug 13 04:55:55 PM PDT 24	Aug 13 04:56:02 PM PDT 24	7016448558 ps
T318	/workspace/coverage/default/9.sysrst_ctrl_stress_all.1281961909	Aug 13 04:54:27 PM PDT 24	Aug 13 04:54:32 PM PDT 24	9344270214 ps
T53	/workspace/coverage/default/26.sysrst_ctrl_combo_detect.3616767676	Aug 13 04:55:16 PM PDT 24	Aug 13 05:00:03 PM PDT 24	117752652356 ps
T245	/workspace/coverage/default/31.sysrst_ctrl_pin_access_test.2007936172	Aug 13 04:55:35 PM PDT 24	Aug 13 04:55:39 PM PDT 24	2036324158 ps
T246	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1494594442	Aug 13 04:54:30 PM PDT 24	Aug 13 04:54:32 PM PDT 24	2820639841 ps
T42	/workspace/coverage/default/19.sysrst_ctrl_edge_detect.494747394	Aug 13 04:55:03 PM PDT 24	Aug 13 04:55:12 PM PDT 24	4053937363 ps
T247	/workspace/coverage/default/49.sysrst_ctrl_smoke.1616299179	Aug 13 04:56:26 PM PDT 24	Aug 13 04:56:28 PM PDT 24	2126343875 ps
T39	/workspace/coverage/default/21.sysrst_ctrl_combo_detect.1124357950	Aug 13 04:54:58 PM PDT 24	Aug 13 04:56:11 PM PDT 24	104887318140 ps
T36	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3214097307	Aug 13 04:56:19 PM PDT 24	Aug 13 04:57:02 PM PDT 24	59364749911 ps
T34	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2342388477	Aug 13 04:54:02 PM PDT 24	Aug 13 04:54:04 PM PDT 24	2538182748 ps
T248	/workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1586917803	Aug 13 04:55:26 PM PDT 24	Aug 13 04:55:30 PM PDT 24	2513576244 ps
T69	/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1015871870	Aug 13 04:56:26 PM PDT 24	Aug 13 04:56:30 PM PDT 24	2461494336 ps
T37	/workspace/coverage/default/3.sysrst_ctrl_combo_detect.3121520781	Aug 13 04:54:05 PM PDT 24	Aug 13 04:59:58 PM PDT 24	131611773192 ps
T70	/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.130071599	Aug 13 04:56:07 PM PDT 24	Aug 13 04:56:14 PM PDT 24	2471306333 ps
T116	/workspace/coverage/default/10.sysrst_ctrl_pin_access_test.2380702020	Aug 13 04:54:27 PM PDT 24	Aug 13 04:54:29 PM PDT 24	2237728944 ps
T54	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2979244673	Aug 13 04:56:40 PM PDT 24	Aug 13 04:56:56 PM PDT 24	23112900913 ps
T35	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.3752315308	Aug 13 04:55:35 PM PDT 24	Aug 13 04:56:54 PM PDT 24	148963647064 ps
T117	/workspace/coverage/default/23.sysrst_ctrl_smoke.996774909	Aug 13 04:55:07 PM PDT 24	Aug 13 04:55:13 PM PDT 24	2113035005 ps
T118	/workspace/coverage/default/36.sysrst_ctrl_smoke.2367646706	Aug 13 04:55:50 PM PDT 24	Aug 13 04:55:52 PM PDT 24	2135427739 ps
T79	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1668316245	Aug 13 04:56:39 PM PDT 24	Aug 13 04:57:43 PM PDT 24	46811529565 ps
T119	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.1509185075	Aug 13 04:55:13 PM PDT 24	Aug 13 04:55:16 PM PDT 24	3262411829 ps
T38	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.2406280909	Aug 13 04:55:58 PM PDT 24	Aug 13 04:59:20 PM PDT 24	78342933588 ps
T222	/workspace/coverage/default/24.sysrst_ctrl_smoke.3940720253	Aug 13 04:55:06 PM PDT 24	Aug 13 04:55:08 PM PDT 24	2127800662 ps
T223	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.908007695	Aug 13 04:54:30 PM PDT 24	Aug 13 04:54:32 PM PDT 24	3407549077 ps
T80	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2475007231	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:32 PM PDT 24	47546552751 ps
T376	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.2587779720	Aug 13 04:55:46 PM PDT 24	Aug 13 04:55:53 PM PDT 24	2512915546 ps
T71	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.108098090	Aug 13 04:54:32 PM PDT 24	Aug 13 04:54:35 PM PDT 24	2472683191 ps
T55	/workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.2019085391	Aug 13 04:54:04 PM PDT 24	Aug 13 04:54:06 PM PDT 24	3099698653 ps
T379	/workspace/coverage/default/30.sysrst_ctrl_smoke.3597374362	Aug 13 04:55:28 PM PDT 24	Aug 13 04:55:30 PM PDT 24	2131059163 ps
T380	/workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.188292100	Aug 13 04:53:59 PM PDT 24	Aug 13 04:54:07 PM PDT 24	2462583593 ps
T381	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1206616637	Aug 13 04:55:12 PM PDT 24	Aug 13 04:55:13 PM PDT 24	2250930052 ps
T43	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.531187280	Aug 13 04:54:04 PM PDT 24	Aug 13 04:54:10 PM PDT 24	2973947827 ps
T22	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.3551012009	Aug 13 04:53:56 PM PDT 24	Aug 13 04:54:25 PM PDT 24	42093039475 ps
T161	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.683769769	Aug 13 04:54:19 PM PDT 24	Aug 13 04:54:23 PM PDT 24	2518644031 ps
T56	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.3681388260	Aug 13 04:54:06 PM PDT 24	Aug 13 04:54:09 PM PDT 24	3580238352 ps
T72	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.173806780	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:20 PM PDT 24	2481826373 ps
T40	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.1464691545	Aug 13 04:54:44 PM PDT 24	Aug 13 04:54:46 PM PDT 24	17045755359 ps
T162	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3125270099	Aug 13 04:55:17 PM PDT 24	Aug 13 04:55:20 PM PDT 24	2127244251 ps
T48	/workspace/coverage/default/8.sysrst_ctrl_edge_detect.2420767504	Aug 13 04:54:29 PM PDT 24	Aug 13 04:54:31 PM PDT 24	4493357239 ps
T163	/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.2720886564	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:22 PM PDT 24	2073678668 ps
T164	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.489544184	Aug 13 04:56:26 PM PDT 24	Aug 13 04:57:03 PM PDT 24	55884716011 ps
T165	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3080138775	Aug 13 04:54:44 PM PDT 24	Aug 13 04:54:46 PM PDT 24	4063826695 ps
T120	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.1232850197	Aug 13 04:53:54 PM PDT 24	Aug 13 04:56:00 PM PDT 24	147876237127 ps
T382	/workspace/coverage/default/29.sysrst_ctrl_stress_all.486274778	Aug 13 04:55:24 PM PDT 24	Aug 13 04:55:31 PM PDT 24	9992860526 ps
T44	/workspace/coverage/default/25.sysrst_ctrl_edge_detect.2971702437	Aug 13 04:55:15 PM PDT 24	Aug 13 04:55:19 PM PDT 24	3258415558 ps
T383	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.41231910	Aug 13 04:56:14 PM PDT 24	Aug 13 04:56:16 PM PDT 24	2636274606 ps
T384	/workspace/coverage/default/22.sysrst_ctrl_alert_test.372938504	Aug 13 04:55:03 PM PDT 24	Aug 13 04:55:06 PM PDT 24	2022279800 ps
T23	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.275772793	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:23 PM PDT 24	6984525035 ps
T267	/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.2907441600	Aug 13 04:56:08 PM PDT 24	Aug 13 04:56:14 PM PDT 24	10559633631 ps
T286	/workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.1941246881	Aug 13 04:54:50 PM PDT 24	Aug 13 04:55:03 PM PDT 24	4582518688 ps
T377	/workspace/coverage/default/15.sysrst_ctrl_pin_override_test.1441231197	Aug 13 04:54:40 PM PDT 24	Aug 13 04:54:47 PM PDT 24	2510195582 ps
T121	/workspace/coverage/default/9.sysrst_ctrl_combo_detect.3997850014	Aug 13 04:54:27 PM PDT 24	Aug 13 04:55:30 PM PDT 24	103655541919 ps
T385	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.3308631367	Aug 13 04:56:06 PM PDT 24	Aug 13 04:56:10 PM PDT 24	4490259347 ps
T293	/workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.3924400613	Aug 13 04:54:42 PM PDT 24	Aug 13 04:54:46 PM PDT 24	5034787268 ps
T287	/workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.1836545178	Aug 13 04:55:10 PM PDT 24	Aug 13 04:55:27 PM PDT 24	5907322671 ps
T386	/workspace/coverage/default/2.sysrst_ctrl_smoke.1552321923	Aug 13 04:53:54 PM PDT 24	Aug 13 04:54:00 PM PDT 24	2109711981 ps
T66	/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.1713426759	Aug 13 04:56:15 PM PDT 24	Aug 13 04:56:21 PM PDT 24	7030833773 ps
T92	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3738193637	Aug 13 04:56:24 PM PDT 24	Aug 13 04:57:25 PM PDT 24	82917453031 ps
T41	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.2289389287	Aug 13 04:53:54 PM PDT 24	Aug 13 04:54:04 PM PDT 24	4133401060 ps
T193	/workspace/coverage/default/12.sysrst_ctrl_alert_test.727960064	Aug 13 04:54:36 PM PDT 24	Aug 13 04:54:38 PM PDT 24	2046510072 ps
T194	/workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.1166982159	Aug 13 04:55:07 PM PDT 24	Aug 13 04:55:29 PM PDT 24	7611686708 ps
T195	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.2293531165	Aug 13 04:55:46 PM PDT 24	Aug 13 04:55:53 PM PDT 24	2510868405 ps
T196	/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4007109187	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:25 PM PDT 24	4637811291 ps
T197	/workspace/coverage/default/31.sysrst_ctrl_stress_all.1180293281	Aug 13 04:55:37 PM PDT 24	Aug 13 04:55:40 PM PDT 24	6939473968 ps
T122	/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.2268023761	Aug 13 04:54:18 PM PDT 24	Aug 13 04:55:32 PM PDT 24	45420653929 ps
T102	/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.3213528232	Aug 13 04:54:36 PM PDT 24	Aug 13 04:54:45 PM PDT 24	3407010137 ps
T73	/workspace/coverage/default/28.sysrst_ctrl_stress_all.1931789911	Aug 13 04:55:25 PM PDT 24	Aug 13 04:55:45 PM PDT 24	14290013505 ps
T198	/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1630434619	Aug 13 04:54:16 PM PDT 24	Aug 13 04:54:33 PM PDT 24	6769145354 ps
T387	/workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.1876569702	Aug 13 04:55:37 PM PDT 24	Aug 13 04:55:46 PM PDT 24	3060330948 ps
T378	/workspace/coverage/default/13.sysrst_ctrl_pin_override_test.735029727	Aug 13 04:54:40 PM PDT 24	Aug 13 04:54:48 PM PDT 24	2512415379 ps
T388	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.3532454006	Aug 13 04:56:15 PM PDT 24	Aug 13 04:56:26 PM PDT 24	3818150212 ps
T389	/workspace/coverage/default/11.sysrst_ctrl_alert_test.3738446679	Aug 13 04:54:27 PM PDT 24	Aug 13 04:54:30 PM PDT 24	2017944531 ps
T33	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.2325948954	Aug 13 04:55:23 PM PDT 24	Aug 13 04:55:31 PM PDT 24	646065239515 ps
T103	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2986617835	Aug 13 04:55:16 PM PDT 24	Aug 13 04:55:20 PM PDT 24	3362441507 ps
T128	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.1492679362	Aug 13 04:55:07 PM PDT 24	Aug 13 04:55:13 PM PDT 24	2116482303 ps
T123	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1167920588	Aug 13 04:53:54 PM PDT 24	Aug 13 04:54:03 PM PDT 24	3424677609 ps
T129	/workspace/coverage/default/9.sysrst_ctrl_alert_test.4228655285	Aug 13 04:54:29 PM PDT 24	Aug 13 04:54:35 PM PDT 24	2015875398 ps
T130	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.1519800372	Aug 13 04:55:30 PM PDT 24	Aug 13 04:55:32 PM PDT 24	2633128869 ps
T131	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.1548297370	Aug 13 04:55:25 PM PDT 24	Aug 13 05:05:19 PM PDT 24	398519654965 ps
T132	/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.1965697065	Aug 13 04:56:15 PM PDT 24	Aug 13 04:56:18 PM PDT 24	3438073774 ps
T133	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.1078584882	Aug 13 04:55:37 PM PDT 24	Aug 13 04:57:22 PM PDT 24	157709436512 ps
T134	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.1260986017	Aug 13 04:55:57 PM PDT 24	Aug 13 04:56:05 PM PDT 24	3258972503 ps
T249	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3190826265	Aug 13 04:54:18 PM PDT 24	Aug 13 05:01:31 PM PDT 24	160914495509 ps
T239	/workspace/coverage/default/17.sysrst_ctrl_stress_all.755295409	Aug 13 04:54:50 PM PDT 24	Aug 13 04:56:26 PM PDT 24	37436867658 ps
T74	/workspace/coverage/default/39.sysrst_ctrl_stress_all.1375565315	Aug 13 04:55:57 PM PDT 24	Aug 13 04:58:07 PM PDT 24	104980330115 ps
T231	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.763027452	Aug 13 04:54:06 PM PDT 24	Aug 13 04:54:10 PM PDT 24	4417800438 ps
T232	/workspace/coverage/default/33.sysrst_ctrl_alert_test.640106305	Aug 13 04:55:36 PM PDT 24	Aug 13 04:55:39 PM PDT 24	2037193838 ps
T67	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.2420658575	Aug 13 04:55:57 PM PDT 24	Aug 13 04:56:09 PM PDT 24	21114775051 ps
T233	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.131237662	Aug 13 04:54:06 PM PDT 24	Aug 13 04:54:13 PM PDT 24	2422230373 ps
T234	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2129700846	Aug 13 04:55:19 PM PDT 24	Aug 13 04:57:20 PM PDT 24	85707210824 ps
T104	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.2337534540	Aug 13 04:56:27 PM PDT 24	Aug 13 04:57:37 PM PDT 24	26084867015 ps
T235	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2791824522	Aug 13 04:54:41 PM PDT 24	Aug 13 04:54:53 PM PDT 24	4285570772 ps
T75	/workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1627940718	Aug 13 04:54:53 PM PDT 24	Aug 13 04:54:58 PM PDT 24	2466453491 ps
T49	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.4222511873	Aug 13 04:56:08 PM PDT 24	Aug 13 04:56:14 PM PDT 24	2929734681 ps
T68	/workspace/coverage/default/32.sysrst_ctrl_stress_all.4109106126	Aug 13 04:55:39 PM PDT 24	Aug 13 04:57:08 PM PDT 24	38807309674 ps
T390	/workspace/coverage/default/3.sysrst_ctrl_pin_access_test.234991177	Aug 13 04:53:59 PM PDT 24	Aug 13 04:54:01 PM PDT 24	2070140953 ps
T295	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.965699291	Aug 13 04:55:48 PM PDT 24	Aug 13 04:55:49 PM PDT 24	2543200069 ps
T391	/workspace/coverage/default/37.sysrst_ctrl_alert_test.1630837644	Aug 13 04:55:46 PM PDT 24	Aug 13 04:55:48 PM PDT 24	2024661687 ps
T344	/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.678048043	Aug 13 04:56:26 PM PDT 24	Aug 13 04:59:47 PM PDT 24	73489250107 ps
T392	/workspace/coverage/default/28.sysrst_ctrl_smoke.1151696144	Aug 13 04:55:18 PM PDT 24	Aug 13 04:55:20 PM PDT 24	2135722919 ps
T393	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.1142214383	Aug 13 04:54:48 PM PDT 24	Aug 13 04:54:56 PM PDT 24	2887928227 ps
T394	/workspace/coverage/default/45.sysrst_ctrl_smoke.1952168502	Aug 13 04:56:09 PM PDT 24	Aug 13 04:56:12 PM PDT 24	2129244030 ps
T395	/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.3754363044	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:23 PM PDT 24	2510766152 ps
T319	/workspace/coverage/default/41.sysrst_ctrl_combo_detect.3107360350	Aug 13 04:55:56 PM PDT 24	Aug 13 04:56:43 PM PDT 24	70967742666 ps
T46	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.1813177637	Aug 13 04:54:56 PM PDT 24	Aug 13 04:55:04 PM PDT 24	3521534168 ps
T396	/workspace/coverage/default/17.sysrst_ctrl_flash_wr_prot_out.1330240493	Aug 13 04:54:52 PM PDT 24	Aug 13 04:54:54 PM PDT 24	2636606300 ps
T296	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.117037072	Aug 13 04:54:18 PM PDT 24	Aug 13 04:54:20 PM PDT 24	2488310130 ps
T397	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.4065685729	Aug 13 04:54:36 PM PDT 24	Aug 13 04:54:39 PM PDT 24	3458442122 ps
T398	/workspace/coverage/default/14.sysrst_ctrl_stress_all.635827328	Aug 13 04:54:36 PM PDT 24	Aug 13 04:54:57 PM PDT 24	10716767793 ps
T237	/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2161495075	Aug 13 04:56:38 PM PDT 24	Aug 13 04:57:06 PM PDT 24	45629441404 ps
T135	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.465567993	Aug 13 04:55:06 PM PDT 24	Aug 13 04:55:15 PM PDT 24	3387614552 ps
T399	/workspace/coverage/default/14.sysrst_ctrl_smoke.2699449418	Aug 13 04:54:42 PM PDT 24	Aug 13 04:54:45 PM PDT 24	2128537503 ps
T105	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.3877012793	Aug 13 04:54:59 PM PDT 24	Aug 13 04:56:13 PM PDT 24	118067110564 ps
T288	/workspace/coverage/default/27.sysrst_ctrl_stress_all.624489768	Aug 13 04:55:17 PM PDT 24	Aug 13 04:55:24 PM PDT 24	10446158868 ps
T86	/workspace/coverage/default/49.sysrst_ctrl_stress_all.3956580534	Aug 13 04:56:26 PM PDT 24	Aug 13 04:56:51 PM PDT 24	15818360589 ps
T400	/workspace/coverage/default/12.sysrst_ctrl_stress_all.1436958446	Aug 13 04:54:37 PM PDT 24	Aug 13 04:54:46 PM PDT 24	7069642923 ps
T364	/workspace/coverage/default/0.sysrst_ctrl_stress_all.681063301	Aug 13 04:53:53 PM PDT 24	Aug 13 04:54:02 PM PDT 24	13106836983 ps
T87	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.2400787816	Aug 13 04:55:37 PM PDT 24	Aug 13 04:55:41 PM PDT 24	7598959527 ps
T256	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.1478447904	Aug 13 04:54:07 PM PDT 24	Aug 13 04:55:05 PM PDT 24	22012984657 ps
T224	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.1756236316	Aug 13 04:55:36 PM PDT 24	Aug 13 04:56:22 PM PDT 24	49272260947 ps
T277	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3427654445	Aug 13 04:55:49 PM PDT 24	Aug 13 04:55:52 PM PDT 24	3003018043 ps
T278	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2207805420	Aug 13 04:55:47 PM PDT 24	Aug 13 04:55:59 PM PDT 24	4308041183 ps
T279	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.1151584508	Aug 13 04:55:23 PM PDT 24	Aug 13 04:55:28 PM PDT 24	2513553080 ps
T280	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.1357862315	Aug 13 04:54:49 PM PDT 24	Aug 13 04:54:54 PM PDT 24	3343957477 ps
T281	/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.1689626375	Aug 13 04:55:46 PM PDT 24	Aug 13 04:55:48 PM PDT 24	2042160264 ps
T282	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.389246063	Aug 13 04:53:48 PM PDT 24	Aug 13 04:53:52 PM PDT 24	2456970754 ps
T283	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.2530688987	Aug 13 04:56:16 PM PDT 24	Aug 13 04:56:23 PM PDT 24	2512685090 ps
T284	/workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.1893693242	Aug 13 04:54:41 PM PDT 24	Aug 13 04:54:44 PM PDT 24	2464271509 ps
T351	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3075318295	Aug 13 04:55:38 PM PDT 24	Aug 13 04:56:59 PM PDT 24	60769288993 ps
T177	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.385803554	Aug 13 04:55:46 PM PDT 24	Aug 13 04:55:50 PM PDT 24	2790320729 ps
T401	/workspace/coverage/default/37.sysrst_ctrl_smoke.4052144672	Aug 13 04:55:46 PM PDT 24	Aug 13 04:55:49 PM PDT 24	2135872317 ps
T402	/workspace/coverage/default/34.sysrst_ctrl_stress_all.2698142042	Aug 13 04:55:37 PM PDT 24	Aug 13 04:55:46 PM PDT 24	6106694453 ps
T403	/workspace/coverage/default/21.sysrst_ctrl_pin_override_test.2766850857	Aug 13 04:55:03 PM PDT 24	Aug 13 04:55:07 PM PDT 24	2517391052 ps
T250	/workspace/coverage/default/36.sysrst_ctrl_stress_all.2249946902	Aug 13 04:55:46 PM PDT 24	Aug 13 04:57:58 PM PDT 24	145789183730 ps
T404	/workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.3076709608	Aug 13 04:55:26 PM PDT 24	Aug 13 04:55:29 PM PDT 24	4489359813 ps
T47	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.1114734957	Aug 13 04:55:38 PM PDT 24	Aug 13 05:08:46 PM PDT 24	292254415765 ps
T405	/workspace/coverage/default/17.sysrst_ctrl_smoke.3802931868	Aug 13 04:54:49 PM PDT 24	Aug 13 04:54:56 PM PDT 24	2113363662 ps
T216	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2759394294	Aug 13 04:56:26 PM PDT 24	Aug 13 04:57:05 PM PDT 24	59361080446 ps
T406	/workspace/coverage/default/24.sysrst_ctrl_pin_access_test.2039056402	Aug 13 04:55:06 PM PDT 24	Aug 13 04:55:12 PM PDT 24	2060945547 ps
T407	/workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.4090040990	Aug 13 04:55:41 PM PDT 24	Aug 13 04:55:49 PM PDT 24	2611535590 ps
T408	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2026928729	Aug 13 04:55:29 PM PDT 24	Aug 13 05:02:39 PM PDT 24	163416892667 ps
T88	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.2762312824	Aug 13 04:56:11 PM PDT 24	Aug 13 04:56:13 PM PDT 24	3994042258 ps
T409	/workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.3607993988	Aug 13 04:55:13 PM PDT 24	Aug 13 04:55:16 PM PDT 24	3333377804 ps
T410	/workspace/coverage/default/42.sysrst_ctrl_alert_test.1984439919	Aug 13 04:56:09 PM PDT 24	Aug 13 04:56:15 PM PDT 24	2013308496 ps
T411	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.1357369671	Aug 13 04:54:52 PM PDT 24	Aug 13 04:54:59 PM PDT 24	2513554252 ps
T360	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.3958623163	Aug 13 04:55:47 PM PDT 24	Aug 13 05:01:35 PM PDT 24	137906833865 ps
T412	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2683162007	Aug 13 04:54:00 PM PDT 24	Aug 13 04:54:04 PM PDT 24	2361780328 ps
T413	/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.1467240593	Aug 13 04:54:05 PM PDT 24	Aug 13 04:54:08 PM PDT 24	2631491292 ps
T323	/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.1565625806	Aug 13 04:56:27 PM PDT 24	Aug 13 05:00:13 PM PDT 24	93166373777 ps
T414	/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.818581378	Aug 13 04:56:16 PM PDT 24	Aug 13 04:56:21 PM PDT 24	3654115364 ps
T359	/workspace/coverage/default/3.sysrst_ctrl_stress_all.4084116945	Aug 13 04:54:05 PM PDT 24	Aug 13 04:58:58 PM PDT 24	124212247994 ps
T415	/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.523747983	Aug 13 04:55:58 PM PDT 24	Aug 13 04:56:07 PM PDT 24	4636862007 ps
T220	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3647628663	Aug 13 04:56:25 PM PDT 24	Aug 13 04:57:35 PM PDT 24	108868834542 ps
T45	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.3538179000	Aug 13 04:55:06 PM PDT 24	Aug 13 04:55:14 PM PDT 24	4137491662 ps
T416	/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.456398738	Aug 13 04:55:00 PM PDT 24	Aug 13 04:55:06 PM PDT 24	2263274057 ps
T417	/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.2798290047	Aug 13 04:54:35 PM PDT 24	Aug 13 04:54:37 PM PDT 24	2642636738 ps
T124	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.4212732607	Aug 13 04:55:13 PM PDT 24	Aug 13 04:55:21 PM PDT 24	24017035254 ps
T346	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1554950092	Aug 13 04:56:38 PM PDT 24	Aug 13 04:57:08 PM PDT 24	48281774351 ps
T418	/workspace/coverage/default/24.sysrst_ctrl_stress_all.2467591130	Aug 13 04:55:06 PM PDT 24	Aug 13 04:55:27 PM PDT 24	14452161050 ps
T419	/workspace/coverage/default/16.sysrst_ctrl_alert_test.827618850	Aug 13 04:54:52 PM PDT 24	Aug 13 04:54:58 PM PDT 24	2014756550 ps
T157	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.596713749	Aug 13 04:55:26 PM PDT 24	Aug 13 04:55:32 PM PDT 24	3955132750 ps
T420	/workspace/coverage/default/18.sysrst_ctrl_stress_all.1082498856	Aug 13 04:54:50 PM PDT 24	Aug 13 04:54:57 PM PDT 24	9784852900 ps
T421	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.2029110815	Aug 13 04:54:36 PM PDT 24	Aug 13 04:54:37 PM PDT 24	4915132346 ps
T329	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.3139936170	Aug 13 04:55:00 PM PDT 24	Aug 13 04:55:53 PM PDT 24	79895767388 ps
T188	/workspace/coverage/default/15.sysrst_ctrl_edge_detect.3993742225	Aug 13 04:54:37 PM PDT 24	Aug 13 04:54:45 PM PDT 24	3281104495 ps
T422	/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1006338903	Aug 13 04:56:08 PM PDT 24	Aug 13 04:56:16 PM PDT 24	2608968063 ps
T347	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.842502094	Aug 13 04:54:29 PM PDT 24	Aug 13 04:57:10 PM PDT 24	63599178040 ps
T423	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3133177135	Aug 13 04:55:44 PM PDT 24	Aug 13 04:55:46 PM PDT 24	3948717377 ps
T424	/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3220693385	Aug 13 04:55:37 PM PDT 24	Aug 13 04:56:11 PM PDT 24	26147457763 ps
T425	/workspace/coverage/default/30.sysrst_ctrl_in_out_inverted.839415150	Aug 13 04:55:25 PM PDT 24	Aug 13 04:55:32 PM PDT 24	2466668744 ps
T426	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2595705503	Aug 13 04:54:48 PM PDT 24	Aug 13 04:54:50 PM PDT 24	2470780063 ps
T427	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3896351663	Aug 13 04:54:30 PM PDT 24	Aug 13 04:54:33 PM PDT 24	2485997743 ps
T428	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.1658746339	Aug 13 04:54:33 PM PDT 24	Aug 13 04:54:38 PM PDT 24	2512218371 ps
T158	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.507886953	Aug 13 04:56:14 PM PDT 24	Aug 13 04:56:19 PM PDT 24	3172070320 ps
T429	/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2773029117	Aug 13 04:56:14 PM PDT 24	Aug 13 04:56:16 PM PDT 24	2622992999 ps
T430	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.101803314	Aug 13 04:54:05 PM PDT 24	Aug 13 04:54:12 PM PDT 24	2509829430 ps
T181	/workspace/coverage/default/1.sysrst_ctrl_stress_all.1299601235	Aug 13 04:53:56 PM PDT 24	Aug 13 04:54:07 PM PDT 24	15302931522 ps
T431	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.859249400	Aug 13 04:54:50 PM PDT 24	Aug 13 04:54:53 PM PDT 24	2639458683 ps
T432	/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1113491458	Aug 13 04:55:57 PM PDT 24	Aug 13 04:58:27 PM PDT 24	224784100306 ps
T94	/workspace/coverage/default/0.sysrst_ctrl_ultra_low_pwr.3101140045	Aug 13 04:54:02 PM PDT 24	Aug 13 04:54:04 PM PDT 24	4577243955 ps
T136	/workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3282482283	Aug 13 04:56:59 PM PDT 24	Aug 13 04:57:04 PM PDT 24	2620275201 ps
T137	/workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.1783149400	Aug 13 04:55:05 PM PDT 24	Aug 13 04:55:13 PM PDT 24	2613073323 ps
T138	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2678618730	Aug 13 04:53:54 PM PDT 24	Aug 13 04:59:39 PM PDT 24	131855957424 ps
T91	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.2989618712	Aug 13 04:54:30 PM PDT 24	Aug 13 04:54:33 PM PDT 24	3754701653 ps
T139	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.35434312	Aug 13 04:54:17 PM PDT 24	Aug 13 04:54:24 PM PDT 24	2452115261 ps
T125	/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.1805391218	Aug 13 04:56:24 PM PDT 24	Aug 13 04:56:26 PM PDT 24	6432046992 ps
T140	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.1939645116	Aug 13 04:55:37 PM PDT 24	Aug 13 04:55:40 PM PDT 24	3767624831 ps
T106	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.2101771398	Aug 13 04:56:37 PM PDT 24	Aug 13 04:56:55 PM PDT 24	26863746143 ps
T141	/workspace/coverage/default/3.sysrst_ctrl_sec_cm.1935072494	Aug 13 04:54:03 PM PDT 24	Aug 13 04:54:31 PM PDT 24	42117457977 ps
T433	/workspace/coverage/default/30.sysrst_ctrl_alert_test.3062142023	Aug 13 04:55:27 PM PDT 24	Aug 13 04:55:33 PM PDT 24	2011919988 ps
T434	/workspace/coverage/default/22.sysrst_ctrl_stress_all.3702910410	Aug 13 04:55:03 PM PDT 24	Aug 13 04:55:08 PM PDT 24	6672506310 ps
T435	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3169983129	Aug 13 04:55:49 PM PDT 24	Aug 13 04:56:03 PM PDT 24	5258854834 ps
T436	/workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.287604153	Aug 13 04:54:50 PM PDT 24	Aug 13 04:55:01 PM PDT 24	3617492808 ps
T437	/workspace/coverage/default/18.sysrst_ctrl_alert_test.2012651269	Aug 13 04:54:50 PM PDT 24	Aug 13 04:54:53 PM PDT 24	2039012135 ps
T89	/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3994391753	Aug 13 04:56:24 PM PDT 24	Aug 13 04:57:45 PM PDT 24	33213544468 ps
T438	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.1824315585	Aug 13 04:54:54 PM PDT 24	Aug 13 04:55:01 PM PDT 24	2512899813 ps
T439	/workspace/coverage/default/19.sysrst_ctrl_alert_test.3447967296	Aug 13 04:55:02 PM PDT 24	Aug 13 04:55:08 PM PDT 24	2009958447 ps
T440	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2452847424	Aug 13 04:55:59 PM PDT 24	Aug 13 04:56:03 PM PDT 24	2802431823 ps
T441	/workspace/coverage/default/21.sysrst_ctrl_smoke.85516855	Aug 13 04:55:02 PM PDT 24	Aug 13 04:55:04 PM PDT 24	2138701953 ps
T107	/workspace/coverage/default/15.sysrst_ctrl_combo_detect.2877062758	Aug 13 04:54:42 PM PDT 24	Aug 13 04:57:40 PM PDT 24	66686058720 ps
T442	/workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.4291369177	Aug 13 04:55:37 PM PDT 24	Aug 13 04:55:39 PM PDT 24	2627561817 ps
T443	/workspace/coverage/default/26.sysrst_ctrl_pin_access_test.3002544819	Aug 13 04:55:15 PM PDT 24	Aug 13 04:55:19 PM PDT 24	2070129890 ps
T444	/workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.2770800660	Aug 13 04:54:31 PM PDT 24	Aug 13 04:54:35 PM PDT 24	2616157064 ps
T322	/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1999735151	Aug 13 04:56:40 PM PDT 24	Aug 13 04:57:31 PM PDT 24	77411405344 ps
T445	/workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.4135260644	Aug 13 04:54:41 PM PDT 24	Aug 13 04:54:44 PM PDT 24	3516862525 ps