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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.33 99.27 96.41 100.00 96.15 98.71 99.42 91.33


Total test records in report: 912
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T153 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.557091622 Aug 16 04:43:14 PM PDT 24 Aug 16 04:43:17 PM PDT 24 3657160095 ps
T296 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.1799936271 Aug 16 04:43:39 PM PDT 24 Aug 16 04:51:44 PM PDT 24 185188997351 ps
T453 /workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.3021688184 Aug 16 04:44:04 PM PDT 24 Aug 16 04:44:08 PM PDT 24 4859018803 ps
T297 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.2675521224 Aug 16 04:43:15 PM PDT 24 Aug 16 04:43:23 PM PDT 24 3152076469 ps
T378 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.3647654083 Aug 16 04:43:18 PM PDT 24 Aug 16 04:46:17 PM PDT 24 69423750231 ps
T230 /workspace/coverage/default/45.sysrst_ctrl_edge_detect.2437817777 Aug 16 04:44:23 PM PDT 24 Aug 16 04:44:25 PM PDT 24 3084703215 ps
T454 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.1626934173 Aug 16 04:43:18 PM PDT 24 Aug 16 04:43:25 PM PDT 24 2468367395 ps
T311 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.439260240 Aug 16 04:43:02 PM PDT 24 Aug 16 04:43:06 PM PDT 24 2522190842 ps
T455 /workspace/coverage/default/43.sysrst_ctrl_alert_test.3416126444 Aug 16 04:44:17 PM PDT 24 Aug 16 04:44:23 PM PDT 24 2015607787 ps
T456 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3501571676 Aug 16 04:43:28 PM PDT 24 Aug 16 04:43:37 PM PDT 24 3914636024 ps
T105 /workspace/coverage/default/29.sysrst_ctrl_auto_blk_key_output.1783638953 Aug 16 04:43:44 PM PDT 24 Aug 16 04:55:21 PM PDT 24 289000435650 ps
T457 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.4187614514 Aug 16 04:43:40 PM PDT 24 Aug 16 04:43:42 PM PDT 24 2198438579 ps
T458 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.3652069960 Aug 16 04:43:17 PM PDT 24 Aug 16 04:43:22 PM PDT 24 2947735527 ps
T184 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.823541698 Aug 16 04:42:57 PM PDT 24 Aug 16 04:43:04 PM PDT 24 4585247626 ps
T459 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1759453645 Aug 16 04:42:39 PM PDT 24 Aug 16 04:42:49 PM PDT 24 3527304877 ps
T460 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.763936537 Aug 16 04:43:53 PM PDT 24 Aug 16 04:43:56 PM PDT 24 2526844140 ps
T461 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1975172153 Aug 16 04:44:15 PM PDT 24 Aug 16 04:44:18 PM PDT 24 2077349300 ps
T371 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.2625909738 Aug 16 04:43:53 PM PDT 24 Aug 16 04:51:01 PM PDT 24 164880780127 ps
T462 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.2398311303 Aug 16 04:43:53 PM PDT 24 Aug 16 04:43:56 PM PDT 24 2282255752 ps
T463 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2365633046 Aug 16 04:44:19 PM PDT 24 Aug 16 04:44:23 PM PDT 24 3364752283 ps
T464 /workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.372398009 Aug 16 04:43:31 PM PDT 24 Aug 16 04:43:41 PM PDT 24 3183780426 ps
T465 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.19461128 Aug 16 04:42:50 PM PDT 24 Aug 16 04:42:58 PM PDT 24 2611036025 ps
T252 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.1369072386 Aug 16 04:43:42 PM PDT 24 Aug 16 04:45:39 PM PDT 24 86389040488 ps
T466 /workspace/coverage/default/3.sysrst_ctrl_smoke.3344525578 Aug 16 04:42:46 PM PDT 24 Aug 16 04:42:52 PM PDT 24 2113557232 ps
T467 /workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.778654267 Aug 16 04:44:03 PM PDT 24 Aug 16 04:44:06 PM PDT 24 2456848819 ps
T468 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.3207887508 Aug 16 04:44:04 PM PDT 24 Aug 16 04:44:08 PM PDT 24 2462695683 ps
T469 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2361949432 Aug 16 04:43:45 PM PDT 24 Aug 16 04:43:47 PM PDT 24 2634714797 ps
T470 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2995809519 Aug 16 04:44:22 PM PDT 24 Aug 16 04:44:26 PM PDT 24 2618886312 ps
T471 /workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.4130207030 Aug 16 04:44:09 PM PDT 24 Aug 16 04:44:11 PM PDT 24 2631455468 ps
T106 /workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3897678984 Aug 16 04:44:50 PM PDT 24 Aug 16 04:45:28 PM PDT 24 27340636873 ps
T472 /workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.2969483123 Aug 16 04:43:50 PM PDT 24 Aug 16 04:43:53 PM PDT 24 3622740365 ps
T473 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4141597897 Aug 16 04:43:05 PM PDT 24 Aug 16 04:46:48 PM PDT 24 160062714965 ps
T474 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.1498779108 Aug 16 04:43:24 PM PDT 24 Aug 16 04:43:28 PM PDT 24 6515289469 ps
T374 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.4028001266 Aug 16 04:43:55 PM PDT 24 Aug 16 04:48:14 PM PDT 24 99395407682 ps
T185 /workspace/coverage/default/23.sysrst_ctrl_edge_detect.2354575189 Aug 16 04:43:29 PM PDT 24 Aug 16 04:43:31 PM PDT 24 3288929411 ps
T475 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.2875279538 Aug 16 04:43:12 PM PDT 24 Aug 16 04:43:29 PM PDT 24 31717696414 ps
T386 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.874134754 Aug 16 04:44:41 PM PDT 24 Aug 16 04:45:47 PM PDT 24 25827440617 ps
T476 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2273869231 Aug 16 04:44:25 PM PDT 24 Aug 16 04:44:34 PM PDT 24 3356907582 ps
T477 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3912158604 Aug 16 04:43:03 PM PDT 24 Aug 16 04:43:09 PM PDT 24 2039223557 ps
T107 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.424372758 Aug 16 04:42:43 PM PDT 24 Aug 16 04:42:48 PM PDT 24 3317404131 ps
T478 /workspace/coverage/default/48.sysrst_ctrl_alert_test.885572797 Aug 16 04:44:42 PM PDT 24 Aug 16 04:44:44 PM PDT 24 2029797065 ps
T479 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3355282315 Aug 16 04:44:32 PM PDT 24 Aug 16 04:44:40 PM PDT 24 2510270928 ps
T130 /workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.612794246 Aug 16 04:42:52 PM PDT 24 Aug 16 04:43:02 PM PDT 24 8291157921 ps
T480 /workspace/coverage/default/39.sysrst_ctrl_stress_all.2014842202 Aug 16 04:44:07 PM PDT 24 Aug 16 04:44:15 PM PDT 24 16772914419 ps
T481 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1264461873 Aug 16 04:44:00 PM PDT 24 Aug 16 04:44:07 PM PDT 24 3228446085 ps
T298 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.645336750 Aug 16 04:42:48 PM PDT 24 Aug 16 04:42:56 PM PDT 24 3094950429 ps
T482 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.778806147 Aug 16 04:44:28 PM PDT 24 Aug 16 04:44:34 PM PDT 24 3401943283 ps
T483 /workspace/coverage/default/19.sysrst_ctrl_smoke.3335772682 Aug 16 04:43:19 PM PDT 24 Aug 16 04:43:25 PM PDT 24 2108512695 ps
T358 /workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.395241324 Aug 16 04:44:40 PM PDT 24 Aug 16 04:46:41 PM PDT 24 180610785262 ps
T484 /workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1026331964 Aug 16 04:43:36 PM PDT 24 Aug 16 04:44:09 PM PDT 24 50427188924 ps
T299 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1008815274 Aug 16 04:43:04 PM PDT 24 Aug 16 04:43:18 PM PDT 24 4959998339 ps
T485 /workspace/coverage/default/38.sysrst_ctrl_smoke.4120823130 Aug 16 04:44:12 PM PDT 24 Aug 16 04:44:16 PM PDT 24 2116084095 ps
T486 /workspace/coverage/default/47.sysrst_ctrl_alert_test.3486248476 Aug 16 04:44:41 PM PDT 24 Aug 16 04:44:46 PM PDT 24 2015128665 ps
T94 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3816786741 Aug 16 04:44:39 PM PDT 24 Aug 16 04:45:34 PM PDT 24 193157866196 ps
T267 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.1343501061 Aug 16 04:42:41 PM PDT 24 Aug 16 04:43:36 PM PDT 24 22010389397 ps
T287 /workspace/coverage/default/22.sysrst_ctrl_alert_test.1343205009 Aug 16 04:43:42 PM PDT 24 Aug 16 04:43:48 PM PDT 24 2009194185 ps
T288 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.4249704090 Aug 16 04:42:40 PM PDT 24 Aug 16 04:42:47 PM PDT 24 2227429651 ps
T289 /workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.1811717904 Aug 16 04:43:53 PM PDT 24 Aug 16 04:53:36 PM PDT 24 840504238096 ps
T290 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3549407867 Aug 16 04:43:24 PM PDT 24 Aug 16 04:43:34 PM PDT 24 2025600870 ps
T258 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.3774806016 Aug 16 04:44:10 PM PDT 24 Aug 16 04:45:29 PM PDT 24 114815561569 ps
T291 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.3462959482 Aug 16 04:43:24 PM PDT 24 Aug 16 04:43:26 PM PDT 24 2634904276 ps
T292 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1062310904 Aug 16 04:44:38 PM PDT 24 Aug 16 04:46:01 PM PDT 24 34530888201 ps
T293 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2159777358 Aug 16 04:43:14 PM PDT 24 Aug 16 04:43:17 PM PDT 24 2488804797 ps
T157 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.1851106850 Aug 16 04:44:14 PM PDT 24 Aug 16 04:44:24 PM PDT 24 12414042471 ps
T163 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2864919712 Aug 16 04:43:02 PM PDT 24 Aug 16 04:43:10 PM PDT 24 2459152584 ps
T164 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.2110225061 Aug 16 04:43:13 PM PDT 24 Aug 16 04:43:21 PM PDT 24 9051157308 ps
T165 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.595408697 Aug 16 04:43:42 PM PDT 24 Aug 16 04:43:50 PM PDT 24 2513804995 ps
T166 /workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.882087699 Aug 16 04:44:15 PM PDT 24 Aug 16 04:44:23 PM PDT 24 2610577636 ps
T167 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2840926601 Aug 16 04:44:19 PM PDT 24 Aug 16 04:44:26 PM PDT 24 2463647417 ps
T168 /workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.2157525005 Aug 16 04:43:10 PM PDT 24 Aug 16 04:43:13 PM PDT 24 3895928712 ps
T169 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.3340012590 Aug 16 04:43:05 PM PDT 24 Aug 16 04:43:14 PM PDT 24 22127605044 ps
T90 /workspace/coverage/default/8.sysrst_ctrl_stress_all.3156206761 Aug 16 04:43:03 PM PDT 24 Aug 16 04:43:06 PM PDT 24 13870342075 ps
T170 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.728881695 Aug 16 04:43:11 PM PDT 24 Aug 16 04:43:21 PM PDT 24 3767085669 ps
T487 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3496876755 Aug 16 04:44:11 PM PDT 24 Aug 16 04:44:16 PM PDT 24 3661506721 ps
T385 /workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1501237585 Aug 16 04:44:37 PM PDT 24 Aug 16 04:48:42 PM PDT 24 101039416010 ps
T268 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.3539733892 Aug 16 04:42:43 PM PDT 24 Aug 16 04:44:31 PM PDT 24 42012016785 ps
T488 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.4002606969 Aug 16 04:42:58 PM PDT 24 Aug 16 04:43:02 PM PDT 24 2058933065 ps
T300 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.1566828708 Aug 16 04:43:58 PM PDT 24 Aug 16 04:44:09 PM PDT 24 12342569249 ps
T489 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2652537561 Aug 16 04:42:58 PM PDT 24 Aug 16 04:43:07 PM PDT 24 3467153577 ps
T490 /workspace/coverage/default/31.sysrst_ctrl_ultra_low_pwr.4142127017 Aug 16 04:43:51 PM PDT 24 Aug 16 04:43:58 PM PDT 24 5888947279 ps
T491 /workspace/coverage/default/42.sysrst_ctrl_alert_test.3982874560 Aug 16 04:44:15 PM PDT 24 Aug 16 04:44:21 PM PDT 24 2011559594 ps
T492 /workspace/coverage/default/39.sysrst_ctrl_alert_test.3996834761 Aug 16 04:44:11 PM PDT 24 Aug 16 04:44:13 PM PDT 24 2062384692 ps
T493 /workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2530863827 Aug 16 04:44:24 PM PDT 24 Aug 16 04:44:29 PM PDT 24 2090409429 ps
T494 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.2228458023 Aug 16 04:43:29 PM PDT 24 Aug 16 04:43:31 PM PDT 24 2629613850 ps
T495 /workspace/coverage/default/7.sysrst_ctrl_stress_all.276795529 Aug 16 04:43:07 PM PDT 24 Aug 16 04:43:16 PM PDT 24 8691648812 ps
T259 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.896425995 Aug 16 04:44:49 PM PDT 24 Aug 16 04:46:09 PM PDT 24 116111436523 ps
T379 /workspace/coverage/default/24.sysrst_ctrl_combo_detect_with_pre_cond.2206145407 Aug 16 04:43:31 PM PDT 24 Aug 16 04:45:57 PM PDT 24 60861637732 ps
T496 /workspace/coverage/default/26.sysrst_ctrl_smoke.2351465117 Aug 16 04:43:35 PM PDT 24 Aug 16 04:43:37 PM PDT 24 2140470126 ps
T154 /workspace/coverage/default/20.sysrst_ctrl_edge_detect.2022307987 Aug 16 04:43:28 PM PDT 24 Aug 16 04:43:39 PM PDT 24 4390265695 ps
T215 /workspace/coverage/default/40.sysrst_ctrl_edge_detect.3503827286 Aug 16 04:44:11 PM PDT 24 Aug 16 04:44:20 PM PDT 24 30758715160 ps
T497 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2076830511 Aug 16 04:44:08 PM PDT 24 Aug 16 04:44:10 PM PDT 24 2120827962 ps
T498 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1410920755 Aug 16 04:44:19 PM PDT 24 Aug 16 04:44:29 PM PDT 24 4293831690 ps
T348 /workspace/coverage/default/19.sysrst_ctrl_stress_all.2039875305 Aug 16 04:43:21 PM PDT 24 Aug 16 04:44:07 PM PDT 24 71113146488 ps
T499 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.3865612523 Aug 16 04:43:11 PM PDT 24 Aug 16 04:43:22 PM PDT 24 3638040966 ps
T500 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1271568739 Aug 16 04:44:00 PM PDT 24 Aug 16 04:44:02 PM PDT 24 2522867621 ps
T501 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.413079576 Aug 16 04:44:02 PM PDT 24 Aug 16 04:44:05 PM PDT 24 2479408509 ps
T285 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.1979798010 Aug 16 04:42:40 PM PDT 24 Aug 16 04:43:04 PM PDT 24 42142084358 ps
T380 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.1391530347 Aug 16 04:43:52 PM PDT 24 Aug 16 04:47:05 PM PDT 24 77416321216 ps
T502 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.345229882 Aug 16 04:43:19 PM PDT 24 Aug 16 04:43:23 PM PDT 24 6468040028 ps
T155 /workspace/coverage/default/37.sysrst_ctrl_edge_detect.3548746269 Aug 16 04:44:10 PM PDT 24 Aug 16 04:44:22 PM PDT 24 4900138672 ps
T503 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.3852406229 Aug 16 04:43:51 PM PDT 24 Aug 16 04:44:00 PM PDT 24 2614469507 ps
T504 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.3976937140 Aug 16 04:44:04 PM PDT 24 Aug 16 04:44:08 PM PDT 24 2615206235 ps
T149 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2385129437 Aug 16 04:42:55 PM PDT 24 Aug 16 04:43:03 PM PDT 24 6011749972 ps
T505 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3265275640 Aug 16 04:44:24 PM PDT 24 Aug 16 04:44:26 PM PDT 24 2531082169 ps
T506 /workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.1133036931 Aug 16 04:43:14 PM PDT 24 Aug 16 04:43:22 PM PDT 24 2643519736 ps
T507 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.3245469099 Aug 16 04:43:54 PM PDT 24 Aug 16 04:44:02 PM PDT 24 2610781906 ps
T508 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1071951857 Aug 16 04:43:15 PM PDT 24 Aug 16 04:43:21 PM PDT 24 2641060828 ps
T344 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3583808198 Aug 16 04:45:09 PM PDT 24 Aug 16 04:47:38 PM PDT 24 161969847004 ps
T231 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1615977127 Aug 16 04:42:41 PM PDT 24 Aug 16 04:42:49 PM PDT 24 3084530649 ps
T509 /workspace/coverage/default/14.sysrst_ctrl_smoke.2344363122 Aug 16 04:43:09 PM PDT 24 Aug 16 04:43:12 PM PDT 24 2119318419 ps
T510 /workspace/coverage/default/33.sysrst_ctrl_stress_all.1066253622 Aug 16 04:44:03 PM PDT 24 Aug 16 04:44:20 PM PDT 24 9260973632 ps
T511 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.2581604935 Aug 16 04:43:43 PM PDT 24 Aug 16 04:43:44 PM PDT 24 6056305936 ps
T512 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1755755143 Aug 16 04:44:48 PM PDT 24 Aug 16 04:46:31 PM PDT 24 82800144611 ps
T513 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.2584673303 Aug 16 04:44:04 PM PDT 24 Aug 16 04:44:07 PM PDT 24 2634184800 ps
T514 /workspace/coverage/default/49.sysrst_ctrl_stress_all.3850972344 Aug 16 04:44:47 PM PDT 24 Aug 16 04:44:55 PM PDT 24 11490063418 ps
T372 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3902596289 Aug 16 04:44:30 PM PDT 24 Aug 16 04:44:45 PM PDT 24 51978522431 ps
T515 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.3395800344 Aug 16 04:43:22 PM PDT 24 Aug 16 04:43:29 PM PDT 24 4042561561 ps
T516 /workspace/coverage/default/29.sysrst_ctrl_pin_access_test.1237733882 Aug 16 04:43:49 PM PDT 24 Aug 16 04:43:52 PM PDT 24 2147523910 ps
T517 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3140416180 Aug 16 04:43:01 PM PDT 24 Aug 16 04:43:07 PM PDT 24 2281223318 ps
T302 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.1298105502 Aug 16 04:44:04 PM PDT 24 Aug 16 04:44:13 PM PDT 24 2976253642 ps
T518 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.4182235049 Aug 16 04:44:09 PM PDT 24 Aug 16 04:44:16 PM PDT 24 2511934368 ps
T519 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3772002795 Aug 16 04:43:17 PM PDT 24 Aug 16 04:43:30 PM PDT 24 2851899322 ps
T520 /workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.423914262 Aug 16 04:44:08 PM PDT 24 Aug 16 04:44:20 PM PDT 24 4638951230 ps
T521 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.1873522114 Aug 16 04:43:14 PM PDT 24 Aug 16 04:43:17 PM PDT 24 2526169519 ps
T522 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.3861914842 Aug 16 04:43:51 PM PDT 24 Aug 16 04:44:02 PM PDT 24 4065160050 ps
T523 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.211382640 Aug 16 04:43:23 PM PDT 24 Aug 16 04:43:27 PM PDT 24 2238885594 ps
T303 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.591838289 Aug 16 04:43:06 PM PDT 24 Aug 16 04:43:14 PM PDT 24 10326572794 ps
T524 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.720432768 Aug 16 04:43:51 PM PDT 24 Aug 16 04:43:58 PM PDT 24 2466205239 ps
T353 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1957093292 Aug 16 04:44:38 PM PDT 24 Aug 16 04:46:16 PM PDT 24 80821083736 ps
T525 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.684963264 Aug 16 04:43:51 PM PDT 24 Aug 16 04:43:58 PM PDT 24 2465297942 ps
T526 /workspace/coverage/default/39.sysrst_ctrl_smoke.707377450 Aug 16 04:44:07 PM PDT 24 Aug 16 04:44:13 PM PDT 24 2110746121 ps
T527 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3319045692 Aug 16 04:42:46 PM PDT 24 Aug 16 04:42:54 PM PDT 24 2610744248 ps
T528 /workspace/coverage/default/44.sysrst_ctrl_stress_all.2705152313 Aug 16 04:44:17 PM PDT 24 Aug 16 04:44:20 PM PDT 24 7834808446 ps
T345 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.4163251333 Aug 16 04:44:12 PM PDT 24 Aug 16 04:45:17 PM PDT 24 100132591694 ps
T236 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.3070036973 Aug 16 04:44:11 PM PDT 24 Aug 16 04:44:44 PM PDT 24 23582706632 ps
T529 /workspace/coverage/default/18.sysrst_ctrl_smoke.1122914918 Aug 16 04:43:15 PM PDT 24 Aug 16 04:43:16 PM PDT 24 2230376896 ps
T530 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.743926544 Aug 16 04:42:42 PM PDT 24 Aug 16 04:42:45 PM PDT 24 2531137693 ps
T531 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3479469112 Aug 16 04:44:24 PM PDT 24 Aug 16 04:44:32 PM PDT 24 2874184611 ps
T532 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4184912228 Aug 16 04:43:03 PM PDT 24 Aug 16 04:43:10 PM PDT 24 2512106277 ps
T533 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1072152098 Aug 16 04:44:14 PM PDT 24 Aug 16 04:44:20 PM PDT 24 2133915888 ps
T534 /workspace/coverage/default/9.sysrst_ctrl_stress_all.2677695940 Aug 16 04:43:04 PM PDT 24 Aug 16 04:43:26 PM PDT 24 9344768804 ps
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T569 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4117766390 Aug 16 04:43:04 PM PDT 24 Aug 16 04:43:15 PM PDT 24 7681692567 ps
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T131 /workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2206003477 Aug 16 04:44:24 PM PDT 24 Aug 16 04:44:27 PM PDT 24 8083640544 ps
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T573 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1665763363 Aug 16 04:44:19 PM PDT 24 Aug 16 04:44:21 PM PDT 24 3385578729 ps
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T582 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.1718602419 Aug 16 04:44:06 PM PDT 24 Aug 16 04:44:14 PM PDT 24 3378278234 ps
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T589 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.442461268 Aug 16 04:43:10 PM PDT 24 Aug 16 04:43:12 PM PDT 24 2892091245 ps
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T132 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.8793811 Aug 16 04:43:17 PM PDT 24 Aug 16 04:43:30 PM PDT 24 20172052341 ps
T319 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2576899647 Aug 16 04:44:32 PM PDT 24 Aug 16 04:44:37 PM PDT 24 3190910319 ps
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T324 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1891425955 Aug 16 04:44:25 PM PDT 24 Aug 16 04:44:33 PM PDT 24 2443339280 ps
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T596 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.3883382709 Aug 16 04:43:09 PM PDT 24 Aug 16 04:43:11 PM PDT 24 8600888342 ps
T597 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.2606087246 Aug 16 04:43:11 PM PDT 24 Aug 16 04:43:13 PM PDT 24 2244923079 ps
T598 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.395642326 Aug 16 04:43:12 PM PDT 24 Aug 16 04:43:47 PM PDT 24 74823826017 ps
T360 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.906697018 Aug 16 04:44:36 PM PDT 24 Aug 16 04:46:15 PM PDT 24 94624571358 ps
T599 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2756560109 Aug 16 04:44:42 PM PDT 24 Aug 16 04:45:08 PM PDT 24 27094548497 ps
T600 /workspace/coverage/default/38.sysrst_ctrl_alert_test.2411696867 Aug 16 04:44:11 PM PDT 24 Aug 16 04:44:17 PM PDT 24 2014020282 ps
T601 /workspace/coverage/default/4.sysrst_ctrl_pin_access_test.4139582252 Aug 16 04:42:46 PM PDT 24 Aug 16 04:42:49 PM PDT 24 2096353027 ps
T227 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.338643045 Aug 16 04:43:44 PM PDT 24 Aug 16 04:43:47 PM PDT 24 2729499360 ps
T354 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.4006927246 Aug 16 04:42:46 PM PDT 24 Aug 16 04:47:47 PM PDT 24 125617207277 ps
T602 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3840823288 Aug 16 04:44:41 PM PDT 24 Aug 16 04:44:48 PM PDT 24 2258097486 ps
T603 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.242822298 Aug 16 04:44:03 PM PDT 24 Aug 16 04:44:10 PM PDT 24 2254658279 ps
T604 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.549478336 Aug 16 04:43:17 PM PDT 24 Aug 16 04:43:20 PM PDT 24 2618186025 ps
T605 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.266647186 Aug 16 04:42:58 PM PDT 24 Aug 16 04:43:02 PM PDT 24 2517632975 ps
T606 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3528839221 Aug 16 04:44:09 PM PDT 24 Aug 16 04:44:15 PM PDT 24 2017317178 ps
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