Total Coverage Summary 

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.33	99.27	96.41	100.00	96.15	98.71	99.42	91.33

Total tests in report: 912

---

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
54.78	54.78	72.27	72.27	59.10	59.10	90.41	90.41	9.62	9.62	73.94	73.94	59.92	59.92	18.20	18.20	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4205802852
67.06	12.28	81.43	9.16	69.79	10.69	92.01	1.60	48.72	39.10	82.74	8.80	72.83	12.91	21.89	3.69	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.543616513
73.58	6.52	85.11	3.68	73.89	4.10	92.47	0.46	73.72	25.00	86.17	3.44	81.31	8.48	22.39	0.49	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1540067305
79.31	5.73	91.38	6.27	82.31	8.42	94.52	2.05	78.85	5.13	91.28	5.10	89.11	7.80	27.74	5.35	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1791520541
83.17	3.86	95.11	3.73	87.23	4.93	96.58	2.05	78.85	0.00	94.79	3.51	92.29	3.18	37.33	9.59	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4001411043
85.52	2.36	96.66	1.55	90.55	3.31	97.03	0.46	78.85	0.00	96.30	1.52	92.97	0.67	46.31	8.98	/workspace/coverage/default/38.sysrst_ctrl_stress_all.601650992
87.22	1.70	97.00	0.34	91.15	0.61	97.03	0.00	80.77	1.92	96.60	0.30	93.74	0.77	54.24	7.93	/workspace/coverage/default/5.sysrst_ctrl_stress_all.984412418
88.66	1.44	97.80	0.80	91.96	0.81	97.03	0.00	86.54	5.77	97.19	0.59	95.86	2.12	54.24	0.00	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.2198787528
89.92	1.26	97.87	0.07	93.12	1.16	97.72	0.68	86.54	0.00	97.30	0.11	95.95	0.10	60.95	6.70	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.3415787102
90.84	0.92	97.87	0.00	93.12	0.00	97.72	0.00	86.54	0.00	97.30	0.00	95.95	0.00	67.40	6.46	/workspace/coverage/default/12.sysrst_ctrl_stress_all.3186500674
91.46	0.62	98.19	0.32	93.45	0.33	97.72	0.00	89.10	2.56	97.56	0.26	96.82	0.87	67.40	0.00	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.4191893930
91.98	0.52	98.34	0.15	93.66	0.20	97.72	0.00	89.10	0.00	97.56	0.00	96.82	0.00	70.66	3.26	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3275643674
92.44	0.46	98.38	0.04	93.73	0.08	97.72	0.00	89.10	0.00	97.60	0.04	96.92	0.10	73.62	2.95	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2111049607
92.88	0.44	98.49	0.11	93.91	0.18	98.17	0.46	90.38	1.28	97.74	0.15	97.21	0.29	74.23	0.62	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.8793811
93.23	0.35	98.49	0.00	93.91	0.00	98.17	0.00	90.38	0.00	97.74	0.00	97.21	0.00	76.69	2.46	/workspace/coverage/default/20.sysrst_ctrl_stress_all.1817927322
93.48	0.25	98.53	0.04	93.91	0.00	98.17	0.00	90.38	0.00	97.74	0.00	97.21	0.00	78.41	1.72	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1885772909
93.72	0.24	98.53	0.00	94.44	0.53	98.17	0.00	90.38	0.00	97.74	0.00	97.40	0.19	79.40	0.98	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2036575172
93.96	0.24	98.58	0.06	94.51	0.08	99.54	1.37	90.38	0.00	97.74	0.00	97.40	0.00	79.58	0.18	/workspace/coverage/default/1.sysrst_ctrl_alert_test.3920398791
94.20	0.24	98.66	0.07	94.57	0.05	99.54	0.00	91.67	1.28	97.82	0.07	97.59	0.19	79.58	0.00	/workspace/coverage/default/29.sysrst_ctrl_edge_detect.2941034192
94.44	0.24	98.66	0.00	94.57	0.00	99.54	0.00	91.67	0.00	97.82	0.00	97.59	0.00	81.24	1.66	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.16616258
94.66	0.22	98.66	0.00	94.67	0.10	99.54	0.00	91.67	0.00	97.82	0.00	97.69	0.10	82.60	1.35	/workspace/coverage/cover_reg_top/4.sysrst_ctrl_csr_bit_bash.3628001843
94.87	0.21	98.71	0.06	94.67	0.00	99.54	0.00	91.67	0.00	97.82	0.00	97.69	0.00	84.01	1.41	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1493777955
95.06	0.19	98.79	0.07	95.02	0.35	99.54	0.00	92.31	0.64	97.93	0.11	97.78	0.10	84.07	0.06	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.892955617
95.25	0.19	98.79	0.00	95.12	0.10	99.54	0.00	92.31	0.00	97.97	0.04	97.78	0.00	85.24	1.17	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.834542516
95.41	0.16	98.82	0.04	95.17	0.05	99.54	0.00	92.95	0.64	98.00	0.04	97.98	0.19	85.42	0.18	/workspace/coverage/default/22.sysrst_ctrl_stress_all.3368316488
95.57	0.15	98.86	0.04	95.20	0.03	99.54	0.00	93.59	0.64	98.04	0.04	98.07	0.10	85.67	0.25	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3409503476
95.71	0.15	98.92	0.06	95.25	0.05	99.54	0.00	94.23	0.64	98.15	0.11	98.17	0.10	85.73	0.06	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.189065058
95.85	0.13	98.92	0.00	95.37	0.13	99.54	0.00	94.23	0.00	98.15	0.00	98.17	0.00	86.53	0.80	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3502706670
95.97	0.12	98.96	0.04	95.40	0.03	99.54	0.00	94.87	0.64	98.19	0.04	98.27	0.10	86.53	0.00	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.3134529287
96.08	0.12	98.99	0.04	95.42	0.03	99.54	0.00	95.51	0.64	98.23	0.04	98.36	0.10	86.53	0.00	/workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.506497507
96.20	0.12	99.03	0.04	95.45	0.03	99.54	0.00	96.15	0.64	98.26	0.04	98.46	0.10	86.53	0.00	/workspace/coverage/default/46.sysrst_ctrl_edge_detect.1299046856
96.32	0.12	99.05	0.02	95.45	0.00	99.54	0.00	96.15	0.00	98.26	0.00	98.46	0.00	87.33	0.80	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2011363961
96.42	0.10	99.05	0.00	95.48	0.03	100.00	0.46	96.15	0.00	98.26	0.00	98.55	0.10	87.45	0.12	/workspace/coverage/default/0.sysrst_ctrl_sec_cm.1343501061
96.52	0.10	99.05	0.00	95.48	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.23	0.67	87.45	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.288616988
96.60	0.08	99.05	0.00	95.50	0.03	100.00	0.00	96.15	0.00	98.26	0.00	99.23	0.00	88.01	0.55	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2487616988
96.67	0.07	99.05	0.00	96.01	0.51	100.00	0.00	96.15	0.00	98.26	0.00	99.23	0.00	88.01	0.00	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_errors.542971891
96.74	0.07	99.05	0.00	96.01	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.23	0.00	88.50	0.49	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2766823979
96.79	0.04	99.05	0.00	96.01	0.00	100.00	0.00	96.15	0.00	98.26	0.00	99.23	0.00	88.81	0.31	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.156216172
96.82	0.04	99.07	0.02	96.06	0.05	100.00	0.00	96.15	0.00	98.30	0.04	99.33	0.10	88.87	0.06	/workspace/coverage/default/21.sysrst_ctrl_stress_all.2886808807
96.86	0.04	99.10	0.04	96.21	0.15	100.00	0.00	96.15	0.00	98.37	0.07	99.33	0.00	88.87	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.3847115917
96.90	0.04	99.10	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.37	0.00	99.33	0.00	89.11	0.25	/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.3271132076
96.92	0.03	99.10	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.37	0.00	99.33	0.00	89.30	0.18	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2808500396
96.95	0.03	99.10	0.00	96.21	0.00	100.00	0.00	96.15	0.00	98.37	0.00	99.33	0.00	89.48	0.18	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.4262832689
96.98	0.03	99.10	0.00	96.23	0.03	100.00	0.00	96.15	0.00	98.37	0.00	99.42	0.10	89.54	0.06	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.2699405838
97.00	0.02	99.14	0.04	96.23	0.00	100.00	0.00	96.15	0.00	98.45	0.07	99.42	0.00	89.61	0.06	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3373882345
97.02	0.02	99.14	0.00	96.23	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	89.73	0.12	/workspace/coverage/default/17.sysrst_ctrl_stress_all.4166329509
97.04	0.02	99.14	0.00	96.23	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	89.85	0.12	/workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.3663789480
97.05	0.02	99.14	0.00	96.23	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	89.98	0.12	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1781203621
97.07	0.02	99.14	0.00	96.23	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.10	0.12	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.1299213129
97.09	0.02	99.14	0.00	96.23	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.22	0.12	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.723706684
97.11	0.02	99.14	0.00	96.23	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.34	0.12	/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1423641033
97.12	0.01	99.14	0.00	96.26	0.03	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.41	0.06	/workspace/coverage/cover_reg_top/16.sysrst_ctrl_tl_intg_err.2679110700
97.13	0.01	99.14	0.00	96.28	0.03	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.47	0.06	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2205371516
97.14	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.53	0.06	/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3523878566
97.15	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.59	0.06	/workspace/coverage/cover_reg_top/3.sysrst_ctrl_csr_hw_reset.2815215707
97.16	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.65	0.06	/workspace/coverage/default/1.sysrst_ctrl_stress_all.2071923862
97.17	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.71	0.06	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.3902596289
97.17	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.77	0.06	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.1854612116
97.18	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.84	0.06	/workspace/coverage/default/26.sysrst_ctrl_combo_detect_with_pre_cond.3940933853
97.19	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.90	0.06	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.4162706606
97.20	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	90.96	0.06	/workspace/coverage/default/29.sysrst_ctrl_stress_all.790524605
97.21	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	91.02	0.06	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3986918027
97.22	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	91.08	0.06	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.1481759502
97.23	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	91.14	0.06	/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.3322198287
97.24	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	91.21	0.06	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3500438679
97.25	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	91.27	0.06	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3003993802
97.25	0.01	99.14	0.00	96.28	0.00	100.00	0.00	96.15	0.00	98.45	0.00	99.42	0.00	91.33	0.06	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3753937042
97.26	0.01	99.16	0.02	96.28	0.00	100.00	0.00	96.15	0.00	98.48	0.04	99.42	0.00	91.33	0.00	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.4218307601
97.27	0.01	99.18	0.02	96.28	0.00	100.00	0.00	96.15	0.00	98.52	0.04	99.42	0.00	91.33	0.00	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.3224038790
97.28	0.01	99.20	0.02	96.28	0.00	100.00	0.00	96.15	0.00	98.56	0.04	99.42	0.00	91.33	0.00	/workspace/coverage/default/23.sysrst_ctrl_edge_detect.2354575189
97.29	0.01	99.22	0.02	96.28	0.00	100.00	0.00	96.15	0.00	98.60	0.04	99.42	0.00	91.33	0.00	/workspace/coverage/default/35.sysrst_ctrl_stress_all.639967001
97.29	0.01	99.23	0.02	96.28	0.00	100.00	0.00	96.15	0.00	98.63	0.04	99.42	0.00	91.33	0.00	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2880278783
97.30	0.01	99.25	0.02	96.28	0.00	100.00	0.00	96.15	0.00	98.67	0.04	99.42	0.00	91.33	0.00	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.2402459235
97.31	0.01	99.27	0.02	96.28	0.00	100.00	0.00	96.15	0.00	98.71	0.04	99.42	0.00	91.33	0.00	/workspace/coverage/default/44.sysrst_ctrl_edge_detect.2717082993
97.31	0.01	99.27	0.00	96.31	0.03	100.00	0.00	96.15	0.00	98.71	0.00	99.42	0.00	91.33	0.00	/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.1336215328
97.32	0.01	99.27	0.00	96.33	0.03	100.00	0.00	96.15	0.00	98.71	0.00	99.42	0.00	91.33	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.3641113987
97.32	0.01	99.27	0.00	96.36	0.03	100.00	0.00	96.15	0.00	98.71	0.00	99.42	0.00	91.33	0.00	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.1788892349
97.32	0.01	99.27	0.00	96.39	0.03	100.00	0.00	96.15	0.00	98.71	0.00	99.42	0.00	91.33	0.00	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.3036737767

---

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.593058846
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.1952366833
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.195213073
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.579280799
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.1740891596
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.3655726569
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.788739913
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.432455656
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.2695559541
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.1695971692
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.2927222022
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.2880221034
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.4123021988
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.2496185402
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.3510125219
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.2520170622
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.4144755917
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.651641511
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.1486089415
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.2468198692
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/workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3863676452
/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.255411440
/workspace/coverage/default/38.sysrst_ctrl_alert_test.2411696867
/workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3496876755
/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.2595119766
/workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.898312755
/workspace/coverage/default/38.sysrst_ctrl_edge_detect.3259828436
/workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.204446225
/workspace/coverage/default/38.sysrst_ctrl_in_out_inverted.4236849874
/workspace/coverage/default/38.sysrst_ctrl_pin_access_test.2076830511
/workspace/coverage/default/38.sysrst_ctrl_smoke.4120823130
/workspace/coverage/default/39.sysrst_ctrl_alert_test.3996834761
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.1267110859
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.3829689575
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/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.4130207030
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/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.423914262
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2865821506
/workspace/coverage/default/4.sysrst_ctrl_alert_test.3211396711
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.4011801211
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.3565036087
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.2216775110
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3140416180
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.2131473527
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.4261302504
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3319045692
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.2864919712
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.4139582252
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.4184912228
/workspace/coverage/default/4.sysrst_ctrl_sec_cm.3340012590
/workspace/coverage/default/4.sysrst_ctrl_smoke.1127871355
/workspace/coverage/default/4.sysrst_ctrl_stress_all.1541066777
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1302711315
/workspace/coverage/default/40.sysrst_ctrl_alert_test.1864791359
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.1665763363
/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3774806016
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.321350616
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2977767130
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.3503827286
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1563901469
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1287081239
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4079882067
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.2809428590
/workspace/coverage/default/40.sysrst_ctrl_smoke.4244079922
/workspace/coverage/default/40.sysrst_ctrl_stress_all.369191377
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.155104739
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1576405790
/workspace/coverage/default/41.sysrst_ctrl_alert_test.1391412059
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.2127923861
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.4163251333
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.71975370
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2194229607
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.128537718
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.50364919
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.3528839221
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1909930216
/workspace/coverage/default/41.sysrst_ctrl_smoke.2467463197
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3434254747
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.4191876025
/workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3036297214
/workspace/coverage/default/42.sysrst_ctrl_alert_test.3982874560
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.2365633046
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.845778468
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2670855011
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.624318795
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/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3440182569
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/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3424515708
/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1654528767
/workspace/coverage/default/43.sysrst_ctrl_alert_test.3416126444
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.842129778
/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.2349551946
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3340524480
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1223980198
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.882087699
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.679710951
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1975172153
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.3185102249
/workspace/coverage/default/43.sysrst_ctrl_smoke.4172900030
/workspace/coverage/default/43.sysrst_ctrl_stress_all.795246223
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3628759169
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.2667303756
/workspace/coverage/default/44.sysrst_ctrl_alert_test.3057970078
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2642874333
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.1343891794
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1410920755
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.3203033595
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/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.1072152098
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.3011646845
/workspace/coverage/default/44.sysrst_ctrl_smoke.1727216254
/workspace/coverage/default/44.sysrst_ctrl_stress_all.2705152313
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1180521727
/workspace/coverage/default/45.sysrst_ctrl_alert_test.1121236623
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.2273869231
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.396413744
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.3479469112
/workspace/coverage/default/45.sysrst_ctrl_edge_detect.2437817777
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2554486973
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.4054194105
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1361053719
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3141205796
/workspace/coverage/default/45.sysrst_ctrl_smoke.3556284158
/workspace/coverage/default/45.sysrst_ctrl_stress_all.997759984
/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.60029303
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.2206003477
/workspace/coverage/default/46.sysrst_ctrl_alert_test.4064917799
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.3297317492
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2531408661
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1704284441
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.3164210800
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.668142375
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.149969456
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.3265275640
/workspace/coverage/default/46.sysrst_ctrl_smoke.2958090889
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3583808198
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.1122223874
/workspace/coverage/default/47.sysrst_ctrl_alert_test.3486248476
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.2955622074
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1391612848
/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3489859874
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2304204005
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.197192269
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.2995809519
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.1891425955
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.2530863827
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.1850668915
/workspace/coverage/default/47.sysrst_ctrl_smoke.4050844238
/workspace/coverage/default/47.sysrst_ctrl_stress_all.1621228988
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.3817423131
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.4083639432
/workspace/coverage/default/48.sysrst_ctrl_alert_test.885572797
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.2576899647
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.896425995
/workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.778806147
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1405649843
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2790457671
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2193130138
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.3840823288
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3355282315
/workspace/coverage/default/48.sysrst_ctrl_smoke.4285900178
/workspace/coverage/default/48.sysrst_ctrl_stress_all.847276314
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.33115281
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2549920569
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.3454618851
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.2756560109
/workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1292398277
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.1403836040
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.4272537043
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.2024530213
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3870304679
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.890417253
/workspace/coverage/default/49.sysrst_ctrl_smoke.1515233625
/workspace/coverage/default/49.sysrst_ctrl_stress_all.3850972344
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.1555608773
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.3816786741
/workspace/coverage/default/5.sysrst_ctrl_alert_test.269873784
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.645336750
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2672271199
/workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1061368740
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2700888684
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.3562489250
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.3320574545
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.4274666331
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.324033816
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.1601095916
/workspace/coverage/default/5.sysrst_ctrl_smoke.1492470661
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.437247765
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.2385129437
/workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.906697018
/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4199864567
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2187416803
/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.1062310904
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2013516113
/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.644066138
/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1221547801
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3685286241
/workspace/coverage/default/6.sysrst_ctrl_alert_test.4024680295
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1420449385
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.395642326
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.728881695
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.3096257387
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3300724140
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1667883775
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3912158604
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.439260240
/workspace/coverage/default/6.sysrst_ctrl_smoke.2278462429
/workspace/coverage/default/6.sysrst_ctrl_stress_all.3880809600
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3794963567
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.1963759280
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.3632819560
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.395241324
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3752952105
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3460194408
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1957093292
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1612027247
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1154997821
/workspace/coverage/default/7.sysrst_ctrl_alert_test.4091748132
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2652537561
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.3311990282
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.4141597897
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.121269589
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2067761106
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1343205746
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2912078605
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.1237929214
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1037464499
/workspace/coverage/default/7.sysrst_ctrl_smoke.49777343
/workspace/coverage/default/7.sysrst_ctrl_stress_all.276795529
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.3942936729
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.4217003084
/workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.874134754
/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1501237585
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.2344499252
/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3431653337
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3687790964
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.3897678984
/workspace/coverage/default/8.sysrst_ctrl_alert_test.2254989824
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1378659861
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2329097029
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.442461268
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.666212360
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1587515094
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.765343288
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2749485074
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.266647186
/workspace/coverage/default/8.sysrst_ctrl_smoke.2489037768
/workspace/coverage/default/8.sysrst_ctrl_stress_all.3156206761
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1008815274
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.612794246
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2329034375
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.3002842567
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1273083897
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.3498195857
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.412946574
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1766940620
/workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.1841824668
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2340255468
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.16320283
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4049110395
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.1607598025
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.615941933
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.557091622
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.1289856398
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1679676400
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.4002606969
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2595926237
/workspace/coverage/default/9.sysrst_ctrl_smoke.365062611
/workspace/coverage/default/9.sysrst_ctrl_stress_all.2677695940
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.4117766390
/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.4053430086
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1390786586
/workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.1755755143
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.740895486
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.3926905484
/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.4076992974
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.3650882277
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.316254050

---

Total test records in report: 912

---

tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

---

TEST NO	TEST LOCATION	TEST NAME	STATUS	STARTED	FINISHED	SIMULATION TIME
T4	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.3438180928			Aug 16 04:43:08 PM PDT 24	Aug 16 04:43:15 PM PDT 24	2512506287 ps
T5	/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.2670855011			Aug 16 04:44:16 PM PDT 24	Aug 16 04:49:08 PM PDT 24	122552022465 ps
T1	/workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.892955617			Aug 16 04:43:35 PM PDT 24	Aug 16 04:43:39 PM PDT 24	8457735828 ps
T2	/workspace/coverage/default/43.sysrst_ctrl_combo_detect.4205802852			Aug 16 04:44:17 PM PDT 24	Aug 16 04:45:27 PM PDT 24	66873292197 ps
T13	/workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.1652200835			Aug 16 04:43:02 PM PDT 24	Aug 16 04:43:06 PM PDT 24	4070708189 ps
T14	/workspace/coverage/default/8.sysrst_ctrl_alert_test.2254989824			Aug 16 04:43:14 PM PDT 24	Aug 16 04:43:18 PM PDT 24	2017047642 ps
T3	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.1273083897			Aug 16 04:44:52 PM PDT 24	Aug 16 04:49:29 PM PDT 24	106678255792 ps
T15	/workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.270866122			Aug 16 04:42:39 PM PDT 24	Aug 16 04:42:41 PM PDT 24	2243192994 ps
T6	/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.4001411043			Aug 16 04:44:17 PM PDT 24	Aug 16 04:44:33 PM PDT 24	23041362784 ps
T16	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.3752952105			Aug 16 04:44:46 PM PDT 24	Aug 16 04:45:03 PM PDT 24	26104652093 ps
T7	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1791520541			Aug 16 04:43:27 PM PDT 24	Aug 16 04:45:31 PM PDT 24	96449933224 ps
T17	/workspace/coverage/default/16.sysrst_ctrl_alert_test.255556635			Aug 16 04:43:19 PM PDT 24	Aug 16 04:43:20 PM PDT 24	2170208511 ps
T45	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.1493777955			Aug 16 04:44:54 PM PDT 24	Aug 16 04:46:44 PM PDT 24	42216432872 ps
T55	/workspace/coverage/default/32.sysrst_ctrl_alert_test.1002957340			Aug 16 04:44:08 PM PDT 24	Aug 16 04:44:13 PM PDT 24	2014804364 ps
T8	/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3687790964			Aug 16 04:44:49 PM PDT 24	Aug 16 04:47:55 PM PDT 24	71446155560 ps
T26	/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.3141205796			Aug 16 04:44:30 PM PDT 24	Aug 16 04:44:34 PM PDT 24	2518228411 ps
T25	/workspace/coverage/default/38.sysrst_ctrl_stress_all.601650992			Aug 16 04:44:08 PM PDT 24	Aug 16 04:44:14 PM PDT 24	8882374952 ps
T72	/workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1621508198			Aug 16 04:42:41 PM PDT 24	Aug 16 04:42:46 PM PDT 24	6334231896 ps
T46	/workspace/coverage/default/14.sysrst_ctrl_combo_detect_with_pre_cond.721638112			Aug 16 04:43:13 PM PDT 24	Aug 16 04:44:16 PM PDT 24	51548093308 ps
T73	/workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.1355522509			Aug 16 04:43:24 PM PDT 24	Aug 16 04:43:26 PM PDT 24	2635481769 ps
T74	/workspace/coverage/default/25.sysrst_ctrl_pin_override_test.4262832689			Aug 16 04:43:42 PM PDT 24	Aug 16 04:43:44 PM PDT 24	2555913797 ps
T9	/workspace/coverage/default/48.sysrst_ctrl_stress_all.847276314			Aug 16 04:44:28 PM PDT 24	Aug 16 04:44:53 PM PDT 24	11086134612 ps
T23	/workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2258878315			Aug 16 04:44:03 PM PDT 24	Aug 16 04:44:06 PM PDT 24	2459501970 ps
T160	/workspace/coverage/default/5.sysrst_ctrl_alert_test.269873784			Aug 16 04:42:52 PM PDT 24	Aug 16 04:42:54 PM PDT 24	2045418680 ps
T161	/workspace/coverage/default/40.sysrst_ctrl_alert_test.1864791359			Aug 16 04:44:10 PM PDT 24	Aug 16 04:44:13 PM PDT 24	2032016301 ps
T47	/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1390786586			Aug 16 04:44:51 PM PDT 24	Aug 16 04:47:22 PM PDT 24	62643884895 ps
T10	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.2425479321			Aug 16 04:43:13 PM PDT 24	Aug 16 04:48:53 PM PDT 24	205908033389 ps
T11	/workspace/coverage/default/48.sysrst_ctrl_edge_detect.1405649843			Aug 16 04:44:32 PM PDT 24	Aug 16 04:44:39 PM PDT 24	2589863738 ps
T162	/workspace/coverage/default/27.sysrst_ctrl_alert_test.21488224			Aug 16 04:43:53 PM PDT 24	Aug 16 04:43:58 PM PDT 24	2014002716 ps
T24	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.1514642859			Aug 16 04:43:36 PM PDT 24	Aug 16 04:43:43 PM PDT 24	2453689380 ps
T68	/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.2193130138			Aug 16 04:44:36 PM PDT 24	Aug 16 04:44:38 PM PDT 24	2502204121 ps
T75	/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.620283525			Aug 16 04:43:50 PM PDT 24	Aug 16 04:43:58 PM PDT 24	2611594731 ps
T224	/workspace/coverage/default/28.sysrst_ctrl_alert_test.2200726495			Aug 16 04:43:48 PM PDT 24	Aug 16 04:43:54 PM PDT 24	2011695302 ps
T225	/workspace/coverage/default/20.sysrst_ctrl_smoke.1892111785			Aug 16 04:43:20 PM PDT 24	Aug 16 04:43:23 PM PDT 24	2131090451 ps
T76	/workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.4217707738			Aug 16 04:44:04 PM PDT 24	Aug 16 04:44:11 PM PDT 24	2614461064 ps
T77	/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2554486973			Aug 16 04:44:25 PM PDT 24	Aug 16 04:44:26 PM PDT 24	2732325074 ps
T226	/workspace/coverage/default/30.sysrst_ctrl_smoke.837327003			Aug 16 04:43:58 PM PDT 24	Aug 16 04:44:02 PM PDT 24	2116064326 ps
T78	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.834542516			Aug 16 04:44:07 PM PDT 24	Aug 16 04:44:14 PM PDT 24	2510611146 ps
T79	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2487616988			Aug 16 04:44:00 PM PDT 24	Aug 16 04:44:03 PM PDT 24	2524332990 ps
T394	/workspace/coverage/default/1.sysrst_ctrl_alert_test.3920398791			Aug 16 04:42:42 PM PDT 24	Aug 16 04:42:46 PM PDT 24	2021718203 ps
T308	/workspace/coverage/default/1.sysrst_ctrl_pin_override_test.1045957868			Aug 16 04:42:43 PM PDT 24	Aug 16 04:42:46 PM PDT 24	2533577228 ps
T12	/workspace/coverage/default/31.sysrst_ctrl_edge_detect.13853151			Aug 16 04:43:57 PM PDT 24	Aug 16 04:44:03 PM PDT 24	5523587306 ps
T63	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.1019210237			Aug 16 04:42:42 PM PDT 24	Aug 16 04:44:46 PM PDT 24	105046150108 ps
T21	/workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.2392364315			Aug 16 04:44:03 PM PDT 24	Aug 16 04:44:14 PM PDT 24	35223307710 ps
T135	/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.128537718			Aug 16 04:44:10 PM PDT 24	Aug 16 04:44:15 PM PDT 24	2619721203 ps
T136	/workspace/coverage/default/31.sysrst_ctrl_alert_test.2984246359			Aug 16 04:44:00 PM PDT 24	Aug 16 04:44:01 PM PDT 24	2055954535 ps
T32	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.882209962			Aug 16 04:43:17 PM PDT 24	Aug 16 04:43:52 PM PDT 24	61301059495 ps
T69	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.2630706829			Aug 16 04:43:14 PM PDT 24	Aug 16 04:43:21 PM PDT 24	2449590320 ps
T137	/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.1361053719			Aug 16 04:44:26 PM PDT 24	Aug 16 04:44:28 PM PDT 24	2038857104 ps
T138	/workspace/coverage/default/46.sysrst_ctrl_alert_test.4064917799			Aug 16 04:44:23 PM PDT 24	Aug 16 04:44:25 PM PDT 24	2030088548 ps
T139	/workspace/coverage/default/29.sysrst_ctrl_smoke.1065283095			Aug 16 04:43:45 PM PDT 24	Aug 16 04:43:51 PM PDT 24	2112308487 ps
T70	/workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.386523269			Aug 16 04:42:39 PM PDT 24	Aug 16 04:42:43 PM PDT 24	2464057772 ps
T27	/workspace/coverage/default/0.sysrst_ctrl_auto_blk_key_output.4218307601			Aug 16 04:42:39 PM PDT 24	Aug 16 04:42:48 PM PDT 24	3628978078 ps
T22	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1540067305			Aug 16 04:43:05 PM PDT 24	Aug 16 04:43:23 PM PDT 24	8072683729 ps
T38	/workspace/coverage/default/13.sysrst_ctrl_edge_detect.3993317944			Aug 16 04:44:30 PM PDT 24	Aug 16 04:44:40 PM PDT 24	3710703772 ps
T56	/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.4772911			Aug 16 04:43:28 PM PDT 24	Aug 16 04:43:32 PM PDT 24	2457451870 ps
T57	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.3440182569			Aug 16 04:44:09 PM PDT 24	Aug 16 04:44:13 PM PDT 24	2522817459 ps
T58	/workspace/coverage/default/25.sysrst_ctrl_smoke.1557411105			Aug 16 04:43:29 PM PDT 24	Aug 16 04:43:36 PM PDT 24	2114216224 ps
T59	/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.2766823979			Aug 16 04:43:08 PM PDT 24	Aug 16 04:45:55 PM PDT 24	127273352360 ps
T60	/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3275643674			Aug 16 04:44:49 PM PDT 24	Aug 16 04:46:09 PM PDT 24	134917995092 ps
T61	/workspace/coverage/default/12.sysrst_ctrl_in_out_inverted.1795881361			Aug 16 04:43:12 PM PDT 24	Aug 16 04:43:14 PM PDT 24	2474315196 ps
T28	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.543616513			Aug 16 04:42:39 PM PDT 24	Aug 16 04:43:03 PM PDT 24	37885400786 ps
T64	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2626164516			Aug 16 04:43:16 PM PDT 24	Aug 16 04:43:17 PM PDT 24	8554646361 ps
T216	/workspace/coverage/default/22.sysrst_ctrl_smoke.1757268061			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:27 PM PDT 24	2116977167 ps
T71	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1679676400			Aug 16 04:43:02 PM PDT 24	Aug 16 04:43:10 PM PDT 24	2460109219 ps
T233	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.1624760450			Aug 16 04:43:45 PM PDT 24	Aug 16 04:44:57 PM PDT 24	109090726937 ps
T41	/workspace/coverage/default/17.sysrst_ctrl_stress_all.4166329509			Aug 16 04:44:31 PM PDT 24	Aug 16 05:09:45 PM PDT 24	589716826077 ps
T234	/workspace/coverage/default/27.sysrst_ctrl_pin_access_test.2186263302			Aug 16 04:43:52 PM PDT 24	Aug 16 04:43:54 PM PDT 24	2168057750 ps
T235	/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.155104739			Aug 16 04:44:09 PM PDT 24	Aug 16 04:44:17 PM PDT 24	4903900184 ps
T44	/workspace/coverage/default/21.sysrst_ctrl_edge_detect.4219901524			Aug 16 04:43:24 PM PDT 24	Aug 16 04:43:32 PM PDT 24	3056873711 ps
T33	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.3696377625			Aug 16 04:44:16 PM PDT 24	Aug 16 04:46:36 PM PDT 24	168068190232 ps
T395	/workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.3932188182			Aug 16 04:43:44 PM PDT 24	Aug 16 04:43:51 PM PDT 24	2609034043 ps
T126	/workspace/coverage/default/45.sysrst_ctrl_combo_detect.396413744			Aug 16 04:44:22 PM PDT 24	Aug 16 04:48:38 PM PDT 24	132310511612 ps
T29	/workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.626753717			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:26 PM PDT 24	3286608390 ps
T237	/workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.3489859874			Aug 16 04:44:46 PM PDT 24	Aug 16 04:48:12 PM PDT 24	81194995482 ps
T396	/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.121269589			Aug 16 04:42:51 PM PDT 24	Aug 16 04:45:45 PM PDT 24	336013931457 ps
T84	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.2111049607			Aug 16 04:44:16 PM PDT 24	Aug 16 04:45:17 PM PDT 24	96857513979 ps
T245	/workspace/coverage/default/33.sysrst_ctrl_smoke.2792909721			Aug 16 04:44:00 PM PDT 24	Aug 16 04:44:03 PM PDT 24	2129389044 ps
T246	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2074418723			Aug 16 04:42:41 PM PDT 24	Aug 16 04:42:49 PM PDT 24	2615134201 ps
T247	/workspace/coverage/default/6.sysrst_ctrl_alert_test.4024680295			Aug 16 04:43:10 PM PDT 24	Aug 16 04:43:12 PM PDT 24	2029843683 ps
T248	/workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3034955463			Aug 16 04:44:01 PM PDT 24	Aug 16 04:44:03 PM PDT 24	2575402094 ps
T65	/workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.2516006531			Aug 16 04:43:35 PM PDT 24	Aug 16 04:43:41 PM PDT 24	5849548030 ps
T249	/workspace/coverage/default/15.sysrst_ctrl_alert_test.2635773202			Aug 16 04:43:13 PM PDT 24	Aug 16 04:43:15 PM PDT 24	2040774797 ps
T39	/workspace/coverage/default/43.sysrst_ctrl_edge_detect.1223980198			Aug 16 04:44:16 PM PDT 24	Aug 16 04:44:19 PM PDT 24	3740987336 ps
T218	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.702156539			Aug 16 04:42:40 PM PDT 24	Aug 16 04:42:42 PM PDT 24	2568544050 ps
T34	/workspace/coverage/default/0.sysrst_ctrl_combo_detect.3502706670			Aug 16 04:42:42 PM PDT 24	Aug 16 04:44:11 PM PDT 24	104688084310 ps
T48	/workspace/coverage/default/34.sysrst_ctrl_auto_blk_key_output.3285704093			Aug 16 04:44:03 PM PDT 24	Aug 16 04:44:07 PM PDT 24	3865516494 ps
T219	/workspace/coverage/default/22.sysrst_ctrl_pin_override_test.2852284076			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:30 PM PDT 24	2513009035 ps
T220	/workspace/coverage/default/16.sysrst_ctrl_pin_access_test.11314750			Aug 16 04:43:17 PM PDT 24	Aug 16 04:43:19 PM PDT 24	2145511417 ps
T221	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.2700888684			Aug 16 04:42:59 PM PDT 24	Aug 16 04:43:07 PM PDT 24	2653720409 ps
T222	/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.149969456			Aug 16 04:44:25 PM PDT 24	Aug 16 04:44:32 PM PDT 24	2105739825 ps
T223	/workspace/coverage/default/21.sysrst_ctrl_alert_test.3967802920			Aug 16 04:43:21 PM PDT 24	Aug 16 04:43:32 PM PDT 24	2013083646 ps
T96	/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.740895486			Aug 16 04:44:49 PM PDT 24	Aug 16 04:45:02 PM PDT 24	18858222156 ps
T66	/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.1576405790			Aug 16 04:44:11 PM PDT 24	Aug 16 04:44:15 PM PDT 24	46681219357 ps
T49	/workspace/coverage/default/20.sysrst_ctrl_stress_all.1817927322			Aug 16 04:43:20 PM PDT 24	Aug 16 04:43:31 PM PDT 24	16416522800 ps
T397	/workspace/coverage/default/3.sysrst_ctrl_alert_test.3069277796			Aug 16 04:42:44 PM PDT 24	Aug 16 04:42:50 PM PDT 24	2010186635 ps
T398	/workspace/coverage/default/15.sysrst_ctrl_smoke.668821263			Aug 16 04:43:18 PM PDT 24	Aug 16 04:43:24 PM PDT 24	2110592566 ps
T399	/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3340524480			Aug 16 04:44:16 PM PDT 24	Aug 16 04:44:26 PM PDT 24	3724190605 ps
T97	/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.3460194408			Aug 16 04:44:48 PM PDT 24	Aug 16 04:45:55 PM PDT 24	26332070795 ps
T67	/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1302711315			Aug 16 04:42:52 PM PDT 24	Aug 16 04:43:01 PM PDT 24	14089347526 ps
T50	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1745956269			Aug 16 04:44:01 PM PDT 24	Aug 16 04:44:02 PM PDT 24	3446385525 ps
T400	/workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.1819681356			Aug 16 04:43:06 PM PDT 24	Aug 16 04:43:13 PM PDT 24	2609789746 ps
T238	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.1781203621			Aug 16 04:44:04 PM PDT 24	Aug 16 04:44:37 PM PDT 24	61554707418 ps
T239	/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1885772909			Aug 16 04:44:51 PM PDT 24	Aug 16 04:45:35 PM PDT 24	138236722426 ps
T401	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.8517604			Aug 16 04:42:39 PM PDT 24	Aug 16 04:42:52 PM PDT 24	4733525422 ps
T40	/workspace/coverage/default/0.sysrst_ctrl_stress_all.94905625			Aug 16 04:42:38 PM PDT 24	Aug 16 04:42:41 PM PDT 24	7513929189 ps
T402	/workspace/coverage/default/42.sysrst_ctrl_smoke.1809885161			Aug 16 04:44:19 PM PDT 24	Aug 16 04:44:22 PM PDT 24	2122473265 ps
T301	/workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.3908958088			Aug 16 04:43:54 PM PDT 24	Aug 16 04:45:05 PM PDT 24	118273973778 ps
T403	/workspace/coverage/default/14.sysrst_ctrl_pin_access_test.3996652264			Aug 16 04:43:09 PM PDT 24	Aug 16 04:43:11 PM PDT 24	2107416887 ps
T404	/workspace/coverage/default/34.sysrst_ctrl_pin_access_test.2436259001			Aug 16 04:44:00 PM PDT 24	Aug 16 04:44:04 PM PDT 24	2060381806 ps
T405	/workspace/coverage/default/10.sysrst_ctrl_smoke.1720871970			Aug 16 04:43:09 PM PDT 24	Aug 16 04:43:11 PM PDT 24	2151989040 ps
T151	/workspace/coverage/default/41.sysrst_ctrl_edge_detect.2194229607			Aug 16 04:44:15 PM PDT 24	Aug 16 04:44:17 PM PDT 24	3751488143 ps
T406	/workspace/coverage/default/28.sysrst_ctrl_smoke.135924368			Aug 16 04:43:45 PM PDT 24	Aug 16 04:43:47 PM PDT 24	2121167928 ps
T407	/workspace/coverage/default/37.sysrst_ctrl_smoke.2359164759			Aug 16 04:44:07 PM PDT 24	Aug 16 04:44:13 PM PDT 24	2109971601 ps
T408	/workspace/coverage/default/10.sysrst_ctrl_alert_test.1569701434			Aug 16 04:43:03 PM PDT 24	Aug 16 04:43:09 PM PDT 24	2012324301 ps
T88	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.2205371516			Aug 16 04:43:59 PM PDT 24	Aug 16 04:44:19 PM PDT 24	40491058899 ps
T80	/workspace/coverage/default/42.sysrst_ctrl_ultra_low_pwr.1654528767			Aug 16 04:44:16 PM PDT 24	Aug 16 04:44:23 PM PDT 24	2961206043 ps
T409	/workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3904139097			Aug 16 04:44:02 PM PDT 24	Aug 16 04:44:04 PM PDT 24	3252017386 ps
T392	/workspace/coverage/default/18.sysrst_ctrl_pin_override_test.202967179			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:31 PM PDT 24	2508780313 ps
T51	/workspace/coverage/default/14.sysrst_ctrl_auto_blk_key_output.152128578			Aug 16 04:43:11 PM PDT 24	Aug 16 04:43:14 PM PDT 24	3259345188 ps
T85	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1496444038			Aug 16 04:43:12 PM PDT 24	Aug 16 04:44:18 PM PDT 24	52078873283 ps
T110	/workspace/coverage/default/25.sysrst_ctrl_alert_test.799740764			Aug 16 04:43:36 PM PDT 24	Aug 16 04:43:42 PM PDT 24	2013278550 ps
T111	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.335842676			Aug 16 04:43:16 PM PDT 24	Aug 16 04:48:55 PM PDT 24	132676994433 ps
T52	/workspace/coverage/default/5.sysrst_ctrl_stress_all.984412418			Aug 16 04:43:11 PM PDT 24	Aug 16 04:45:32 PM PDT 24	476030508447 ps
T98	/workspace/coverage/default/46.sysrst_ctrl_combo_detect.2531408661			Aug 16 04:44:22 PM PDT 24	Aug 16 04:45:07 PM PDT 24	76909111157 ps
T112	/workspace/coverage/default/34.sysrst_ctrl_smoke.3567914385			Aug 16 04:44:05 PM PDT 24	Aug 16 04:44:11 PM PDT 24	2113519740 ps
T113	/workspace/coverage/default/27.sysrst_ctrl_smoke.3425345141			Aug 16 04:43:50 PM PDT 24	Aug 16 04:43:56 PM PDT 24	2110053647 ps
T114	/workspace/coverage/default/19.sysrst_ctrl_combo_detect.3355220820			Aug 16 04:43:22 PM PDT 24	Aug 16 04:44:10 PM PDT 24	72082782875 ps
T115	/workspace/coverage/default/36.sysrst_ctrl_pin_override_test.1294397278			Aug 16 04:44:01 PM PDT 24	Aug 16 04:44:06 PM PDT 24	2511190983 ps
T116	/workspace/coverage/default/11.sysrst_ctrl_combo_detect.2808500396			Aug 16 04:43:06 PM PDT 24	Aug 16 04:43:41 PM PDT 24	58580350806 ps
T410	/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.2977767130			Aug 16 04:44:10 PM PDT 24	Aug 16 04:44:13 PM PDT 24	2647632000 ps
T53	/workspace/coverage/default/45.sysrst_ctrl_stress_all.997759984			Aug 16 04:44:23 PM PDT 24	Aug 16 04:44:28 PM PDT 24	7438092833 ps
T99	/workspace/coverage/default/30.sysrst_ctrl_stress_all.3893484557			Aug 16 04:43:58 PM PDT 24	Aug 16 04:44:13 PM PDT 24	50832276860 ps
T411	/workspace/coverage/default/23.sysrst_ctrl_alert_test.1132753439			Aug 16 04:43:29 PM PDT 24	Aug 16 04:43:30 PM PDT 24	2106802140 ps
T294	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.3424515708			Aug 16 04:44:11 PM PDT 24	Aug 16 04:44:21 PM PDT 24	3821651425 ps
T412	/workspace/coverage/default/13.sysrst_ctrl_smoke.2104670671			Aug 16 04:43:10 PM PDT 24	Aug 16 04:43:12 PM PDT 24	2131201884 ps
T413	/workspace/coverage/default/47.sysrst_ctrl_smoke.4050844238			Aug 16 04:44:28 PM PDT 24	Aug 16 04:44:30 PM PDT 24	2122996652 ps
T365	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3753937042			Aug 16 04:44:59 PM PDT 24	Aug 16 04:50:50 PM PDT 24	138113412141 ps
T414	/workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3395119212			Aug 16 04:44:07 PM PDT 24	Aug 16 04:44:09 PM PDT 24	2667355831 ps
T393	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.2595926237			Aug 16 04:43:07 PM PDT 24	Aug 16 04:43:15 PM PDT 24	2511623879 ps
T42	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.4191893930			Aug 16 04:43:17 PM PDT 24	Aug 16 04:43:20 PM PDT 24	4444395290 ps
T228	/workspace/coverage/default/33.sysrst_ctrl_ec_pwr_on_rst.1927610958			Aug 16 04:44:05 PM PDT 24	Aug 16 04:44:12 PM PDT 24	4423324577 ps
T43	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.3134529287			Aug 16 04:43:53 PM PDT 24	Aug 16 04:44:02 PM PDT 24	3571044854 ps
T204	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.1608020393			Aug 16 04:42:46 PM PDT 24	Aug 16 04:42:51 PM PDT 24	2519306666 ps
T205	/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2672271199			Aug 16 04:42:52 PM PDT 24	Aug 16 04:50:40 PM PDT 24	172562516351 ps
T206	/workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.2004784946			Aug 16 04:43:19 PM PDT 24	Aug 16 04:43:29 PM PDT 24	3571184241 ps
T207	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.2256538243			Aug 16 04:43:12 PM PDT 24	Aug 16 04:43:15 PM PDT 24	2608093895 ps
T54	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3409503476			Aug 16 04:44:11 PM PDT 24	Aug 16 04:44:21 PM PDT 24	3737090171 ps
T117	/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2337919862			Aug 16 04:43:24 PM PDT 24	Aug 16 04:43:30 PM PDT 24	2182167291 ps
T118	/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2912078605			Aug 16 04:43:07 PM PDT 24	Aug 16 04:43:15 PM PDT 24	2470986484 ps
T81	/workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3373882345			Aug 16 04:43:36 PM PDT 24	Aug 16 04:43:50 PM PDT 24	406360319585 ps
T119	/workspace/coverage/default/37.sysrst_ctrl_pin_access_test.418413839			Aug 16 04:44:03 PM PDT 24	Aug 16 04:44:10 PM PDT 24	2214916621 ps
T120	/workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.189065058			Aug 16 04:44:24 PM PDT 24	Aug 16 04:44:42 PM PDT 24	14962087001 ps
T121	/workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2805580639			Aug 16 04:43:21 PM PDT 24	Aug 16 04:43:23 PM PDT 24	2086076570 ps
T122	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.3338571688			Aug 16 04:43:07 PM PDT 24	Aug 16 04:43:10 PM PDT 24	3993921750 ps
T35	/workspace/coverage/default/11.sysrst_ctrl_edge_detect.2198787528			Aug 16 04:43:03 PM PDT 24	Aug 16 04:43:08 PM PDT 24	3533574170 ps
T123	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.890417253			Aug 16 04:44:44 PM PDT 24	Aug 16 04:44:51 PM PDT 24	2513015978 ps
T133	/workspace/coverage/default/9.sysrst_ctrl_smoke.365062611			Aug 16 04:43:16 PM PDT 24	Aug 16 04:43:21 PM PDT 24	2114174618 ps
T82	/workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.4033802721			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:25 PM PDT 24	5246931366 ps
T134	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.4079882067			Aug 16 04:44:13 PM PDT 24	Aug 16 04:44:17 PM PDT 24	2076406023 ps
T200	/workspace/coverage/default/23.sysrst_ctrl_pin_access_test.1068337918			Aug 16 04:43:28 PM PDT 24	Aug 16 04:43:32 PM PDT 24	2064311727 ps
T95	/workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2581829270			Aug 16 04:43:45 PM PDT 24	Aug 16 04:43:48 PM PDT 24	3384943246 ps
T201	/workspace/coverage/default/21.sysrst_ctrl_smoke.1177752352			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:28 PM PDT 24	2115359192 ps
T202	/workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.2506746673			Aug 16 04:43:42 PM PDT 24	Aug 16 04:43:48 PM PDT 24	3341942174 ps
T100	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.2329034375			Aug 16 04:44:49 PM PDT 24	Aug 16 04:45:06 PM PDT 24	23105882892 ps
T415	/workspace/coverage/default/20.sysrst_ctrl_in_out_inverted.2155341433			Aug 16 04:43:35 PM PDT 24	Aug 16 04:43:39 PM PDT 24	2476246144 ps
T416	/workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.606967516			Aug 16 04:43:09 PM PDT 24	Aug 16 04:43:15 PM PDT 24	2461306932 ps
T417	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.1105929117			Aug 16 04:43:22 PM PDT 24	Aug 16 04:43:24 PM PDT 24	4763552232 ps
T418	/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.2790457671			Aug 16 04:44:30 PM PDT 24	Aug 16 04:44:33 PM PDT 24	2625571758 ps
T419	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.3929434973			Aug 16 04:43:44 PM PDT 24	Aug 16 04:43:50 PM PDT 24	2071594529 ps
T420	/workspace/coverage/default/26.sysrst_ctrl_alert_test.1469484752			Aug 16 04:43:51 PM PDT 24	Aug 16 04:43:53 PM PDT 24	2047779251 ps
T186	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.2448268630			Aug 16 04:44:04 PM PDT 24	Aug 16 04:44:10 PM PDT 24	3003160542 ps
T312	/workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.430762447			Aug 16 04:44:03 PM PDT 24	Aug 16 04:44:09 PM PDT 24	5774889261 ps
T421	/workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.3612002581			Aug 16 04:43:24 PM PDT 24	Aug 16 04:43:26 PM PDT 24	2630439741 ps
T422	/workspace/coverage/default/17.sysrst_ctrl_smoke.2076776731			Aug 16 04:43:16 PM PDT 24	Aug 16 04:43:17 PM PDT 24	2168076027 ps
T295	/workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.2240731647			Aug 16 04:44:04 PM PDT 24	Aug 16 04:44:14 PM PDT 24	6298363789 ps
T375	/workspace/coverage/default/32.sysrst_ctrl_combo_detect.1011331720			Aug 16 04:43:57 PM PDT 24	Aug 16 04:46:21 PM PDT 24	117071014766 ps
T101	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.156216172			Aug 16 04:44:03 PM PDT 24	Aug 16 04:45:18 PM PDT 24	102930287553 ps
T347	/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.1612027247			Aug 16 04:44:45 PM PDT 24	Aug 16 04:45:33 PM PDT 24	78762512729 ps
T381	/workspace/coverage/default/47.sysrst_ctrl_combo_detect.1391612848			Aug 16 04:44:31 PM PDT 24	Aug 16 04:46:16 PM PDT 24	156980465989 ps
T102	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4199864567			Aug 16 04:44:48 PM PDT 24	Aug 16 04:46:02 PM PDT 24	31328280514 ps
T366	/workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.3286723233			Aug 16 04:43:22 PM PDT 24	Aug 16 04:45:15 PM PDT 24	55548951282 ps
T250	/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.2187416803			Aug 16 04:44:37 PM PDT 24	Aug 16 04:46:01 PM PDT 24	31481488118 ps
T423	/workspace/coverage/default/34.sysrst_ctrl_alert_test.4290713517			Aug 16 04:44:05 PM PDT 24	Aug 16 04:44:07 PM PDT 24	2035968057 ps
T424	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.1005535281			Aug 16 04:43:21 PM PDT 24	Aug 16 04:43:27 PM PDT 24	2211277341 ps
T425	/workspace/coverage/default/7.sysrst_ctrl_alert_test.4091748132			Aug 16 04:42:56 PM PDT 24	Aug 16 04:42:58 PM PDT 24	2042267383 ps
T306	/workspace/coverage/default/28.sysrst_ctrl_stress_all.3542643515			Aug 16 04:43:45 PM PDT 24	Aug 16 04:44:39 PM PDT 24	77404246847 ps
T426	/workspace/coverage/default/33.sysrst_ctrl_alert_test.2587407167			Aug 16 04:44:04 PM PDT 24	Aug 16 04:44:07 PM PDT 24	2021368530 ps
T427	/workspace/coverage/default/34.sysrst_ctrl_pin_override_test.2779429470			Aug 16 04:44:03 PM PDT 24	Aug 16 04:44:05 PM PDT 24	2577389457 ps
T256	/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.3500438679			Aug 16 04:44:46 PM PDT 24	Aug 16 04:45:49 PM PDT 24	96861451127 ps
T428	/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.2749485074			Aug 16 04:43:09 PM PDT 24	Aug 16 04:43:14 PM PDT 24	2064383342 ps
T309	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.2690745779			Aug 16 04:43:20 PM PDT 24	Aug 16 04:43:28 PM PDT 24	2513575032 ps
T279	/workspace/coverage/default/2.sysrst_ctrl_stress_all.967623207			Aug 16 04:42:53 PM PDT 24	Aug 16 04:43:08 PM PDT 24	9135125471 ps
T429	/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.1667883775			Aug 16 04:43:07 PM PDT 24	Aug 16 04:43:09 PM PDT 24	2453574360 ps
T251	/workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.4048730786			Aug 16 04:43:22 PM PDT 24	Aug 16 04:44:52 PM PDT 24	111378849145 ps
T430	/workspace/coverage/default/11.sysrst_ctrl_pin_access_test.2624091379			Aug 16 04:43:17 PM PDT 24	Aug 16 04:43:28 PM PDT 24	2086443656 ps
T431	/workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.197369517			Aug 16 04:42:49 PM PDT 24	Aug 16 04:42:55 PM PDT 24	3164213265 ps
T310	/workspace/coverage/default/16.sysrst_ctrl_pin_override_test.3889249659			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:30 PM PDT 24	2522347031 ps
T432	/workspace/coverage/default/1.sysrst_ctrl_pin_access_test.1476062836			Aug 16 04:42:38 PM PDT 24	Aug 16 04:42:44 PM PDT 24	2158038016 ps
T433	/workspace/coverage/default/17.sysrst_ctrl_alert_test.1261511705			Aug 16 04:43:23 PM PDT 24	Aug 16 04:43:29 PM PDT 24	2012041812 ps
T91	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.2880278783			Aug 16 04:44:09 PM PDT 24	Aug 16 04:44:17 PM PDT 24	5657311374 ps
T124	/workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.3416954566			Aug 16 04:43:21 PM PDT 24	Aug 16 04:43:31 PM PDT 24	3812528985 ps
T209	/workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.669359255			Aug 16 04:43:39 PM PDT 24	Aug 16 04:43:46 PM PDT 24	5102922056 ps
T210	/workspace/coverage/default/12.sysrst_ctrl_smoke.1488660992			Aug 16 04:43:04 PM PDT 24	Aug 16 04:43:08 PM PDT 24	2118411536 ps
T211	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.1717017354			Aug 16 04:43:57 PM PDT 24	Aug 16 04:44:07 PM PDT 24	10773097256 ps
T83	/workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.4162706606			Aug 16 04:43:41 PM PDT 24	Aug 16 04:43:45 PM PDT 24	15113496326 ps
T212	/workspace/coverage/default/27.sysrst_ctrl_stress_all.1539889904			Aug 16 04:43:51 PM PDT 24	Aug 16 04:43:56 PM PDT 24	6770533931 ps
T213	/workspace/coverage/default/11.sysrst_ctrl_stress_all.2313531683			Aug 16 04:43:05 PM PDT 24	Aug 16 04:43:14 PM PDT 24	12862771333 ps
T103	/workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.988431649			Aug 16 04:43:22 PM PDT 24	Aug 16 04:44:01 PM PDT 24	28333385365 ps
T214	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1343205746			Aug 16 04:43:06 PM PDT 24	Aug 16 04:43:07 PM PDT 24	2635647101 ps
T434	/workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.2520379138			Aug 16 04:42:58 PM PDT 24	Aug 16 04:43:11 PM PDT 24	4901561000 ps
T89	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.190693226			Aug 16 04:43:02 PM PDT 24	Aug 16 04:43:09 PM PDT 24	5050166027 ps
T172	/workspace/coverage/default/18.sysrst_ctrl_edge_detect.3224038790			Aug 16 04:43:15 PM PDT 24	Aug 16 04:43:26 PM PDT 24	5698745939 ps
T127	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.1575686602			Aug 16 04:43:46 PM PDT 24	Aug 16 04:43:50 PM PDT 24	5164337081 ps
T36	/workspace/coverage/default/7.sysrst_ctrl_edge_detect.2067761106			Aug 16 04:43:05 PM PDT 24	Aug 16 04:43:07 PM PDT 24	3569757459 ps
T435	/workspace/coverage/default/36.sysrst_ctrl_alert_test.1065282075			Aug 16 04:44:04 PM PDT 24	Aug 16 04:44:10 PM PDT 24	2011462018 ps
T368	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.315583849			Aug 16 04:43:54 PM PDT 24	Aug 16 04:44:37 PM PDT 24	256242215503 ps
T128	/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.4083639432			Aug 16 04:44:46 PM PDT 24	Aug 16 04:44:48 PM PDT 24	169097325088 ps
T370	/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3986918027			Aug 16 04:44:11 PM PDT 24	Aug 16 04:47:44 PM PDT 24	114767713467 ps
T152	/workspace/coverage/default/3.sysrst_ctrl_stress_all.3187307848			Aug 16 04:43:06 PM PDT 24	Aug 16 04:43:20 PM PDT 24	455836956529 ps
T367	/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.1766940620			Aug 16 04:44:59 PM PDT 24	Aug 16 04:47:08 PM PDT 24	96208858539 ps
T129	/workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.3725736355			Aug 16 04:43:15 PM PDT 24	Aug 16 04:43:19 PM PDT 24	4350490340 ps
T359	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.723706684			Aug 16 04:43:05 PM PDT 24	Aug 16 04:45:42 PM PDT 24	58829149201 ps
T125	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.1263943018			Aug 16 04:43:19 PM PDT 24	Aug 16 04:43:25 PM PDT 24	3659450495 ps
T240	/workspace/coverage/default/16.sysrst_ctrl_stress_all.542579800			Aug 16 04:43:18 PM PDT 24	Aug 16 04:44:18 PM PDT 24	44952179553 ps
T37	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.3463610402			Aug 16 04:43:29 PM PDT 24	Aug 16 04:43:38 PM PDT 24	5375242798 ps
T436	/workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.2421269935			Aug 16 04:44:15 PM PDT 24	Aug 16 04:44:19 PM PDT 24	2625329169 ps
T437	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.2421951125			Aug 16 04:43:20 PM PDT 24	Aug 16 04:43:23 PM PDT 24	2628709848 ps
T438	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.87348962			Aug 16 04:44:31 PM PDT 24	Aug 16 04:44:34 PM PDT 24	3960010924 ps
T439	/workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1395358327			Aug 16 04:43:06 PM PDT 24	Aug 16 04:43:10 PM PDT 24	2516069603 ps
T440	/workspace/coverage/default/32.sysrst_ctrl_pin_access_test.4068821669			Aug 16 04:43:50 PM PDT 24	Aug 16 04:43:56 PM PDT 24	2211081324 ps
T104	/workspace/coverage/default/22.sysrst_ctrl_combo_detect.4105530050			Aug 16 04:43:23 PM PDT 24	Aug 16 04:46:05 PM PDT 24	123014501690 ps
T441	/workspace/coverage/default/2.sysrst_ctrl_alert_test.1752419769			Aug 16 04:42:42 PM PDT 24	Aug 16 04:42:44 PM PDT 24	2033196206 ps
T442	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.1766276852			Aug 16 04:42:42 PM PDT 24	Aug 16 04:42:46 PM PDT 24	2480808953 ps
T443	/workspace/coverage/default/1.sysrst_ctrl_smoke.372926497			Aug 16 04:42:42 PM PDT 24	Aug 16 04:42:48 PM PDT 24	2110681253 ps
T444	/workspace/coverage/default/0.sysrst_ctrl_alert_test.176217585			Aug 16 04:42:39 PM PDT 24	Aug 16 04:42:45 PM PDT 24	2012022896 ps
T445	/workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.778707443			Aug 16 04:44:07 PM PDT 24	Aug 16 04:44:09 PM PDT 24	6809198105 ps
T446	/workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1684646750			Aug 16 04:43:02 PM PDT 24	Aug 16 04:43:07 PM PDT 24	2615165538 ps
T447	/workspace/coverage/default/5.sysrst_ctrl_smoke.1492470661			Aug 16 04:42:58 PM PDT 24	Aug 16 04:43:04 PM PDT 24	2109881596 ps
T448	/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.765343288			Aug 16 04:43:02 PM PDT 24	Aug 16 04:43:05 PM PDT 24	2490344733 ps
T307	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.2923063164			Aug 16 04:43:46 PM PDT 24	Aug 16 04:43:52 PM PDT 24	2482005084 ps
T188	/workspace/coverage/default/2.sysrst_ctrl_edge_detect.1642549983			Aug 16 04:42:43 PM PDT 24	Aug 16 04:42:48 PM PDT 24	3055886654 ps
T352	/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.2011363961			Aug 16 04:44:45 PM PDT 24	Aug 16 04:47:36 PM PDT 24	66337820209 ps
T314	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.2915299888			Aug 16 04:43:47 PM PDT 24	Aug 16 04:43:54 PM PDT 24	5332065604 ps
T449	/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.1037464499			Aug 16 04:42:56 PM PDT 24	Aug 16 04:42:59 PM PDT 24	2539839955 ps
T313	/workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3428140498			Aug 16 04:43:18 PM PDT 24	Aug 16 04:43:20 PM PDT 24	5796640072 ps
T450	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.1909930216			Aug 16 04:44:13 PM PDT 24	Aug 16 04:44:16 PM PDT 24	2532534480 ps
T382	/workspace/coverage/default/13.sysrst_ctrl_stress_all.2464588844			Aug 16 04:43:15 PM PDT 24	Aug 16 04:43:38 PM PDT 24	8705366326 ps
T451	/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2642874333			Aug 16 04:44:16 PM PDT 24	Aug 16 04:44:27 PM PDT 24	3947787394 ps
T452	/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3300724140			Aug 16 04:42:56 PM PDT 24	Aug 16 04:43:03 PM PDT 24	2611492864 ps