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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.08 99.35 96.76 100.00 97.44 98.78 99.61 87.60


Total test records in report: 910
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T457 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3305629961 Aug 18 04:29:19 PM PDT 24 Aug 18 04:29:20 PM PDT 24 2716973139 ps
T458 /workspace/coverage/default/32.sysrst_ctrl_stress_all.3884234575 Aug 18 04:29:03 PM PDT 24 Aug 18 04:29:36 PM PDT 24 12148145005 ps
T459 /workspace/coverage/default/36.sysrst_ctrl_pin_access_test.328949863 Aug 18 04:29:13 PM PDT 24 Aug 18 04:29:20 PM PDT 24 2242360721 ps
T460 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3138466641 Aug 18 04:29:38 PM PDT 24 Aug 18 04:29:40 PM PDT 24 2637193911 ps
T461 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3024910484 Aug 18 04:28:27 PM PDT 24 Aug 18 04:28:28 PM PDT 24 2553730398 ps
T462 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3285876098 Aug 18 04:29:03 PM PDT 24 Aug 18 04:29:05 PM PDT 24 2159174004 ps
T463 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.3564821928 Aug 18 04:29:02 PM PDT 24 Aug 18 04:29:03 PM PDT 24 4188930527 ps
T464 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4221446708 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:19 PM PDT 24 3409516747 ps
T465 /workspace/coverage/default/34.sysrst_ctrl_in_out_inverted.4199579661 Aug 18 04:29:21 PM PDT 24 Aug 18 04:29:28 PM PDT 24 2471945847 ps
T466 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1884013142 Aug 18 04:29:18 PM PDT 24 Aug 18 04:29:24 PM PDT 24 2026241609 ps
T467 /workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.106932292 Aug 18 04:29:29 PM PDT 24 Aug 18 04:29:39 PM PDT 24 3642840595 ps
T468 /workspace/coverage/default/6.sysrst_ctrl_alert_test.1769562088 Aug 18 04:28:13 PM PDT 24 Aug 18 04:28:15 PM PDT 24 2037726756 ps
T287 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.192416229 Aug 18 04:28:40 PM PDT 24 Aug 18 04:28:50 PM PDT 24 3762299893 ps
T469 /workspace/coverage/default/33.sysrst_ctrl_smoke.1686379837 Aug 18 04:29:09 PM PDT 24 Aug 18 04:29:15 PM PDT 24 2111336290 ps
T470 /workspace/coverage/default/33.sysrst_ctrl_flash_wr_prot_out.2070843317 Aug 18 04:29:13 PM PDT 24 Aug 18 04:29:17 PM PDT 24 2618403658 ps
T120 /workspace/coverage/default/13.sysrst_ctrl_ultra_low_pwr.1505647679 Aug 18 04:28:43 PM PDT 24 Aug 18 04:28:52 PM PDT 24 11644009073 ps
T471 /workspace/coverage/default/0.sysrst_ctrl_alert_test.275870116 Aug 18 04:28:13 PM PDT 24 Aug 18 04:28:15 PM PDT 24 2027573265 ps
T158 /workspace/coverage/default/15.sysrst_ctrl_stress_all.3552121516 Aug 18 04:28:48 PM PDT 24 Aug 18 04:29:05 PM PDT 24 12953934362 ps
T121 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2667164901 Aug 18 04:28:55 PM PDT 24 Aug 18 04:29:03 PM PDT 24 8635668923 ps
T472 /workspace/coverage/default/19.sysrst_ctrl_alert_test.3018057458 Aug 18 04:28:59 PM PDT 24 Aug 18 04:29:03 PM PDT 24 2023205395 ps
T473 /workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.709398940 Aug 18 04:29:27 PM PDT 24 Aug 18 04:30:27 PM PDT 24 43748965702 ps
T474 /workspace/coverage/default/17.sysrst_ctrl_alert_test.509564393 Aug 18 04:28:35 PM PDT 24 Aug 18 04:28:37 PM PDT 24 2111612693 ps
T475 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.1661059700 Aug 18 04:29:12 PM PDT 24 Aug 18 04:29:16 PM PDT 24 2621487276 ps
T476 /workspace/coverage/default/28.sysrst_ctrl_pin_override_test.403721767 Aug 18 04:29:06 PM PDT 24 Aug 18 04:29:10 PM PDT 24 2514810138 ps
T239 /workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.759314252 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:25 PM PDT 24 32741659411 ps
T477 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2247206621 Aug 18 04:28:55 PM PDT 24 Aug 18 04:28:59 PM PDT 24 2619349873 ps
T478 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2678733952 Aug 18 04:28:51 PM PDT 24 Aug 18 04:28:54 PM PDT 24 2035391320 ps
T133 /workspace/coverage/default/24.sysrst_ctrl_ultra_low_pwr.2832832470 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:13 PM PDT 24 4734369715 ps
T479 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1221641867 Aug 18 04:28:28 PM PDT 24 Aug 18 04:28:35 PM PDT 24 2511021624 ps
T480 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4149766629 Aug 18 04:28:23 PM PDT 24 Aug 18 04:28:28 PM PDT 24 2461984806 ps
T481 /workspace/coverage/default/31.sysrst_ctrl_ec_pwr_on_rst.2707974094 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:10 PM PDT 24 4513672100 ps
T482 /workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1953167109 Aug 18 04:29:10 PM PDT 24 Aug 18 04:29:29 PM PDT 24 7138401905 ps
T247 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.2604292623 Aug 18 04:28:19 PM PDT 24 Aug 18 04:28:38 PM PDT 24 101254271490 ps
T168 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.3250174539 Aug 18 04:28:31 PM PDT 24 Aug 18 04:28:33 PM PDT 24 5043432435 ps
T483 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.3543762021 Aug 18 04:28:52 PM PDT 24 Aug 18 04:28:55 PM PDT 24 2523290059 ps
T319 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.3526866074 Aug 18 04:28:37 PM PDT 24 Aug 18 04:33:09 PM PDT 24 105294637712 ps
T484 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.2776385959 Aug 18 04:28:07 PM PDT 24 Aug 18 04:28:11 PM PDT 24 2517071861 ps
T485 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.4021771736 Aug 18 04:28:36 PM PDT 24 Aug 18 04:28:43 PM PDT 24 2511819002 ps
T486 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.225542258 Aug 18 04:29:08 PM PDT 24 Aug 18 04:29:10 PM PDT 24 2536690724 ps
T487 /workspace/coverage/default/19.sysrst_ctrl_flash_wr_prot_out.2611283885 Aug 18 04:28:37 PM PDT 24 Aug 18 04:28:41 PM PDT 24 2620197102 ps
T488 /workspace/coverage/default/18.sysrst_ctrl_stress_all.3469449143 Aug 18 04:28:57 PM PDT 24 Aug 18 04:29:06 PM PDT 24 6238618371 ps
T489 /workspace/coverage/default/13.sysrst_ctrl_alert_test.3750356749 Aug 18 04:28:43 PM PDT 24 Aug 18 04:28:47 PM PDT 24 2018816235 ps
T490 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.401197231 Aug 18 04:28:31 PM PDT 24 Aug 18 04:28:37 PM PDT 24 2086581965 ps
T252 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.964841784 Aug 18 04:29:22 PM PDT 24 Aug 18 04:30:00 PM PDT 24 64868788780 ps
T134 /workspace/coverage/default/17.sysrst_ctrl_ultra_low_pwr.575684830 Aug 18 04:28:28 PM PDT 24 Aug 18 04:28:31 PM PDT 24 9700539768 ps
T491 /workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1133725098 Aug 18 04:29:24 PM PDT 24 Aug 18 04:29:37 PM PDT 24 4491278998 ps
T170 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.1959873794 Aug 18 04:28:31 PM PDT 24 Aug 18 04:28:33 PM PDT 24 3288912978 ps
T492 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.685312352 Aug 18 04:28:59 PM PDT 24 Aug 18 04:29:03 PM PDT 24 2518662476 ps
T198 /workspace/coverage/default/21.sysrst_ctrl_edge_detect.2657955071 Aug 18 04:29:01 PM PDT 24 Aug 18 04:29:04 PM PDT 24 3153586607 ps
T493 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2024725292 Aug 18 04:28:30 PM PDT 24 Aug 18 04:28:56 PM PDT 24 36019593347 ps
T494 /workspace/coverage/default/24.sysrst_ctrl_in_out_inverted.4281193285 Aug 18 04:29:03 PM PDT 24 Aug 18 04:29:08 PM PDT 24 2454040323 ps
T495 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3477453199 Aug 18 04:28:13 PM PDT 24 Aug 18 04:28:30 PM PDT 24 4338199160 ps
T496 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.825375603 Aug 18 04:29:23 PM PDT 24 Aug 18 04:29:31 PM PDT 24 3049854297 ps
T159 /workspace/coverage/default/2.sysrst_ctrl_edge_detect.606543539 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:15 PM PDT 24 6049674472 ps
T112 /workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.975252891 Aug 18 04:29:08 PM PDT 24 Aug 18 04:29:29 PM PDT 24 47806001041 ps
T190 /workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1101528922 Aug 18 04:29:48 PM PDT 24 Aug 18 04:29:50 PM PDT 24 2136843690 ps
T191 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1613443284 Aug 18 04:29:09 PM PDT 24 Aug 18 04:29:12 PM PDT 24 2621548251 ps
T192 /workspace/coverage/default/37.sysrst_ctrl_ec_pwr_on_rst.3293785073 Aug 18 04:29:21 PM PDT 24 Aug 18 04:29:26 PM PDT 24 2788029614 ps
T193 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2727288559 Aug 18 04:28:31 PM PDT 24 Aug 18 04:28:36 PM PDT 24 2045072466 ps
T194 /workspace/coverage/default/12.sysrst_ctrl_auto_blk_key_output.2122943300 Aug 18 04:28:28 PM PDT 24 Aug 18 04:30:39 PM PDT 24 97701860293 ps
T195 /workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1328950165 Aug 18 04:29:54 PM PDT 24 Aug 18 04:30:18 PM PDT 24 153568529977 ps
T196 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.4161501288 Aug 18 04:28:36 PM PDT 24 Aug 18 04:28:49 PM PDT 24 4715747395 ps
T197 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.1222422198 Aug 18 04:28:12 PM PDT 24 Aug 18 04:32:20 PM PDT 24 96672107021 ps
T497 /workspace/coverage/default/2.sysrst_ctrl_ec_pwr_on_rst.4008954707 Aug 18 04:28:27 PM PDT 24 Aug 18 04:28:37 PM PDT 24 3680838274 ps
T320 /workspace/coverage/default/21.sysrst_ctrl_combo_detect.1164164382 Aug 18 04:28:27 PM PDT 24 Aug 18 04:29:26 PM PDT 24 89632039667 ps
T91 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3257445889 Aug 18 04:28:54 PM PDT 24 Aug 18 04:29:05 PM PDT 24 5159332258 ps
T96 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1067690829 Aug 18 04:28:12 PM PDT 24 Aug 18 04:28:14 PM PDT 24 3864720503 ps
T124 /workspace/coverage/default/40.sysrst_ctrl_smoke.1575375565 Aug 18 04:29:18 PM PDT 24 Aug 18 04:29:20 PM PDT 24 2136335431 ps
T125 /workspace/coverage/default/19.sysrst_ctrl_stress_all_with_rand_reset.1129261561 Aug 18 04:28:32 PM PDT 24 Aug 18 04:28:39 PM PDT 24 9763597049 ps
T126 /workspace/coverage/default/3.sysrst_ctrl_alert_test.660092850 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:16 PM PDT 24 2011803924 ps
T127 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4151429966 Aug 18 04:29:23 PM PDT 24 Aug 18 04:29:29 PM PDT 24 2241705475 ps
T128 /workspace/coverage/default/14.sysrst_ctrl_alert_test.103190960 Aug 18 04:28:56 PM PDT 24 Aug 18 04:29:02 PM PDT 24 2015748640 ps
T129 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2332586180 Aug 18 04:28:18 PM PDT 24 Aug 18 04:28:21 PM PDT 24 3544321478 ps
T130 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1675545792 Aug 18 04:28:33 PM PDT 24 Aug 18 04:28:40 PM PDT 24 2464031316 ps
T131 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.3448542750 Aug 18 04:28:29 PM PDT 24 Aug 18 04:28:45 PM PDT 24 5516599126 ps
T132 /workspace/coverage/default/27.sysrst_ctrl_edge_detect.1576472063 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:08 PM PDT 24 3737834015 ps
T288 /workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2267109689 Aug 18 04:29:36 PM PDT 24 Aug 18 04:30:38 PM PDT 24 1028539905754 ps
T348 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.138041733 Aug 18 04:29:12 PM PDT 24 Aug 18 04:33:12 PM PDT 24 93894393845 ps
T353 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.708670109 Aug 18 04:29:27 PM PDT 24 Aug 18 04:37:16 PM PDT 24 180238438199 ps
T498 /workspace/coverage/default/16.sysrst_ctrl_alert_test.2407985867 Aug 18 04:28:48 PM PDT 24 Aug 18 04:28:50 PM PDT 24 2036962951 ps
T149 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.224066076 Aug 18 04:29:11 PM PDT 24 Aug 18 04:29:14 PM PDT 24 3279334716 ps
T499 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.3176313641 Aug 18 04:28:35 PM PDT 24 Aug 18 04:28:41 PM PDT 24 3887383364 ps
T500 /workspace/coverage/default/23.sysrst_ctrl_smoke.2544316606 Aug 18 04:29:02 PM PDT 24 Aug 18 04:29:13 PM PDT 24 2196399994 ps
T501 /workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.592488468 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:17 PM PDT 24 2463798118 ps
T113 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.57160545 Aug 18 04:28:47 PM PDT 24 Aug 18 04:28:57 PM PDT 24 32774204937 ps
T502 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.320122473 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:11 PM PDT 24 2462497285 ps
T285 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3493087244 Aug 18 04:29:42 PM PDT 24 Aug 18 04:29:56 PM PDT 24 9935916987 ps
T269 /workspace/coverage/default/32.sysrst_ctrl_stress_all_with_rand_reset.3603026238 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:18 PM PDT 24 4603058106 ps
T345 /workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3416096029 Aug 18 04:29:37 PM PDT 24 Aug 18 04:36:27 PM PDT 24 155478084186 ps
T503 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2252155706 Aug 18 04:29:20 PM PDT 24 Aug 18 04:29:28 PM PDT 24 2469342992 ps
T504 /workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1756247555 Aug 18 04:29:44 PM PDT 24 Aug 18 04:29:54 PM PDT 24 3606970697 ps
T505 /workspace/coverage/default/34.sysrst_ctrl_smoke.3980615999 Aug 18 04:29:06 PM PDT 24 Aug 18 04:29:12 PM PDT 24 2107745392 ps
T506 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.3167668910 Aug 18 04:29:24 PM PDT 24 Aug 18 04:29:32 PM PDT 24 2507838785 ps
T507 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3560335721 Aug 18 04:29:09 PM PDT 24 Aug 18 04:29:19 PM PDT 24 3129890833 ps
T508 /workspace/coverage/default/2.sysrst_ctrl_smoke.1655706461 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:12 PM PDT 24 2133667385 ps
T509 /workspace/coverage/default/19.sysrst_ctrl_ec_pwr_on_rst.2745551573 Aug 18 04:29:00 PM PDT 24 Aug 18 04:29:04 PM PDT 24 3115183286 ps
T510 /workspace/coverage/default/37.sysrst_ctrl_stress_all.730168222 Aug 18 04:29:03 PM PDT 24 Aug 18 04:29:28 PM PDT 24 9380839939 ps
T511 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3677644851 Aug 18 04:28:28 PM PDT 24 Aug 18 04:28:34 PM PDT 24 2115018802 ps
T512 /workspace/coverage/default/39.sysrst_ctrl_alert_test.2708218927 Aug 18 04:29:22 PM PDT 24 Aug 18 04:29:28 PM PDT 24 2011418083 ps
T513 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1538012847 Aug 18 04:28:57 PM PDT 24 Aug 18 04:29:05 PM PDT 24 2450157264 ps
T286 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3535900 Aug 18 04:28:30 PM PDT 24 Aug 18 04:28:33 PM PDT 24 9044932742 ps
T514 /workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3622593466 Aug 18 04:29:18 PM PDT 24 Aug 18 04:29:20 PM PDT 24 3470888877 ps
T515 /workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1031158284 Aug 18 04:28:30 PM PDT 24 Aug 18 04:28:36 PM PDT 24 6897569153 ps
T516 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1407748939 Aug 18 04:29:01 PM PDT 24 Aug 18 04:29:09 PM PDT 24 2509259372 ps
T517 /workspace/coverage/default/25.sysrst_ctrl_smoke.4030300233 Aug 18 04:28:58 PM PDT 24 Aug 18 04:29:00 PM PDT 24 2130262831 ps
T518 /workspace/coverage/default/6.sysrst_ctrl_smoke.3389832644 Aug 18 04:28:13 PM PDT 24 Aug 18 04:28:24 PM PDT 24 2111257805 ps
T519 /workspace/coverage/default/1.sysrst_ctrl_alert_test.888794782 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:11 PM PDT 24 2031555493 ps
T520 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1170056444 Aug 18 04:28:28 PM PDT 24 Aug 18 04:28:37 PM PDT 24 3571844642 ps
T521 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3982358430 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:48 PM PDT 24 23583524668 ps
T522 /workspace/coverage/default/3.sysrst_ctrl_stress_all_with_rand_reset.3157831102 Aug 18 04:28:14 PM PDT 24 Aug 18 04:28:25 PM PDT 24 12057344333 ps
T523 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2345669424 Aug 18 04:29:04 PM PDT 24 Aug 18 04:29:09 PM PDT 24 2080407853 ps
T524 /workspace/coverage/default/35.sysrst_ctrl_alert_test.4033463853 Aug 18 04:29:09 PM PDT 24 Aug 18 04:29:12 PM PDT 24 2022375502 ps
T100 /workspace/coverage/default/16.sysrst_ctrl_ultra_low_pwr.2253806969 Aug 18 04:28:33 PM PDT 24 Aug 18 04:28:36 PM PDT 24 6654670919 ps
T329 /workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.54751304 Aug 18 04:29:44 PM PDT 24 Aug 18 04:31:21 PM PDT 24 62850042140 ps
T525 /workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.647959896 Aug 18 04:28:24 PM PDT 24 Aug 18 04:28:28 PM PDT 24 5422980917 ps
T526 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.1282948426 Aug 18 04:28:59 PM PDT 24 Aug 18 04:29:05 PM PDT 24 3121471879 ps
T527 /workspace/coverage/default/36.sysrst_ctrl_in_out_inverted.2376155052 Aug 18 04:29:14 PM PDT 24 Aug 18 04:29:21 PM PDT 24 2473514264 ps
T289 /workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1830564882 Aug 18 04:28:10 PM PDT 24 Aug 18 04:28:29 PM PDT 24 6899101938 ps
T360 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2373508798 Aug 18 04:29:52 PM PDT 24 Aug 18 04:34:11 PM PDT 24 98016808428 ps
T327 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.3174008699 Aug 18 04:29:03 PM PDT 24 Aug 18 04:31:10 PM PDT 24 106431061262 ps
T97 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.510861667 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:08 PM PDT 24 9638500202 ps
T528 /workspace/coverage/default/23.sysrst_ctrl_flash_wr_prot_out.3261803809 Aug 18 04:28:36 PM PDT 24 Aug 18 04:28:38 PM PDT 24 2624783041 ps
T529 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.3487090956 Aug 18 04:29:11 PM PDT 24 Aug 18 04:29:14 PM PDT 24 3681838225 ps
T290 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.189593921 Aug 18 04:28:57 PM PDT 24 Aug 18 04:29:11 PM PDT 24 10357356949 ps
T530 /workspace/coverage/default/31.sysrst_ctrl_pin_access_test.3080634475 Aug 18 04:29:14 PM PDT 24 Aug 18 04:29:17 PM PDT 24 2048998340 ps
T531 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.711559156 Aug 18 04:29:53 PM PDT 24 Aug 18 04:29:57 PM PDT 24 2473750744 ps
T532 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2841983417 Aug 18 04:28:33 PM PDT 24 Aug 18 04:28:47 PM PDT 24 9423404429 ps
T347 /workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1644186011 Aug 18 04:29:56 PM PDT 24 Aug 18 04:30:18 PM PDT 24 55809777898 ps
T533 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1329209827 Aug 18 04:28:30 PM PDT 24 Aug 18 04:28:38 PM PDT 24 2510438027 ps
T534 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1124827531 Aug 18 04:28:23 PM PDT 24 Aug 18 04:28:30 PM PDT 24 2521927348 ps
T535 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.4168180267 Aug 18 04:29:22 PM PDT 24 Aug 18 04:29:30 PM PDT 24 2608126809 ps
T536 /workspace/coverage/default/19.sysrst_ctrl_auto_blk_key_output.3182142518 Aug 18 04:28:54 PM PDT 24 Aug 18 04:29:05 PM PDT 24 3761485792 ps
T321 /workspace/coverage/default/6.sysrst_ctrl_combo_detect.4041441308 Aug 18 04:28:16 PM PDT 24 Aug 18 04:29:10 PM PDT 24 79275511726 ps
T150 /workspace/coverage/default/22.sysrst_ctrl_stress_all.1330005985 Aug 18 04:28:59 PM PDT 24 Aug 18 04:29:32 PM PDT 24 13659256494 ps
T537 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.101266255 Aug 18 04:28:50 PM PDT 24 Aug 18 04:28:57 PM PDT 24 2510108766 ps
T538 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2534607297 Aug 18 04:29:04 PM PDT 24 Aug 18 04:29:09 PM PDT 24 3297981329 ps
T359 /workspace/coverage/default/27.sysrst_ctrl_combo_detect_with_pre_cond.2011253100 Aug 18 04:28:59 PM PDT 24 Aug 18 04:31:10 PM PDT 24 280278916030 ps
T323 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1331738716 Aug 18 04:28:24 PM PDT 24 Aug 18 04:29:38 PM PDT 24 51978931505 ps
T248 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.3677400062 Aug 18 04:29:04 PM PDT 24 Aug 18 04:30:41 PM PDT 24 73836468606 ps
T356 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.1426245762 Aug 18 04:28:50 PM PDT 24 Aug 18 04:29:55 PM PDT 24 26079387572 ps
T539 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.783178102 Aug 18 04:28:34 PM PDT 24 Aug 18 04:28:41 PM PDT 24 2513047922 ps
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T541 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.2445558575 Aug 18 04:29:06 PM PDT 24 Aug 18 04:29:14 PM PDT 24 5675593782 ps
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T547 /workspace/coverage/default/33.sysrst_ctrl_pin_access_test.32116475 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:14 PM PDT 24 2150359938 ps
T242 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1942943435 Aug 18 04:29:06 PM PDT 24 Aug 18 04:30:57 PM PDT 24 43132824650 ps
T548 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.1966277087 Aug 18 04:29:08 PM PDT 24 Aug 18 04:29:14 PM PDT 24 2615028688 ps
T363 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1966048807 Aug 18 04:28:51 PM PDT 24 Aug 18 04:31:43 PM PDT 24 2521413359513 ps
T549 /workspace/coverage/default/37.sysrst_ctrl_pin_access_test.4106227560 Aug 18 04:29:12 PM PDT 24 Aug 18 04:29:18 PM PDT 24 2163565726 ps
T550 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.4098926105 Aug 18 04:28:33 PM PDT 24 Aug 18 04:28:44 PM PDT 24 4213810528 ps
T551 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.4121424424 Aug 18 04:29:14 PM PDT 24 Aug 18 04:29:17 PM PDT 24 3724917630 ps
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T361 /workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2819293281 Aug 18 04:29:19 PM PDT 24 Aug 18 04:32:30 PM PDT 24 159749062247 ps
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T557 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.405355807 Aug 18 04:28:35 PM PDT 24 Aug 18 04:28:38 PM PDT 24 2468884691 ps
T558 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1443100409 Aug 18 04:29:23 PM PDT 24 Aug 18 04:29:34 PM PDT 24 3644373393 ps
T243 /workspace/coverage/default/36.sysrst_ctrl_combo_detect.2757501493 Aug 18 04:29:24 PM PDT 24 Aug 18 04:30:16 PM PDT 24 80495329570 ps
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T560 /workspace/coverage/default/3.sysrst_ctrl_ec_pwr_on_rst.877684463 Aug 18 04:28:15 PM PDT 24 Aug 18 04:28:18 PM PDT 24 3398379445 ps
T561 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.806340947 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:11 PM PDT 24 2619092661 ps
T562 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.4157655622 Aug 18 04:29:24 PM PDT 24 Aug 18 04:29:30 PM PDT 24 2993416157 ps
T563 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.566874723 Aug 18 04:28:35 PM PDT 24 Aug 18 04:28:37 PM PDT 24 2624004980 ps
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T564 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1612261604 Aug 18 04:28:50 PM PDT 24 Aug 18 04:28:53 PM PDT 24 2453601793 ps
T565 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.3470495304 Aug 18 04:29:21 PM PDT 24 Aug 18 04:29:29 PM PDT 24 2614337540 ps
T322 /workspace/coverage/default/34.sysrst_ctrl_stress_all.3492146276 Aug 18 04:29:09 PM PDT 24 Aug 18 04:31:11 PM PDT 24 125573024633 ps
T566 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1917148389 Aug 18 04:29:39 PM PDT 24 Aug 18 04:29:47 PM PDT 24 2611831183 ps
T161 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.95708765 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:07 PM PDT 24 5190775832 ps
T567 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.3250902837 Aug 18 04:29:09 PM PDT 24 Aug 18 04:29:12 PM PDT 24 2525606153 ps
T568 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.426921904 Aug 18 04:29:40 PM PDT 24 Aug 18 04:29:48 PM PDT 24 2457540468 ps
T569 /workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.801066916 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:13 PM PDT 24 2612867062 ps
T570 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4037138972 Aug 18 04:29:20 PM PDT 24 Aug 18 04:29:22 PM PDT 24 12721293962 ps
T143 /workspace/coverage/default/2.sysrst_ctrl_ultra_low_pwr.316519102 Aug 18 04:28:12 PM PDT 24 Aug 18 04:28:15 PM PDT 24 4170480010 ps
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T152 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.1935778040 Aug 18 04:29:16 PM PDT 24 Aug 18 04:29:22 PM PDT 24 4159246247 ps
T200 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3677971665 Aug 18 04:28:11 PM PDT 24 Aug 18 04:28:16 PM PDT 24 3635697766 ps
T171 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.1603761813 Aug 18 04:29:18 PM PDT 24 Aug 18 04:29:25 PM PDT 24 3772355219 ps
T201 /workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1919452567 Aug 18 04:29:24 PM PDT 24 Aug 18 04:29:27 PM PDT 24 9389834718 ps
T202 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.1615745112 Aug 18 04:29:09 PM PDT 24 Aug 18 04:29:11 PM PDT 24 2472765349 ps
T203 /workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.992023685 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:09 PM PDT 24 3807373266 ps
T204 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1681468587 Aug 18 04:29:50 PM PDT 24 Aug 18 04:29:59 PM PDT 24 3693364962 ps
T205 /workspace/coverage/default/27.sysrst_ctrl_pin_access_test.3791714043 Aug 18 04:29:01 PM PDT 24 Aug 18 04:29:07 PM PDT 24 2217209943 ps
T206 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1256666180 Aug 18 04:29:34 PM PDT 24 Aug 18 04:29:45 PM PDT 24 3790957109 ps
T571 /workspace/coverage/default/3.sysrst_ctrl_auto_blk_key_output.1670287415 Aug 18 04:28:21 PM PDT 24 Aug 18 04:28:26 PM PDT 24 3375576498 ps
T572 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3202192560 Aug 18 04:29:04 PM PDT 24 Aug 18 04:29:07 PM PDT 24 2535386779 ps
T573 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.4189589602 Aug 18 04:28:54 PM PDT 24 Aug 18 04:28:59 PM PDT 24 3720849702 ps
T574 /workspace/coverage/default/48.sysrst_ctrl_alert_test.4275401195 Aug 18 04:29:49 PM PDT 24 Aug 18 04:29:55 PM PDT 24 2013425491 ps
T575 /workspace/coverage/default/21.sysrst_ctrl_smoke.739146399 Aug 18 04:28:59 PM PDT 24 Aug 18 04:29:01 PM PDT 24 2149570138 ps
T576 /workspace/coverage/default/34.sysrst_ctrl_pin_override_test.3359811951 Aug 18 04:29:10 PM PDT 24 Aug 18 04:29:12 PM PDT 24 2534434413 ps
T92 /workspace/coverage/default/19.sysrst_ctrl_stress_all.319916500 Aug 18 04:28:35 PM PDT 24 Aug 18 04:28:48 PM PDT 24 15934112144 ps
T208 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1580608562 Aug 18 04:29:43 PM PDT 24 Aug 18 04:29:51 PM PDT 24 2614120517 ps
T209 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3280672212 Aug 18 04:29:35 PM PDT 24 Aug 18 04:31:07 PM PDT 24 37746037415 ps
T210 /workspace/coverage/default/10.sysrst_ctrl_pin_access_test.146579602 Aug 18 04:28:25 PM PDT 24 Aug 18 04:28:32 PM PDT 24 2201261219 ps
T211 /workspace/coverage/default/21.sysrst_ctrl_pin_override_test.1103486686 Aug 18 04:28:53 PM PDT 24 Aug 18 04:29:00 PM PDT 24 2510819402 ps
T212 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.15308390 Aug 18 04:29:26 PM PDT 24 Aug 18 04:30:03 PM PDT 24 58937151323 ps
T213 /workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2810653425 Aug 18 04:29:24 PM PDT 24 Aug 18 04:30:54 PM PDT 24 49031045698 ps
T160 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.4009048827 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:08 PM PDT 24 3032159235 ps
T214 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.412691701 Aug 18 04:28:54 PM PDT 24 Aug 18 04:30:21 PM PDT 24 67250194836 ps
T215 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1548556667 Aug 18 04:29:57 PM PDT 24 Aug 18 04:30:51 PM PDT 24 83054157004 ps
T341 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1774839601 Aug 18 04:29:50 PM PDT 24 Aug 18 04:32:25 PM PDT 24 65963285286 ps
T577 /workspace/coverage/default/3.sysrst_ctrl_flash_wr_prot_out.1135399971 Aug 18 04:28:16 PM PDT 24 Aug 18 04:28:23 PM PDT 24 2612887247 ps
T578 /workspace/coverage/default/11.sysrst_ctrl_ec_pwr_on_rst.3094522355 Aug 18 04:28:30 PM PDT 24 Aug 18 04:28:39 PM PDT 24 3106346312 ps
T579 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_with_pre_cond.3973583355 Aug 18 04:28:18 PM PDT 24 Aug 18 04:30:21 PM PDT 24 46907726875 ps
T580 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3537850218 Aug 18 04:28:35 PM PDT 24 Aug 18 04:28:42 PM PDT 24 5321534114 ps
T581 /workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3600888973 Aug 18 04:28:26 PM PDT 24 Aug 18 04:28:28 PM PDT 24 10234446448 ps
T582 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3210779775 Aug 18 04:28:14 PM PDT 24 Aug 18 04:28:17 PM PDT 24 2267176727 ps
T583 /workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2383923300 Aug 18 04:29:53 PM PDT 24 Aug 18 04:34:51 PM PDT 24 110926595963 ps
T261 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.3132269171 Aug 18 04:29:24 PM PDT 24 Aug 18 04:29:37 PM PDT 24 8594924526 ps
T584 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3612850177 Aug 18 04:29:08 PM PDT 24 Aug 18 04:29:11 PM PDT 24 2624002519 ps
T585 /workspace/coverage/default/28.sysrst_ctrl_ec_pwr_on_rst.3331440015 Aug 18 04:29:09 PM PDT 24 Aug 18 04:29:12 PM PDT 24 3417661244 ps
T586 /workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3630112285 Aug 18 04:29:53 PM PDT 24 Aug 18 04:30:16 PM PDT 24 37073442762 ps
T587 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1148660314 Aug 18 04:29:06 PM PDT 24 Aug 18 04:29:21 PM PDT 24 5316119003 ps
T294 /workspace/coverage/default/34.sysrst_ctrl_stress_all_with_rand_reset.2432266139 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:16 PM PDT 24 3877416642 ps
T588 /workspace/coverage/default/46.sysrst_ctrl_stress_all.3329709862 Aug 18 04:29:21 PM PDT 24 Aug 18 04:29:54 PM PDT 24 13003697312 ps
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T590 /workspace/coverage/default/36.sysrst_ctrl_edge_detect.2302601910 Aug 18 04:29:14 PM PDT 24 Aug 18 04:29:20 PM PDT 24 2531496661 ps
T591 /workspace/coverage/default/41.sysrst_ctrl_alert_test.3324275234 Aug 18 04:29:20 PM PDT 24 Aug 18 04:29:21 PM PDT 24 2098326348 ps
T592 /workspace/coverage/default/23.sysrst_ctrl_ec_pwr_on_rst.2270464092 Aug 18 04:28:45 PM PDT 24 Aug 18 04:28:57 PM PDT 24 4613134738 ps
T172 /workspace/coverage/default/3.sysrst_ctrl_edge_detect.3560559372 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:12 PM PDT 24 3501981627 ps
T593 /workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3159314730 Aug 18 04:29:35 PM PDT 24 Aug 18 04:29:43 PM PDT 24 2981636688 ps
T594 /workspace/coverage/default/33.sysrst_ctrl_stress_all.2357907700 Aug 18 04:29:04 PM PDT 24 Aug 18 04:45:57 PM PDT 24 804457358258 ps
T595 /workspace/coverage/default/40.sysrst_ctrl_stress_all.712782443 Aug 18 04:29:19 PM PDT 24 Aug 18 04:29:28 PM PDT 24 6588851329 ps
T596 /workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2881598021 Aug 18 04:29:20 PM PDT 24 Aug 18 04:33:33 PM PDT 24 206671105894 ps
T597 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.3989524146 Aug 18 04:28:49 PM PDT 24 Aug 18 04:28:53 PM PDT 24 2616191638 ps
T598 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1113893826 Aug 18 04:29:02 PM PDT 24 Aug 18 04:29:06 PM PDT 24 6257944126 ps
T599 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2415311299 Aug 18 04:28:09 PM PDT 24 Aug 18 04:28:16 PM PDT 24 2609677595 ps
T295 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.412312332 Aug 18 04:28:54 PM PDT 24 Aug 18 04:29:12 PM PDT 24 7013147494 ps
T600 /workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2159355143 Aug 18 04:29:26 PM PDT 24 Aug 18 04:30:02 PM PDT 24 41375000779 ps
T601 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1060277191 Aug 18 04:29:20 PM PDT 24 Aug 18 04:29:27 PM PDT 24 2194180109 ps
T602 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.1625010334 Aug 18 04:28:30 PM PDT 24 Aug 18 04:28:32 PM PDT 24 2162571480 ps
T603 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.1209454244 Aug 18 04:28:13 PM PDT 24 Aug 18 04:28:23 PM PDT 24 3766318373 ps
T604 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.4282093000 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:10 PM PDT 24 3034621234 ps
T605 /workspace/coverage/default/22.sysrst_ctrl_flash_wr_prot_out.3286134725 Aug 18 04:28:56 PM PDT 24 Aug 18 04:29:03 PM PDT 24 2614629856 ps
T606 /workspace/coverage/default/19.sysrst_ctrl_smoke.90785699 Aug 18 04:28:46 PM PDT 24 Aug 18 04:28:50 PM PDT 24 2120004741 ps
T607 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.1639111244 Aug 18 04:29:05 PM PDT 24 Aug 18 04:29:12 PM PDT 24 2612930459 ps
T608 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.17184981 Aug 18 04:29:22 PM PDT 24 Aug 18 04:29:25 PM PDT 24 2476202649 ps
T609 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.3473208996 Aug 18 04:28:45 PM PDT 24 Aug 18 04:28:53 PM PDT 24 2613817316 ps
T610 /workspace/coverage/default/48.sysrst_ctrl_smoke.539986685 Aug 18 04:29:40 PM PDT 24 Aug 18 04:29:43 PM PDT 24 2130659297 ps
T611 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.2177836639 Aug 18 04:28:42 PM PDT 24 Aug 18 04:28:43 PM PDT 24 2648815979 ps
T612 /workspace/coverage/default/35.sysrst_ctrl_stress_all.1498560125 Aug 18 04:29:07 PM PDT 24 Aug 18 04:29:25 PM PDT 24 13994823513 ps
T613 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2371691692 Aug 18 04:29:11 PM PDT 24 Aug 18 04:29:13 PM PDT 24 2658284043 ps
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