Total Coverage Summary 

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.08	99.35	96.76	100.00	97.44	98.78	99.61	87.60

Total tests in report: 910

---

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
59.11	59.11	78.47	78.47	67.52	67.52	90.30	90.30	18.59	18.59	79.22	79.22	67.92	67.92	11.75	11.75	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1293671334
69.21	10.10	86.83	8.36	79.04	11.53	91.44	1.14	41.03	22.44	87.84	8.61	77.84	9.92	20.43	8.68	/workspace/coverage/default/44.sysrst_ctrl_stress_all.180460828
75.39	6.18	93.10	6.27	86.60	7.56	93.49	2.05	51.92	10.90	93.57	5.73	85.84	8.00	23.20	2.77	/workspace/coverage/default/31.sysrst_ctrl_stress_all.1815680383
78.75	3.36	95.04	1.94	88.32	1.72	94.52	1.03	62.82	10.90	95.05	1.48	90.37	4.53	25.15	1.95	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2829076017
81.80	3.04	96.03	0.99	89.43	1.11	96.35	1.83	66.67	3.85	95.60	0.55	91.43	1.06	37.07	11.92	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2774288458
84.19	2.39	97.14	1.12	91.05	1.62	96.35	0.00	79.49	12.82	96.78	1.18	91.43	0.00	37.07	0.00	/workspace/coverage/default/1.sysrst_ctrl_feature_disable.2683282738
85.70	1.51	97.22	0.07	91.18	0.13	96.58	0.23	79.49	0.00	96.86	0.07	92.00	0.58	46.58	9.50	/workspace/coverage/default/49.sysrst_ctrl_stress_all.13045527
87.11	1.41	97.29	0.07	92.44	1.26	97.26	0.68	79.49	0.00	96.97	0.11	92.10	0.10	54.25	7.67	/workspace/coverage/cover_reg_top/5.sysrst_ctrl_tl_intg_err.3089530439
88.36	1.25	97.44	0.15	92.75	0.30	97.26	0.00	80.77	1.28	97.04	0.07	92.29	0.19	60.98	6.73	/workspace/coverage/default/9.sysrst_ctrl_stress_all.1736181420
89.35	0.99	97.70	0.26	92.97	0.23	97.26	0.00	82.69	1.92	97.19	0.15	94.41	2.12	63.22	2.24	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.909193989
90.34	0.99	98.10	0.39	93.43	0.46	97.72	0.46	86.54	3.85	97.52	0.33	95.38	0.96	63.70	0.47	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2243146093
91.12	0.78	98.12	0.02	93.43	0.00	97.72	0.00	86.54	0.00	97.56	0.04	95.38	0.00	69.13	5.43	/workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2972914464
91.59	0.46	98.12	0.00	93.50	0.08	98.17	0.46	87.18	0.64	97.60	0.04	96.82	1.45	69.72	0.59	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.966659299
92.02	0.43	98.25	0.13	93.66	0.15	98.17	0.00	88.46	1.28	97.67	0.07	97.01	0.19	70.90	1.18	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2670808451
92.43	0.41	98.25	0.00	93.66	0.00	98.17	0.00	88.46	0.00	97.67	0.00	97.01	0.00	73.79	2.89	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1951100569
92.80	0.37	98.40	0.15	93.73	0.08	98.17	0.00	90.38	1.92	97.86	0.18	97.30	0.29	73.79	0.00	/workspace/coverage/default/38.sysrst_ctrl_stress_all_with_rand_reset.3980174495
93.16	0.36	98.45	0.06	94.08	0.35	98.17	0.00	92.31	1.92	97.97	0.11	97.30	0.00	73.85	0.06	/workspace/coverage/default/0.sysrst_ctrl_feature_disable.1609971335
93.50	0.34	98.53	0.07	94.34	0.25	98.17	0.00	92.31	0.00	97.97	0.00	97.30	0.00	75.91	2.07	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.892611491
93.80	0.30	98.53	0.00	94.36	0.03	99.77	1.60	92.31	0.00	97.97	0.00	97.40	0.10	76.27	0.35	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2086062287
94.04	0.24	98.60	0.07	94.41	0.05	99.77	0.00	93.59	1.28	98.04	0.07	97.59	0.19	76.27	0.00	/workspace/coverage/default/16.sysrst_ctrl_stress_all.2308741739
94.24	0.20	98.68	0.07	94.41	0.00	99.77	0.00	93.59	0.00	98.04	0.00	97.59	0.00	77.57	1.30	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.848889875
94.43	0.19	98.73	0.06	94.59	0.18	99.77	0.00	94.23	0.64	98.11	0.07	97.98	0.39	77.57	0.00	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3536864354
94.61	0.19	98.73	0.00	95.25	0.66	99.77	0.00	94.23	0.00	98.11	0.00	97.98	0.00	78.22	0.65	/workspace/coverage/cover_reg_top/19.sysrst_ctrl_tl_errors.3737543916
94.80	0.19	98.73	0.00	95.27	0.03	99.77	0.00	94.23	0.00	98.11	0.00	98.07	0.10	79.40	1.18	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3364538589
94.98	0.18	98.77	0.04	95.63	0.35	99.77	0.00	94.87	0.64	98.15	0.04	98.17	0.10	79.52	0.12	/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3052320888
95.13	0.14	98.81	0.04	95.73	0.10	99.77	0.00	94.87	0.00	98.23	0.07	98.84	0.67	79.63	0.12	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_rw.777221277
95.27	0.14	98.81	0.00	95.73	0.00	99.77	0.00	94.87	0.00	98.23	0.00	98.84	0.00	80.64	1.00	/workspace/coverage/default/6.sysrst_ctrl_stress_all.2297655797
95.41	0.14	98.84	0.04	95.80	0.08	99.77	0.00	95.51	0.64	98.26	0.04	99.04	0.19	80.64	0.00	/workspace/coverage/default/19.sysrst_ctrl_stress_all.319916500
95.54	0.13	98.88	0.04	95.83	0.03	99.77	0.00	96.15	0.64	98.30	0.04	99.13	0.10	80.70	0.06	/workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.1067690829
95.66	0.13	98.88	0.00	95.83	0.00	99.77	0.00	96.15	0.00	98.30	0.00	99.13	0.00	81.58	0.89	/workspace/coverage/default/1.sysrst_ctrl_combo_detect.3570803853
95.78	0.12	98.92	0.04	95.85	0.03	99.77	0.00	96.79	0.64	98.34	0.04	99.23	0.10	81.58	0.00	/workspace/coverage/default/10.sysrst_ctrl_edge_detect.3257445889
95.90	0.12	98.96	0.04	95.88	0.03	99.77	0.00	97.44	0.64	98.37	0.04	99.33	0.10	81.58	0.00	/workspace/coverage/default/42.sysrst_ctrl_edge_detect.4256895373
96.00	0.10	98.99	0.04	95.88	0.00	99.77	0.00	97.44	0.00	98.37	0.00	99.33	0.00	82.23	0.65	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.320528741
96.09	0.09	98.99	0.00	95.88	0.00	99.77	0.00	97.44	0.00	98.37	0.00	99.33	0.00	82.88	0.65	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2478881009
96.18	0.09	99.07	0.07	95.88	0.00	99.77	0.00	97.44	0.00	98.37	0.00	99.33	0.00	83.41	0.53	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2705630379
96.25	0.07	99.07	0.00	95.93	0.05	99.77	0.00	97.44	0.00	98.37	0.00	99.52	0.19	83.65	0.24	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.1907060639
96.32	0.07	99.07	0.00	95.93	0.00	99.77	0.00	97.44	0.00	98.37	0.00	99.52	0.00	84.12	0.47	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3345695228
96.37	0.05	99.12	0.06	96.01	0.08	100.00	0.23	97.44	0.00	98.37	0.00	99.52	0.00	84.12	0.00	/workspace/coverage/default/10.sysrst_ctrl_alert_test.253376371
96.42	0.05	99.12	0.00	96.01	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.52	0.00	84.47	0.35	/workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3024910484
96.47	0.05	99.12	0.00	96.01	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.52	0.00	84.83	0.35	/workspace/coverage/default/37.sysrst_ctrl_combo_detect.2389370107
96.52	0.05	99.12	0.00	96.36	0.35	100.00	0.00	97.44	0.00	98.37	0.00	99.52	0.00	84.83	0.00	/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_errors.78462794
96.57	0.05	99.16	0.04	96.44	0.08	100.00	0.00	97.44	0.00	98.37	0.00	99.52	0.00	85.06	0.24	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2973421934
96.61	0.04	99.16	0.00	96.44	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.52	0.00	85.36	0.30	/workspace/coverage/default/33.sysrst_ctrl_combo_detect_with_pre_cond.3348175685
96.65	0.04	99.16	0.00	96.54	0.10	100.00	0.00	97.44	0.00	98.37	0.00	99.61	0.10	85.42	0.06	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_rw.806665951
96.68	0.03	99.16	0.00	96.54	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.61	0.00	85.66	0.24	/workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.2694501021
96.72	0.03	99.16	0.00	96.54	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.61	0.00	85.89	0.24	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1200403519
96.75	0.03	99.16	0.00	96.54	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.61	0.00	86.13	0.24	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3170557046
96.78	0.03	99.16	0.00	96.54	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.61	0.00	86.30	0.18	/workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.737370444
96.80	0.03	99.16	0.00	96.54	0.00	100.00	0.00	97.44	0.00	98.37	0.00	99.61	0.00	86.48	0.18	/workspace/coverage/default/36.sysrst_ctrl_combo_detect.2757501493
96.82	0.02	99.22	0.06	96.54	0.00	100.00	0.00	97.44	0.00	98.48	0.11	99.61	0.00	86.48	0.00	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.146651105
96.84	0.02	99.23	0.02	96.59	0.05	100.00	0.00	97.44	0.00	98.56	0.07	99.61	0.00	86.48	0.00	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.846774854
96.86	0.02	99.23	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.56	0.00	99.61	0.00	86.60	0.12	/workspace/coverage/cover_reg_top/13.sysrst_ctrl_tl_intg_err.2133220789
96.88	0.02	99.23	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.56	0.00	99.61	0.00	86.72	0.12	/workspace/coverage/default/20.sysrst_ctrl_combo_detect.3526866074
96.90	0.02	99.23	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.56	0.00	99.61	0.00	86.84	0.12	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.4149897249
96.91	0.02	99.23	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.56	0.00	99.61	0.00	86.95	0.12	/workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.138041733
96.93	0.02	99.23	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.56	0.00	99.61	0.00	87.07	0.12	/workspace/coverage/default/74.sysrst_ctrl_combo_detect_with_pre_cond.3416096029
96.94	0.02	99.27	0.04	96.59	0.00	100.00	0.00	97.44	0.00	98.63	0.07	99.61	0.00	87.07	0.00	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2786466126
96.96	0.02	99.31	0.04	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.07	99.61	0.00	87.07	0.00	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2406170308
96.97	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.13	0.06	/workspace/coverage/default/14.sysrst_ctrl_stress_all.2806869055
96.98	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.19	0.06	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.4238301117
96.99	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.25	0.06	/workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.3899123058
96.99	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.31	0.06	/workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.1966048807
97.00	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.37	0.06	/workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.3339337262
97.01	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.43	0.06	/workspace/coverage/default/34.sysrst_ctrl_combo_detect_with_pre_cond.759314252
97.02	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.49	0.06	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.1331738716
97.03	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.54	0.06	/workspace/coverage/default/42.sysrst_ctrl_combo_detect.964841784
97.04	0.01	99.31	0.00	96.59	0.00	100.00	0.00	97.44	0.00	98.71	0.00	99.61	0.00	87.60	0.06	/workspace/coverage/default/43.sysrst_ctrl_combo_detect_with_pre_cond.3715884057
97.04	0.01	99.33	0.02	96.59	0.00	100.00	0.00	97.44	0.00	98.74	0.04	99.61	0.00	87.60	0.00	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.3601571251
97.05	0.01	99.35	0.02	96.59	0.00	100.00	0.00	97.44	0.00	98.78	0.04	99.61	0.00	87.60	0.00	/workspace/coverage/default/39.sysrst_ctrl_edge_detect.95708765
97.06	0.01	99.35	0.00	96.64	0.05	100.00	0.00	97.44	0.00	98.78	0.00	99.61	0.00	87.60	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_same_csr_outstanding.2655403415
97.06	0.01	99.35	0.00	96.66	0.03	100.00	0.00	97.44	0.00	98.78	0.00	99.61	0.00	87.60	0.00	/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_errors.1255200262
97.07	0.01	99.35	0.00	96.69	0.03	100.00	0.00	97.44	0.00	98.78	0.00	99.61	0.00	87.60	0.00	/workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3535900
97.07	0.01	99.35	0.00	96.71	0.03	100.00	0.00	97.44	0.00	98.78	0.00	99.61	0.00	87.60	0.00	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1257694975
97.07	0.01	99.35	0.00	96.74	0.03	100.00	0.00	97.44	0.00	98.78	0.00	99.61	0.00	87.60	0.00	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.4180208003

---

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_aliasing.4097507086
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_bit_bash.3491820300
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_hw_reset.1493359118
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_mem_rw_with_rand_reset.1176805709
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_csr_rw.2813985024
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_intr_test.2851911394
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_same_csr_outstanding.2685777145
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_errors.2337747121
/workspace/coverage/cover_reg_top/0.sysrst_ctrl_tl_intg_err.71347173
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_aliasing.4008172815
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_bit_bash.2024656984
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_hw_reset.1099820727
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_csr_mem_rw_with_rand_reset.1606910994
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_intr_test.4109296209
/workspace/coverage/cover_reg_top/1.sysrst_ctrl_tl_intg_err.730845330
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_csr_mem_rw_with_rand_reset.1497770557
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_intr_test.1286834071
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_same_csr_outstanding.841736223
/workspace/coverage/cover_reg_top/10.sysrst_ctrl_tl_intg_err.109007536
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_mem_rw_with_rand_reset.600570140
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_csr_rw.1331492722
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_intr_test.1034452652
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_same_csr_outstanding.2432431381
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_errors.2894693257
/workspace/coverage/cover_reg_top/11.sysrst_ctrl_tl_intg_err.3958708400
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_mem_rw_with_rand_reset.3805519455
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_csr_rw.472365877
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_intr_test.759603893
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_same_csr_outstanding.2771446310
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_errors.1777552905
/workspace/coverage/cover_reg_top/12.sysrst_ctrl_tl_intg_err.990000868
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/workspace/coverage/default/38.sysrst_ctrl_stress_all.1673335137
/workspace/coverage/default/38.sysrst_ctrl_ultra_low_pwr.1919452567
/workspace/coverage/default/39.sysrst_ctrl_alert_test.2708218927
/workspace/coverage/default/39.sysrst_ctrl_auto_blk_key_output.3622593466
/workspace/coverage/default/39.sysrst_ctrl_combo_detect.599025744
/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.923616083
/workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.1267144960
/workspace/coverage/default/39.sysrst_ctrl_flash_wr_prot_out.3788665943
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/workspace/coverage/default/39.sysrst_ctrl_stress_all_with_rand_reset.302297517
/workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.2508338667
/workspace/coverage/default/4.sysrst_ctrl_alert_test.439768127
/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2824406008
/workspace/coverage/default/4.sysrst_ctrl_combo_detect.1222422198
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1795083560
/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3210779775
/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.120077622
/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2413974201
/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.781859675
/workspace/coverage/default/4.sysrst_ctrl_in_out_inverted.592488468
/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.4163238215
/workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3819245615
/workspace/coverage/default/4.sysrst_ctrl_smoke.949377744
/workspace/coverage/default/4.sysrst_ctrl_stress_all.921398155
/workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.1927428513
/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2220692025
/workspace/coverage/default/40.sysrst_ctrl_alert_test.2522209834
/workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.825375603
/workspace/coverage/default/40.sysrst_ctrl_combo_detect_with_pre_cond.975252891
/workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.3560335721
/workspace/coverage/default/40.sysrst_ctrl_edge_detect.1492278770
/workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1537253130
/workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.2101453582
/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3796991301
/workspace/coverage/default/40.sysrst_ctrl_pin_override_test.1387733949
/workspace/coverage/default/40.sysrst_ctrl_smoke.1575375565
/workspace/coverage/default/40.sysrst_ctrl_stress_all.712782443
/workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.1148660314
/workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2662868742
/workspace/coverage/default/41.sysrst_ctrl_alert_test.3324275234
/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.291571602
/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1719817356
/workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.2881515425
/workspace/coverage/default/41.sysrst_ctrl_ec_pwr_on_rst.992023685
/workspace/coverage/default/41.sysrst_ctrl_edge_detect.763056438
/workspace/coverage/default/41.sysrst_ctrl_flash_wr_prot_out.801066916
/workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.320122473
/workspace/coverage/default/41.sysrst_ctrl_pin_access_test.1884013142
/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2289666271
/workspace/coverage/default/41.sysrst_ctrl_smoke.2327439721
/workspace/coverage/default/41.sysrst_ctrl_stress_all.3350058586
/workspace/coverage/default/41.sysrst_ctrl_stress_all_with_rand_reset.1953167109
/workspace/coverage/default/42.sysrst_ctrl_alert_test.2354869707
/workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.1443100409
/workspace/coverage/default/42.sysrst_ctrl_combo_detect_with_pre_cond.2819293281
/workspace/coverage/default/42.sysrst_ctrl_ec_pwr_on_rst.1811271978
/workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.2371691692
/workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.2647183043
/workspace/coverage/default/42.sysrst_ctrl_pin_access_test.2690303178
/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2367914802
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/workspace/coverage/default/42.sysrst_ctrl_stress_all.3550887732
/workspace/coverage/default/43.sysrst_ctrl_alert_test.354431602
/workspace/coverage/default/43.sysrst_ctrl_auto_blk_key_output.3159314730
/workspace/coverage/default/43.sysrst_ctrl_combo_detect.3745418736
/workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.3347218661
/workspace/coverage/default/43.sysrst_ctrl_edge_detect.224066076
/workspace/coverage/default/43.sysrst_ctrl_flash_wr_prot_out.2347332613
/workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.2252155706
/workspace/coverage/default/43.sysrst_ctrl_pin_access_test.1101528922
/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4185811883
/workspace/coverage/default/43.sysrst_ctrl_smoke.1376784081
/workspace/coverage/default/43.sysrst_ctrl_stress_all.583446856
/workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.3493087244
/workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.3752100610
/workspace/coverage/default/44.sysrst_ctrl_alert_test.1344035381
/workspace/coverage/default/44.sysrst_ctrl_auto_blk_key_output.2443071839
/workspace/coverage/default/44.sysrst_ctrl_combo_detect.984258965
/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2834753691
/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1491096871
/workspace/coverage/default/44.sysrst_ctrl_edge_detect.4157655622
/workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.1917148389
/workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.426921904
/workspace/coverage/default/44.sysrst_ctrl_pin_access_test.4151429966
/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.287093833
/workspace/coverage/default/44.sysrst_ctrl_smoke.3656864791
/workspace/coverage/default/44.sysrst_ctrl_stress_all_with_rand_reset.2267109689
/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1891663844
/workspace/coverage/default/45.sysrst_ctrl_alert_test.2973094585
/workspace/coverage/default/45.sysrst_ctrl_auto_blk_key_output.106932292
/workspace/coverage/default/45.sysrst_ctrl_combo_detect.3252525119
/workspace/coverage/default/45.sysrst_ctrl_combo_detect_with_pre_cond.2159355143
/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.834119719
/workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.2273046849
/workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.17184981
/workspace/coverage/default/45.sysrst_ctrl_pin_access_test.909536013
/workspace/coverage/default/45.sysrst_ctrl_pin_override_test.883105757
/workspace/coverage/default/45.sysrst_ctrl_smoke.4264967804
/workspace/coverage/default/45.sysrst_ctrl_stress_all.2354477409
/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.311954133
/workspace/coverage/default/46.sysrst_ctrl_alert_test.4062224652
/workspace/coverage/default/46.sysrst_ctrl_auto_blk_key_output.2881598021
/workspace/coverage/default/46.sysrst_ctrl_combo_detect.708670109
/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.555769757
/workspace/coverage/default/46.sysrst_ctrl_ec_pwr_on_rst.1133725098
/workspace/coverage/default/46.sysrst_ctrl_edge_detect.2107907697
/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2307757064
/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.40637444
/workspace/coverage/default/46.sysrst_ctrl_pin_access_test.1060277191
/workspace/coverage/default/46.sysrst_ctrl_pin_override_test.2764696595
/workspace/coverage/default/46.sysrst_ctrl_smoke.3821200727
/workspace/coverage/default/46.sysrst_ctrl_stress_all.3329709862
/workspace/coverage/default/46.sysrst_ctrl_ultra_low_pwr.2868586381
/workspace/coverage/default/47.sysrst_ctrl_alert_test.1588290385
/workspace/coverage/default/47.sysrst_ctrl_auto_blk_key_output.1756247555
/workspace/coverage/default/47.sysrst_ctrl_combo_detect.2601036370
/workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.2635817465
/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3782629010
/workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3138466641
/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2462235865
/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3153431320
/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2408161933
/workspace/coverage/default/47.sysrst_ctrl_smoke.2793216923
/workspace/coverage/default/47.sysrst_ctrl_stress_all.3218051382
/workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1256666180
/workspace/coverage/default/47.sysrst_ctrl_ultra_low_pwr.876356944
/workspace/coverage/default/48.sysrst_ctrl_alert_test.4275401195
/workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.1681468587
/workspace/coverage/default/48.sysrst_ctrl_combo_detect.181572985
/workspace/coverage/default/48.sysrst_ctrl_combo_detect_with_pre_cond.2383923300
/workspace/coverage/default/48.sysrst_ctrl_edge_detect.2927186886
/workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.1580608562
/workspace/coverage/default/48.sysrst_ctrl_in_out_inverted.1889720241
/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2151208030
/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1451483960
/workspace/coverage/default/48.sysrst_ctrl_smoke.539986685
/workspace/coverage/default/48.sysrst_ctrl_stress_all.797196921
/workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.3014067658
/workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.1321485456
/workspace/coverage/default/49.sysrst_ctrl_alert_test.2042921604
/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.549975403
/workspace/coverage/default/49.sysrst_ctrl_combo_detect.15308390
/workspace/coverage/default/49.sysrst_ctrl_combo_detect_with_pre_cond.709398940
/workspace/coverage/default/49.sysrst_ctrl_edge_detect.3339009644
/workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.677791466
/workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.711559156
/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3253065505
/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1160134214
/workspace/coverage/default/49.sysrst_ctrl_smoke.132351504
/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.834809301
/workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4037138972
/workspace/coverage/default/5.sysrst_ctrl_alert_test.227347932
/workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.3677971665
/workspace/coverage/default/5.sysrst_ctrl_combo_detect.2569317898
/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1710791371
/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2233385435
/workspace/coverage/default/5.sysrst_ctrl_flash_wr_prot_out.228499395
/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2497570846
/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4168579382
/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.312130881
/workspace/coverage/default/5.sysrst_ctrl_smoke.3527836812
/workspace/coverage/default/5.sysrst_ctrl_stress_all.2134929527
/workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.4221446708
/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1559335272
/workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.935932516
/workspace/coverage/default/54.sysrst_ctrl_combo_detect_with_pre_cond.2810653425
/workspace/coverage/default/56.sysrst_ctrl_combo_detect_with_pre_cond.4058905850
/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.329931034
/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.541479952
/workspace/coverage/default/6.sysrst_ctrl_alert_test.1769562088
/workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.2332586180
/workspace/coverage/default/6.sysrst_ctrl_combo_detect.4041441308
/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2494905649
/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2385854330
/workspace/coverage/default/6.sysrst_ctrl_edge_detect.2149011462
/workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.156931359
/workspace/coverage/default/6.sysrst_ctrl_in_out_inverted.744866801
/workspace/coverage/default/6.sysrst_ctrl_pin_access_test.3677644851
/workspace/coverage/default/6.sysrst_ctrl_pin_override_test.1329209827
/workspace/coverage/default/6.sysrst_ctrl_smoke.3389832644
/workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.3477453199
/workspace/coverage/default/60.sysrst_ctrl_combo_detect_with_pre_cond.54751304
/workspace/coverage/default/62.sysrst_ctrl_combo_detect_with_pre_cond.1366826588
/workspace/coverage/default/63.sysrst_ctrl_combo_detect_with_pre_cond.3628184838
/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2224548314
/workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.145852548
/workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.1507428365
/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1922653163
/workspace/coverage/default/68.sysrst_ctrl_combo_detect_with_pre_cond.3567235732
/workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1774839601
/workspace/coverage/default/7.sysrst_ctrl_alert_test.2585974587
/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3455193458
/workspace/coverage/default/7.sysrst_ctrl_combo_detect.2642168842
/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3551133261
/workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.3772490555
/workspace/coverage/default/7.sysrst_ctrl_edge_detect.3125505939
/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3569725878
/workspace/coverage/default/7.sysrst_ctrl_in_out_inverted.2987781646
/workspace/coverage/default/7.sysrst_ctrl_pin_access_test.4159253852
/workspace/coverage/default/7.sysrst_ctrl_pin_override_test.3848081090
/workspace/coverage/default/7.sysrst_ctrl_smoke.3494981003
/workspace/coverage/default/7.sysrst_ctrl_stress_all.1238245773
/workspace/coverage/default/7.sysrst_ctrl_stress_all_with_rand_reset.1830564882
/workspace/coverage/default/7.sysrst_ctrl_ultra_low_pwr.3600888973
/workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.3747669277
/workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.3485477965
/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3440713516
/workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.3280672212
/workspace/coverage/default/78.sysrst_ctrl_combo_detect_with_pre_cond.444436297
/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3939000982
/workspace/coverage/default/8.sysrst_ctrl_alert_test.842339135
/workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.1170056444
/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2862634703
/workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.3982358430
/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1410410770
/workspace/coverage/default/8.sysrst_ctrl_edge_detect.1092790100
/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1370458165
/workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.4149766629
/workspace/coverage/default/8.sysrst_ctrl_pin_access_test.3610701322
/workspace/coverage/default/8.sysrst_ctrl_pin_override_test.2876552977
/workspace/coverage/default/8.sysrst_ctrl_smoke.3874304501
/workspace/coverage/default/8.sysrst_ctrl_stress_all.981409116
/workspace/coverage/default/8.sysrst_ctrl_stress_all_with_rand_reset.1031158284
/workspace/coverage/default/8.sysrst_ctrl_ultra_low_pwr.301331020
/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2307622912
/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4087701535
/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.279613663
/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.472668791
/workspace/coverage/default/84.sysrst_ctrl_combo_detect_with_pre_cond.194111976
/workspace/coverage/default/85.sysrst_ctrl_combo_detect_with_pre_cond.3630112285
/workspace/coverage/default/86.sysrst_ctrl_combo_detect_with_pre_cond.1584032209
/workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.3487328855
/workspace/coverage/default/88.sysrst_ctrl_combo_detect_with_pre_cond.40015922
/workspace/coverage/default/9.sysrst_ctrl_alert_test.2741696574
/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3186882492
/workspace/coverage/default/9.sysrst_ctrl_combo_detect.4100273029
/workspace/coverage/default/9.sysrst_ctrl_combo_detect_with_pre_cond.2829344781
/workspace/coverage/default/9.sysrst_ctrl_ec_pwr_on_rst.647959896
/workspace/coverage/default/9.sysrst_ctrl_edge_detect.3875903839
/workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.2652117593
/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2129449611
/workspace/coverage/default/9.sysrst_ctrl_pin_access_test.2299078438
/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1719171279
/workspace/coverage/default/9.sysrst_ctrl_smoke.3400241632
/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.326866661
/workspace/coverage/default/90.sysrst_ctrl_combo_detect_with_pre_cond.1644186011
/workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2239084389
/workspace/coverage/default/93.sysrst_ctrl_combo_detect_with_pre_cond.107545168
/workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.1548556667
/workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.2373508798
/workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.234072002
/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2602462672
/workspace/coverage/default/99.sysrst_ctrl_combo_detect_with_pre_cond.1328950165

---

Total test records in report: 910

---

tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

---

TEST NO	TEST LOCATION	TEST NAME	STATUS	STARTED	FINISHED	SIMULATION TIME
T5	/workspace/coverage/default/30.sysrst_ctrl_combo_detect_with_pre_cond.1900535078			Aug 18 04:29:03 PM PDT 24	Aug 18 04:29:59 PM PDT 24	27082677970 ps
T6	/workspace/coverage/default/10.sysrst_ctrl_alert_test.253376371			Aug 18 04:28:35 PM PDT 24	Aug 18 04:28:37 PM PDT 24	2027896779 ps
T7	/workspace/coverage/default/4.sysrst_ctrl_sec_cm.2086062287			Aug 18 04:28:24 PM PDT 24	Aug 18 04:28:53 PM PDT 24	22025205814 ps
T1	/workspace/coverage/default/71.sysrst_ctrl_combo_detect_with_pre_cond.1293671334			Aug 18 04:29:25 PM PDT 24	Aug 18 04:32:35 PM PDT 24	70967053828 ps
T14	/workspace/coverage/default/76.sysrst_ctrl_combo_detect_with_pre_cond.3440713516			Aug 18 04:29:29 PM PDT 24	Aug 18 04:29:46 PM PDT 24	26353704152 ps
T15	/workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.1249589965			Aug 18 04:29:00 PM PDT 24	Aug 18 04:29:16 PM PDT 24	11848799580 ps
T16	/workspace/coverage/default/4.sysrst_ctrl_stress_all.921398155			Aug 18 04:28:16 PM PDT 24	Aug 18 04:28:27 PM PDT 24	15232619237 ps
T17	/workspace/coverage/default/3.sysrst_ctrl_pin_override_test.2524016824			Aug 18 04:28:06 PM PDT 24	Aug 18 04:28:13 PM PDT 24	2511744204 ps
T18	/workspace/coverage/default/27.sysrst_ctrl_alert_test.557930647			Aug 18 04:29:06 PM PDT 24	Aug 18 04:29:15 PM PDT 24	2019394932 ps
T2	/workspace/coverage/default/17.sysrst_ctrl_combo_detect.2774288458			Aug 18 04:28:50 PM PDT 24	Aug 18 04:29:27 PM PDT 24	53552366640 ps
T3	/workspace/coverage/default/14.sysrst_ctrl_combo_detect.892611491			Aug 18 04:28:56 PM PDT 24	Aug 18 04:30:18 PM PDT 24	116706493591 ps
T4	/workspace/coverage/default/34.sysrst_ctrl_combo_detect.3682139836			Aug 18 04:29:25 PM PDT 24	Aug 18 04:31:22 PM PDT 24	88767256022 ps
T8	/workspace/coverage/default/37.sysrst_ctrl_edge_detect.3536864354			Aug 18 04:29:21 PM PDT 24	Aug 18 04:29:25 PM PDT 24	2991606306 ps
T81	/workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.2164199665			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:30 PM PDT 24	8872464982 ps
T52	/workspace/coverage/default/25.sysrst_ctrl_combo_detect.3538653656			Aug 18 04:29:00 PM PDT 24	Aug 18 04:33:05 PM PDT 24	98189213626 ps
T82	/workspace/coverage/default/4.sysrst_ctrl_smoke.949377744			Aug 18 04:28:09 PM PDT 24	Aug 18 04:28:13 PM PDT 24	2117659420 ps
T47	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2205601967			Aug 18 04:28:24 PM PDT 24	Aug 18 04:28:28 PM PDT 24	2347245484 ps
T9	/workspace/coverage/default/38.sysrst_ctrl_edge_detect.2829076017			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:23 PM PDT 24	4819162463 ps
T31	/workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.1450906579			Aug 18 04:28:55 PM PDT 24	Aug 18 04:28:59 PM PDT 24	3847525713 ps
T10	/workspace/coverage/default/23.sysrst_ctrl_combo_detect.955020024			Aug 18 04:29:01 PM PDT 24	Aug 18 04:33:15 PM PDT 24	184328303048 ps
T59	/workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.1491096871			Aug 18 04:29:12 PM PDT 24	Aug 18 04:29:15 PM PDT 24	3340764995 ps
T11	/workspace/coverage/default/35.sysrst_ctrl_combo_detect.1721966889			Aug 18 04:29:03 PM PDT 24	Aug 18 04:30:24 PM PDT 24	62302939030 ps
T60	/workspace/coverage/default/20.sysrst_ctrl_alert_test.3320059793			Aug 18 04:29:02 PM PDT 24	Aug 18 04:29:05 PM PDT 24	2020004066 ps
T12	/workspace/coverage/default/44.sysrst_ctrl_ultra_low_pwr.1891663844			Aug 18 04:29:22 PM PDT 24	Aug 18 04:29:30 PM PDT 24	6161597238 ps
T32	/workspace/coverage/default/15.sysrst_ctrl_auto_blk_key_output.3614777412			Aug 18 04:28:32 PM PDT 24	Aug 18 04:28:35 PM PDT 24	3897229558 ps
T61	/workspace/coverage/default/49.sysrst_ctrl_stress_all_with_rand_reset.834809301			Aug 18 04:29:41 PM PDT 24	Aug 18 04:29:49 PM PDT 24	5364239994 ps
T13	/workspace/coverage/default/8.sysrst_ctrl_combo_detect.2862634703			Aug 18 04:28:15 PM PDT 24	Aug 18 04:30:20 PM PDT 24	52823580759 ps
T62	/workspace/coverage/default/27.sysrst_ctrl_smoke.2468641318			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:04 PM PDT 24	2116845617 ps
T48	/workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.1257694975			Aug 18 04:29:43 PM PDT 24	Aug 18 04:33:16 PM PDT 24	77801179788 ps
T69	/workspace/coverage/default/28.sysrst_ctrl_pin_access_test.1503843011			Aug 18 04:29:05 PM PDT 24	Aug 18 04:29:11 PM PDT 24	2182518421 ps
T70	/workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.3597184502			Aug 18 04:29:02 PM PDT 24	Aug 18 04:29:08 PM PDT 24	3654080478 ps
T50	/workspace/coverage/default/67.sysrst_ctrl_combo_detect_with_pre_cond.1922653163			Aug 18 04:29:42 PM PDT 24	Aug 18 04:30:06 PM PDT 24	61213927847 ps
T71	/workspace/coverage/default/13.sysrst_ctrl_smoke.2857691841			Aug 18 04:28:30 PM PDT 24	Aug 18 04:28:36 PM PDT 24	2112389944 ps
T118	/workspace/coverage/default/25.sysrst_ctrl_pin_access_test.4180885636			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:05 PM PDT 24	2114154591 ps
T25	/workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.3441066512			Aug 18 04:28:10 PM PDT 24	Aug 18 04:28:14 PM PDT 24	2463521625 ps
T30	/workspace/coverage/default/32.sysrst_ctrl_edge_detect.3248613144			Aug 18 04:29:07 PM PDT 24	Aug 18 04:29:15 PM PDT 24	2724473185 ps
T23	/workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3153041553			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:21 PM PDT 24	2693237392 ps
T76	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_with_pre_cond.730714900			Aug 18 04:28:11 PM PDT 24	Aug 18 04:28:28 PM PDT 24	25349142699 ps
T28	/workspace/coverage/default/2.sysrst_ctrl_stress_all_with_rand_reset.966659299			Aug 18 04:28:21 PM PDT 24	Aug 18 04:28:29 PM PDT 24	15976496189 ps
T33	/workspace/coverage/default/37.sysrst_ctrl_auto_blk_key_output.3993972407			Aug 18 04:29:14 PM PDT 24	Aug 18 04:29:22 PM PDT 24	3051407581 ps
T36	/workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.312802719			Aug 18 04:28:35 PM PDT 24	Aug 18 04:28:40 PM PDT 24	5942665278 ps
T77	/workspace/coverage/default/23.sysrst_ctrl_stress_all_with_rand_reset.1698775484			Aug 18 04:29:00 PM PDT 24	Aug 18 04:29:14 PM PDT 24	5109647036 ps
T78	/workspace/coverage/default/40.sysrst_ctrl_pin_access_test.3796991301			Aug 18 04:29:20 PM PDT 24	Aug 18 04:29:22 PM PDT 24	2179485844 ps
T42	/workspace/coverage/default/17.sysrst_ctrl_edge_detect.3468980747			Aug 18 04:28:32 PM PDT 24	Aug 18 04:28:40 PM PDT 24	3623001360 ps
T26	/workspace/coverage/default/28.sysrst_ctrl_in_out_inverted.3422905004			Aug 18 04:29:02 PM PDT 24	Aug 18 04:29:10 PM PDT 24	2491624525 ps
T24	/workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.1692865124			Aug 18 04:28:54 PM PDT 24	Aug 18 04:28:57 PM PDT 24	2962916004 ps
T29	/workspace/coverage/default/24.sysrst_ctrl_pin_override_test.3421843671			Aug 18 04:28:44 PM PDT 24	Aug 18 04:28:51 PM PDT 24	2512062968 ps
T27	/workspace/coverage/default/31.sysrst_ctrl_stress_all.1815680383			Aug 18 04:29:03 PM PDT 24	Aug 18 04:30:30 PM PDT 24	988293958210 ps
T79	/workspace/coverage/default/38.sysrst_ctrl_pin_override_test.1300484281			Aug 18 04:29:17 PM PDT 24	Aug 18 04:29:21 PM PDT 24	2515013780 ps
T144	/workspace/coverage/default/5.sysrst_ctrl_ec_pwr_on_rst.1710791371			Aug 18 04:28:17 PM PDT 24	Aug 18 04:28:19 PM PDT 24	2956425378 ps
T80	/workspace/coverage/default/48.sysrst_ctrl_pin_override_test.1451483960			Aug 18 04:29:51 PM PDT 24	Aug 18 04:29:53 PM PDT 24	2522584080 ps
T145	/workspace/coverage/default/22.sysrst_ctrl_smoke.830206994			Aug 18 04:28:50 PM PDT 24	Aug 18 04:28:53 PM PDT 24	2117511733 ps
T72	/workspace/coverage/default/27.sysrst_ctrl_in_out_inverted.35024144			Aug 18 04:29:04 PM PDT 24	Aug 18 04:29:06 PM PDT 24	2468393296 ps
T53	/workspace/coverage/default/4.sysrst_ctrl_auto_blk_key_output.2824406008			Aug 18 04:28:10 PM PDT 24	Aug 18 04:28:20 PM PDT 24	3833233976 ps
T37	/workspace/coverage/default/25.sysrst_ctrl_stress_all.2155478628			Aug 18 04:28:55 PM PDT 24	Aug 18 04:29:02 PM PDT 24	9541239214 ps
T54	/workspace/coverage/default/49.sysrst_ctrl_stress_all.13045527			Aug 18 04:29:54 PM PDT 24	Aug 18 04:30:11 PM PDT 24	13005081395 ps
T85	/workspace/coverage/default/35.sysrst_ctrl_combo_detect_with_pre_cond.2771302811			Aug 18 04:29:05 PM PDT 24	Aug 18 04:29:25 PM PDT 24	27846466691 ps
T164	/workspace/coverage/default/36.sysrst_ctrl_alert_test.1006329261			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:07 PM PDT 24	2010861641 ps
T165	/workspace/coverage/default/24.sysrst_ctrl_alert_test.2191387779			Aug 18 04:28:59 PM PDT 24	Aug 18 04:29:04 PM PDT 24	2012209626 ps
T40	/workspace/coverage/default/44.sysrst_ctrl_stress_all.180460828			Aug 18 04:29:55 PM PDT 24	Aug 18 04:30:25 PM PDT 24	14731224930 ps
T89	/workspace/coverage/default/10.sysrst_ctrl_combo_detect.3257892522			Aug 18 04:28:30 PM PDT 24	Aug 18 04:29:52 PM PDT 24	32171988626 ps
T83	/workspace/coverage/default/42.sysrst_ctrl_pin_override_test.2367914802			Aug 18 04:29:20 PM PDT 24	Aug 18 04:29:23 PM PDT 24	2527566370 ps
T166	/workspace/coverage/default/0.sysrst_ctrl_pin_access_test.2421210245			Aug 18 04:28:11 PM PDT 24	Aug 18 04:28:20 PM PDT 24	2070639840 ps
T101	/workspace/coverage/default/44.sysrst_ctrl_combo_detect.984258965			Aug 18 04:29:20 PM PDT 24	Aug 18 04:32:57 PM PDT 24	162020545575 ps
T51	/workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.2670808451			Aug 18 04:29:53 PM PDT 24	Aug 18 04:33:05 PM PDT 24	78758347347 ps
T187	/workspace/coverage/default/25.sysrst_ctrl_alert_test.134823822			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:07 PM PDT 24	2011830963 ps
T188	/workspace/coverage/default/1.sysrst_ctrl_sec_cm.1205183702			Aug 18 04:28:20 PM PDT 24	Aug 18 04:30:14 PM PDT 24	42010440009 ps
T73	/workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.2129449611			Aug 18 04:28:13 PM PDT 24	Aug 18 04:28:20 PM PDT 24	2437122572 ps
T189	/workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.3733068879			Aug 18 04:28:25 PM PDT 24	Aug 18 05:01:36 PM PDT 24	1559025200931 ps
T84	/workspace/coverage/default/41.sysrst_ctrl_stress_all.3350058586			Aug 18 04:29:28 PM PDT 24	Aug 18 04:29:38 PM PDT 24	7240366828 ps
T374	/workspace/coverage/default/39.sysrst_ctrl_smoke.1759532367			Aug 18 04:29:22 PM PDT 24	Aug 18 04:29:24 PM PDT 24	2127482174 ps
T38	/workspace/coverage/default/17.sysrst_ctrl_stress_all.325080495			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:32 PM PDT 24	13809093414 ps
T55	/workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.3170557046			Aug 18 04:29:23 PM PDT 24	Aug 18 04:29:32 PM PDT 24	25709213498 ps
T44	/workspace/coverage/default/45.sysrst_ctrl_edge_detect.146651105			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:21 PM PDT 24	2774792721 ps
T74	/workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.2497570846			Aug 18 04:28:12 PM PDT 24	Aug 18 04:28:21 PM PDT 24	2470767929 ps
T375	/workspace/coverage/default/47.sysrst_ctrl_smoke.2793216923			Aug 18 04:29:37 PM PDT 24	Aug 18 04:29:38 PM PDT 24	2239562938 ps
T56	/workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.1974176254			Aug 18 04:29:05 PM PDT 24	Aug 18 04:29:10 PM PDT 24	3079959865 ps
T57	/workspace/coverage/default/25.sysrst_ctrl_auto_blk_key_output.266367251			Aug 18 04:28:58 PM PDT 24	Aug 18 04:29:01 PM PDT 24	3647217090 ps
T376	/workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.120077622			Aug 18 04:28:16 PM PDT 24	Aug 18 04:28:18 PM PDT 24	3367625544 ps
T45	/workspace/coverage/default/24.sysrst_ctrl_edge_detect.996426107			Aug 18 04:29:05 PM PDT 24	Aug 18 04:29:08 PM PDT 24	2885055201 ps
T366	/workspace/coverage/default/10.sysrst_ctrl_stress_all.1951100569			Aug 18 04:28:29 PM PDT 24	Aug 18 04:29:05 PM PDT 24	13376576804 ps
T64	/workspace/coverage/default/45.sysrst_ctrl_ultra_low_pwr.311954133			Aug 18 04:29:39 PM PDT 24	Aug 18 04:29:42 PM PDT 24	12690478201 ps
T49	/workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2705630379			Aug 18 04:29:37 PM PDT 24	Aug 18 04:32:42 PM PDT 24	77226159706 ps
T377	/workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.4206264472			Aug 18 04:28:38 PM PDT 24	Aug 18 04:28:50 PM PDT 24	4889990386 ps
T86	/workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.329931034			Aug 18 04:29:23 PM PDT 24	Aug 18 04:29:45 PM PDT 24	33143272473 ps
T46	/workspace/coverage/default/35.sysrst_ctrl_edge_detect.1173585923			Aug 18 04:29:14 PM PDT 24	Aug 18 04:29:22 PM PDT 24	3280874485 ps
T378	/workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.3749919702			Aug 18 04:28:06 PM PDT 24	Aug 18 04:28:09 PM PDT 24	2178327932 ps
T379	/workspace/coverage/default/16.sysrst_ctrl_smoke.1699328060			Aug 18 04:28:30 PM PDT 24	Aug 18 04:28:32 PM PDT 24	2138502539 ps
T232	/workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.3551133261			Aug 18 04:28:23 PM PDT 24	Aug 18 04:31:45 PM PDT 24	77210394216 ps
T380	/workspace/coverage/default/31.sysrst_ctrl_smoke.3929456176			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:06 PM PDT 24	2114687790 ps
T368	/workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2408161933			Aug 18 04:29:41 PM PDT 24	Aug 18 04:29:43 PM PDT 24	2585263061 ps
T75	/workspace/coverage/default/21.sysrst_ctrl_in_out_inverted.2368665910			Aug 18 04:28:49 PM PDT 24	Aug 18 04:28:51 PM PDT 24	2499496910 ps
T367	/workspace/coverage/default/30.sysrst_ctrl_pin_override_test.2478881009			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:03 PM PDT 24	2541645250 ps
T39	/workspace/coverage/default/47.sysrst_ctrl_edge_detect.3782629010			Aug 18 04:29:20 PM PDT 24	Aug 18 04:29:22 PM PDT 24	4602408626 ps
T233	/workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.909193989			Aug 18 04:28:54 PM PDT 24	Aug 18 04:34:17 PM PDT 24	130320603702 ps
T41	/workspace/coverage/default/36.sysrst_ctrl_stress_all.4213175098			Aug 18 04:29:04 PM PDT 24	Aug 18 04:29:09 PM PDT 24	10666834669 ps
T65	/workspace/coverage/default/4.sysrst_ctrl_ultra_low_pwr.2220692025			Aug 18 04:28:19 PM PDT 24	Aug 18 04:28:34 PM PDT 24	696073876288 ps
T226	/workspace/coverage/default/28.sysrst_ctrl_stress_all.4037117881			Aug 18 04:29:15 PM PDT 24	Aug 18 04:29:21 PM PDT 24	9096679298 ps
T58	/workspace/coverage/default/30.sysrst_ctrl_auto_blk_key_output.4094699098			Aug 18 04:29:07 PM PDT 24	Aug 18 04:29:10 PM PDT 24	3748752723 ps
T227	/workspace/coverage/default/16.sysrst_ctrl_in_out_inverted.3431802351			Aug 18 04:28:31 PM PDT 24	Aug 18 04:28:34 PM PDT 24	2458939559 ps
T228	/workspace/coverage/default/30.sysrst_ctrl_stress_all.4141176359			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:45 PM PDT 24	9981017844 ps
T229	/workspace/coverage/default/9.sysrst_ctrl_smoke.3400241632			Aug 18 04:28:16 PM PDT 24	Aug 18 04:28:18 PM PDT 24	2124774272 ps
T104	/workspace/coverage/default/13.sysrst_ctrl_combo_detect.1509929985			Aug 18 04:28:31 PM PDT 24	Aug 18 04:29:40 PM PDT 24	47683376027 ps
T66	/workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.1102573597			Aug 18 04:29:17 PM PDT 24	Aug 18 04:29:25 PM PDT 24	5498537574 ps
T230	/workspace/coverage/default/14.sysrst_ctrl_smoke.3423483406			Aug 18 04:28:30 PM PDT 24	Aug 18 04:28:36 PM PDT 24	2113789178 ps
T369	/workspace/coverage/default/49.sysrst_ctrl_pin_override_test.1160134214			Aug 18 04:29:21 PM PDT 24	Aug 18 04:29:27 PM PDT 24	2514408102 ps
T381	/workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.3333506479			Aug 18 04:28:11 PM PDT 24	Aug 18 04:28:17 PM PDT 24	2205284284 ps
T67	/workspace/coverage/default/37.sysrst_ctrl_ultra_low_pwr.1608620779			Aug 18 04:29:11 PM PDT 24	Aug 18 04:29:24 PM PDT 24	5030066078 ps
T382	/workspace/coverage/default/25.sysrst_ctrl_flash_wr_prot_out.2924197776			Aug 18 04:29:03 PM PDT 24	Aug 18 04:29:05 PM PDT 24	2625874267 ps
T383	/workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.781859675			Aug 18 04:28:12 PM PDT 24	Aug 18 04:28:20 PM PDT 24	2609441700 ps
T234	/workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.472668791			Aug 18 04:29:39 PM PDT 24	Aug 18 04:30:18 PM PDT 24	110197152406 ps
T241	/workspace/coverage/default/39.sysrst_ctrl_combo_detect.599025744			Aug 18 04:29:08 PM PDT 24	Aug 18 04:36:42 PM PDT 24	185772337580 ps
T384	/workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3368783401			Aug 18 04:28:20 PM PDT 24	Aug 18 04:28:26 PM PDT 24	2397558544 ps
T257	/workspace/coverage/default/2.sysrst_ctrl_sec_cm.3722348376			Aug 18 04:28:06 PM PDT 24	Aug 18 04:29:04 PM PDT 24	22010937578 ps
T68	/workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3052320888			Aug 18 04:28:27 PM PDT 24	Aug 18 04:28:30 PM PDT 24	5594826561 ps
T136	/workspace/coverage/default/16.sysrst_ctrl_combo_detect.2264976503			Aug 18 04:28:43 PM PDT 24	Aug 18 04:29:50 PM PDT 24	89997408783 ps
T137	/workspace/coverage/default/8.sysrst_ctrl_alert_test.842339135			Aug 18 04:28:23 PM PDT 24	Aug 18 04:28:27 PM PDT 24	2016203232 ps
T138	/workspace/coverage/default/14.sysrst_ctrl_edge_detect.1658639176			Aug 18 04:28:32 PM PDT 24	Aug 18 04:28:43 PM PDT 24	5922680008 ps
T139	/workspace/coverage/default/12.sysrst_ctrl_edge_detect.3890757223			Aug 18 04:28:19 PM PDT 24	Aug 18 04:28:28 PM PDT 24	4866992982 ps
T140	/workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.1953362489			Aug 18 04:28:38 PM PDT 24	Aug 18 04:28:54 PM PDT 24	10472914034 ps
T87	/workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1559335272			Aug 18 04:28:30 PM PDT 24	Aug 18 04:28:34 PM PDT 24	2849692001 ps
T105	/workspace/coverage/default/9.sysrst_ctrl_stress_all.1736181420			Aug 18 04:28:42 PM PDT 24	Aug 18 04:30:42 PM PDT 24	195609988599 ps
T141	/workspace/coverage/default/28.sysrst_ctrl_combo_detect.4149897249			Aug 18 04:29:16 PM PDT 24	Aug 18 04:30:34 PM PDT 24	116070203570 ps
T142	/workspace/coverage/default/41.sysrst_ctrl_pin_override_test.2289666271			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:26 PM PDT 24	2513056179 ps
T385	/workspace/coverage/default/11.sysrst_ctrl_in_out_inverted.2994411981			Aug 18 04:28:29 PM PDT 24	Aug 18 04:28:36 PM PDT 24	2443727823 ps
T386	/workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst.1795083560			Aug 18 04:28:21 PM PDT 24	Aug 18 04:28:23 PM PDT 24	2469920008 ps
T169	/workspace/coverage/default/20.sysrst_ctrl_edge_detect.3601571251			Aug 18 04:28:58 PM PDT 24	Aug 18 04:29:00 PM PDT 24	2736506941 ps
T387	/workspace/coverage/default/14.sysrst_ctrl_ec_pwr_on_rst.137904468			Aug 18 04:28:35 PM PDT 24	Aug 18 04:28:48 PM PDT 24	4423206716 ps
T388	/workspace/coverage/default/18.sysrst_ctrl_ec_pwr_on_rst.657046731			Aug 18 04:28:32 PM PDT 24	Aug 18 04:28:46 PM PDT 24	4824132764 ps
T389	/workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3949839190			Aug 18 04:28:58 PM PDT 24	Aug 18 04:29:05 PM PDT 24	2252368809 ps
T235	/workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.2494905649			Aug 18 04:28:26 PM PDT 24	Aug 18 04:30:52 PM PDT 24	56911084345 ps
T390	/workspace/coverage/default/2.sysrst_ctrl_in_out_inverted.1979340350			Aug 18 04:28:11 PM PDT 24	Aug 18 04:28:19 PM PDT 24	2465531844 ps
T391	/workspace/coverage/default/20.sysrst_ctrl_ec_pwr_on_rst.2889794144			Aug 18 04:28:56 PM PDT 24	Aug 18 04:29:02 PM PDT 24	4473595341 ps
T392	/workspace/coverage/default/26.sysrst_ctrl_in_out_inverted.3052966561			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:09 PM PDT 24	2474649535 ps
T393	/workspace/coverage/default/5.sysrst_ctrl_smoke.3527836812			Aug 18 04:28:21 PM PDT 24	Aug 18 04:28:28 PM PDT 24	2108113763 ps
T394	/workspace/coverage/default/45.sysrst_ctrl_smoke.4264967804			Aug 18 04:29:20 PM PDT 24	Aug 18 04:29:22 PM PDT 24	2134432209 ps
T147	/workspace/coverage/default/42.sysrst_ctrl_stress_all_with_rand_reset.2243146093			Aug 18 04:29:25 PM PDT 24	Aug 18 04:29:30 PM PDT 24	6130338246 ps
T370	/workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1124775810			Aug 18 04:28:31 PM PDT 24	Aug 18 04:28:33 PM PDT 24	2532949768 ps
T284	/workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.3186882492			Aug 18 04:28:30 PM PDT 24	Aug 18 04:28:35 PM PDT 24	3033048252 ps
T283	/workspace/coverage/default/0.sysrst_ctrl_stress_all_with_rand_reset.3345695228			Aug 18 04:28:09 PM PDT 24	Aug 18 04:28:25 PM PDT 24	6188267322 ps
T395	/workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2925866724			Aug 18 04:29:07 PM PDT 24	Aug 18 04:29:10 PM PDT 24	2483636538 ps
T106	/workspace/coverage/default/27.sysrst_ctrl_combo_detect.2319038639			Aug 18 04:29:00 PM PDT 24	Aug 18 04:30:23 PM PDT 24	64399975162 ps
T396	/workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2307757064			Aug 18 04:29:22 PM PDT 24	Aug 18 04:29:24 PM PDT 24	2624444594 ps
T397	/workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.2462235865			Aug 18 04:29:24 PM PDT 24	Aug 18 04:29:32 PM PDT 24	2462438173 ps
T102	/workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.1748703184			Aug 18 04:28:12 PM PDT 24	Aug 18 04:28:15 PM PDT 24	3270286789 ps
T103	/workspace/coverage/default/41.sysrst_ctrl_auto_blk_key_output.291571602			Aug 18 04:29:10 PM PDT 24	Aug 18 04:29:13 PM PDT 24	3342674728 ps
T216	/workspace/coverage/default/34.sysrst_ctrl_edge_detect.3020749174			Aug 18 04:29:15 PM PDT 24	Aug 18 04:29:18 PM PDT 24	2855498924 ps
T398	/workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.2025026430			Aug 18 04:29:07 PM PDT 24	Aug 18 04:29:14 PM PDT 24	3327728261 ps
T399	/workspace/coverage/default/32.sysrst_ctrl_ec_pwr_on_rst.3078724404			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:23 PM PDT 24	2842926620 ps
T350	/workspace/coverage/default/0.sysrst_ctrl_stress_all.1610562257			Aug 18 04:28:13 PM PDT 24	Aug 18 04:29:50 PM PDT 24	148499369285 ps
T236	/workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.3813519659			Aug 18 04:29:27 PM PDT 24	Aug 18 04:30:12 PM PDT 24	71842148798 ps
T373	/workspace/coverage/default/44.sysrst_ctrl_pin_override_test.287093833			Aug 18 04:29:30 PM PDT 24	Aug 18 04:29:32 PM PDT 24	2537312600 ps
T400	/workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.1410410770			Aug 18 04:28:16 PM PDT 24	Aug 18 04:28:25 PM PDT 24	3101024487 ps
T43	/workspace/coverage/default/1.sysrst_ctrl_edge_detect.2786466126			Aug 18 04:28:12 PM PDT 24	Aug 18 04:28:15 PM PDT 24	3051470875 ps
T401	/workspace/coverage/default/12.sysrst_ctrl_alert_test.2804632637			Aug 18 04:28:24 PM PDT 24	Aug 18 04:28:30 PM PDT 24	2011955300 ps
T237	/workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2307622912			Aug 18 04:29:56 PM PDT 24	Aug 18 04:30:33 PM PDT 24	57149056101 ps
T402	/workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.691426725			Aug 18 04:29:00 PM PDT 24	Aug 18 04:29:02 PM PDT 24	2509044005 ps
T403	/workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1314449993			Aug 18 04:29:04 PM PDT 24	Aug 18 04:29:07 PM PDT 24	2158767397 ps
T404	/workspace/coverage/default/26.sysrst_ctrl_pin_override_test.670153228			Aug 18 04:28:59 PM PDT 24	Aug 18 04:29:07 PM PDT 24	2511172278 ps
T238	/workspace/coverage/default/25.sysrst_ctrl_combo_detect_with_pre_cond.1200403519			Aug 18 04:28:56 PM PDT 24	Aug 18 04:29:20 PM PDT 24	76663418796 ps
T157	/workspace/coverage/default/30.sysrst_ctrl_edge_detect.3465455174			Aug 18 04:29:16 PM PDT 24	Aug 18 04:29:18 PM PDT 24	4179081989 ps
T405	/workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.2385854330			Aug 18 04:28:26 PM PDT 24	Aug 18 04:28:30 PM PDT 24	4561170652 ps
T406	/workspace/coverage/default/26.sysrst_ctrl_alert_test.464919591			Aug 18 04:28:58 PM PDT 24	Aug 18 04:29:04 PM PDT 24	2010510881 ps
T240	/workspace/coverage/default/17.sysrst_ctrl_combo_detect_with_pre_cond.4238301117			Aug 18 04:28:55 PM PDT 24	Aug 18 04:32:57 PM PDT 24	92761067107 ps
T407	/workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.3369153624			Aug 18 04:29:11 PM PDT 24	Aug 18 04:29:15 PM PDT 24	4133267638 ps
T336	/workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.541479952			Aug 18 04:29:26 PM PDT 24	Aug 18 04:29:54 PM PDT 24	108318359846 ps
T408	/workspace/coverage/default/16.sysrst_ctrl_ec_pwr_on_rst.724957			Aug 18 04:28:38 PM PDT 24	Aug 18 04:28:44 PM PDT 24	4320402341 ps
T371	/workspace/coverage/default/5.sysrst_ctrl_pin_override_test.312130881			Aug 18 04:28:09 PM PDT 24	Aug 18 04:28:13 PM PDT 24	2521937498 ps
T409	/workspace/coverage/default/45.sysrst_ctrl_alert_test.2973094585			Aug 18 04:29:13 PM PDT 24	Aug 18 04:29:18 PM PDT 24	2011577293 ps
T410	/workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.2650136754			Aug 18 04:28:43 PM PDT 24	Aug 18 04:28:47 PM PDT 24	2459562927 ps
T411	/workspace/coverage/default/17.sysrst_ctrl_pin_override_test.1792195077			Aug 18 04:28:44 PM PDT 24	Aug 18 04:28:47 PM PDT 24	2532036335 ps
T246	/workspace/coverage/default/40.sysrst_ctrl_combo_detect.3364538589			Aug 18 04:29:06 PM PDT 24	Aug 18 04:29:31 PM PDT 24	27631368923 ps
T372	/workspace/coverage/default/37.sysrst_ctrl_pin_override_test.4290196168			Aug 18 04:29:17 PM PDT 24	Aug 18 04:29:19 PM PDT 24	2536635520 ps
T412	/workspace/coverage/default/2.sysrst_ctrl_pin_access_test.3267448483			Aug 18 04:28:07 PM PDT 24	Aug 18 04:28:09 PM PDT 24	2110550177 ps
T324	/workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.320528741			Aug 18 04:29:25 PM PDT 24	Aug 18 04:30:05 PM PDT 24	64454522546 ps
T259	/workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.2045453799			Aug 18 04:28:27 PM PDT 24	Aug 18 04:28:43 PM PDT 24	10508533295 ps
T413	/workspace/coverage/default/9.sysrst_ctrl_alert_test.2741696574			Aug 18 04:28:19 PM PDT 24	Aug 18 04:28:24 PM PDT 24	2015574214 ps
T107	/workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.1907060639			Aug 18 04:28:46 PM PDT 24	Aug 18 04:34:52 PM PDT 24	149053334998 ps
T414	/workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.326866661			Aug 18 04:28:20 PM PDT 24	Aug 18 04:28:38 PM PDT 24	7255607855 ps
T415	/workspace/coverage/default/43.sysrst_ctrl_smoke.1376784081			Aug 18 04:29:11 PM PDT 24	Aug 18 04:29:14 PM PDT 24	2129617896 ps
T122	/workspace/coverage/default/11.sysrst_ctrl_stress_all.1159427973			Aug 18 04:28:20 PM PDT 24	Aug 18 04:28:27 PM PDT 24	11498586220 ps
T108	/workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.779941655			Aug 18 04:29:17 PM PDT 24	Aug 18 04:29:24 PM PDT 24	24494800753 ps
T416	/workspace/coverage/default/38.sysrst_ctrl_alert_test.396986612			Aug 18 04:29:08 PM PDT 24	Aug 18 04:29:15 PM PDT 24	2027846729 ps
T417	/workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.1588868405			Aug 18 04:28:12 PM PDT 24	Aug 18 04:28:15 PM PDT 24	2627887316 ps
T354	/workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.279613663			Aug 18 04:29:48 PM PDT 24	Aug 18 04:32:06 PM PDT 24	49750744875 ps
T418	/workspace/coverage/default/49.sysrst_ctrl_pin_access_test.3253065505			Aug 18 04:29:51 PM PDT 24	Aug 18 04:29:56 PM PDT 24	2093619011 ps
T98	/workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.555769757			Aug 18 04:29:44 PM PDT 24	Aug 18 04:29:50 PM PDT 24	22395942384 ps
T419	/workspace/coverage/default/11.sysrst_ctrl_alert_test.2211936109			Aug 18 04:28:27 PM PDT 24	Aug 18 04:28:33 PM PDT 24	2014492382 ps
T332	/workspace/coverage/default/81.sysrst_ctrl_combo_detect_with_pre_cond.4087701535			Aug 18 04:29:34 PM PDT 24	Aug 18 04:30:04 PM PDT 24	137486210346 ps
T420	/workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.40637444			Aug 18 04:29:37 PM PDT 24	Aug 18 04:29:44 PM PDT 24	2451606336 ps
T421	/workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2903748556			Aug 18 04:29:13 PM PDT 24	Aug 18 04:29:20 PM PDT 24	3300148270 ps
T422	/workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.4130294167			Aug 18 04:29:21 PM PDT 24	Aug 18 04:29:29 PM PDT 24	2465715042 ps
T346	/workspace/coverage/default/79.sysrst_ctrl_combo_detect_with_pre_cond.3939000982			Aug 18 04:29:53 PM PDT 24	Aug 18 04:31:46 PM PDT 24	41977559206 ps
T123	/workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.359146119			Aug 18 04:28:27 PM PDT 24	Aug 18 04:28:29 PM PDT 24	3377614781 ps
T423	/workspace/coverage/default/21.sysrst_ctrl_pin_access_test.4125046140			Aug 18 04:28:35 PM PDT 24	Aug 18 04:28:37 PM PDT 24	2115427897 ps
T109	/workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.1790492903			Aug 18 04:28:14 PM PDT 24	Aug 18 04:29:25 PM PDT 24	26830478943 ps
T424	/workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.1370458165			Aug 18 04:28:22 PM PDT 24	Aug 18 04:28:24 PM PDT 24	2640177813 ps
T425	/workspace/coverage/default/12.sysrst_ctrl_stress_all.188376183			Aug 18 04:28:27 PM PDT 24	Aug 18 04:28:31 PM PDT 24	8133267909 ps
T426	/workspace/coverage/default/20.sysrst_ctrl_pin_access_test.3671992496			Aug 18 04:28:38 PM PDT 24	Aug 18 04:28:49 PM PDT 24	2112377579 ps
T148	/workspace/coverage/default/5.sysrst_ctrl_stress_all.2134929527			Aug 18 04:28:11 PM PDT 24	Aug 18 04:28:36 PM PDT 24	10079723838 ps
T88	/workspace/coverage/default/28.sysrst_ctrl_ultra_low_pwr.2581193921			Aug 18 04:29:17 PM PDT 24	Aug 18 04:29:23 PM PDT 24	4788002495 ps
T427	/workspace/coverage/default/10.sysrst_ctrl_smoke.1390912549			Aug 18 04:28:19 PM PDT 24	Aug 18 04:28:25 PM PDT 24	2113205877 ps
T428	/workspace/coverage/default/9.sysrst_ctrl_pin_override_test.1719171279			Aug 18 04:28:33 PM PDT 24	Aug 18 04:28:40 PM PDT 24	2515373917 ps
T429	/workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.3569725878			Aug 18 04:28:28 PM PDT 24	Aug 18 04:28:32 PM PDT 24	2617092002 ps
T430	/workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.1865033875			Aug 18 04:29:06 PM PDT 24	Aug 18 04:29:09 PM PDT 24	2626182913 ps
T431	/workspace/coverage/default/20.sysrst_ctrl_stress_all.829949763			Aug 18 04:28:42 PM PDT 24	Aug 18 04:28:46 PM PDT 24	6287099358 ps
T260	/workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.2150768102			Aug 18 04:28:55 PM PDT 24	Aug 18 04:29:08 PM PDT 24	4351784684 ps
T296	/workspace/coverage/default/7.sysrst_ctrl_stress_all.1238245773			Aug 18 04:28:17 PM PDT 24	Aug 18 04:28:33 PM PDT 24	6252967819 ps
T297	/workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.446071622			Aug 18 04:28:29 PM PDT 24	Aug 18 04:28:34 PM PDT 24	2618461765 ps
T298	/workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.3863155114			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:05 PM PDT 24	2455595375 ps
T299	/workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.848889875			Aug 18 04:29:23 PM PDT 24	Aug 18 04:33:46 PM PDT 24	99182809067 ps
T300	/workspace/coverage/default/44.sysrst_ctrl_combo_detect_with_pre_cond.2834753691			Aug 18 04:29:39 PM PDT 24	Aug 18 04:31:53 PM PDT 24	53646340212 ps
T301	/workspace/coverage/default/0.sysrst_ctrl_smoke.1012730988			Aug 18 04:28:03 PM PDT 24	Aug 18 04:28:06 PM PDT 24	2131700992 ps
T250	/workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.923616083			Aug 18 04:29:07 PM PDT 24	Aug 18 04:29:45 PM PDT 24	58804820170 ps
T302	/workspace/coverage/default/30.sysrst_ctrl_ec_pwr_on_rst.2845716805			Aug 18 04:29:17 PM PDT 24	Aug 18 04:29:22 PM PDT 24	3611534664 ps
T303	/workspace/coverage/default/25.sysrst_ctrl_ec_pwr_on_rst.1940350014			Aug 18 04:29:09 PM PDT 24	Aug 18 04:29:13 PM PDT 24	4227747994 ps
T432	/workspace/coverage/default/43.sysrst_ctrl_stress_all.583446856			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:21 PM PDT 24	9636737450 ps
T433	/workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.314247411			Aug 18 04:28:36 PM PDT 24	Aug 18 04:31:58 PM PDT 24	308131053871 ps
T434	/workspace/coverage/default/47.sysrst_ctrl_pin_access_test.3153431320			Aug 18 04:29:54 PM PDT 24	Aug 18 04:30:00 PM PDT 24	2025250616 ps
T435	/workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.3199793071			Aug 18 04:29:06 PM PDT 24	Aug 18 04:29:14 PM PDT 24	3333721301 ps
T436	/workspace/coverage/default/48.sysrst_ctrl_pin_access_test.2151208030			Aug 18 04:29:23 PM PDT 24	Aug 18 04:29:25 PM PDT 24	2132231348 ps
T110	/workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2224548314			Aug 18 04:29:41 PM PDT 24	Aug 18 04:31:07 PM PDT 24	33296212094 ps
T111	/workspace/coverage/default/38.sysrst_ctrl_combo_detect.881523031			Aug 18 04:29:10 PM PDT 24	Aug 18 04:31:38 PM PDT 24	103820122510 ps
T437	/workspace/coverage/default/43.sysrst_ctrl_pin_override_test.4185811883			Aug 18 04:29:22 PM PDT 24	Aug 18 04:29:29 PM PDT 24	2510311525 ps
T93	/workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.4180208003			Aug 18 04:29:44 PM PDT 24	Aug 18 04:35:23 PM PDT 24	140590615510 ps
T351	/workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.2602462672			Aug 18 04:29:43 PM PDT 24	Aug 18 04:30:52 PM PDT 24	117909759972 ps
T438	/workspace/coverage/default/47.sysrst_ctrl_alert_test.1588290385			Aug 18 04:29:36 PM PDT 24	Aug 18 04:29:39 PM PDT 24	2022237852 ps
T439	/workspace/coverage/default/33.sysrst_ctrl_alert_test.3424505969			Aug 18 04:29:16 PM PDT 24	Aug 18 04:29:20 PM PDT 24	2014946172 ps
T440	/workspace/coverage/default/26.sysrst_ctrl_ec_pwr_on_rst.1934808139			Aug 18 04:28:58 PM PDT 24	Aug 18 04:29:01 PM PDT 24	3118217873 ps
T441	/workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.3455193458			Aug 18 04:28:27 PM PDT 24	Aug 18 04:28:36 PM PDT 24	3251934659 ps
T442	/workspace/coverage/default/4.sysrst_ctrl_pin_access_test.4163238215			Aug 18 04:28:11 PM PDT 24	Aug 18 04:28:17 PM PDT 24	2199111180 ps
T119	/workspace/coverage/default/27.sysrst_ctrl_stress_all.3345845823			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:58 PM PDT 24	17404628339 ps
T162	/workspace/coverage/default/4.sysrst_ctrl_edge_detect.2413974201			Aug 18 04:28:25 PM PDT 24	Aug 18 04:28:28 PM PDT 24	2830301596 ps
T99	/workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.2406170308			Aug 18 04:28:49 PM PDT 24	Aug 18 04:28:57 PM PDT 24	11799275983 ps
T443	/workspace/coverage/default/5.sysrst_ctrl_pin_access_test.4168579382			Aug 18 04:28:26 PM PDT 24	Aug 18 04:28:28 PM PDT 24	2076799469 ps
T444	/workspace/coverage/default/41.sysrst_ctrl_combo_detect.1719817356			Aug 18 04:29:21 PM PDT 24	Aug 18 04:30:21 PM PDT 24	91567962875 ps
T445	/workspace/coverage/default/17.sysrst_ctrl_pin_access_test.2206404294			Aug 18 04:28:40 PM PDT 24	Aug 18 04:28:43 PM PDT 24	2176577120 ps
T446	/workspace/coverage/default/43.sysrst_ctrl_alert_test.354431602			Aug 18 04:29:20 PM PDT 24	Aug 18 04:29:25 PM PDT 24	2018106619 ps
T447	/workspace/coverage/default/10.sysrst_ctrl_auto_blk_key_output.846774854			Aug 18 04:28:23 PM PDT 24	Aug 18 04:28:32 PM PDT 24	3449495430 ps
T251	/workspace/coverage/default/2.sysrst_ctrl_combo_detect.2973421934			Aug 18 04:28:08 PM PDT 24	Aug 18 04:28:39 PM PDT 24	45146001324 ps
T448	/workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.834119719			Aug 18 04:29:22 PM PDT 24	Aug 18 04:29:23 PM PDT 24	2630419885 ps
T449	/workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.3882537797			Aug 18 04:28:07 PM PDT 24	Aug 18 04:28:10 PM PDT 24	4117599240 ps
T163	/workspace/coverage/default/5.sysrst_ctrl_edge_detect.2233385435			Aug 18 04:28:24 PM PDT 24	Aug 18 04:28:26 PM PDT 24	4449283068 ps
T450	/workspace/coverage/default/34.sysrst_ctrl_alert_test.1484325459			Aug 18 04:29:17 PM PDT 24	Aug 18 04:29:20 PM PDT 24	2018706285 ps
T451	/workspace/coverage/default/16.sysrst_ctrl_flash_wr_prot_out.770285072			Aug 18 04:28:49 PM PDT 24	Aug 18 04:28:55 PM PDT 24	2614791225 ps
T452	/workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.549975403			Aug 18 04:29:25 PM PDT 24	Aug 18 04:29:33 PM PDT 24	3458392341 ps
T453	/workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.1264047431			Aug 18 04:29:16 PM PDT 24	Aug 18 04:29:21 PM PDT 24	3437516039 ps
T454	/workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1061144787			Aug 18 04:29:01 PM PDT 24	Aug 18 04:29:02 PM PDT 24	2117660339 ps
T455	/workspace/coverage/default/39.sysrst_ctrl_pin_access_test.164298921			Aug 18 04:29:19 PM PDT 24	Aug 18 04:29:20 PM PDT 24	2198161428 ps
T456	/workspace/coverage/default/31.sysrst_ctrl_alert_test.2357664920			Aug 18 04:29:04 PM PDT 24	Aug 18 04:29:06 PM PDT 24	2038922350 ps